SRAM memory with improved end-of-read triggering转让专利
申请号 : US16248832
文献号 : US10748604B2
文献日 : 2020-08-18
发明人 : Adam Makosiej , Pablo Royer
申请人 : COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
摘要 :
Circuit for triggering the end of a read operation, for a SRAM memory device, comprising: a plurality of pairs of transistors connected to a bit line and an additional bit line, the transistors each having a source connected to a node, the node and the bit lines being, prior to the activation of said given word line, respectively pre-charged via the pre-charging means, then, when said word line is activated, at least the bit lines are disconnected from the pre-charging means, in such a way as to modify the conduction state of certain transistors and consequently cause a variation in the potential of said node until reaching a determined threshold potential that triggers the emission of an end-of-phase signal.