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1. 发明专利

JP6367213B2 裏面パッシベーションのための装置及び方法有权
公开(公告)号：JP6367213B2
公开(公告)日：2018-08-01
申请号：JP2015544171
申请日：2013-11-25
申请人：アプライドマテリアルズインコーポレイテッド , APPLIED MATERIALS,INCORPORATED
发明人：ハウリルチャック, ララ , トービン, ジェフ
IPC分类号： H01L21/316 , C23C16/42 , C23C16/44 , C23C16/507 , C23C16/01 , H01L21/683 , H01L21/31
CPC分类号： H01L21/02252 , H01L21/02238 , H01L21/02247 , H01L21/6719

2. 发明专利

JP2015156429A 炭化珪素半導体装置およびその製造方法审中-公开
公开(公告)号：JP2015156429A
公开(公告)日：2015-08-27
申请号：JP2014030621
申请日：2014-02-20
申请人：住友電気工業株式会社
发明人：増田健良
IPC分类号： H01L29/78 , H01L29/12 , H01L21/28 , H01L29/41 , H01L29/423 , H01L29/49 , H01L21/3065 , H01L21/316 , H01L21/336
CPC分类号： H01L29/7813 , H01L21/02236 , H01L21/02247 , H01L21/02255 , H01L21/3065 , H01L29/045 , H01L29/1608 , H01L29/4236 , H01L29/4916 , H01L29/495 , H01L29/4975 , H01L29/66734
摘要：【課題】絶縁破壊耐性を向上可能な炭化珪素半導体装置およびその製造方法を提供する。【解決手段】炭化珪素半導体装置1は、炭化珪素基板10と、ゲート絶縁膜20と、ゲート電極30と、層間絶縁膜40aと、ゲート接続配線32とを備えている。炭化珪素基板10は、第1不純物領域13と、第1不純物領域13上に設けられた第2不純物領域14と、第1不純物領域13から隔てられるように第2不純物領域14上に設けられる第3不純物領域15とを含む。トレンチ17は、第3不純物領域15および第2不純物領域14を貫通して第1不純物領域13に至る側部17aと、第1不純物領域13に位置する底部17bとにより形成されている。断面視において、層間絶縁膜40aは、角部17cを覆うように第3不純物領域15上からゲート電極30上まで延在している。【選択図】図1

4. 发明专利

JP2013225655A Semiconductor device manufacturing method, substrate processing method, substrate processing device and program 有权
标题翻译：半导体器件制造方法，基板处理方法，基板处理装置和程序
公开(公告)号：JP2013225655A
公开(公告)日：2013-10-31
申请号：JP2013016237
申请日：2013-01-30
申请人： Hitachi Kokusai Electric Inc , 株式会社日立国際電気
发明人： SANO ATSUSHI , HIROSE YOSHIRO , MAEDA KIYOHIKO , OKUDA KAZUYUKI , YAMAMOTO TAKAHARU
IPC分类号： H01L21/318 , C23C16/455 , H01L21/31 , H01L21/316
CPC分类号： H01L21/02247 , C23C16/34 , C23C16/345 , C23C16/452 , C23C16/45542 , C23C16/45546 , H01L21/0217 , H01L21/02211 , H01L21/02274 , H01L21/0228
摘要： PROBLEM TO BE SOLVED: To form a thin film having low concentration of an impurity such as chlorine in a low temperature region.SOLUTION: A semiconductor device manufacturing method comprises: a process of forming a thin film on a substrate by performing a cycle a predetermine number of times, the cycle including a process of supplying a material gas to the substrate, and a process of supplying excited species generated by plasma excitation of a reaction gas at a plurality of excitation parts provided lateral to the substrate from respective excitation parts to the substrate. In the process of supplying the excited species from respective excitation parts, an in-plane distribution of the excited species in the substrate from at least one excitation part among the plurality of excitation parts is made different from an in-plane distribution of the excited species supplied from another excitation part different from the at least one excitation part.
摘要翻译：要解决的问题：在低温区域形成低浓度杂质如氯的薄膜。解决方案：半导体器件制造方法包括：通过执行预定的循环来在衬底上形成薄膜的工艺次数，包括向衬底供应材料气体的过程的循环，以及在从激励部分到侧面设置在衬底侧面的多个激励部分处将反应气体等离子体激发产生的激发物质供给到基质。在从各个激励部分供应激发物质的过程中，激发物质在多个激发部分中的至少一个激发部分的衬底中的面内分布被制成不同于激发物质的面内分布从与所述至少一个激励部分不同的另一个激励部分提供。

5. 发明专利

JP2013161960A Plasma processing method and plasma processing apparatus 有权
标题翻译：等离子体处理方法和等离子体处理装置
公开(公告)号：JP2013161960A
公开(公告)日：2013-08-19
申请号：JP2012023038
申请日：2012-02-06
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： SHIOZAWA TOSHIHIKO , MIYAHARA JUNYA , FUJINO YUTAKA
IPC分类号： H01L21/316 , H01L21/31 , H01L21/318 , H05H1/46
CPC分类号： H01L21/02164 , H01J37/32201 , H01J37/32238 , H01J37/32266 , H01J37/32311 , H01L21/0217 , H01L21/02238 , H01L21/02247 , H01L21/02252 , H05H1/46 , H05H2001/463
摘要： PROBLEM TO BE SOLVED: To provide a method and an apparatus for forming a thin film having a thickness of 1 nm or less on the surface of a workpiece while controlling the thickness by utilizing plasma.SOLUTION: A plurality of microwaves 5 are introduced in a processing container 2 and, by using a plasma processing apparatus 1 of plasma generation system, plasma is generated while limiting the total power of the plurality of microwaves below 1 W/cmper area of a wafer W. In the plasma oxidation processing, rare gas for plasma generation and an oxygen-containing gas are used, the treatment temperature is set at 100°C or below, and the average oxidation rate during 30 seconds after start of microwave supply is set to 0.03 nm/sec or less. Impedance matching is not performed when igniting plasma by a plurality of microwaves, but performed when treating the wafer W by plasma.
摘要翻译：要解决的问题：提供一种在通过利用等离子体控制厚度的同时在工件表面上形成厚度为1nm以下的薄膜的方法和装置。解决方案：将多个微波5引入到处理容器2，并且通过使用等离子体发生系统的等离子体处理装置1，产生等离子体，同时限制多个微波的总功率低于晶片W的1W / cmper面积。在等离子体氧化处理中，稀有气体用于使用等离子体产生和含氧气体，处理温度设定为100℃以下，微波供给开始30秒后的平均氧化率为0.03nm /秒以下。当通过多个微波点燃等离子体时，不进行阻抗匹配，而是通过等离子体处理晶片W时进行阻抗匹配。

6. 发明专利

JPWO2011027831A1 半導体装置およびその製造方法有权
公开(公告)号：JPWO2011027831A1
公开(公告)日：2013-02-04
申请号：JP2011529942
申请日：2010-09-02
申请人：ローム株式会社
发明人：周平箕谷 , 周平箕谷 , 佑紀中野 , 佑紀中野 , 渡部　平司 , 平司渡部 , 志村　考功 , 考功志村 , 卓治細井 , 卓治細井 , 嵩史桐野 , 嵩史桐野
IPC分类号： H01L21/316 , H01L21/318 , H01L21/336 , H01L21/822 , H01L21/8234 , H01L27/04 , H01L27/06 , H01L29/12 , H01L29/78
CPC分类号： H01L29/7827 , H01L21/02164 , H01L21/02178 , H01L21/0223 , H01L21/02236 , H01L21/02247 , H01L21/02252 , H01L21/02255 , H01L21/0445 , H01L21/049 , H01L21/8213 , H01L29/0847 , H01L29/086 , H01L29/0869 , H01L29/1087 , H01L29/1608 , H01L29/41766 , H01L29/42356 , H01L29/4236 , H01L29/42368 , H01L29/45 , H01L29/511 , H01L29/513 , H01L29/518 , H01L29/66068 , H01L29/78 , H01L29/7802 , H01L29/7813
摘要：半導体装置の製造方法は、炭化シリコン基板上に酸化シリコン膜を形成する工程と、水素を含むガス中で炭化シリコン基板および酸化シリコン膜をアニールする工程と、炭化シリコン基板および酸化シリコン膜のアニール後、酸化シリコン膜上に酸窒化アルミニウム膜を形成する工程とを含んでいる。

7. 发明专利

JP2012038996A Manufacturing method of semiconductor device and semiconductor device 有权
标题翻译：半导体器件和半导体器件的制造方法
公开(公告)号：JP2012038996A
公开(公告)日：2012-02-23
申请号：JP2010179468
申请日：2010-08-10
申请人： Tohoku Univ , 国立大学法人東北大学
发明人： OMI TADAHIRO
IPC分类号： H01L23/52 , H01L21/3205 , H01L25/065 , H01L25/07 , H01L25/18
CPC分类号： H01L23/481 , H01L21/02167 , H01L21/0217 , H01L21/02247 , H01L21/02252 , H01L21/02274 , H01L21/30604 , H01L21/3065 , H01L21/3081 , H01L21/76843 , H01L21/76898 , H01L25/0657 , H01L2224/16
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device having a TSV structure capable of preventing warpage of a substrate even if the substrate is thinned.SOLUTION: A manufacturing method of a semiconductor device comprises: a step of forming at least a part of a circuit by integrating a semiconductor element on a surface of a semiconductor substrate; a step of opening a hole on the surface of the semiconductor device; a step of forming an insulating film and a barrier film on an inner surface of the hole; a step of forming a conductive metal so as to a fill the hole on a surface of the barrier film; a step of decreasing a thickness of the semiconductor substrate by processing an underside of the semiconductor substrate to project the conductive metal; and a step of providing an SiCN film on the underside of the semiconductor substrate.
摘要翻译：要解决的问题：提供一种具有即使基板变薄也能够防止基板翘曲的TSV结构的半导体器件的制造方法。解决方案：半导体器件的制造方法包括：通过将半导体元件集成在半导体衬底的表面上来形成电路的至少一部分的步骤; 在半导体器件的表面上打开孔的步骤; 在孔的内表面上形成绝缘膜和阻挡膜的步骤; 形成导电金属以填充阻挡膜的表面上的孔的步骤; 通过处理半导体衬底的下侧来突出所述导电金属来减小所述半导体衬底的厚度的步骤; 以及在半导体衬底的下侧上提供SiCN膜的步骤。版权所有（C）2012，JPO＆INPIT

8. 发明专利

JP2012033874A Semiconductor device manufacturing method, substrate processing method, and substrate processing device 有权
标题翻译：半导体器件制造方法，基板处理方法和基板处理装置
公开(公告)号：JP2012033874A
公开(公告)日：2012-02-16
申请号：JP2011092570
申请日：2011-04-19
申请人： Hitachi Kokusai Electric Inc , 株式会社日立国際電気
发明人： OTA YOSUKE , HIROSE YOSHIRO , AKAE HISANORI , TAKAZAWA HIROMASA
IPC分类号： H01L21/31 , C23C16/42 , C23C16/455 , H01L21/318
CPC分类号： H01L21/0217 , C23C16/34 , C23C16/345 , C23C16/45523 , C23C16/4557 , C23C16/45574 , C23C16/509 , H01L21/02247 , H01L21/02252 , H01L21/0228
摘要： PROBLEM TO BE SOLVED: To form an insulating film in which hydrogen concentration is extremely low in a high temperature region and film thickness uniformity is excellent.SOLUTION: A semiconductor device manufacturing method and a substrate processing method comprise: a step of forming a prescribed element-containing layer by supplying a material gas including a prescribed element into a processing container housing a substrate; a step of changing the prescribed element-containing layer to a nitride layer by supplying a nitrogen-containing gas into the processing container; and a step of forming a nitride film of a prescribed film thickness on the substrate by sandwiching a step of supplying an inactive gas and purging inside of the processing container between the preceding two steps and alternately repeating these steps. The step of forming the prescribed element-containing layer increases a velocity of the material gas more than that of the inactive gas flowing in a direction parallel to the surface of the substrate also in the step of purging inside of the processing container by supplying the material gas together with the inactive gas or a hydrogen-containing gas via a nozzle provided on the side of the substrate.
摘要翻译：要解决的问题：为了形成在高温区域中氢浓度极低的绝缘膜，并且膜厚均匀性优异。解决方案：半导体器件制造方法和衬底处理方法包括：通过将包含规定要素的材料气体供给到容纳衬底的处理容器中来形成规定的含有含有层的步骤; 通过向处理容器中供给含氮气体来将规定的含有含
有物质的层变更为氮化物层的工序; 以及通过在前述两个步骤之间夹持提供惰性气体和清洗处理容器内部并交替重复这些步骤的步骤，在基板上形成规定膜厚度的氮化物膜的步骤。形成规定含有元素的层的步骤比在与基板的表面平行的方向上流动的惰性气体的速度增加，同时在通过供给材料的清洗处理容器的内部气体与惰性气体或含氢气体一起通过设置在基板一侧的喷嘴。版权所有（C）2012，JPO＆INPIT

9. 发明专利

JP2011119747A Method for forming nitride film, method for forming oxynitride film, method for sputtering nitride film, and method for forming gate insulation film 有权
标题翻译：形成氮化膜的方法，形成氧化膜的方法，用于溅射氮化物膜的方法和形成栅绝缘膜的方法
公开(公告)号：JP2011119747A
公开(公告)日：2011-06-16
申请号：JP2011000365
申请日：2011-01-05
申请人： Foundation For Advancement Of International Science , 財団法人国際科学振興財団
发明人： OMI TADAHIRO , SUGAWA SHIGETOSHI
IPC分类号： H01L21/316 , C23C8/02 , C23C8/36 , C23C14/06 , C23C16/40 , H01L21/31 , H01L21/3105 , H01L21/314 , H01L21/318 , H01L21/336 , H01L21/822 , H01L21/8238 , H01L21/8242 , H01L21/8246 , H01L21/8247 , H01L27/04 , H01L27/105 , H01L27/108 , H01L27/115 , H01L29/423 , H01L29/788 , H01L29/792
CPC分类号： H01L21/31641 , C23C8/02 , C23C8/36 , H01L21/0217 , H01L21/02238 , H01L21/02247 , H01L21/02252 , H01L21/02323 , H01L21/02329 , H01L21/0234 , H01L21/3105 , H01L21/3144 , H01L21/31612 , H01L21/31637 , H01L21/31662 , H01L21/3185 , H01L27/105 , H01L27/115 , H01L27/11521 , H01L27/11526 , H01L27/11546 , H01L29/42324
摘要： PROBLEM TO BE SOLVED: To provide a method for forming a high quality uniform oxide film, nitride film, or oxynitride film, the film thickness of which can be reduced without substantially causing a leakage current.
SOLUTION: A method for forming an insulation film includes: a step of forming the insulation film on a substrate; and a step of exposing the insulation film to atomic state oxygen O* or atomic state hydrogen nitride NH* which is generated with a plasma of an inert gas Kr or Ar to convert the film quality.
COPYRIGHT: (C)2011,JPO&INPIT

10. 发明专利

JP2011044580A Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2011044580A
公开(公告)日：2011-03-03
申请号：JP2009191697
申请日：2009-08-21
申请人： Panasonic Corp , パナソニック株式会社
发明人： SATO YOSHIHIRO , YAMADA TAKAYUKI
IPC分类号： H01L21/8238 , H01L21/318 , H01L21/8234 , H01L27/088 , H01L27/092 , H01L29/78
CPC分类号： H01L27/092 , H01L21/02247 , H01L21/02321 , H01L21/02332 , H01L21/0234 , H01L21/28202 , H01L21/3115 , H01L21/823857 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/665 , H01L29/6656 , H01L29/6659 , H01L29/7833 , H01L29/7843
摘要： PROBLEM TO BE SOLVED: To actualize an n-type, a p-type MIS transistor having a low threshold voltage by increasing the effective work function of the p-type MIS transistor, while suppressing thickening of the converted film thickness of an oxide film of a gate insulating film of the p-type MIS transistor. SOLUTION: The semiconductor device includes a first, a second MIS transistor nTr, pTr. The first MIS transistor nTr includes a first gate insulating film 14A formed on a first active region 10a, having a first high dielectric constant film 14Xa, and a first gate electrode 18A. The second MIS transistor pTr includes a second gate insulating film 14B formed on a second active region 10b, having a second high dielectric constant film 14x, and a second gate electrode 18B. The second high dielectric constant film 14x contains a first metal for adjustment. The first high dielectric constant film 14Xa has higher nitrogen concentration than the second high dielectric constant film 14x and does not contain the first metal for adjustment. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了通过增加p型MIS晶体管的有效功函来实现具有低阈值电压的n型，p型MIS晶体管，同时抑制转换膜厚度的增厚 p型MIS晶体管的栅极绝缘膜的氧化膜。解决方案：半导体器件包括第一，第二MIS晶体管nTr，pTr。第一MIS晶体管nTr包括形成在具有第一高介电常数膜14Xa的第一有源区域10a上的第一栅极绝缘膜14A和第一栅极电极18A。第二MIS晶体管pTr包括形成在具有第二高介电常数膜14x的第二有源区域10b和第二栅极电极18B上的第二栅极绝缘膜14B。第二高介电常数膜14x包含用于调节的第一金属。第一高介电常数膜14Xa比第二高介电常数膜14x具有更高的氮浓度，并且不包含用于调节的第一金属。版权所有（C）2011，JPO＆INPIT

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