专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

2. 发明专利

JP2013129186A Lamination method and lamination device 有权
标题翻译：层压方法和层压装置
公开(公告)号：JP2013129186A
公开(公告)日：2013-07-04
申请号：JP2012172714
申请日：2012-08-03
申请人： Meiki Co Ltd , 株式会社名機製作所
发明人： HIROSE TOMOAKI , YAMAMOTO TAKAYUKI
IPC分类号： B29C65/02 , B29C43/18 , B29C43/34 , B29L31/34
CPC分类号： B32B37/14 , B32B37/10 , B32B37/1009 , B32B2457/14 , H01L2224/75315 , H01L2224/75317 , Y10T156/1002
摘要： PROBLEM TO BE SOLVED: To make a film-like laminate penetrate through at least a surface including a projection of a laminated body and securely laminate by a simple configuration, and perform molding at a uniform thickness without occurrence of voids.SOLUTION: A lamination device includes: heating means 1, 2 for heating at least an insulating resin film F; an upper board 3 and a lower board 4 openably installed and for forming a chamber 34 sealed upon closing; an elastic receiving member 5 disposed on the upper board 3 and opposing to the insulating resin film F superposed on the side on which a bump B of a semiconductor wafer W is formed; an elastic membrane body 6 disposed on the lower board 4 and opposing to the semiconductor wafer W on which the insulating resin film F is superposed; a vacuuming means 7 for vacuuming inside of the chamber 34; and a compressing means 8 for bloating the elastic membrane body 6 and compressing the semiconductor wafer W and the insulating resin film F between the receiving member 5 and the compressing means 8.
摘要翻译：要解决的问题：为了使薄膜状层叠体至少贯穿包括层叠体的突起的表面并且通过简单的结构牢固地层压，并且以均匀的厚度进行模制而不产生空隙。溶液：层压装置包括：至少加热绝缘树脂膜F的加热装置1,2; 可开启地安装并用于形成在关闭时密封的室34的上板3和下板4; 设置在上板3上并与叠置在其上形成有半导体晶片W的凸块B的一侧的绝缘树脂膜F相对的弹性接收构件5; 弹性膜体6，其设置在下板4上并且与重叠有绝缘树脂膜F的半导体晶片W相对; 用于抽吸室34内部的抽气装置7; 以及用于使弹性膜体6膨胀并压缩接收构件5和压缩装置8之间的半导体晶片W和绝缘树脂膜F的压缩装置8。

3. 发明专利

JP5164499B2 Mounting method and electronic component mounting board of the electronic components 有权
公开(公告)号：JP5164499B2
公开(公告)日：2013-03-21
申请号：JP2007250641
申请日：2007-09-27
申请人：デクセリアルズ株式会社
发明人：孝 ▲松▼村
IPC分类号： H05K3/32 , H01L21/60
CPC分类号： H05K3/323 , B30B5/02 , B30B15/065 , H01L24/32 , H01L24/75 , H01L24/83 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/2919 , H01L2224/2929 , H01L2224/293 , H01L2224/32225 , H01L2224/73204 , H01L2224/75251 , H01L2224/75315 , H01L2224/75316 , H01L2224/83101 , H01L2224/838 , H01L2224/83851 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/0665 , H01L2924/0781 , H01L2924/07811 , H01L2924/14 , H05K2203/0278 , H05K2203/1105 , H01L2924/00
摘要： An electronic part mounting method and device for mounting an electronic part while making the most of the advantages of thermocompression bonding using an elastic body so as to enable reduction of voids to an irreducible minimum and significant reduction of defective connections. An electronic part (IC chip (12)) is placed on a wiring board (11) through an adhesive (for example, an anisotropic conductive adhesive film (13)). The IC chip (12), or the electronic part, is pressed with a thermocompression bonding head (2) having a press-bonding portion (4) made of an elastic body, and the anisotropic conductive adhesive film (13) is heated, thereby thermocompression-bonding the IC chip (12) to the wiring board (11). The applied pressure by the thermocompression bonding head (2) is determined so as to reach a predetermined pressure (pressure necessary to get rid of the voids) before the temperature of the anisotropic conductive adhesive film (13) reaches the curing start temperature K of a binding resin (13a) contained in the anisotropic conductive adhesive film (13).

5. 发明专利

JP2012204589A Semiconductor device wafer bonding method 审中-公开
标题翻译：半导体器件波形焊接方法
公开(公告)号：JP2012204589A
公开(公告)日：2012-10-22
申请号：JP2011067623
申请日：2011-03-25
申请人： Disco Abrasive Syst Ltd , 株式会社ディスコ
发明人： MORI TAKASHI
IPC分类号： H01L21/02 , H01L21/60 , H01L25/065 , H01L25/07 , H01L25/18
CPC分类号： H01L24/29 , H01L23/481 , H01L24/11 , H01L24/75 , H01L24/83 , H01L24/94 , H01L25/0657 , H01L25/50 , H01L2224/1184 , H01L2224/16145 , H01L2224/2919 , H01L2224/2929 , H01L2224/73104 , H01L2224/75315 , H01L2224/83101 , H01L2224/83191 , H01L2224/83192 , H01L2224/83193 , H01L2224/83203 , H01L2224/94 , H01L2225/06513 , H01L2225/06541 , H01L2924/07802 , H01L2924/0781 , H01L2924/07811 , H01L2224/81 , H01L2924/00 , H01L2924/0665 , H01L2224/83 , H01L2224/11
摘要： PROBLEM TO BE SOLVED: To provide a bonding method of semiconductor device wafers using an anisotropic conductive material.SOLUTION: A semiconductor device wafer bonding method comprises: an insulator coating step of coating a bump electrode side of a first semiconductor device wafer 11 on which a plurality of semiconductor devices each having a plurality of bump electrodes 17 are formed; a bump electrode end face exposing step of planarizing the bump electrode side of the first semiconductor device wafer 11 coated with the insulator 10 to expose end faces of the bump electrodes 17; and a bonding step of bonding electrodes of a second semiconductor device wafer 24 having the electrodes corresponding to the bump electrodes 17 with the bump electrodes 17 of the first semiconductor device wafer 11 with an anisotropic conductive material 28 to connect the electrodes with the bump electrodes 17.
摘要翻译：要解决的问题：提供使用各向异性导电材料的半导体器件晶片的接合方法。解决方案：半导体器件晶片接合方法包括：绝缘体涂覆步骤，其涂覆第一半导体器件晶片11的凸起电极侧，其上形成有多个凸起电极17的多个半导体器件; 凸起电极端面曝光步骤，平坦化涂覆有绝缘体10的第一半导体器件晶片11的凸块电极侧，以暴露凸块电极17的端面; 以及将具有与凸起电极17对应的电极的第二半导体器件晶片24的电极与第一半导体器件晶片11的凸块电极17的电极与各向异性导电材料28接合以将电极与凸块电极17连接的接合步骤。版权所有（C）2013，JPO＆INPIT

6. 发明专利

JP4996859B2 Application device 有权
公开(公告)号：JP4996859B2
公开(公告)日：2012-08-08
申请号：JP2006033745
申请日：2006-02-10
申请人：ソニーケミカル&インフォメーションデバイス株式会社
发明人：孝 ▲松▼村
IPC分类号： H01L21/60
CPC分类号： H05K3/303 , B30B5/02 , B30B15/024 , B30B15/065 , H01L24/29 , H01L24/32 , H01L24/75 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L2224/16225 , H01L2224/29 , H01L2224/2919 , H01L2224/2929 , H01L2224/29299 , H01L2224/32157 , H01L2224/32225 , H01L2224/73204 , H01L2224/75251 , H01L2224/753 , H01L2224/75315 , H01L2224/75317 , H01L2224/75756 , H01L2224/7598 , H01L2224/83101 , H01L2224/83192 , H01L2224/8323 , H01L2224/83855 , H01L2224/83868 , H01L2224/8388 , H01L2225/06517 , H01L2225/06572 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01033 , H01L2924/01047 , H01L2924/01082 , H01L2924/0665 , H01L2924/0781 , H01L2924/19043 , H01L2924/19105 , H01L2924/19106 , H05K2201/0133 , H05K2203/0191 , H05K2203/0278 , H05K2203/1572 , Y02P70/613 , Y10T156/1089 , H01L2924/0635 , H01L2924/069 , H01L2924/066 , H01L2924/00 , H01L2224/29099 , H01L2224/29199 , H01L2224/0401
摘要： A compression bonding device capable of packaging electric components on both sides of a substrate is provided. A compression bonding device 1 includes first and second pressing rubbers 15, 25. Electric components 32, 33 can be simultaneously packaged on the front face and the rear face of a substrate 31 by sandwiching the substrate 31 between the first and second pressing rubbers 15, 25. The electric components 32, 33 are not subjected to a force for horizontally moving them because the first and second pressing rubbers 15, 25 are prevented from horizontal extension by a first dam member 16. Thus, the electric components 32, 33 are connected to the substrate 31 without misalignment, thereby obtaining a highly reliable electric device 30a.

7. 发明专利

JP4983872B2 Bonding apparatus and a bonding method using the same 有权
公开(公告)号：JP4983872B2
公开(公告)日：2012-07-25
申请号：JP2009178493
申请日：2009-07-31
申请人：カシオ計算機株式会社
发明人：義高藤田
IPC分类号： H01L21/60 , G02F1/1345
CPC分类号： H01L24/75 , H01L24/83 , H01L2224/16225 , H01L2224/32225 , H01L2224/75315 , H01L2224/83101 , H01L2924/15788 , H01L2924/00

8. 发明专利

JP2012084582A Buffer film for multi-chip packaging 有权
标题翻译：多芯片包装的缓冲膜
公开(公告)号：JP2012084582A
公开(公告)日：2012-04-26
申请号：JP2010227420
申请日：2010-10-07
申请人： Sony Chemical & Information Device Corp , ソニーケミカル&インフォメーションデバイス株式会社
发明人： ISHIGAMI AKIRA , KANISAWA SHIKO , NAMIKI HIDEJI , UMAGOE HIDEAKI , AOKI MASAHARU
IPC分类号： H01L21/60 , H01L33/48
CPC分类号： H01L24/29 , B32B7/12 , B32B27/08 , B32B27/281 , B32B27/283 , B32B27/304 , B32B27/32 , B32B27/36 , B32B2307/306 , B32B2307/416 , B32B2307/536 , B32B2457/00 , C08L27/06 , C08L67/00 , C08L79/08 , C08L83/04 , H01L24/16 , H01L24/32 , H01L24/75 , H01L24/81 , H01L24/83 , H01L24/92 , H01L24/95 , H01L25/0753 , H01L33/005 , H01L33/48 , H01L33/60 , H01L33/62 , H01L2224/131 , H01L2224/13144 , H01L2224/16225 , H01L2224/29101 , H01L2224/2919 , H01L2224/2929 , H01L2224/293 , H01L2224/29324 , H01L2224/29339 , H01L2224/29344 , H01L2224/29347 , H01L2224/29355 , H01L2224/29364 , H01L2224/29387 , H01L2224/2939 , H01L2224/294 , H01L2224/32225 , H01L2224/73104 , H01L2224/73204 , H01L2224/75315 , H01L2224/75317 , H01L2224/7532 , H01L2224/7598 , H01L2224/75985 , H01L2224/81001 , H01L2224/81192 , H01L2224/81193 , H01L2224/81203 , H01L2224/81444 , H01L2224/83192 , H01L2224/83203 , H01L2224/8385 , H01L2224/83851 , H01L2224/83907 , H01L2224/9205 , H01L2224/9211 , H01L2224/92143 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/07811 , H01L2924/12041 , H01L2924/15787 , H01L2924/15788 , H01L2933/0033 , H01L2933/0066 , Y10T156/10 , Y10T428/24967 , Y10T428/31544 , Y10T428/31663 , H01L2924/00014 , H01L2224/81 , H01L2224/83 , H01L2924/00 , H01L2924/00012 , H01L2924/3512
摘要： PROBLEM TO BE SOLVED: To provide a buffer film for multi-chip packaging capable of securing excellent connection reliability without causing a misalignment when packaging a multi-chip.SOLUTION: A buffer film for multi-chip packaging has a structure in which a heat resistant resin layer having a linear expansion coefficient of 80 ppm/°C or less and a flexible resin layer formed of a resin material whose Shore A hardness in JIS-K6253 is 10 to 80 are laminated. A multi-chip module can be manufactured by aligning a plurality of chip elements to a substrate via an adhesive, temporarily pasting the plurality of the chip elements, disposing the buffer film for multi-chip packaging between the chip elements and a bonding head so that the heat resistant resin layer exists on the chip element side, and heating and pressurizing the plurality of the chip elements to the substrate with the bonding head.
摘要翻译：要解决的问题：提供一种用于多芯片封装的缓冲膜，其能够在封装多芯片时确保优异的连接可靠性而不会引起不对准。解决方案：用于多芯片封装的缓冲膜具有这样的结构，其中线膨胀系数为80ppm /℃或更低的耐热树脂层和由树脂材料形成的柔性树脂层，其肖氏A硬度在JIS-K6253中为10〜80层压。可以通过粘合剂将多个芯片元件与衬底对准，临时粘贴多个芯片元件，将用于多芯片封装的缓冲膜设置在芯片元件和结合头之间，从而制造多芯片模块，使得耐热树脂层存在于芯片元件侧，利用接合头对多个芯片元件进行加热加压。版权所有（C）2012，JPO＆INPIT

9. 发明专利

JPWO2009128206A1 フリップチップ実装方法とフリップチップ実装装置およびそれに使用されるツール保護シート有权
公开(公告)号：JPWO2009128206A1
公开(公告)日：2011-08-04
申请号：JP2010508098
申请日：2009-03-30
申请人：パナソニック株式会社
发明人：戸村　善広 , 善広戸村 , 謙太郎熊澤 , 謙太郎熊澤 , 樋口　貴之 , 貴之樋口 , 浩二郎中村 , 浩二郎中村
IPC分类号： H01L21/60
CPC分类号： H01L24/75 , H01L21/563 , H01L21/568 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/75 , H01L2224/75252 , H01L2224/75304 , H01L2224/75315 , H01L2224/75317 , H01L2224/75501 , H01L2224/81005 , H01L2224/81203 , H01L2224/81209 , H01L2224/81801 , H01L2224/81907 , H01L2224/83102 , H01L2224/83192 , H01L2224/83203 , H01L2224/83209 , H01L2224/83856 , H01L2224/83862 , H01L2224/83907 , H01L2224/9205 , H01L2224/92125 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/07811 , H01L2924/15787 , H01L2924/15788 , H01L2924/3025 , Y10T428/249954 , H01L2924/00
摘要：ツール保護シート10の加圧フィルム10bの側にシールドフィルム18を有し、半導体チップ1をツール保護シート10を介して加熱加圧する際に、シート固定治具9により加圧フィルム10bを離型させ、加圧加熱ツール11により加圧フィルムが膨張し、半導体チップ1の周辺からはみ出ている絶縁性樹脂膜5に当接し、外圧力をかけながら硬化させることを特徴とする。

10. 发明专利

JPWO2009001564A1 半導体素子の実装構造体及びその製造方法、半導体素子の実装方法、並びに加圧ツール有权
公开(公告)号：JPWO2009001564A1
公开(公告)日：2010-08-26
申请号：JP2009520355
申请日：2008-06-26
申请人：パナソニック株式会社
发明人：鉄平岩瀬 , 鉄平岩瀬 , 戸村　善広 , 善広戸村 , 一博登 , 一博登 , 山田　雄一郎 , 雄一郎山田 , 謙太郎熊澤 , 謙太郎熊澤
IPC分类号： H01L21/60 , H01L25/065 , H01L25/07 , H01L25/18
CPC分类号： H01L24/75 , B30B5/02 , H01L21/56 , H01L21/563 , H01L23/3121 , H01L24/83 , H01L24/90 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/73203 , H01L2224/73204 , H01L2224/75 , H01L2224/75252 , H01L2224/75303 , H01L2224/75315 , H01L2224/75756 , H01L2224/83192 , H01L2224/83855 , H01L2924/00014 , H01L2924/01004 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/18161 , H01L2924/3512 , H01L2924/00 , H01L2224/05599
摘要：半導体チップのパッド上に形成されたバンプと、表面にシート状の封止接着用樹脂を貼り付けた基板を対向させ、ツールで押し付けることで、半導体チップと基板の間に封止接着樹脂が充填され、かつ半導体チップのパッドと基板の電極がバンプを介して接続されて形成される半導体チップの実装構造において、半導体チップのコーナー部分における側面全体が封止接着用樹脂によって覆われるようにする。これにより、実装時の加熱、冷却処理によって生じる各部材の熱膨張、収縮差および実装後の機械的な負荷に対する基板のたわみによる半導体チップのコーナー部分に発生する負荷を軽減し、チップ内部の破壊を回避できる。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式