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    • 13. 发明申请
    • PIXEL STRUCTURE WITH A PHOTODETECTOR HAVING AN EXTENDED DEPLETION DEPTH
    • 具有延伸深度深度的光电转换器的像素结构
    • US20090243025A1
    • 2009-10-01
    • US12054505
    • 2008-03-25
    • Eric G. StevensHung Q. DoanShou-Gwo WuuChung-Wei Chang
    • Eric G. StevensHung Q. DoanShou-Gwo WuuChung-Wei Chang
    • H01L31/101
    • H01L27/14609H01L27/14603H01L27/14689
    • An image sensor includes an imaging area that includes a plurality of pixels that are formed in a substrate layer of a first conductivity type. Each pixel includes a collection region that is formed in a portion of the substrate layer and doped with a dopant of a first conductivity type. A plurality of wells are disposed in portions of the substrate layer and doped with another dopant of the second conductivity type. Each well is positioned laterally adjacent to each collection region. A buried layer spans the imaging area and is disposed in a portion of the substrate layer that is beneath the photodetectors and the wells. The buried layer is doped with a dopant of a second conductivity type. Each collection region, each well, and the buried layer are formed such that a region of the substrate layer having substantially the same doping as the substrate layer resides between each collection region and the buried layer.
    • 图像传感器包括具有形成在第一导电类型的衬底层中的多个像素的成像区域。 每个像素包括形成在衬底层的一部分中并掺杂有第一导电类型的掺杂剂的收集区域。 多个阱设置在衬底层的部分中并且掺杂有另一种第二导电类型的掺杂剂。 每个井横向定位在每个收集区域附近。 掩埋层跨越成像区域并且被布置在基底层的位于光电检测器和孔下方的部分中。 掩埋层掺杂有第二导电类型的掺杂剂。 每个收集区域,每个阱和掩埋层被形成为使得具有与衬底层基本相同的掺杂的衬底层的区域驻留在每个收集区域和掩埋层之间。
    • 16. 发明授权
    • Method of forming a composite spacer to eliminate polysilicon stringers between elements in a pseudo SRAM cell
    • 形成复合间隔物以消除伪SRAM单元中的元件之间的多晶硅桁条的方法
    • US06638813B1
    • 2003-10-28
    • US10059825
    • 2002-01-29
    • Kuo-Chyuan TzengChen-Jong WangChung-Wei ChangWen-Chuan ChiangWen-Cheng ChenKuo-Ching Huang
    • Kuo-Chyuan TzengChen-Jong WangChung-Wei ChangWen-Chuan ChiangWen-Cheng ChenKuo-Ching Huang
    • H01L218242
    • H01L28/60H01L21/31111H01L21/31116H01L21/32137H01L21/76232H01L27/11
    • A process for forming a composite insulator spacer on the sides of a buried stack capacitor structure, wherein the buried stack capacitor structure is located overlying a portion of an insulator filled, shallow trench isolation (STI) region, has been developed. A thin silicon nitride spacer is first formed on the sides of the completed buried stack capacitor structure, followed by deposition of a silicon oxide layer. An anisotropic dry etch procedure is next employed removing a top portion of the silicon oxide layer, and resulting in a partially defined silicon oxide spacer. A critical wet etch procedure is next used to remove the bottom portion of the silicon oxide layer, defining the final silicon oxide spacer of the composite insulator spacer, now comprised of a silicon oxide spacer on an underlying silicon nitride spacer. The wet etch procedure allows a gradual slope to be created at the composite insulator spacer—STI region interface, reducing the risk of leaving, or forming polysilicon residuals or stringers on the underlying surface, which can occur during definition of a MOSFET gate structure. The elimination of the polysilicon stringers reduces the risk of leakage between SRAM cell elements, such as buried stack capacitor structures, and MOSFET devices.
    • 已经开发了一种用于在掩埋叠层电容器结构的侧面上形成复合绝缘体间隔物的方法,其中埋层叠层电容器结构位于绝缘体填充的浅沟槽隔离(STI)区域的一部分上方。 首先在完成的掩埋堆叠电容器结构的侧面上形成薄的氮化硅间隔物,然后沉积氧化硅层。 接下来,使用各向异性干蚀刻工艺去除氧化硅层的顶部,并产生部分限定的氧化硅间隔物。 接下来使用关键的湿法蚀刻工艺来去除氧化硅层的底部,限定复合绝缘垫片的最终氧化硅隔离物,现在由下面的氮化硅间隔物上的氧化硅间隔物构成。 湿蚀刻工艺允许在复合绝缘体间隔件-ST区域界面处产生逐渐的斜率,从而降低在MOSFET栅极结构的定义期间可能发生的在下表面上的离开风险或形成多晶硅残余物或桁条。 多晶硅桁架的消除降低了诸如掩埋堆叠电容器结构的SRAM单元元件和MOSFET器件之间的泄漏的风险。
    • 17. 发明授权
    • Image sensing device and fabrication thereof
    • 图像感测装置及其制造
    • US08368160B2
    • 2013-02-05
    • US12898419
    • 2010-10-05
    • Chung-Wei ChangFang-Ming HuangChi-Shao LinYu-Ping Hu
    • Chung-Wei ChangFang-Ming HuangChi-Shao LinYu-Ping Hu
    • H01L31/042
    • H01L31/18H01L27/14621H01L27/1463H01L27/14645H01L27/14689
    • An image sensing device is disclosed, including an epitaxy layer having the a conductivity type, including a first pixel area corresponding to a first incident light, a second pixel area corresponding to a second incident light, and a third pixel area corresponding to a third incident light, wherein the wavelength of the first incident light is longer than that of the second incident light and the wavelength of the second incident light is longer than that of the third incident light. A photodiode is disposed in an upper portion of the epitaxy layer, and a first deep well for reducing pixel-to-pixel talk of the image sensing device is disposed in a lower portion of the epitaxy layer in the second pixel area and the third pixel area, wherein at least a portion of the epitaxy layer in first pixel area does not include the first deep well.
    • 公开了一种图像感测装置,包括具有导电类型的外延层,包括对应于第一入射光的第一像素区域,对应于第二入射光的第二像素区域和对应于第三入射光的第三像素区域 光,其中第一入射光的波长比第二入射光的波长长,第二入射光的波长比第三入射光的波长长。 光电二极管设置在外延层的上部,并且用于减少图像感测装置的像素到像素的通话的第一深阱设置在第二像素区域中的外延层的下部和第三像素 区域,其中第一像素区域中的外延层的至少一部分不包括第一深孔。