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21. 发明授权

US08138509B2 Light emitting device having luminescent layer with opening to exposed bond pad on light emitting die for wire bonding pad to substrate 有权
标题翻译：具有发光层的发光器件，其具有与发光管芯上的暴露的接合焊盘开口，用于将焊盘焊接到衬底
公开(公告)号：US08138509B2
公开(公告)日：2012-03-20
申请号：US12395086
申请日：2009-02-27
申请人： Tzy-Ying Lin , Chun-Chiang Yen , Wu-Cheng Kuo
发明人： Tzy-Ying Lin , Chun-Chiang Yen , Wu-Cheng Kuo
IPC分类号： H01L33/36
CPC分类号： H01L33/508 , H01L24/05 , H01L24/06 , H01L24/48 , H01L2224/04042 , H01L2224/05556 , H01L2224/05599 , H01L2224/48091 , H01L2224/48463 , H01L2224/85399 , H01L2924/00014 , H01L2924/01013 , H01L2924/01055 , H01L2924/01058 , H01L2924/01064 , H01L2924/01079 , H01L2924/01082 , H01L2924/12041 , H01L2224/45099 , H01L2924/00
摘要： Light emitting devices conformally covered by a luminescent material layer are presented. A light emitting device includes a semiconductor light emitting die attached to a substrate. At least one bond pad is disposed on the semiconductor light emitting die. A luminescent material layer conformally covers the semiconductor light emitting die, wherein the luminescent material layer has at least one opening corresponding to and exposing the at least one bond pad. At least one wirebond is electrically connected to the at least one bond pad and a contact pad on the substrate.
摘要翻译：呈现由发光材料层共形覆盖的发光器件。发光器件包括附接到衬底的半导体发光芯片。至少一个接合焊盘设置在半导体发光管芯上。发光材料层共形地覆盖半导体发光管芯，其中发光材料层具有至少一个对应于并暴露至少一个焊盘的开口。至少一个引线键电连接到所述至少一个接合焊盘和所述衬底上的接触焊盘。

22. 发明申请

US20100051982A1 LIGHT-EMITTING DIODE DEVICE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：发光二极管装置及其制造方法
公开(公告)号：US20100051982A1
公开(公告)日：2010-03-04
申请号：US12200171
申请日：2008-08-28
申请人： Tzu-Han Lin , Jui-Ping Weng , Tzy-Ying Lin , Kuo-Jung Fu
发明人： Tzu-Han Lin , Jui-Ping Weng , Tzy-Ying Lin , Kuo-Jung Fu
IPC分类号： H01L33/00
CPC分类号： H01L33/507 , H01L33/44 , H01L33/486 , H01L33/58 , H01L33/62 , H01L2224/48091 , H01L2224/48227 , H01L2924/10253 , H01L2933/0091 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor device is disclosed. The semiconductor device comprises a light-emitting diode chip disposed in a cavity of a semiconductor substrate. At least two isolated outer wiring layers are disposed on the bottom surface of the semiconductor substrate and are electrically connected to the light-emitting diode chip, serving as input terminals. A lens module is adhered to the top surface of the semiconductor substrate to cap the cavity, in which the lens module comprises a molded lens and a transparent conductive layer coated with a fluorescent material under the molded lens. A method for fabricating the semiconductor devices is also disclosed.
摘要翻译：公开了一种半导体器件。半导体器件包括设置在半导体衬底的空腔中的发光二极管芯片。至少两个隔离的外部布线层设置在半导体衬底的底表面上，并且与用作输入端子的发光二极管芯片电连接。透镜模块粘附到半导体衬底的顶表面以盖住空腔，其中透镜模块包括模制透镜和在模制透镜下方涂覆有荧光材料的透明导电层。还公开了一种用于制造半导体器件的方法。

23. 发明申请

US20080164553A1 Isolation structures for CMOS image sensor chip scale packages 有权
标题翻译： CMOS图像传感器芯片级封装的隔离结构
公开(公告)号：US20080164553A1
公开(公告)日：2008-07-10
申请号：US11649242
申请日：2007-01-04
申请人： Tzu-Han Lin , Tzy-Ying Lin , Fang-Chang Liu , Kai-Chih Wang
发明人： Tzu-Han Lin , Tzy-Ying Lin , Fang-Chang Liu , Kai-Chih Wang
IPC分类号： H01L31/0203 , H01L31/18
CPC分类号： H01L27/14618 , H01L24/05 , H01L24/13 , H01L2224/0401 , H01L2924/01078 , H01L2924/12043 , H01L2924/14 , H01L2924/15311 , H01L2924/3025 , H01L2924/00
摘要： Isolation structure for CMOS image sensor device chip scale packages and fabrication methods thereof. A CMOS image sensor chip scale package includes a transparent substrate configured as a support structure for the package. The transparent substrate includes a first cutting edge and a second cutting edge. A CMOS image sensor die with a die circuitry is mounted on the transparent substrate. An encapsulant is disposed on the substrate encapsulating the CMOS image sensor die. A connection extends from the die circuitry to a plurality of terminal contacts for the package on the encapsulant, wherein the connection is exposed by the first cutting edge. An isolation structure is disposed on the first cutting edge passivating the exposed connection and co-planed with the second cutting edge.
摘要翻译： CMOS图像传感器芯片级封装的隔离结构及其制造方法。 CMOS图像传感器芯片级封装包括被配置为用于封装的支撑结构的透明衬底。透明基板包括第一切削刃和第二切削刃。具有裸片电路的CMOS图像传感器芯片安装在透明基板上。密封剂设置在封装有CMOS图像传感器芯片的基板上。连接从管芯电路延伸到密封剂上的封装的多个端子触头，其中连接由第一切削刃暴露。隔离结构设置在第一切削刃上，钝化暴露的连接并与第二切削刃共同设计。

24. 发明授权

US06555277B1 Quartz damage repair method for high-end mask 有权
标题翻译：石英损伤修复方法为高档面膜
公开(公告)号：US06555277B1
公开(公告)日：2003-04-29
申请号：US10134822
申请日：2002-04-26
申请人： Same-Ting Chen , Tzy-Ying Lin , Wen-Rong Huang
发明人： Same-Ting Chen , Tzy-Ying Lin , Wen-Rong Huang
IPC分类号： G03F900
CPC分类号： G03F1/72
摘要： In accordance with the objectives of the invention a new method is provided for repairing photolithographic exposure masks. The invention uses an etch function of a conventional mask repair tool. The invention addresses defects that occur in a pattern of opaque material (such as chrome) created over the surface of an exposure mask whereby an (undesired) opening exists in the opaque material. The invention uses a focused E-beam exposure of the surface of the exposure mask to purposely “damage” this surface over the area where the opaque material is required to be present. Repair accuracy is in this manner easy to control, the conventional problem of peeling of the opaque or light sensitive material is eliminated.
摘要翻译：根据本发明的目的，提供了一种用于修复光刻曝光掩模的新方法。本发明使用常规掩模修复工具的蚀刻功能。本发明解决了在曝光掩模的表面上产生的不透明材料（例如铬）的图案中发生的缺陷，由此在不透明材料中存在（不期望的）开口。本发明使用曝光掩模的表面的聚焦电子束曝光来有目的地在要求存在不透明材料的区域上“损坏”该表面。以这种方式易于控制的修复精度，消除了不透明或光敏材料剥离的常规问题。

25. 发明授权

US5471552A Fabrication of static-alignment fiber-guiding grooves for planar lightwave circuits 失效
标题翻译：用于平面光波电路的静态取向光纤引导槽的制造
公开(公告)号：US5471552A
公开(公告)日：1995-11-28
申请号：US391850
申请日：1995-02-22
申请人： Dong-Sing Wuu , Tzung-Rue Hsieh , Tzy-Ying Lin , Hong-Ming Chen
发明人： Dong-Sing Wuu , Tzung-Rue Hsieh , Tzy-Ying Lin , Hong-Ming Chen
IPC分类号： G02B6/12 , G02B6/136 , G02B6/30 , G02B6/36 , G02B6/10
CPC分类号： G02B6/3636 , G02B6/136 , G02B6/30 , G02B2006/12097 , G02B2006/121 , G02B6/3652 , G02B6/3692 , Y10S438/97
摘要： A method for fabricating planar lightwave circuits with at least one static-alignment fiber-guiding groove comprising the steps of: (a) fabricating a sandwiched Si-substrate by forming an etching stop layer on a first Si layer, followed by forming a second Si layer on the etching stop layer; (b) forming a waveguide layer on the Si-substrate, the waveguide layer containing at least one planar waveguide channel buried between a first cladding layer and a second cladding layer; (c) forming a photomask on the waveguide layer so as to allow the fiber-guiding grooves to be fabricated; (d) using the photomask and a first reactive ion etching procedure to form a first portion of the fiber-guiding groove, the first reactive ion etching procedure is controlled such that it etches through the waveguide layer and stops at the second Si layer; and (e) using the photomask and a second reactive ion etching procedure to form a second portion of the fiber-guiding groove, wherein the second reactive etching ion is selected in such a manner that the second reactive ion etching procedure etches only through the second Si layer and stops at the interface between the second Si layer and the etching stop layer. In a preferred embodiment, the etching stop layer comprises a glass material which is resistant to the second reactive etching ion, the fiber-guiding groove is a U-shaped groove, and the waveguide channel has a refractive index which differs from that of the first and second cladding layers by about 0.25%. The etching stop layer provides precise depth control and ensures the repeatibility of light coupling efficiency between the optical fiber and the waveguide, a critical element in lightwave circuits.
摘要翻译：一种用于制造具有至少一个静态取向光纤导引槽的平面光波电路的方法，包括以下步骤：（a）通过在第一Si层上形成蚀刻停止层，然后形成第二Si 蚀刻停止层上的层; （b）在所述Si衬底上形成波导层，所述波导层包含至少一个掩埋在第一覆层和第二覆层之间的平面波导沟道; （c）在波导层上形成光掩模，以便制造光纤引导槽; （d）使用光掩模和第一反应离子蚀刻步骤形成纤维引导槽的第一部分，控制第一反应离子蚀刻步骤，使其蚀刻穿过波导层并停止在第二Si层; 和（e）使用光掩模和第二反应离子蚀刻程序形成纤维引导槽的第二部分，其中第二反应蚀刻离子以这样的方式选择，使得第二反应离子蚀刻步骤仅通过第二反应离子蚀刻步骤 Si层并停止在第二Si层和蚀刻停止层之间的界面处。在优选实施例中，蚀刻停止层包括耐第二反应蚀刻离子的玻璃材料，纤维导向槽是U形槽，并且波导通道的折射率不同于第一反应蚀刻离子的折射率和第二覆层约0.25％。蚀刻停止层提供精确的深度控制，并确保光纤和波导之间的光耦合效率的重复性，这是光波电路中的关键元件。

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