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51. 发明申请

US20160079237A1 High Voltage Semiconductor Power Switching Device 有权
公开(公告)号：US20160079237A1
公开(公告)日：2016-03-17
申请号：US14949021
申请日：2015-11-23
申请人： Mosway Semiconductor Limited
发明人： Chiu-Sing Celement Tse , On-Bon Peter Chan , Chi-Keung Tang
IPC分类号： H01L27/06 , H01L27/082 , H01L21/56 , H01L29/45 , H01L23/535 , H01L29/08 , H01L29/10 , H01L29/417 , H01L29/423 , H01L29/06 , H01L29/49 , H01L21/8249 , H01L21/84 , H01L27/12 , H01L29/872
CPC分类号： H01L27/0635 , H01L21/565 , H01L21/8249 , H01L21/84 , H01L23/535 , H01L27/0647 , H01L27/0825 , H01L27/1203 , H01L29/0634 , H01L29/0804 , H01L29/0821 , H01L29/0847 , H01L29/1004 , H01L29/1095 , H01L29/41708 , H01L29/41758 , H01L29/42304 , H01L29/42356 , H01L29/42364 , H01L29/45 , H01L29/4916 , H01L29/872 , H01L2224/48137 , H01L2224/48247 , H01L2224/49171 , H01L2924/13055 , H01L2924/00
摘要： A three terminal high voltage Darlington bipolar transistor power switching device includes two high voltage bipolar transistors, with collectors connected together serving as the collector terminal. The base of the first high voltage bipolar transistor serves as the base terminal. The emitter of the first high voltage bipolar transistor connects to the base of the second high voltage bipolar transistor (inner base), and the emitter of the second high voltage bipolar transistor serves as the emitter terminal. A diode has its anode connected to the inner base (emitter of the first high voltage bipolar transistor, or base of the second high voltage bipolar transistor), and its cathode connected to the base terminal. Similarly, a three terminal hybrid MOSFET/bipolar high voltage switching device can be formed by replacing the first high voltage bipolar transistor of the previous switching device by a high voltage MOSFET.

52. 发明授权

US09147756B2 Electronic device and method for increasing reliability of bipolar transistors under high voltage conditions 有权
标题翻译：用于在高电压条件下提高双极晶体管的可靠性的电子器件和方法
公开(公告)号：US09147756B2
公开(公告)日：2015-09-29
申请号：US13557394
申请日：2012-07-25
申请人： Philipp Menz , Berthold Staufer , Yasuda Hiroshi
发明人： Philipp Menz , Berthold Staufer , Yasuda Hiroshi
IPC分类号： H01L27/082 , H01L29/00 , H01L27/102 , H01L29/73 , H01L29/732 , H01L29/10 , H01L29/66
CPC分类号： H01L29/73 , H01L29/1004 , H01L29/66234 , H01L29/7325
摘要： The invention relates to an electronic device with a bipolar transistor having an emitter, a base and a collector. The base has a first region of a first concentration of the first dopant for forming an electrically active region of the base and a second region of a second concentration of the first dopant close to the surface of the base region. The first region is separated from the second region by a region of a third concentration of the first dopant and the third concentration is lower than the first and the second concentration.
摘要翻译：本发明涉及具有发射极，基极和集电极的双极晶体管的电子器件。基底具有用于形成基底的电活性区域的第一掺杂物的第一浓度的第一区域和靠近基底区域的表面的第一掺杂物的第二浓度的第二区域。第一区域与第二区域分离第一掺杂剂的第三浓度的区域，第三浓度低于第一浓度和第二浓度。

53. 发明申请

US20150270256A1 SEGMENTED NPN VERTICAL BIPOLAR TRANSISTOR 有权
标题翻译： SEGMENTED NPN垂直双极晶体管
公开(公告)号：US20150270256A1
公开(公告)日：2015-09-24
申请号：US14222288
申请日：2014-03-21
申请人： Texas Instruments Incorporated
发明人： HENRY LITZMANN EDWARDS , AKRAM A. SALMAN , MD. IQBAL MAHMUD
IPC分类号： H01L27/02 , H01L27/082 , H01L29/737
CPC分类号： H01L27/0259 , H01L27/0825 , H01L29/0804 , H01L29/41708 , H01L29/732
摘要： A segmented bipolar transistor includes a p-base in a semiconductor surface including at least one p-base finger having a base metal/silicide stack including a base metal line that contacts a silicide layer on the semiconductor surface of the p-base finger. An n+ buried layer is under the p-base. A collector includes an n+ sinker extending from the semiconductor surface to the n+ buried layer including a collector finger having a collector metal/silicide stack including a collector metal line that contacts a silicide layer on the semiconductor surface of the collector finger. An n+ emitter has at least one emitter finger including an emitter metal/silicide stack that contacts the silicide layer on the semiconductor surface of the emitter finger. The emitter metal/silicide stack and/or collector metal/silicide stack include segmentation with a gap which cuts a metal line and/or the silicide layer of the stack.
摘要翻译：分段双极晶体管包括在半导体表面中的p基底，其包括至少一个具有基底金属/硅化物堆叠的p基指，所述基底金属/硅化物堆叠包括接触p基指的半导体表面上的硅化物层的基底金属线。 n +掩埋层位于p基底下。收集器包括从半导体表面延伸到n +掩埋层的n +沉降片，其包括具有集电极金属/硅化物堆叠的集电极指状物，该集电极金属/硅化物堆叠包括接触集电极指状物的半导体表面上的硅化物层的集电极金属线。 n +发射极具有至少一个发射极指，其包括与发射极指状物的半导体表面上的硅化物层接触的发射极金属/硅化物堆叠。发射极金属/硅化物堆叠和/或集电极金属/硅化物堆叠包括用切割金属线和/或堆叠的硅化物层的间隙进行分割。

54. 发明申请

US20150221641A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20150221641A1
公开(公告)日：2015-08-06
申请号：US14332526
申请日：2014-07-16
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Kazuaki ONISHI
IPC分类号： H01L27/088 , H01L29/739 , H01L29/36 , H01L27/08 , H01L27/082 , H01L29/10 , H01L29/861 , H01L29/78
CPC分类号： H01L27/088 , H01L24/05 , H01L24/06 , H01L24/29 , H01L24/30 , H01L24/32 , H01L24/33 , H01L27/0814 , H01L27/0823 , H01L29/0615 , H01L29/0619 , H01L29/1095 , H01L29/36 , H01L29/407 , H01L29/41725 , H01L29/45 , H01L29/7397 , H01L29/7811 , H01L29/7813 , H01L29/861 , H01L29/8611 , H01L2224/04026 , H01L2224/05073 , H01L2224/05166 , H01L2224/05624 , H01L2224/06181 , H01L2224/291 , H01L2224/30181 , H01L2224/32013 , H01L2224/32245 , H01L2224/33181 , H01L2224/83447 , H01L2924/10253 , H01L2924/10272 , H01L2924/1033 , H01L2924/12036 , H01L2924/13055 , H01L2924/13091 , H01L2924/014 , H01L2924/00014
摘要： According to one embodiment, a semiconductor device includes a first electrode disposed on a first surface of a semiconductor substrate, and a second electrode disposed on a second surface of the semiconductor substrate. The first surface is on an opposite side of the semiconductor substrate from the second surface. A first conductive member is provided on a central portion of the first electrode. A second conductive member is provided on the second electrode. The first conductive member is not disposed on a peripheral portion of the first electrode that is adjacent to the central portion. The electrical resistance of the semiconductor substrate between the central portion of the first electrode and the second electrode is lower than electrical resistance of the substrate between the peripheral portion of the first electrode and the second electrode.
摘要翻译：根据一个实施例，半导体器件包括设置在半导体衬底的第一表面上的第一电极和设置在半导体衬底的第二表面上的第二电极。第一表面与半导体衬底的与第二表面相反的一侧。第一导电构件设置在第一电极的中心部分上。第二导电构件设置在第二电极上。第一导电构件没有设置在与中心部分相邻的第一电极的周边部分上。半导体衬底在第一电极的中心部分和第二电极之间的电阻低于第一电极的周边部分和第二电极之间的衬底的电阻。

55. 发明授权

US09031684B2 Multi-factor advanced process control method and system for integrated circuit fabrication 有权
标题翻译：多因素先进的集成电路制造过程控制方法和系统
公开(公告)号：US09031684B2
公开(公告)日：2015-05-12
申请号：US13286337
申请日：2011-11-01
申请人： Nai-Han Cheng , Chin-Hsiang Lin , Chi-Ming Yang , Chun-Lin Chang , Chih-Hong Hwang
发明人： Nai-Han Cheng , Chin-Hsiang Lin , Chi-Ming Yang , Chun-Lin Chang , Chih-Hong Hwang
IPC分类号： G06F19/00 , G06F17/50 , H01L29/00 , H01L27/082 , H05K1/00
CPC分类号： G06F17/5063 , G06F2217/10
摘要： A method and system for integrated circuit fabrication is disclosed. In an example, the method includes determining a first process parameter of a wafer and a second process parameter of the wafer, the first process parameter and the second process parameter corresponding to different wafer characteristics; determining a variation of a device parameter of the wafer based on the first process parameter and the second process parameter; constructing a model for the device parameter as a function of the first process parameter and the second process parameter based on the determined variation of the device parameter of the wafer; and performing a fabrication process based on the model.
摘要翻译：公开了一种用于集成电路制造的方法和系统。在一个示例中，该方法包括确定晶片的第一工艺参数和晶片的第二工艺参数，对应于不同晶片特性的第一工艺参数和第二工艺参数; 基于所述第一处理参数和所述第二处理参数确定所述晶片的设备参数的变化; 基于确定的晶片的器件参数的变化，构造作为第一工艺参数和第二工艺参数的函数的器件参数的模型; 并基于该模型执行制造过程。

56. 发明授权

US08907452B2 Device for detecting a laser attack in an integrated circuit chip 有权
标题翻译：用于检测集成电路芯片中的激光攻击的装置
公开(公告)号：US08907452B2
公开(公告)日：2014-12-09
申请号：US13751549
申请日：2013-01-28
申请人： STMicroelectronics (Rousset) SAS
发明人： Fabrice Marinet , Jimmy Fort , Alexandre Sarafianos , Julien Mercier
IPC分类号： H01L27/082
CPC分类号： H01L23/576 , G09C1/00 , H01L23/57 , H01L27/0635 , H01L27/0658 , H01L27/092 , H01L29/7322 , H01L2924/0002 , H04L9/004 , H04L2209/12 , H01L2924/00
摘要： A device for detecting a laser attack in an integrated circuit chip formed in the upper P-type portion of a semiconductor substrate incorporating an NPN bipolar transistor having an N-type buried layer, including a detector of the variations of the current flowing between the base of said NPN bipolar transistor and the substrate.
摘要翻译：一种用于检测形成在具有N型掩埋层的NPN双极晶体管的半导体衬底的上部P型部分中形成的集成电路芯片中的激光攻击的装置，包括：检测器，的NPN双极晶体管和衬底。

57. 发明申请

US20140353757A1 Integrated Circuits and Methods of Design and Manufacture Thereof 审中-公开
标题翻译：集成电路及其设计和制造方法
公开(公告)号：US20140353757A1
公开(公告)日：2014-12-04
申请号：US14323914
申请日：2014-07-03
申请人： Infineon Technologies AG
发明人： Henning Haffner , Manfred Eller , Richard Lindsay
IPC分类号： H01L27/082 , G06F17/50 , G03F1/00 , H01L27/085
CPC分类号： G06F17/5072 , G03F1/00 , G06F2217/12 , H01L21/0334 , H01L21/28123 , H01L21/823425 , H01L21/823437 , H01L27/0207 , H01L27/082 , H01L27/085 , H01L27/088 , H01L29/6659 , H01L29/7833 , Y10T29/41
摘要： Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes using a first mask to pattern a gate material forming a plurality of first and second features. The first features form gate electrodes of the semiconductor devices, whereas the second features are dummy electrodes. Based on the location of these dummy electrodes, selected dummy electrodes are removed using a second mask. The use of the method provides greater flexibility in tailoring individual devices for different objectives.
摘要翻译：公开了集成电路及其制造和设计方法。例如，制造方法包括使用第一掩模对形成多个第一和第二特征的栅极材料进行图案化。第一特征形成半导体器件的栅电极，而第二特征是虚拟电极。基于这些虚拟电极的位置，使用第二掩模去除所选择的虚拟电极。该方法的使用提供了更大的灵活性，为不同的目标定制单个设备。

58. 发明申请

US20140332847A1 Composite One-Piece IGBT Device and Producing Method Thereof 审中-公开
标题翻译：复合一体式IGBT器件及其制造方法
公开(公告)号：US20140332847A1
公开(公告)日：2014-11-13
申请号：US14372190
申请日：2013-07-17
申请人： TSINGHUA UNIVERSITY
发明人： Liren Yan , Daoguang Liu , Zhihong Liu , Wei Zhang , Wei Zhou , Jie Cui
IPC分类号： H01L27/082 , H01L29/40 , H01L29/739
CPC分类号： H01L27/0823 , H01L29/0696 , H01L29/404 , H01L29/7395
摘要： A composite one-piece IGBT power device is disclosed to solve a problem that existing devices' turning-on/off speed is not high enough. The composite one-piece IGBT device of the present invention comprises at least two IGBT devices. Drift regions of the at least two IGBT devices connect with each other and electrodes of the at least two IGBT devices are led out separately from each other. The composite one-piece IGBT device may also consist of four IGBT devices. The drift regions of the four IGBT devices connect with each other. The composite IGBT device may also be embodied as two IGBT devices connected with each other. One of the two IGBT devices acts as a primary switching device for switching a large current, and the other acts as an auxiliary device for accelerating the switching action of the primary switching device. The composite IGBT device of the present invention is formed through a producing method which adds a few steps such as forming grooves to the conventional IGBT manufacturing process. The present invention is inexpensive and easy to implement, and provides a benefit of further increasing an operating speed by using two or more IGBT devices which promote each other's turning-on/off speed.
摘要翻译：公开了一种复合的单件IGBT功率器件来解决现有器件的接通/断开速度不够高的问题。本发明的复合一体IGBT器件包括至少两个IGBT器件。所述至少两个IGBT器件的漂移区域彼此连接，并且所述至少两个IGBT器件的电极彼此分离引出。复合一体IGBT器件也可以由四个IGBT器件组成。四个IGBT器件的漂移区域相互连接。复合IGBT器件也可以实现为彼此连接的两个IGBT器件。两个IGBT器件中的一个用作用于切换大电流的主开关器件，另一个用作用于加速初级开关器件的开关动作的辅助器件。本发明的复合IGBT器件通过在传统的IGBT制造工艺中添加诸如形成沟槽的几个步骤的制造方法形成。本发明便宜且易于实现，并且通过使用两个或更多个促进彼此的接通/断开速度的IGBT器件来提供进一步提高工作速度的益处。

59. 发明授权

US08853094B2 Method for manufacturing a semiconductor structure 有权
标题翻译：半导体结构的制造方法
公开(公告)号：US08853094B2
公开(公告)日：2014-10-07
申请号：US13401537
申请日：2012-02-21
申请人： Thomas Scharnagl , Berthold Staufer
发明人： Thomas Scharnagl , Berthold Staufer
IPC分类号： H01L21/302 , H01L27/082 , H01L21/8228 , H01L29/66
CPC分类号： H01L29/66272 , H01L21/8228 , H01L27/082
摘要： A method for manufacturing a semiconductor structure comprising complementary bipolar transistors, wherein for manufacture of a PNP-type structure, an emitter layer having a surface oxide layer is present on top of an NPN-type structure, the emitter layer comprising lateral and vertical surfaces, and wherein for removal of the oxide layer, an ion etching step is applied, wherein for the on etching step a plasma for providing ions is generated in a vacuum chamber by RF coupling and the generated ions are accelerated by an acceleration voltage between the plasma and a wafer comprising the semiconductor structure, and wherein the plasma generation and the ion acceleration are controlled independently from each other.
摘要翻译：一种用于制造包括互补双极晶体管的半导体结构的方法，其中为了制造PNP型结构，具有表面氧化物层的发射极层位于NPN型结构的顶部，发射极层包括横向和垂直表面，并且其中为了去除氧化物层，应用离子蚀刻步骤，其中对于上蚀刻步骤，通过RF耦合在真空室中产生用于提供离子的等离子体，并且所产生的离子通过等离子体和包括半导体结构的晶片，并且其中等离子体产生和离子加速彼此独立地被控制。

60. 发明申请

US20140131711A1 STRUCTURES AND TECHNIQUES FOR USING SEMICONDUCTOR BODY TO CONSTRUCT BIPOLAR JUNCTION TRANSISTORS 有权
标题翻译：使用半导体器件构建双极晶体管的结构和技术
公开(公告)号：US20140131711A1
公开(公告)日：2014-05-15
申请号：US13833044
申请日：2013-03-15
申请人： Shine C. Chung
发明人： Shine C. Chung
IPC分类号： H01L27/082 , H01L29/66
CPC分类号： H01L27/082 , H01L27/0207 , H01L27/0259 , H01L29/0696 , H01L29/402 , H01L29/456 , H01L29/458 , H01L29/66113 , H01L29/66136 , H01L29/66303 , H01L29/73 , H01L29/8611 , H01L29/868
摘要： A bipolar junction transistor built with a mesh structure of cells provided on a semiconductor body is disclosed. The mesh structure has at least one emitter cell with a first type of implant. At least one emitter cell has at least one side coupled to at least one cell with a first type of implant to serve as collector of the bipolar. The spaces between the emitter and collector cells are the intrinsic base of a bipolar device. At least one emitter cell has at least one vortex coupled to at least one cell with a second type of implant to serve as the extrinsic base of the bipolar. The emitter, collector, or base cells can be arbitrary polygons as long as the overall geometry construction can be very compact and expandable. The implant regions between cells can be separated with a space. A silicide block layer can cover the space and overlap into at least a portion of both implant regions.
摘要翻译：公开了一种用设置在半导体本体上的单元的网状结构构成的双极结型晶体管。网状结构具有至少一个具有第一类型植入物的发射体单元。至少一个发射极电池具有至少一个侧面，其耦合到具有第一类型的植入物的至少一个电池，以用作双极的集电极。发射极和集电极之间的空间是双极器件的本征基极。至少一个发射极单元具有至少一个与至少一个具有第二类型的植入物的细胞结合的涡流，用作双极的外在基极。只要总体几何结构可以非常紧凑和可扩展，发射器，收集器或基体单元可以是任意的多边形。细胞之间的植入区域可以用空间分开。硅化物阻挡层可以覆盖空间并且重叠到两个植入区域的至少一部分中。

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