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1. 发明授权

US08987086B2 MIM capacitor with lower electrode extending through a conductive layer to an STI 有权
标题翻译： MIM电容器，其下电极延伸穿过导电层至STI
公开(公告)号：US08987086B2
公开(公告)日：2015-03-24
申请号：US13555831
申请日：2012-07-23
申请人： Kuo-Cheng Ching , Kuo-Chi Tu , Chun-Yao Chen
发明人： Kuo-Cheng Ching , Kuo-Chi Tu , Chun-Yao Chen
IPC分类号： H01L29/94 , H01L27/08 , H01L27/06 , H01L27/108 , H01L49/02
CPC分类号： H01L27/0805 , H01L27/0629 , H01L27/10852 , H01L27/10894 , H01L28/91
摘要： The present disclosure provides a semiconductor device that includes a semiconductor substrate, an isolation structure formed in the semiconductor substrate, a conductive layer formed over the isolation structure, and a metal-insulator-metal (MIM) capacitor formed over the isolation structure. The MIM capacitor has a crown shape that includes a top electrode, a first bottom electrode, and a dielectric disposed between the top electrode and the first bottom electrode, the first bottom electrode extending at least to a top surface of the conductive layer.
摘要翻译：本公开提供了一种半导体器件，其包括半导体衬底，形成在半导体衬底中的隔离结构，在隔离结构上形成的导电层，以及形成在隔离结构上的金属 - 绝缘体 - 金属（MIM）电容器。 MIM电容器具有冠状形状，其包括顶部电极，第一底部电极和设置在顶部电极和第一底部电极之间的电介质，第一底部电极至少延伸到导电层的顶表面。

2. 发明授权

US07884408B2 One-transistor random access memory technology compatible with metal gate process 有权
标题翻译：单晶体管随机存取技术兼容金属栅极工艺
公开(公告)号：US07884408B2
公开(公告)日：2011-02-08
申请号：US11836710
申请日：2007-08-09
申请人： Kuo-Chi Tu , Kuo-Chyuan Tzeng , Chung-Yi Chen , Jian-Yu Shen , Chun-Yao Chen , Hsiang-Fan Lee
发明人： Kuo-Chi Tu , Kuo-Chyuan Tzeng , Chung-Yi Chen , Jian-Yu Shen , Chun-Yao Chen , Hsiang-Fan Lee
IPC分类号： H01L27/108
CPC分类号： H01L27/10861 , H01L27/10873
摘要： One-transistor RAM technology compatible with a metal gate process fabricates a metal gate electrode formed of the same metal material as a top electrode of a MIM capacitor embedded isolation structure. A gate dielectric layer is formed of the same high-k dielectric material as a capacitor dielectric of the MIM capacitor embedded isolation structure.
摘要翻译：与金属栅极工艺兼容的单晶体管RAM技术制造由与MIM电容器嵌入式隔离结构的顶部电极相同的金属材料形成的金属栅电极。栅极电介质层由与MIM电容器嵌入式隔离结构的电容器电介质相同的高k电介质材料形成。

3. 发明申请

US20080057660A1 Step-gate for a semiconductor device 审中-公开
标题翻译：半导体器件的栅极栅极
公开(公告)号：US20080057660A1
公开(公告)日：2008-03-06
申请号：US11511977
申请日：2006-08-29
申请人： Kuo-Chi Tu , Jai-Hoon Sim , Chun-Yao Chen
发明人： Kuo-Chi Tu , Jai-Hoon Sim , Chun-Yao Chen
IPC分类号： H01L21/20 , H01L21/8242
CPC分类号： H01L27/10873 , H01L27/10885 , H01L29/1037 , H01L29/66636 , H01L29/66787 , H01L29/7835
摘要： A semiconductor device using a recessed step gate. An embodiment comprises a recessed region in a portion of the substrate, a transistor with one source/drain region located within the recessed region and one source/drain region located out of the recessed region, a storage device connected to the source/drain located out of the recessed region, and a bit line connected to the source/drain located within the recessed region.
摘要翻译：一种使用凹陷步进栅极的半导体器件。一个实施例包括在衬底的一部分中的凹陷区域，具有位于凹陷区域内的一个源极/漏极区域和位于凹陷区域外部的一个源极/漏极区域的晶体管，连接到源极/漏极的存储器件以及连接到位于凹陷区域内的源极/漏极的位线。

4. 发明申请

US20070267674A1 1T MIM memory for embedded ram application in soc 有权
标题翻译： 1T MIM存储器，用于嵌入式RAM应用
公开(公告)号：US20070267674A1
公开(公告)日：2007-11-22
申请号：US11437673
申请日：2006-05-22
申请人： Yi-Ching Lin , Chun-Yao Chen , Chen-Jong Wang , Shou-Gwo Wuu , Chung S. Wang , Chien-Hua Huang , Kun-Lung Chen , Ping Yang
发明人： Yi-Ching Lin , Chun-Yao Chen , Chen-Jong Wang , Shou-Gwo Wuu , Chung S. Wang , Chien-Hua Huang , Kun-Lung Chen , Ping Yang
IPC分类号： H01L29/94
CPC分类号： H01L27/10897 , H01L27/0207 , H01L27/10852 , H01L27/10894
摘要： Embedded memories. The devices include a substrate, a first dielectric layer, a second dielectric layer, a third dielectric layer, and a plurality of capacitors. The substrate comprises transistors. The first dielectric layer, embedding first and second conductive plugs electrically connecting the transistors therein, overlies the substrate. The second dielectric layer, comprising a plurality of capacitor openings exposing the first conductive plugs, overlies the first dielectric layer. The capacitors comprise a plurality of bottom plates, respectively disposed in the capacitor openings, electrically connecting the first conductive plugs, a plurality of capacitor dielectric layers respectively overlying the bottom plates, and a top plate, comprising a top plate opening, overlying the capacitor dielectric layers. The top plate opening exposes the second dielectric layer, and the top plate is shared by the capacitors.
摘要翻译：嵌入式记忆这些器件包括衬底，第一介电层，第二电介质层，第三电介质层和多个电容器。衬底包括晶体管。第一介电层，嵌入电连接其中的晶体管的第一和第二导电插塞覆盖在基板上。包括暴露第一导电插塞的多个电容器开口的第二电介质层覆盖在第一电介质层上。电容器包括分别设置在电容器开口中的多个底板，电连接第一导电插塞，分别覆盖在底板上的多个电容器电介质层，以及顶板，包括覆盖电容器电介质的顶板开口层。顶板开口暴露第二电介质层，并且顶板由电容器共享。

5. 发明授权

US07282757B2 MIM capacitor structure and method of manufacture 有权
标题翻译： MIM电容器结构及制造方法
公开(公告)号：US07282757B2
公开(公告)日：2007-10-16
申请号：US10689294
申请日：2003-10-20
申请人： Kuo-Chi Tu , Chun-Yao Chen , Shou-Gwo Wuu , Chen-Jong Wang
发明人： Kuo-Chi Tu , Chun-Yao Chen , Shou-Gwo Wuu , Chen-Jong Wang
IPC分类号： H01L27/105
CPC分类号： H01L27/10894 , H01L27/10852 , H01L27/10855 , H01L28/60 , H01L28/91
摘要： A metal-insulator-metal (MIM) capacitor structure and method of manufacturing thereof. A plurality of MIM capacitor patterns is formed in two or more insulating layers. The insulating layers may comprise a via layer and a metallization layer of a semiconductor device. A top portion of the top insulating layer is recessed in a region between at least two adjacent MIM capacitor patterns. When the top plate material of the MIM capacitors is deposited, the top plate material fills the recessed area of the top insulating layer between the adjacent MIM capacitor pattern, forming a connecting region that couples together the top plates of the adjacent MIM capacitors. A portion of the MIM capacitor bottom electrode may be formed in a first metallization layer of the semiconductor device.
摘要翻译：金属绝缘体金属（MIM）电容器结构及其制造方法。多个MIM电容器图案形成在两个或更多个绝缘层中。绝缘层可以包括半导体器件的通孔层和金属化层。顶部绝缘层的顶部凹陷在至少两个相邻的MIM电容器图案之间的区域中。当MIM电容器的顶板材料沉积时，顶板材料填充相邻MIM电容器图案之间的顶部绝缘层的凹陷区域，形成将相邻的MIM电容器的顶板耦合在一起的连接区域。 MIM电容器底部电极的一部分可以形成在半导体器件的第一金属化层中。

6. 发明授权

US07115935B2 Embedded DRAM for metal-insulator-metal (MIM) capacitor structure 有权
标题翻译：金属绝缘体金属（MIM）电容器结构的嵌入式DRAM
公开(公告)号：US07115935B2
公开(公告)日：2006-10-03
申请号：US10822197
申请日：2004-04-09
申请人： Kuo-Chi Tu , Chun-Yao Chen , Huey-Chi Chu
发明人： Kuo-Chi Tu , Chun-Yao Chen , Huey-Chi Chu
IPC分类号： H01L27/108
CPC分类号： H01L27/10852 , H01L27/10811 , H01L27/10894 , H01L27/10897 , H01L28/91
摘要： A method for fabricating a metal-insulator-metal capacitor in an embedded DRAM process is described. A plurality of contact plugs are provided through an insulating layer to semiconductor device structures in a substrate wherein the contact plugs are formed in a logic area of the substrate and in a memory area of the substrate and providing node contact plugs to node contact regions within the substrate in the memory area. Thereafter, capacitors are fabricated in a twisted trench in a self-aligned copper process.
摘要翻译：描述了在嵌入式DRAM工艺中制造金属 - 绝缘体 - 金属电容器的方法。多个接触插塞通过绝缘层提供到衬底中的半导体器件结构，其中接触插塞形成在衬底的逻辑区域中并且在衬底的存储区域中并且将节点接触插塞提供到衬底内的节点接触区域底物在记忆区。此后，电容器在自对准铜工艺中以扭曲的沟槽制造。

7. 发明申请

US20060017115A1 One-transistor random access memory technology compatible with metal gate process 有权
标题翻译：单晶体管随机存取技术兼容金属栅极工艺
公开(公告)号：US20060017115A1
公开(公告)日：2006-01-26
申请号：US10896491
申请日：2004-07-22
申请人： Kuo-Chi Tu , Kuo-Chyuan Tzeng , Chung-Yi Chen , C. Shen , Chun-Yao Chen , Hsiang-Fan Lee
发明人： Kuo-Chi Tu , Kuo-Chyuan Tzeng , Chung-Yi Chen , C. Shen , Chun-Yao Chen , Hsiang-Fan Lee
IPC分类号： H01L29/76
CPC分类号： H01L27/10861 , H01L27/10873
摘要： One-transistor RAM technology compatible with a metal gate process fabricates a metal gate electrode formed of the same metal material as a top electrode of a MIM capacitor embedded isolation structure. A gate dielectric layer is formed of the same high-k dielectric material as a capacitor dielectric of the MIM capacitor embedded isolation structure.
摘要翻译：与金属栅极工艺兼容的单晶体管RAM技术制造由与MIM电容器嵌入式隔离结构的顶部电极相同的金属材料形成的金属栅电极。栅极电介质层由与MIM电容器嵌入式隔离结构的电容器电介质相同的高k电介质材料形成。

8. 发明申请

US20050139346A1 Cooling apparatus for light valve 审中-公开
标题翻译：光阀冷却装置
公开(公告)号：US20050139346A1
公开(公告)日：2005-06-30
申请号：US10989298
申请日：2004-11-17
申请人： Kuo-Chin Huang , Bor-Bin Chou , Chun-Yao Chen
发明人： Kuo-Chin Huang , Bor-Bin Chou , Chun-Yao Chen
IPC分类号： G02F1/133 , F25D17/00 , F28D15/00
CPC分类号： G02F1/133385 , H04N9/3144
摘要： A cooling apparatus for a light valve of the present invention includes a control box disposed on the back of the light valve to actuate the light valve, followed by a heat pipe and a heat-conducting component pasted upon the inner surface of the control box. The heat-conducting component is connected to a heat-collecting end of the heat pipe and one of its surface contacts with the light valve. The heat of the light valve is conducted to the second part of the control box through the heat-conducting component, and then the heat is conducted to the second part of the control box via the heat pipe pasted upon it. Thus, the heat of the light valve can be removed through the large area of the second part of control box, so as to increase the cooling efficiency and simplify the cooling apparatus.
摘要翻译：本发明的用于光阀的冷却装置包括设置在光阀背面以致动光阀的控制箱，随后是热管和粘贴在控制箱内表面上的导热部件。导热部件连接到热管的集热端，并且其一个表面与光阀接触。光阀的热量通过导热部件传导到控制箱的第二部分，然后通过粘贴在其上的热管将热量传导到控制箱的第二部分。因此，可以通过控制箱的第二部分的大面积去除光阀的热量，从而提高冷却效率并简化冷却装置。

9. 发明授权

US08242551B2 Metal-insulator-metal structure for system-on-chip technology 有权
标题翻译：金属 - 绝缘体 - 金属结构的片上系统技术
公开(公告)号：US08242551B2
公开(公告)日：2012-08-14
申请号：US12397948
申请日：2009-03-04
申请人： Kuo-Cheng Ching , Kuo-Chi Tu , Chun-Yao Chen
发明人： Kuo-Cheng Ching , Kuo-Chi Tu , Chun-Yao Chen
IPC分类号： H01G4/40 , H01G17/00
CPC分类号： H01L27/0805 , H01L27/0629 , H01L27/10852 , H01L27/10894 , H01L28/91
摘要： The present disclosure provides a semiconductor device that includes a semiconductor substrate, an isolation structure formed in the semiconductor substrate, a conductive layer formed over the isolation structure, and a metal-insulator-metal (MIM) capacitor formed over the isolation structure. The MIM capacitor has a crown shape that includes a top electrode, a first bottom electrode, and a dielectric disposed between the top electrode and the first bottom electrode, the first bottom electrode extending at least to a top surface of the conductive layer.
摘要翻译：本公开提供了一种半导体器件，其包括半导体衬底，形成在半导体衬底中的隔离结构，在隔离结构上形成的导电层，以及形成在隔离结构上的金属 - 绝缘体 - 金属（MIM）电容器。 MIM电容器具有冠状形状，其包括顶部电极，第一底部电极和设置在顶部电极和第一底部电极之间的电介质，第一底部电极至少延伸到导电层的顶表面。

10. 发明授权

US08215797B2 Input/output device for display apparatus 有权
标题翻译：显示装置的输入/输出装置
公开(公告)号：US08215797B2
公开(公告)日：2012-07-10
申请号：US11513201
申请日：2006-08-31
申请人： Chun-Yao Chen , Kuo-Chou Chang , Wei-Cheng Huang
发明人： Chun-Yao Chen , Kuo-Chou Chang , Wei-Cheng Huang
IPC分类号： F21V33/00 , H05K5/00
CPC分类号： H05K5/0247
摘要： An input/output device used for connecting at least one external wire with a display apparatus, comprises a case, at least one I/O connector, a flip cover, and a lighting device. The case embedded in the case of the display apparatus has a wiring slot to provide the wire passing through the case. The I/O connectors embedded on the case are electrically connected to the display apparatus. The flip cover is pivoted on the case. The lighting device having a light source and a switch is associated with the flip cover to turn on or turn off the light source.
摘要翻译：用于将至少一个外部电线与显示装置连接的输入/输出装置包括壳体，至少一个I / O连接器，翻盖和照明装置。在显示装置的情况下嵌入的壳体具有配线槽，用于提供穿过壳体的电线。嵌入在壳体上的I / O连接器电连接到显示装置。翻盖在壳体上枢转。具有光源和开关的照明装置与翻盖相关联以打开或关闭光源。

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