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1. 发明授权

US08969973B2 Multi-gate semiconductor devices 有权
标题翻译：多栅极半导体器件
公开(公告)号：US08969973B2
公开(公告)日：2015-03-03
申请号：US12803717
申请日：2010-07-02
申请人： Shinichiro Takatani
发明人： Shinichiro Takatani
IPC分类号： H01L27/088 , H01L29/778 , H01L21/768 , H01L29/423 , H01L29/20 , H01L29/417
CPC分类号： H01L29/7785 , H01L21/76895 , H01L29/2003 , H01L29/41758 , H01L29/42316 , H01L29/7786
摘要： A multi-gate semiconductor device with inter-gate conductive regions being connected to balance resistors is provided. The multi-gate semiconductor device comprises a substrate, a multilayer structure formed upon the substrate, a first ohmic electrode, a second ohmic electrode, a plural of gate electrodes, at least one conductive region, and at least one resistive component. When put into practice, the multi-gate semiconductor device is advantageous in reducing the voltage drop along the conductive region with a minimal change in device layout, improving the OFF-state linearity while retaining a low insertion loss, and minimizing the area occupied by the resistor and hence the total chip size.
摘要翻译：提供了具有栅极间导电区域连接到平衡电阻器的多栅极半导体器件。多栅极半导体器件包括衬底，形成在衬底上的多层结构，第一欧姆电极，第二欧姆电极，多个栅电极，至少一个导电区域和至少一个电阻部件。当实施时，多栅极半导体器件有利于以最小的器件布局变化来减小沿着导电区域的电压降，从而在保持低插入损耗的同时提高OFF状态线性度并且最小化由电阻器，因此总芯片尺寸。

2. 发明授权

US08676132B2 Semiconductor integrated circuit, RF module using the same, and radio communication terminal device using the same 有权
标题翻译：半导体集成电路，使用其的RF模块，以及使用其的无线通信终端装置
公开(公告)号：US08676132B2
公开(公告)日：2014-03-18
申请号：US13677601
申请日：2012-11-15
申请人： Shigeki Koya , Shinichiro Takatani , Takashi Ogawa , Akishige Nakajima , Yasushi Shigeno
发明人： Shigeki Koya , Shinichiro Takatani , Takashi Ogawa , Akishige Nakajima , Yasushi Shigeno
IPC分类号： H04B1/44
CPC分类号： H03K17/687 , H04B1/006 , H04B1/406 , H04B1/525
摘要： One high-frequency switch Qm supplied with transmit and receive signals to ON, and another high-frequency switch Qn supplied with a signal of another system to OFF are controlled. In the other high-frequency switch Qn, to set V-I characteristics of near-I/O gate resistances Rg1n-Rg3n of a near-I/O FET Qn1 near to a common input/output terminal I/O connected with an antenna are set to be higher in linearity than V-I characteristics of middle-portion gate resistances Rg3n and Rg4n of middle-portion FETs Qn3 and Qn4. Thus, even in case that an uneven RF leak signal is supplied to near-I/O gate resistances Rg1n-Rg3n, and middle-portion gate resistances Rg3n and Rg4n, the distortion of current flowing through the near-I/O gate resistances Rg1n-Rg3n near to the input/output terminal I/O can be reduced.
摘要翻译：一个高频开关Qm提供发送和接收信号到ON，另一个高频开关Qn提供另一个系统的信号为OFF。在另一个高频开关Qn中，设定与天线连接的公共输入输出端子I / O附近的近I / O FET Qn1的近I / O栅极电阻Rg1n-Rg3n的VI特性，与中间部分FET Qn3和Qn4的中间部分栅极电阻Rg3n和Rg4n的VI特性的线性度相比更高。因此，即使在向近I / O栅极电阻Rg1n-Rg3n和中间部分栅极电阻Rg3n和Rg4n提供不均匀的RF泄漏信号的情况下，流过近I / O栅极电阻Rg1n的电流的失真可以减少靠近输入/输出端子I / O的-Rg3n。

3. 发明申请

US20120200335A1 SEMICONDUCTOR INTEGRATED CIRCUIT, RF MODULE USING THE SAME, AND RADIO COMMUNICATION TERMINAL DEVICE USING THE SAME 有权
标题翻译：半导体集成电路，使用该半导体集成电路的RF模块和使用该半导体集成电路的无线电通信终端装置
公开(公告)号：US20120200335A1
公开(公告)日：2012-08-09
申请号：US13448033
申请日：2012-04-16
申请人： Shigeki Koya , Shinichiro Takatani , Takashi Ogawa , Akishige Nakajima , Yasushi Shigeno
发明人： Shigeki Koya , Shinichiro Takatani , Takashi Ogawa , Akishige Nakajima , Yasushi Shigeno
IPC分类号： H03K17/687 , H03K17/74
CPC分类号： H03K17/687 , H04B1/006 , H04B1/406 , H04B1/525
摘要： One high-frequency switch Qm supplied with transmit and receive signals to ON, and another high-frequency switch Qn supplied with a signal of another system to OFF are controlled. In the other high-frequency switch Qn, to set V-I characteristics of near-I/O gate resistances Rg1n-Rg3n of a near-I/O FET Qn1 near to a common input/output terminal I/O connected with an antenna are set to be higher in linearity than V-I characteristics of middle-portion gate resistances Rg3n and Rg4n of middle-portion FETs Qn3 and Qn4. Thus, even in case that an uneven RF leak signal is supplied to near-I/O gate resistances Rg1n-Rg3n, and middle-portion gate resistances Rg3n and Rg4n, the distortion of current flowing through the near-I/O gate resistances Rg1n-Rg3n near to the input/output terminal I/O can be reduced.
摘要翻译：一个高频开关Qm提供发送和接收信号到ON，另一个高频开关Qn提供另一个系统的信号为OFF。在另一个高频开关Qn中，设定与天线连接的公共输入输出端子I / O附近的近I / O FET Qn1的近I / O栅极电阻Rg1n-Rg3n的VI特性，与中间部分FET Qn3和Qn4的中间部分栅极电阻Rg3n和Rg4n的VI特性的线性度相比更高。因此，即使在向近I / O栅极电阻Rg1n-Rg3n和中间部分栅极电阻Rg3n和Rg4n提供不均匀的RF泄漏信号的情况下，流过近I / O栅极电阻Rg1n的电流的失真可以减少靠近输入/输出端子I / O的-Rg3n。

4. 发明授权

US08200167B2 Semiconductor integrated circuit, RF module using the same, and radio communication terminal device using the same 失效
标题翻译：半导体集成电路，使用其的RF模块，以及使用其的无线通信终端装置
公开(公告)号：US08200167B2
公开(公告)日：2012-06-12
申请号：US12513280
申请日：2007-11-08
申请人： Shigeki Koya , Shinichiro Takatani , Takashi Ogawa , Akishige Nakajima , Yasushi Shigeno
发明人： Shigeki Koya , Shinichiro Takatani , Takashi Ogawa , Akishige Nakajima , Yasushi Shigeno
IPC分类号： H04B1/44
CPC分类号： H03K17/687 , H04B1/006 , H04B1/406 , H04B1/525
摘要： One high-frequency switch Qm supplied with transmit and receive signals to ON, and another high-frequency switch Qn supplied with a signal of another system to OFF are controlled. In the other high-frequency switch Qn, to set V-I characteristics of near-I/O gate resistances Rg1n-Rg3n of a near-I/O FET Qn1 near to a common input/output terminal I/O connected with an antenna are set to be higher in linearity than V-I characteristics of middle-portion gate resistances Rg3n and Rg4n of middle-portion FETs Qn3 and Qn4. Thus, even in case that an uneven RF leak signal is supplied to near-I/O gate resistances Rg1n-Rg3n, and middle-portion gate resistances Rg3n and Rg4n, the distortion of current flowing through the near-I/O gate resistances Rg1n-Rg3n near to the input/output terminal I/O can be reduced.
摘要翻译：一个高频开关Qm提供发送和接收信号到ON，另一个高频开关Qn提供另一个系统的信号为OFF。在另一个高频开关Qn中，设定与天线连接的公共输入输出端子I / O附近的近I / O FET Qn1的近I / O栅极电阻Rg1n-Rg3n的VI特性，与中间部分FET Qn3和Qn4的中间部分栅极电阻Rg3n和Rg4n的VI特性的线性度相比更高。因此，即使在向近I / O栅极电阻Rg1n-Rg3n和中间部分栅极电阻Rg3n和Rg4n提供不均匀的RF泄漏信号的情况下，流过近I / O栅极电阻Rg1n的电流的失真可以减少靠近输入/输出端子I / O的-Rg3n。

5. 发明申请

US20120001230A1 Multi-gate semiconductor devices 有权
标题翻译：多栅极半导体器件
公开(公告)号：US20120001230A1
公开(公告)日：2012-01-05
申请号：US12803717
申请日：2010-07-02
申请人： Shinichiro Takatani
发明人： Shinichiro Takatani
IPC分类号： H01L29/778 , H01L29/772
CPC分类号： H01L29/7785 , H01L21/76895 , H01L29/2003 , H01L29/41758 , H01L29/42316 , H01L29/7786
摘要： A multi-gate semiconductor device with inter-gate conductive regions being connected to balance resistors is provided. The multi-gate semiconductor device comprises a substrate, a multilayer structure formed upon the substrate, a first ohmic electrode, a second ohmic electrode, a plural of gate electrodes, at least one conductive region, and at least one resistive component. When put into practice, the multi-gate semiconductor device is advantageous in reducing the voltage drop along the conductive region with a minimal change in device layout, improving the OFF-state linearity while retaining a low insertion loss, and minimizing the area occupied by the resistor and hence the total chip size.
摘要翻译：提供了具有栅极间导电区域连接到平衡电阻器的多栅极半导体器件。多栅极半导体器件包括衬底，形成在衬底上的多层结构，第一欧姆电极，第二欧姆电极，多个栅电极，至少一个导电区域和至少一个电阻部件。当实施时，多栅极半导体器件有利于以最小的器件布局变化来减小沿着导电区域的电压降，从而在保持低插入损耗的同时提高OFF状态线性度，并且最小化由电阻器，因此总芯片尺寸。

6. 发明申请

US20100069020A1 SEMICONDUCTOR INTEGRATED CIRCUIT, RF MODULE USING THE SAME, AND RADIO COMMUNICATION TERMINAL DEVICE USING THE SAME 失效
标题翻译：半导体集成电路，使用该半导体集成电路的RF模块和使用该半导体集成电路的无线电通信终端装置
公开(公告)号：US20100069020A1
公开(公告)日：2010-03-18
申请号：US12513280
申请日：2007-11-08
申请人： Shigeki Koya , Shinichiro Takatani , Takashi Ogawa , Akishige Nakajima , Yasushi Shigeno
发明人： Shigeki Koya , Shinichiro Takatani , Takashi Ogawa , Akishige Nakajima , Yasushi Shigeno
IPC分类号： H04B1/44 , H03K17/687 , H01P1/10 , H03L5/00
CPC分类号： H03K17/687 , H04B1/006 , H04B1/406 , H04B1/525
摘要： One high-frequency switch Qm supplied with transmit and receive signals to ON, and another high-frequency switch Qn supplied with a signal of another system to OFF are controlled. In the other high-frequency switch Qn, to set V-I characteristics of near-I/O gate resistances Rg1n-Rg3n of a near-I/O FET Qn1 near to a common input/output terminal I/O connected with an antenna are set to be higher in linearity than V-I characteristics of middle-portion gate resistances Rg3n and Rg4n of middle-portion FETs Qn3 and Qn4. Thus, even in case that an uneven RF leak signal is supplied to near-I/O gate resistances Rg1n-Rg3n, and middle-portion gate resistances Rg3n and Rg4n, the distortion of current flowing through the near-I/O gate resistances Rg1n-Rg3n near to the input/output terminal I/O can be reduced.
摘要翻译：一个高频开关Qm提供发送和接收信号到ON，另一个高频开关Qn提供另一个系统的信号为OFF。在另一个高频开关Qn中，设定与天线连接的公共输入输出端子I / O附近的近I / O FET Qn1的近I / O栅极电阻Rg1n-Rg3n的VI特性，与中间部分FET Qn3和Qn4的中间部分栅极电阻Rg3n和Rg4n的VI特性的线性度相比更高。因此，即使在向近I / O栅极电阻Rg1n-Rg3n和中间部分栅极电阻Rg3n和Rg4n提供不均匀的RF泄漏信号的情况下，流过近I / O栅极电阻Rg1n的电流的失真可以减少靠近输入/输出端子I / O的-Rg3n。

7. 发明申请

US20090104881A1 Switching element, antenna switch circuit and radio frequency module using the same 有权
标题翻译：开关元件，天线开关电路和射频模块使用相同
公开(公告)号：US20090104881A1
公开(公告)日：2009-04-23
申请号：US12314644
申请日：2008-12-15
申请人： Takashi Ogawa , Shinichiro Takatani , Shigeki Koya , Hiroyuki Takazawa , Shinya Osakabe , Akishige Nakajima , Yasushi Shigeno
发明人： Takashi Ogawa , Shinichiro Takatani , Shigeki Koya , Hiroyuki Takazawa , Shinya Osakabe , Akishige Nakajima , Yasushi Shigeno
IPC分类号： H04B1/44 , H01L29/778
CPC分类号： H01L27/0605 , H01L27/0629 , H01L29/42316 , H01L29/66462 , H01L29/7783 , H01L2924/0002 , H01L2924/00
摘要： A switching element is provided that realizes an stabilize a potential between the gates of the multi-gates without an increase in the insertion loss, and an antenna switch circuit and a radio frequency module each using the switch element. The switching element includes two ohmic electrodes 39, 40 formed on a semiconductor substrate, at least two gate electrodes 41, 42 disposed between the two ohmic electrodes, and a conductive region 45 disposed between the adjacent gate electrodes among the at least two gate electrodes, a field effective transistor being structured by the two ohmic electrodes, the at least two gate electrodes, and the conductive region. The conductive region has a wider portion that is wider in width than the conductive region interposed between the adjacent gate electrodes on one end thereof. The distance between the adjacent gate electrodes is narrower than the width of the wider portion. Resistors 44, 46 are connected in series between the two ohmic electrodes through the wider portion.
摘要翻译：提供了一种开关元件，其实现了在不增加插入损耗的情况下使多栅极的栅极之间的电位稳定，并且每个使用开关元件的天线开关电路和射频模块。开关元件包括形成在半导体衬底上的两个欧姆电极39,40，设置在两个欧姆电极之间的至少两个栅极电极41,42以及设置在至少两个栅电极之间的相邻栅电极之间的导电区域45，场效应晶体管由两个欧姆电极，至少两个栅极电极和导电区域构成。导电区域的宽度部分的宽度比插入在其一端的相邻栅电极之间的导电区域宽。相邻栅电极之间的距离比较宽部分的宽度窄。电阻器44,46通过较宽部分串联连接在两个欧姆电极之间。

8. 发明申请

US20070295994A1 HETERO JUNCTION BIPOLAR TRANSISTOR 审中-公开
标题翻译：异质结双极晶体管
公开(公告)号：US20070295994A1
公开(公告)日：2007-12-27
申请号：US11685796
申请日：2007-03-14
申请人： Kazuhiro Mochizuki , Hidetoshi Matsumoto , Shinichiro Takatani
发明人： Kazuhiro Mochizuki , Hidetoshi Matsumoto , Shinichiro Takatani
IPC分类号： H01L29/739 , H01L27/082
CPC分类号： H01L29/66318 , H01L27/0605 , H01L29/2003 , H01L29/737
摘要： A hetero-junction bipolar transistor is provided including emitter contact region, an emitter region made of a first semiconductor material, a base region made of a second semiconductor material having a smaller energy band gap than the first semiconductor material, a collector region made of the first semiconductor material, and a collector contact area, the regions being serially formed on a surface of a substrate in a direction parallel to the surface thereof. A buffer layer made of a third semiconductor material with an energy band gap larger than the first semiconductor material is provided between the emitter region, the base region, the collector region and the substrate surface. Emitter, base and collector electrodes are also provided, in contact with the emitter contact region, the base region, and the collector region, respectively.
摘要翻译：提供了一种异质结双极晶体管，其包括发射极接触区域，由第一半导体材料制成的发射极区域，由具有比第一半导体材料更小的能带隙的第二半导体材料制成的基极区域，由第一半导体材料和集电极接触区域，所述区域在平行于其表面的方向上串联地形成在基板的表面上。在发射极区域，基极区域，集电极区域和基板表面之间设置由能量带隙大于第一半导体材料的第三半导体材料制成的缓冲层。发射极，基极和集电极电极也分别与发射极接触区域，基极区域和集电极区域接触。

9. 发明授权

US06818523B2 Semiconductor storage device manufacturing method which forms a hydrogen diffusion inhibiting layer 失效
标题翻译：形成氢扩散抑制层的半导体存储装置的制造方法
公开(公告)号：US06818523B2
公开(公告)日：2004-11-16
申请号：US10602644
申请日：2003-06-25
申请人： Hiroshi Miki , Keiko Kushida , Yasuhiro Shimamoto , Shinichiro Takatani , Yoshihisa Fujisaki , Hiromi Nakai
发明人： Hiroshi Miki , Keiko Kushida , Yasuhiro Shimamoto , Shinichiro Takatani , Yoshihisa Fujisaki , Hiromi Nakai
IPC分类号： Y01L2120
CPC分类号： H01L28/75 , H01L28/55 , H01L28/57 , H01L28/60
摘要： A method for forming a semiconductor storage device includes steps of forming a memory cell transistor, forming a first plug connected to the memory cell transistor, forming a second plug of a hydrogen diffusion inhibiting layer, forming capacitor electrodes and a capacitor insulator between the capacitor electrodes and forming a hydrogen adsorption inhibiting layer.
摘要翻译：一种形成半导体存储装置的方法，包括：形成存储单元晶体管，形成连接到存储单元晶体管的第一插头，形成氢扩散抑制层的第二插头，在电容器电极之间形成电容器电极和电容器绝缘体并形成氢吸附抑制层。

10. 发明授权

US06396092B1 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06396092B1
公开(公告)日：2002-05-28
申请号：US09381396
申请日：1999-09-20
申请人： Shinichiro Takatani , Hiroshi Miki , Keiko Kushida , Yoshihisa Fujisaki , Kazuyoshi Torii
发明人： Shinichiro Takatani , Hiroshi Miki , Keiko Kushida , Yoshihisa Fujisaki , Kazuyoshi Torii
IPC分类号： H01L2906
CPC分类号： H01L28/55 , H01L28/60
摘要： A semiconductor device includes a capacitor having a lower electrode (102), a high-dielectric-constant or ferroelectric thin film (103), and an upper electrode (104) which are subsequently stacked. An impurity having an action of suppressing the catalytic activity of a metal or a conductive oxide constituting the electrode is added to the upper electrode (104). The addition of the impurity is effective to prevent inconveniences such as a reduction in capacitance, an insulation failure, and the peeling of the electrode due to hydrogen heat-treatment performed after formation of the upper electrode (104), and to improve the long-term reliability.
摘要翻译：半导体器件包括随后堆叠的具有下电极（102），高介电常数或铁电薄膜（103）和上电极（104）的电容器。具有抑制构成电极的金属或导电氧化物的催化活性的作用的杂质被添加到上电极（104）。杂质的添加对于防止在形成上电极（104）之后进行的氢热处理等电容的减少，绝缘失效以及电极的剥离等不良情况是有效的，长期可靠性。

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