专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07304496B2 Mask-programmable logic device with programmable input/output ports 有权
标题翻译：具有可编程输入/输出端口的面罩可编程逻辑器件
公开(公告)号：US07304496B2
公开(公告)日：2007-12-04
申请号：US11117588
申请日：2005-04-28
申请人： Hee Kong Phoon , Kian Chin Yap
发明人： Hee Kong Phoon , Kian Chin Yap
IPC分类号： H03K19/173 , H03K19/00
CPC分类号： H03K19/17748 , H03K19/17744 , H03K19/17796
摘要： A mask-programmable logic device includes a macrocell having an external input/output port for “place-and-route” programming by addition of metallization layers. A programmable “fixed” layer allows the external input/output port to be isolated from the remainder of the macrocell so that it “floats,” allowing signals to be routed through the external input/output port when the macrocell is not in use, to reduce routing blockages. The macrocell also may have at least one internal input/output port, potentially connected to different logic circuits, and a programmable “fixed” layer that can be used to control which internal input/output port is connected to the external input/output port. By thus allowing multiple logic circuits to share a single external input/output port, routing blockages are reduced.
摘要翻译：掩模可编程逻辑器件包括具有用于通过添加金属化层进行“放置和路由”编程的外部输入/输出端口的宏单元。可编程“固定”层允许外部输入/输出端口与宏单元的其余部分隔离，使其“浮动”，当宏单元未被使用时允许信号通过外部输入/输出端口路由到减少路由阻塞。宏单元还可以具有至少一个可能连接到不同逻辑电路的内部输入/输出端口以及可用于控制哪个内部输入/输出端口连接到外部输入/输出端口的可编程“固定”层。通过这样允许多个逻辑电路共享单个外部输入/输出端口，减少了路由阻塞。

2. 发明授权

US08352899B1 Method to modify an integrated circuit (IC) design 失效
标题翻译：修改集成电路（IC）设计的方法
公开(公告)号：US08352899B1
公开(公告)日：2013-01-08
申请号：US12860662
申请日：2010-08-20
申请人： Kian Chin Yap , Phooi Choong Loh , Kar Keng Chua
发明人： Kian Chin Yap , Phooi Choong Loh , Kar Keng Chua
IPC分类号： G06F17/50
CPC分类号： G06F17/5077 , G06F17/505
摘要： A method to modify a first IC design into a second IC design, the first and second IC designs specifying a common interconnection layer with a plurality of interconnections, is disclosed. The method includes identifying an interconnection from plurality of interconnections within the common interconnection layer. The interconnection is unused for routing signals in the first IC design. The metal layer that is coupled with the identified interconnection is removed from the first IC design to generate a modified design. The identified interconnection of the first IC design is placed into one of an invisible state or a temporarily removed state in the modified design. The metal layer in the modified design is routed for a specific logic gate design. The modified design is then stored as the second IC design.
摘要翻译：公开了一种将第一IC设计修改为第二IC设计的方法，第一和第二IC设计指定具有多个互连的公共互连层。该方法包括从公共互连层内的多个互连中识别互连。在第一个IC设计中，互连不用于路由信号。与所识别的互连耦合的金属层从第一IC设计中移除以产生经修改的设计。所确定的第一IC设计的互连被置于修改后的设计中的不可见状态或暂时移除状态之一。修改后的设计中的金属层被路由为特定的逻辑门设计。然后将修改后的设计作为第二个IC设计存储。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式