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1. 发明授权

US08981937B2 RFID tag 有权
标题翻译： RFID标签
公开(公告)号：US08981937B2
公开(公告)日：2015-03-17
申请号：US13294359
申请日：2011-11-11
申请人： Ji Man Park , Lee Mi Do , Kyu Ha Baek , Kun Sik Park , Dong Pyo Kim , Jong Chang Woo , Zin Sig Kim , Joo Yeon Kim , Ye Sul Jeong , Yong Hyun Ham
发明人： Ji Man Park , Lee Mi Do , Kyu Ha Baek , Kun Sik Park , Dong Pyo Kim , Jong Chang Woo , Zin Sig Kim , Joo Yeon Kim , Ye Sul Jeong , Yong Hyun Ham
IPC分类号： G08B13/14 , G06K19/073
CPC分类号： G06K19/07345
摘要： An RFID tag includes: an antenna receiving an RF signal from a reader; an AFE (analog front end) generating voltage using the RF signal; and one or more switches interposed between the antenna and the AFE and controlling the connection between the antenna and the AFE through the switch operation.
摘要翻译： RFID标签包括：从读取器接收RF信号的天线; 使用RF信号产生电压的AFE（模拟前端）; 以及插入在天线和AFE之间的一个或多个开关，并且通过开关操作来控制天线和AFE之间的连接。

2. 发明授权

US08513655B2 Organic light emitting diode and manufacturing method thereof 有权
标题翻译：有机发光二极管及其制造方法
公开(公告)号：US08513655B2
公开(公告)日：2013-08-20
申请号：US12974708
申请日：2010-12-21
申请人： Lee Mi Do , Kun Sik Park , Ji Man Park , Dong Pyo Kim , Jin-Yeong Kang , Kyu Ha Baek
发明人： Lee Mi Do , Kun Sik Park , Ji Man Park , Dong Pyo Kim , Jin-Yeong Kang , Kyu Ha Baek
IPC分类号： H01J19/42
CPC分类号： H01L51/5212 , H01L51/5228
摘要： An organic light emitting diode (OLED) and a method for manufacturing the same are provided. In the OLED, patterned metal electrodes are positioned on one or more of upper and lower portions of a light emission layer to allow light generated from the light emission layer to emit to an area between the patterned metal electrodes.
摘要翻译：提供有机发光二极管（OLED）及其制造方法。在OLED中，图案化的金属电极位于发光层的上部和下部的一个或多个上，以允许从发光层产生的光发射到图案化的金属电极之间的区域。

3. 发明申请

US20110147787A1 ORGANIC LIGHT EMITTING DIODE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：有机发光二极管及其制造方法
公开(公告)号：US20110147787A1
公开(公告)日：2011-06-23
申请号：US12974708
申请日：2010-12-21
申请人： Lee Mi DO , Kun Sik Park , Ji Man Park , Dong Pyo Kim , Jin Yeong Kang , Kyu Ha Baek
发明人： Lee Mi DO , Kun Sik Park , Ji Man Park , Dong Pyo Kim , Jin Yeong Kang , Kyu Ha Baek
IPC分类号： H01L51/52 , H01L51/56
CPC分类号： H01L51/5212 , H01L51/5228
摘要： An organic light emitting diode (OLED) and a method for manufacturing the same are provided. In the OLED, patterned metal electrodes are positioned on one or more of upper and lower portions of a light emission layer to allow light generated from the light emission layer to emit to an area between the patterned metal electrodes.
摘要翻译：提供有机发光二极管（OLED）及其制造方法。在OLED中，图案化的金属电极位于发光层的上部和下部的一个或多个上，以允许从发光层产生的光发射到图案化的金属电极之间的区域。

4. 发明申请

US20110147468A1 RFID TAG 审中-公开
标题翻译： RFID标签
公开(公告)号：US20110147468A1
公开(公告)日：2011-06-23
申请号：US12970394
申请日：2010-12-16
申请人： Ji Man PARK , Lee Mi Do , Kyu Ha Baek , Kun Sik Park , Dong Pyo Kim
发明人： Ji Man PARK , Lee Mi Do , Kyu Ha Baek , Kun Sik Park , Dong Pyo Kim
IPC分类号： G06K19/073
CPC分类号： G06K19/0704 , G06K19/0723
摘要： Provided is a radio frequency identification (RFID) tag whose data can be stably read at a long distance on the basis of a passive RFID tag. The RFID tag includes a rechargeable unit charged to a predetermined voltage, and a power source including a direct current (DC) power source including a rectifier for converting an RF signal into DC power and a regulator for supplying a predetermined DC voltage, an interceptor disposed between the rechargeable unit and the DC power source to connecting or disconnecting the power to the rechargeable unit, and an overvoltage preventor connected to an output terminal of the DC power source in parallel.
摘要翻译：提供了一种射频识别（RFID）标签，其数据可以在无源RFID标签的基础上以长距离稳定地读取。 RFID标签包括充电到预定电压的可充电单元和包括直流（DC）电源的电源，该直流电源包括用于将RF信号转换成直流电力的整流器和用于提供预定DC电压的调节器，设置的拦截器在可再充电单元和直流电源之间，连接或断开与可再充电单元的电力，以及并联连接到DC电源的输出端子的过电压防止器。

5. 发明申请

US20110097853A1 VIA FORMING METHOD AND METHOD OF MANUFACTURING MULTI-CHIP PACKAGE USING THE SAME 有权
标题翻译：通过形成方法和使用其制造多芯片包的方法
公开(公告)号：US20110097853A1
公开(公告)日：2011-04-28
申请号：US12835289
申请日：2010-07-13
申请人： Dong Pyo KIM , Kyu Ha Baek , Kun Sik Park , Lee Mi Do
发明人： Dong Pyo KIM , Kyu Ha Baek , Kun Sik Park , Lee Mi Do
IPC分类号： H01L21/768 , H01L21/50
CPC分类号： H01L21/76898 , H01L23/3128 , H01L24/03 , H01L24/05 , H01L24/16 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/05599 , H01L2224/13025 , H01L2224/16147 , H01L2224/16237 , H01L2224/81141 , H01L2224/81191 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01014 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/10253 , H01L2924/15311 , H01L2924/15788 , H01L2224/05552 , H01L2924/00
摘要： A via forming method is provided. The via forming method includes: forming via-holes in a substrate; putting the substrate having the via-holes in a first solution to fill the via-holes with the first solution; sinking the metal particles into the via-holes by supplying a second solution containing metal particles to the first solution, in which there is the substrate; and performing a first curing process of heat-treating the substrate having the via-holes filled with the metal particles so as to form vias in the via-holes. Further, a method of manufacturing a multi-chip package using the via forming method is provided.
摘要翻译：提供通孔形成方法。通孔形成方法包括：在基板中形成通孔; 将具有通孔的基板放置在第一溶液中以用第一溶液填充通孔; 通过向其中存在基底的第一溶液提供含有金属颗粒的第二溶液将金属颗粒沉入通孔中; 并进行热处理具有填充有金属颗粒的通孔的基板的第一固化工艺，以便在通孔中形成通路。此外，提供了使用通孔形成方法制造多芯片封装的方法。

6. 发明授权

US08486830B2 Via forming method and method of manufacturing multi-chip package using the same 有权
标题翻译：通过使用其制造多芯片封装的形成方法和方法
公开(公告)号：US08486830B2
公开(公告)日：2013-07-16
申请号：US12835289
申请日：2010-07-13
申请人： Dong Pyo Kim , Kyu Ha Baek , Kun Sik Park , Lee Mi Do
发明人： Dong Pyo Kim , Kyu Ha Baek , Kun Sik Park , Lee Mi Do
IPC分类号： H01L21/44
CPC分类号： H01L21/76898 , H01L23/3128 , H01L24/03 , H01L24/05 , H01L24/16 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/05599 , H01L2224/13025 , H01L2224/16147 , H01L2224/16237 , H01L2224/81141 , H01L2224/81191 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01014 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/10253 , H01L2924/15311 , H01L2924/15788 , H01L2224/05552 , H01L2924/00
摘要： A via forming method that includes forming via-holes in a substrate is provided. The method includes putting the substrate, having the via-holes, in a first solution to fill the via-holes with the first solution. Metal particles are sunk into the via-holes by supplying a second solution containing the metal particles to the first solution. A first curing process of heat-treating the substrate is performed so as to form vias in the via-holes. A multi-chip package that includes the substrate having the vias is also provided.
摘要翻译：提供一种通孔形成方法，其包括在基板中形成通孔。该方法包括将具有通孔的基板放在第一溶液中以用第一溶液填充通孔。通过向第一溶液提供含有金属颗粒的第二溶液将金属颗粒沉入通孔中。进行热处理基板的第一固化方法，以便在通孔中形成通路。还提供了包括具有通孔的基板的多芯片封装。

7. 发明申请

US20090146238A1 CMOS-BASED PLANAR TYPE SILICON AVALANCHE PHOTO DIODE USING SILICON EPITAXIAL LAYER AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：使用硅外延层的基于CMOS的平面型硅氧化物照相二极管及其制造方法
公开(公告)号：US20090146238A1
公开(公告)日：2009-06-11
申请号：US12195166
申请日：2008-08-20
申请人： Yong Sun Yoon , Kun Sik Park , Jong Moon Park , Bo Woo Kim , Jin Yeong Kang
发明人： Yong Sun Yoon , Kun Sik Park , Jong Moon Park , Bo Woo Kim , Jin Yeong Kang
IPC分类号： H01L31/103 , H01L31/18
CPC分类号： H01L31/107
摘要： A complementary metal-oxide semiconductor (CMOS)-based planar type avalanche photo diode (APD) using a silicon epitaxial layer and a method of manufacturing the APD, the photo diode including: a substrate; a well layer of a first conductivity type formed in the substrate; an avalanche embedded junction formed in the well layer of the first conductivity type by low energy ion implantation; the silicon epitaxial layer formed in the avalanche embedded junction; a doping area of a second conductivity type opposite to the first conductive type, formed from a portion of a surface of the well layer of the first conductivity type in the avalanche embedded junction and forming a p-n junction; positive and negative electrodes formed on the doping area of the second conductivity type and the well layer of the first conductivity type separated from the doping area of the second conductivity type, respectively; and an oxide layer formed on an overall surface excluding a window where the positive and negative electrodes are formed.
摘要翻译：使用硅外延层的基于互补金属氧化物半导体（CMOS）的平面型雪崩光电二极管（APD）和制造该APD的方法，所述光电二极管包括：衬底; 在衬底中形成的第一导电类型的阱层; 通过低能离子注入形成在第一导电类型的阱层中的雪崩嵌入结; 形成在雪崩嵌入结的硅外延层; 由所述第一导电类型的阱层的表面的一部分形成在所述雪崩嵌入结中并形成p-n结的与所述第一导电类型相反的第二导电类型的掺杂区域; 分别形成在第二导电类型的掺杂区域上的正极和负极以及从第二导电类型的掺杂区域分离的第一导电类型的阱层; 以及形成在除了形成正极和负极的窗口之外的整个表面上的氧化物层。

8. 发明授权

US07994553B2 CMOS-based planar type silicon avalanche photo diode using silicon epitaxial layer and method of manufacturing the same 有权
标题翻译：使用硅外延层的CMOS基平面型硅雪崩光电二极管及其制造方法
公开(公告)号：US07994553B2
公开(公告)日：2011-08-09
申请号：US12195166
申请日：2008-08-20
申请人： Yong Sun Yoon , Kun Sik Park , Jong Moon Park , Bo Woo Kim , Jin Yeong Kang
发明人： Yong Sun Yoon , Kun Sik Park , Jong Moon Park , Bo Woo Kim , Jin Yeong Kang
IPC分类号： H01L31/062
CPC分类号： H01L31/107
摘要： A complementary metal-oxide semiconductor (CMOS)-based planar type avalanche photo diode (APD) using a silicon epitaxial layer and a method of manufacturing the APD, the photo diode including: a substrate; a well layer of a first conductivity type formed in the substrate; an avalanche embedded junction formed in the well layer of the first conductivity type by low energy ion implantation; the silicon epitaxial layer formed in the avalanche embedded junction; a doping area of a second conductivity type opposite to the first conductive type, formed from a portion of a surface of the well layer of the first conductivity type in the avalanche embedded junction and forming a p-n junction; positive and negative electrodes formed on the doping area of the second conductivity type and the well layer of the first conductivity type separated from the doping area of the second conductivity type, respectively; and an oxide layer formed on an overall surface excluding a window where the positive and negative electrodes are formed.
摘要翻译：使用硅外延层的基于互补金属氧化物半导体（CMOS）的平面型雪崩光电二极管（APD）和制造该APD的方法，所述光电二极管包括：衬底; 在衬底中形成的第一导电类型的阱层; 通过低能离子注入形成在第一导电类型的阱层中的雪崩嵌入结; 形成在雪崩嵌入结的硅外延层; 由所述第一导电类型的阱层的表面的一部分形成在所述雪崩嵌入结中并形成p-n结的与所述第一导电类型相反的第二导电类型的掺杂区域; 分别形成在第二导电类型的掺杂区域上的正极和负极以及从第二导电类型的掺杂区域分离的第一导电类型的阱层; 以及形成在除了形成正极和负极的窗口之外的整个表面上的氧化物层。

9. 发明申请

US20060109444A1 Exposure apparatus 有权
标题翻译：曝光装置
公开(公告)号：US20060109444A1
公开(公告)日：2006-05-25
申请号：US11249783
申请日：2005-10-13
申请人： Sang Gi Kim , Ju Wook Lee , Jong Moon Park , Seong Wook Yoo , Kun Sik Park , Yong Sun Yoon , Yoon Kyu Bae , Byung Won Lim , Jin Gun Koo , Boo Woo Kim
发明人： Sang Gi Kim , Ju Wook Lee , Jong Moon Park , Seong Wook Yoo , Kun Sik Park , Yong Sun Yoon , Yoon Kyu Bae , Byung Won Lim , Jin Gun Koo , Boo Woo Kim
IPC分类号： G03B27/54
CPC分类号： G03F7/70425
摘要： Provided is a wafer exposure apparatus used in a semiconductor device manufacturing process, the exposure apparatus including: a reflective mirror for reflecting light provided from a light source; an optical path changer for changing a path of the light provided from the reflective mirror; first mirrors installed at both sides of the optical path changer to change the path of the light; second mirrors installed at both sides of a material to change the path of the light; and third mirrors installed at both sides of a mask to enter the light reflected by the first mirrors to the mask and to enter the light passed through the mask into the second mirrors, whereby it is possible to continuously expose one surface, both surfaces or a specific surface of a wafer in a state that the wafer is once aligned.
摘要翻译：提供了一种在半导体器件制造工艺中使用的晶片曝光装置，该曝光装置包括：用于反射从光源提供的光的反射镜; 用于改变从反射镜提供的光的路径的光路改变器; 首先将镜子安装在光路改换器的两侧，以改变光线的路径; 第二个镜子安装在材料的两侧以改变光线的路径; 和第三反射镜，其安装在掩模的两侧，以将由第一反射镜反射的光进入掩模，并将通过掩模的光进入第二反射镜，由此可以连续地将一个表面，两个表面或一个在晶片一次对准的状态下晶片的比表面。

10. 发明授权

US06297084B1 Method for fabricating semiconductor memory 失效
标题翻译：半导体存储器的制造方法
公开(公告)号：US06297084B1
公开(公告)日：2001-10-02
申请号：US09383635
申请日：1999-08-26
申请人： Ku Chul Joung , Wouns Yang , Kun Sik Park
发明人： Ku Chul Joung , Wouns Yang , Kun Sik Park
IPC分类号： H01L218234
CPC分类号： H01L27/11526 , H01L27/0629 , H01L27/105 , H01L27/11546
摘要： A method for fabricating a semiconductor memory, in which a resistive layer is formed of a material identical to a material of a cell plug layer at a time of formation of the cell plug layer. In addition, a contact pad layer formed of a salicide layer on the cell plug layer is formed with an area larger than the plug layer for simplifying the fabrication process and securing an adequate fabrication allowance, including the steps of (1) forming metal gate electrodes on a semiconductor substrate inclusive of a cell region and a peripheral circuit region, (2) forming gate sidewalls at sides of the gate electrode layers on the cell region and forming a material layer for forming a plug on an entire surface, (3) patterning the material layer for forming a plug on the peripheral circuit region, to form a resistive layer, (4) planarizing the material layer for forming a plug on the cell region, to form a plug layer which stuffs spaces between the gate electrode layers, and (5) selectively forming contact pad layers on a top of the plug layer on the cell region and a portion of the peripheral circuit region and converting into silicide.
摘要翻译：一种制造半导体存储器的方法，其中在形成电池插头层时电阻层由与电池插塞层的材料相同的材料形成。此外，在电池插塞层上由自对准硅层形成的接触焊盘层形成有比插塞层大的区域，以简化制造工艺并确保足够的制造余量，包括以下步骤：（1）形成金属栅电极在包括单元区域和外围电路区域的半导体衬底上，（2）在单元区域的栅极电极层的侧面形成栅极侧壁，并在整个表面上形成用于形成插塞的材料层，（3）图案化用于在外围电路区域上形成插塞的材料层，以形成电阻层;（4）平坦化用于在电池区域形成插塞的材料层，以形成填充栅电极层之间的空间的插塞层;以及（5）在电池区域上的插塞层的顶部和外围电路区域的一部分上选择性地形成接触焊盘层，并转化为硅化物。

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