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1. 发明授权

US07990772B2 Memory device having improved programming operation 有权
标题翻译：存储器件具有改进的编程操作
公开(公告)号：US07990772B2
公开(公告)日：2011-08-02
申请号：US12402158
申请日：2009-03-11
申请人： Prashant S. Damle , Krishna Parat , Alessandro Torsi , Carlo Musilli , Kalpana Vakati , Akira Goda
发明人： Prashant S. Damle , Krishna Parat , Alessandro Torsi , Carlo Musilli , Kalpana Vakati , Akira Goda
IPC分类号： G11C11/34
CPC分类号： G11C16/3404 , G11C16/0483 , G11C16/10 , G11C16/32
摘要： Some embodiments include methods and devices having a module and memory cells. The module is configured to reduce the amount of electrons in the sources and drains of the memory cells during a programming operation.
摘要翻译：一些实施例包括具有模块和存储器单元的方法和装置。该模块被配置为在编程操作期间减少存储器单元的源极和漏极中的电子量。

2. 发明申请

US20100232234A1 MEMORY DEVICE HAVING IMPROVED PROGRAMMING OPERATION 有权
标题翻译：具有改进的编程操作的存储器件
公开(公告)号：US20100232234A1
公开(公告)日：2010-09-16
申请号：US12402158
申请日：2009-03-11
申请人： Prashant S. Damle , Krishna Parat , Alessandro Torsi , Carlo Musilli , Kalpana Vakati , Akira Goda
发明人： Prashant S. Damle , Krishna Parat , Alessandro Torsi , Carlo Musilli , Kalpana Vakati , Akira Goda
IPC分类号： G11C16/06 , G11C7/00
CPC分类号： G11C16/3404 , G11C16/0483 , G11C16/10 , G11C16/32
摘要： Some embodiments include methods and devices having a module and memory cells. The module is configured to reduce the amount of electrons in the sources and drains of the memory cells during a programming operation.
摘要翻译：一些实施例包括具有模块和存储器单元的方法和装置。该模块被配置为在编程操作期间减少存储器单元的源极和漏极中的电子量。

3. 发明授权

US08331160B2 Memory device having improved programming operation 有权
标题翻译：存储器件具有改进的编程操作
公开(公告)号：US08331160B2
公开(公告)日：2012-12-11
申请号：US13193192
申请日：2011-07-28
申请人： Prashant S. Damle , Krishna Parat , Alessandro Torsi , Carlo Musilli , Kalpana Vakati , Akira Goda
发明人： Prashant S. Damle , Krishna Parat , Alessandro Torsi , Carlo Musilli , Kalpana Vakati , Akira Goda
IPC分类号： G11C11/34
CPC分类号： G11C16/3404 , G11C16/0483 , G11C16/10 , G11C16/32
摘要： Some embodiments include methods and devices having a module and memory cells. The module is configured to reduce the amount of electrons in the sources and drains of the memory cells during a programming operation.
摘要翻译：一些实施例包括具有模块和存储器单元的方法和装置。该模块被配置为在编程操作期间减少存储器单元的源极和漏极中的电子量。

4. 发明申请

US20130016569A1 MEMORY DEVICE HAVING IMPROVED PROGRAMMING OPERATION 有权
标题翻译：具有改进的编程操作的存储器件
公开(公告)号：US20130016569A1
公开(公告)日：2013-01-17
申请号：US13621052
申请日：2012-09-15
申请人： Prashant S. Damle , Krishna Parat , Alessandro Torsi , Carlo Musilli , Kalpana Vakati , Akira Goda
发明人： Prashant S. Damle , Krishna Parat , Alessandro Torsi , Carlo Musilli , Kalpana Vakati , Akira Goda
IPC分类号： G11C16/10 , G11C16/04
CPC分类号： G11C16/3404 , G11C16/0483 , G11C16/10 , G11C16/32
摘要： Some embodiments include methods and devices having a module and memory cells. The module is configured to reduce the amount of electrons in the sources and drains of the memory cells during a programming operation.
摘要翻译：一些实施例包括具有模块和存储器单元的方法和装置。该模块被配置为在编程操作期间减少存储器单元的源极和漏极中的电子量。

5. 发明申请

US20110280085A1 MEMORY DEVICE HAVING IMPROVED PROGRAMMING OPERATION 有权
标题翻译：具有改进的编程操作的存储器件
公开(公告)号：US20110280085A1
公开(公告)日：2011-11-17
申请号：US13193192
申请日：2011-07-28
申请人： Prashant S. Damle , Krishna Parat , Alessandro Torsi , Carlo Musilli , Kalpana Vakati , Akira Goda
发明人： Prashant S. Damle , Krishna Parat , Alessandro Torsi , Carlo Musilli , Kalpana Vakati , Akira Goda
IPC分类号： G11C16/10 , G11C16/04
CPC分类号： G11C16/3404 , G11C16/0483 , G11C16/10 , G11C16/32
摘要： Some embodiments include methods and devices having a module and memory cells. The module is configured to reduce the amount of electrons in the sources and drains of the memory cells during a programming operation.
摘要翻译：一些实施例包括具有模块和存储器单元的方法和装置。该模块被配置为在编程操作期间减少存储器单元的源极和漏极中的电子量。

6. 发明授权

US08705290B2 Memory device having improved programming operation 有权
标题翻译：存储器件具有改进的编程操作
公开(公告)号：US08705290B2
公开(公告)日：2014-04-22
申请号：US13621052
申请日：2012-09-15
申请人： Prashant S. Damle , Krishna K. Parat , Alessandro Torsi , Carlo Musilli , Kalpana Vakati , Akira Goda
发明人： Prashant S. Damle , Krishna K. Parat , Alessandro Torsi , Carlo Musilli , Kalpana Vakati , Akira Goda
IPC分类号： G11C11/34
CPC分类号： G11C16/3404 , G11C16/0483 , G11C16/10 , G11C16/32
摘要： Some embodiments include methods and devices having a module and memory cells. The module is configured to reduce the amount of electrons in the sources and drains of the memory cells during a programming operation.
摘要翻译：一些实施例包括具有模块和存储器单元的方法和装置。该模块被配置为在编程操作期间减少存储器单元的源极和漏极中的电子量。

7. 发明申请

US20140143474A1 FLEXIBLE WEAR MANAGEMENT FOR NON-VOLATILE MEMORY 有权
标题翻译：非易失性存储器的灵活磨损管理
公开(公告)号：US20140143474A1
公开(公告)日：2014-05-22
申请号：US13682885
申请日：2012-11-21
申请人： Prashant S. Damle , Robert W. Faber , Ningde Xie
发明人： Prashant S. Damle , Robert W. Faber , Ningde Xie
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7211
摘要： Systems and methods of memory cell wear management that can achieve a more uniform distribution of write cycles across a memory cell address space. The systems and methods allow physical addresses of memory cells subjected to a high number of write cycles to be swapped with physical addresses of memory cells subjected to a lower number of write cycles. The physical address of a group of memory cells is a “hot address” if the write cycle count for that memory cell group exceeds a specified threshold. If the write cycle count for a group of memory cells does not exceed the specified threshold, then the physical address of that memory cell group is a “cold address”. The systems and methods allow the specified threshold of write cycle counts to be dynamically incremented to assure that cold addresses are available for swapping with hot addresses in the memory cell address space.
摘要翻译：可以实现跨存储器单元地址空间的写周期更均匀分布的存储器单元磨损管理的系统和方法。这些系统和方法允许经受大量写入周期的存储器单元的物理地址与经受较少写入周期的存储器单元的物理地址交换。如果该存储单元组的写周期计数超过指定的阈值，则一组存储单元的物理地址是“热地址”。如果一组存储单元的写周期计数不超过指定的阈值，则该存储单元组的物理地址为“冷地址”。系统和方法允许指定的写周期计数阈值动态增加，以确保冷地址可用于与存储单元地址空间中的热地址进行交换。

8. 发明申请

US20140016406A1 ISOLATING, AT LEAST IN PART, LOCAL ROW OR COLUMN CIRCUITRY OF MEMORY CELL BEFORE ESTABLISHING VOLTAGE DIFFERENTIAL TO PERMIT READING OF CELL 有权
标题翻译：在建立电压差异到容许读取单元之前，至少分开存储单元的本地线或列电路
公开(公告)号：US20140016406A1
公开(公告)日：2014-01-16
申请号：US13995230
申请日：2012-06-06
申请人： Doyle Rivers , Prashant S. Damle , Raymond W. Zeng
发明人： Doyle Rivers , Prashant S. Damle , Raymond W. Zeng
IPC分类号： G11C13/00
CPC分类号： G11C13/0004 , G11C7/02 , G11C13/004
摘要： An embodiment may include local row and column circuitry that are local to a memory cell of a memory device. Either the local row circuitry or the local column circuitry may be electrically isolated, at least in part, from at least one remaining portion of the memory device during the establishing of a voltage differential between the local row circuitry and the local column circuitry that is to permit the memory cell to be read during a read of the memory cell. The read may occur subsequent to the establishing of the voltage differential. Many variations, modifications, and alternatives are possible without departing from this embodiment.
摘要翻译：实施例可以包括对存储器件的存储器单元本地的本地行和列电路。在本地行电路和本地列电路之间的电压差建立期间，本地行电路或本地列电路可以至少部分地与存储器件的至少一个剩余部分电隔离，允许在存储器单元的读取期间读取存储器单元。读取可能在建立电压差之后发生。在不脱离本实施例的情况下，可以进行许多变化，修改和替换。

9. 发明授权

US09030906B2 Isolating, at least in part, local row or column circuitry of memory cell before establishing voltage differential to permit reading of cell 有权
标题翻译：至少部分地在建立电压差之前隔离存储单元的本地行或列电路，以允许读取单元
公开(公告)号：US09030906B2
公开(公告)日：2015-05-12
申请号：US13995230
申请日：2012-06-06
申请人： Doyle Rivers , Prashant S. Damle , Raymond W. Zeng
发明人： Doyle Rivers , Prashant S. Damle , Raymond W. Zeng
IPC分类号： G11C8/00 , G11C13/00 , G11C7/02
CPC分类号： G11C13/0004 , G11C7/02 , G11C13/004
摘要： An embodiment may include local row and column circuitry that are local to a memory cell of a memory device. Either the local row circuitry or the local column circuitry may be electrically isolated, at least in part, from at least one remaining portion of the memory device during the establishing of a voltage differential between the local row circuitry and the local column circuitry that is to permit the memory cell to be read during a read of the memory cell. The read may occur subsequent to the establishing of the voltage differential. Many variations, modifications, and alternatives are possible without departing from this embodiment.
摘要翻译：实施例可以包括对存储器件的存储器单元本地的本地行和列电路。在本地行电路和本地列电路之间的电压差建立期间，本地行电路或本地列电路可以至少部分地与存储器件的至少一个剩余部分电隔离，允许在存储器单元的读取期间读取存储器单元。读取可能在建立电压差之后发生。在不脱离本实施例的情况下，可以进行许多变化，修改和替换。

10. 发明申请

US20140089561A1 Techniques Associated with Protecting System Critical Data Written to Non-Volatile Memory 审中-公开
标题翻译：与保护系统关键数据相关的技术写入非易失性存储器
公开(公告)号：US20140089561A1
公开(公告)日：2014-03-27
申请号：US13627407
申请日：2012-09-26
申请人： Kiran Pangal , Ravi H. Motwani , Prashant S. Damle
发明人： Kiran Pangal , Ravi H. Motwani , Prashant S. Damle
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F11/1012 , G06F12/0238 , G06F2212/1032 , G06F2212/1041 , G06F2212/403 , G06F2212/7202 , G06F2212/7207 , G11C16/10 , G11C16/3459 , G11C16/349
摘要： Examples are disclosed for techniques associated with protecting system critical data written to non-volatile memory. In some examples, system critical data may be written to a non-volatile memory using a first data protection scheme. User data that includes non-system critical data may also be written to the non-volatile memory using a second data protection scheme. For these examples, both data protection schemes may have a same given data format size. Various examples are provided for use of the first data protection scheme that may provide enhanced protection for the system critical data compared to protection provided to user data using the second data protection scheme. Other examples are described and claimed.
摘要翻译：公开了与保护写入非易失性存储器的系统关键数据相关的技术的示例。在一些示例中，可以使用第一数据保护方案将系统关键数据写入非易失性存储器。包括非系统关键数据的用户数据也可以使用第二数据保护方案写入非易失性存储器。对于这些示例，两个数据保护方案可以具有相同的给定数据格式大小。为使用第一数据保护方案提供了各种示例，该方案可以与使用第二数据保护方案提供给用户数据的保护相比提供对系统关键数据的增强保护。其他的例子被描述和要求保护。

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