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1. 发明授权

US10074313B2 Display device and method for driving same 有权
公开(公告)号：US10074313B2
公开(公告)日：2018-09-11
申请号：US15316921
申请日：2015-06-05
申请人： Sharp Kabushiki Kaisha
发明人： Daichi Nishikawa , Yasuyuki Ogawa , Kaoru Yamamoto , Noritaka Kishi , Shigetsugu Yamanaka , Masanori Ohara , Noboru Noguchi
IPC分类号： G09G5/00 , G09G3/3258 , G09G3/3266 , G09G3/3291 , G11C19/28
CPC分类号： G09G3/3258 , G09G3/3233 , G09G3/3266 , G09G3/3291 , G09G2300/0842 , G09G2310/0286 , G09G2310/065 , G09G2310/08 , G09G2320/0285 , G09G2320/0295 , G09G2320/045 , G09G2320/048 , G09G2330/023 , G09G2330/12 , G11C19/28
摘要： In a current measurement period set in a pause period, a display device of the present invention applies measurement voltages to data lines (S1 to Sm) and measures currents outputted to monitoring lines (M1 to Mm) from m pixel circuits (18), and then applies data voltages generated corresponding to video signals to the data lines (S1 to Sm).

2. 发明申请

US20180188832A1 MITIGATING DISPLAY NOISE FOR TOUCH AND PEN SENSING 审中-公开
公开(公告)号：US20180188832A1
公开(公告)日：2018-07-05
申请号：US15399235
申请日：2017-01-05
申请人： Microsoft Technology Licensing, LLC
发明人： Justin Allan Coppin , Eran Arbel , Amir Zyskind
IPC分类号： G06F3/038 , G06F3/044 , G06F3/0354 , G06F3/041
CPC分类号： G06F3/0383 , G06F3/03545 , G06F3/0412 , G06F3/0416 , G06F3/044 , G06F2203/04105 , G09G2310/065 , G09G2340/0435 , G09G2354/00
摘要： A display device includes a display controller and a timing controller to drive frames at a frame rate onto a display. The display device may include sensor circuitry to detect a signal from a pen. The signal from the pen includes a sync signal indicative of a repetition rate of the signal. In one embodiment, the sync signal and the display timer are asynchronous. The sensor circuitry is configured to sense the signal from the pen during sensing windows, where timing of the sensing windows is based on the repetition rate. In one embodiment, the display controller is configured to pause driving a frame onto the display during the sensing windows.

3. 发明授权

US09953594B2 Liquid crystal display device and method for driving same 有权
公开(公告)号：US09953594B2
公开(公告)日：2018-04-24
申请号：US15036531
申请日：2014-11-07
申请人： Sharp Kabushiki Kaisha
发明人： Kentaroh Uemura , Norio Ohmura , Tatsuhiko Suyama
IPC分类号： G09G3/36 , G09G3/34
CPC分类号： G09G3/3614 , G09G3/3406 , G09G3/3677 , G09G3/3688 , G09G3/3696 , G09G2300/0426 , G09G2310/0245 , G09G2310/0251 , G09G2310/065 , G09G2310/08 , G09G2320/0214 , G09G2320/0247 , G09G2330/021 , G09G2330/022
摘要： When a SLEEPIN Command is inputted to the liquid crystal display device, the liquid crystal display device controls a source driver and a gate driver to generate an alternating current voltage and apply the generated alternating current voltage to a liquid crystal layer, in order to eliminate charge storage due to impurity ions distributed unevenly due to a polarity bias caused by a voltage applied to the liquid crystal layer until a point of time when the Command is inputted. In this manner, the liquid crystal display device shifts to a sleep period in a state where the charge storage due to the unevenly distributed impurity ions is eliminated. Therefore, when the liquid crystal display device resumes from the sleep period, generation of an afterimage due to burn-in of liquid crystal and generation of a flicker due to deviation of an optimum common voltage do not occur.

4. 发明授权

US09892676B2 Gate driving circuit providing a matched gate driving signal, corresponding driving method, display circuit and display apparatus 有权
公开(公告)号：US09892676B2
公开(公告)日：2018-02-13
申请号：US14787934
申请日：2015-04-24
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Kun Cao , Zhongyuan Wu
IPC分类号： G09G3/32 , G09G3/3225 , G09G3/3291 , G09G3/3233 , G09G3/3266
CPC分类号： G09G3/3225 , G09G3/3233 , G09G3/3266 , G09G3/3291 , G09G2300/0408 , G09G2300/0819 , G09G2300/0842 , G09G2310/0281 , G09G2310/0286 , G09G2310/0291 , G09G2310/065 , G09G2320/0295 , G09G2330/12
摘要： A gate driving circuit (12, 13), a display circuit, a driving method thereof and a display apparatus are provided. The gate driving circuit (12, 13) comprises at least three GOA units, each of which comprises a signal input terminal (INPUT), an output terminal (OUT), a reset terminal (RESET) and an idle output terminal (COUNT). The gate driving circuit, the display circuit and the driving method and the display apparatus are capable of providing a matched gate driving signal in the process of threshold compensation outside pixels and applicable to manufacture a displayer.

5. 发明授权

US09847070B2 Display with intraframe pause circuitry 有权
公开(公告)号：US09847070B2
公开(公告)日：2017-12-19
申请号：US14520797
申请日：2014-10-22
申请人： Apple Inc.
发明人： Kwang Soon Park , Chun-Yao Huang , Shih Chang Chang
IPC分类号： G09G3/36 , G06F3/041 , G11C19/18
CPC分类号： G09G3/3688 , G06F3/0412 , G06F3/0416 , G06F3/044 , G09G2300/0814 , G09G2300/0819 , G09G2300/0842 , G09G2310/0267 , G09G2310/0286 , G09G2310/0294 , G09G2310/063 , G09G2310/065 , G09G2310/08 , G09G2320/0209 , G11C19/184
摘要： A display may have an array of pixels to display images. Gate line driver circuitry may have stages that supply gate line signals. A gate line may be located in each row of the pixels. Each stage may have an output block that produces a respective one of the gate line signals and may have a carry block that separately produces a carry signal that is provided to a later stage in the gate line driver circuitry. A memory may be provided in at least some of the stages to store signals produced by the output blocks during intraframe pausing operations. At the end of an intraframe pause, the stored signals may be used in restarting production of the gate line signals by output blocks in the gate line driver stages. Circuitry may be used to separately reset the output block and suppress carry signal production by the carry block.

6. 发明申请

US20170337880A1 DISPLAY UNIT AND METHOD OF DRIVING DISPLAY UNIT, AND ELECTRONIC APPARATUS 审中-公开
公开(公告)号：US20170337880A1
公开(公告)日：2017-11-23
申请号：US15529675
申请日：2015-11-05
申请人： Sony Corporation
发明人： Akihito Nishiike , Hidehiko Takanashi , Yuki Oishi
IPC分类号： G09G3/34
CPC分类号： G09G3/344 , G09G2300/08 , G09G2310/0248 , G09G2310/065 , G09G2320/0252 , G09G2320/066
摘要： A display unit includes an electrophoretic display device in which an optical reflectance varies on a time-series basis depending on an applied voltage, and a drive circuit that performs voltage drive of the electrophoretic display device. The drive circuit applies a first voltage directed to display to the electrophoretic display device over a period of one or more frames, and applies, in the period of one or more frames, a second voltage that is different from the first voltage once or a plurality of times on or after a first point of time at which a derivative value of the optical reflectance reaches a maximum magnitude.

7. 发明授权

US09536467B2 Display device 有权
标题翻译：显示设备
公开(公告)号：US09536467B2
公开(公告)日：2017-01-03
申请号：US14883338
申请日：2015-10-14
申请人： Japan Display Inc.
发明人： Motoharu Miyamoto , Takahiro Ochiai
IPC分类号： G09G3/20 , G09G3/36
CPC分类号： G09G3/3677 , G02F1/13306 , G02F1/1345 , G09G3/2096 , G09G2300/0426 , G09G2300/0809 , G09G2310/0202 , G09G2310/065
摘要： A circuit block of a driving circuit of a display device includes a first transistor that has a gate being connected to a first node having an active potential during an output period, and controls electrical conduction between a first clock signal line being applied with a first clock signal and the scanning signal line, a second transistor that has a gate being connected to a second node having an active potential during a non-output period, and controls electrical conduction between the first node and an inactive potential line, and a third transistor that has a gate being connected to the first node, and controls electrical conduction between the second node and a first cyclic signal line applied with a first period signal having an active potential at the time of termination of the output period.
摘要翻译：显示装置的驱动电路的电路块包括第一晶体管，其在输出周期期间具有连接到具有有效电位的第一节点的栅极，并且控制施加于第一时钟的第一时钟信号线之间的导通信号和扫描信号线，第二晶体管，其在非输出时段期间具有连接到具有有效电位的第二节点的栅极，并控制第一节点与非活动电位线之间的电导;以及第三晶体管，具有连接到第一节点的栅极，并且控制第二节点与施加在输出周期结束时具有有效电位的第一周期信号的第一循环信号线之间的导电。

8. 发明申请

US20160267869A1 DISPLAY DEVICE 审中-公开
标题翻译：显示设备
公开(公告)号：US20160267869A1
公开(公告)日：2016-09-15
申请号：US15159343
申请日：2016-05-19
申请人： Panasonic Liquid Crystal Display Co., Ltd.
发明人： Genshiro KAWACHI , Kazuo KITA , Yoshihisa OOISHI , Hideyuki NAKANISHI , Toshikazu KOUDO
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G3/3208 , G09G3/3266 , G09G2300/0408 , G09G2310/0218 , G09G2310/0248 , G09G2310/0251 , G09G2310/0264 , G09G2310/0281 , G09G2310/0297 , G09G2310/061 , G09G2310/062 , G09G2310/065 , G09G2310/067 , G09G2320/043 , H01L27/124
摘要： A display device includes an image display area that includes pixels sectioned by scanning signal lines and video signal lines, first scanning connection lines connected to scanning signal lines, first thin film transistors, first selection signal lines, second thin film transistors, second selection signal lines, and a scanning signal drive circuit connected to the first scanning connection lines, the first selection signal lines, and the second selection signal lines, wherein the scanning signal drive circuit sequentially supplies a pulse signal to the first scanning connection lines in a selection period in which a gate-on voltage is applied to the one of the first selection signal lines, and the scanning signal drive circuit applies a gate-off voltage to the one of the second selection signal lines corresponding to the one of the first selection signal lines to which the gate-on voltage is applied.
摘要翻译：显示装置包括图像显示区域，包括通过扫描信号线和视频信号线分割的像素，连接到扫描信号线的第一扫描连接线，第一薄膜晶体管，第一选择信号线，第二薄膜晶体管，第二选择信号线以及连接到第一扫描连接线，第一选择信号线和第二选择信号线的扫描信号驱动电路，其中扫描信号驱动电路在选择周期内向第一扫描连接线顺序地提供脉冲信号对第一选择信号线之一施加栅极导通电压，扫描信号驱动电路对与第一选择信号线对应的第二选择信号线之一施加栅极截止电压，施加栅极导通电压。

9. 发明申请

US20160247446A1 GATE DRIVING CIRCUIT, DISPLAY CIRCUIT AND DRIVING METHOD AND DISPLAY APPARATUS 有权
标题翻译：门驱动电路，显示电路及驱动方法及显示装置
公开(公告)号：US20160247446A1
公开(公告)日：2016-08-25
申请号：US14787934
申请日：2015-04-24
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： KUN CAO , ZHONGYUAN WU
IPC分类号： G09G3/32
CPC分类号： G09G3/3225 , G09G3/3233 , G09G3/3266 , G09G3/3291 , G09G2300/0408 , G09G2300/0819 , G09G2300/0842 , G09G2310/0281 , G09G2310/0286 , G09G2310/0291 , G09G2310/065 , G09G2320/0295 , G09G2330/12
摘要： A gate driving circuit (12, 13), a display circuit, a driving method thereof and a display apparatus are provided. The gate driving circuit (12, 13) comprises at least three GOA units, each of which comprises a signal input terminal (INPUT), an output terminal (OUT), a reset terminal (RESET) and an idle output terminal (COUNT). The gate driving circuit, the display circuit and the driving method and the display apparatus are capable of providing a matched gate driving signal in the process of threshold compensation outside pixels and applicable to manufacture a displayer.
摘要翻译：提供了栅极驱动电路（12,13），显示电路，其驱动方法和显示装置。栅极驱动电路（12,13）包括至少三个GOA单元，每个GOA单元包括信号输入端（INPUT），输出端（OUT），复位端（RESET）和空闲输出端（COUNT）。门驱动电路，显示电路和驱动方法以及显示装置能够在像素外部的阈值补偿处理中提供匹配的栅极驱动信号，并且可用于制造显示器。

10. 发明申请

US20160118011A1 Display With Intraframe Pause Circuitry 有权
标题翻译：显示与帧内暂停电路
公开(公告)号：US20160118011A1
公开(公告)日：2016-04-28
申请号：US14520797
申请日：2014-10-22
申请人： Apple Inc.
发明人： Kwang Soon Park , Chun-Yao Huang , Shih Chang Chang
IPC分类号： G09G3/36 , G06F3/041
CPC分类号： G09G3/3688 , G06F3/0412 , G06F3/0416 , G06F3/044 , G09G2300/0814 , G09G2300/0819 , G09G2300/0842 , G09G2310/0267 , G09G2310/0286 , G09G2310/0294 , G09G2310/063 , G09G2310/065 , G09G2310/08 , G09G2320/0209 , G11C19/184
摘要： A display may have an array of pixels to display images. Gate line driver circuitry may have stages that supply gate line signals. A gate line may be located in each row of the pixels. Each stage may have an output block that produces a respective one of the gate line signals and may have a carry block that separately produces a carry signal that is provided to a later stage in the gate line driver circuitry. A memory may be provided in at least some of the stages to store signals produced by the output blocks during intraframe pausing operations. At the end of an intraframe pause, the stored signals may be used in restarting production of the gate line signals by output blocks in the gate line driver stages. Circuitry may be used to separately reset the output block and suppress carry signal production by the carry block.
摘要翻译：显示器可以具有用于显示图像的像素阵列。栅极线驱动器电路可以具有提供栅极线信号的级。栅极线可以位于像素的每一行中。每个级可以具有产生栅极线信号中的相应一个的输出块，并且可以具有分别产生提供给栅极线驱动器电路中的较后级的进位信号的进位块。可以在至少一些级中提供存储器，以在帧内暂停操作期间存储由输出块产生的信号。在帧内暂停结束时，存储的信号可以用于通过栅极线驱动器级中的输出块重新开始生成栅极线信号。可以使用电路来单独复位输出块，并抑制进位块的进位信号产生。

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