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1. 发明公开

US20230240155A1 Optically Transparent Surface Gate for a Qubit Memory Cell 审中-公开
公开(公告)号：US20230240155A1
公开(公告)日：2023-07-27
申请号：US17582800
申请日：2022-01-24
申请人： Nokia Technologies Oy
发明人： Robert Willett
IPC分类号： H01L39/22 , G11C11/44 , G06N10/40 , G06N10/60
CPC分类号： H01L39/228 , H01L39/221 , G11C11/44 , G06N10/40 , G06N10/60
摘要： A qubit memory cell having a thin, optically transparent, metal surface gate that laterally fits into the corresponding region of the memory cell, while not being in direct contact with the perimeter of the region. The surface gate may have apertures to accommodate therein the dot-like control electrodes of the qubit and enable the corresponding electrical overpass bridges to be connected to those dot-like control electrodes. The thickness of the surface gate may be selected such as to let a substantial portion of light impinging thereupon penetrate to the underlying surface of the substrate. In at least some embodiments, the electrical-interconnect structure of the memory cell may be designed to enable separate electrical biasing of the surface gate, e.g., independent of the electrical biasing of some other electrodes of the memory cell. Advantageously, such a surface gate may significantly reduce detrimental clumping of charge carriers in the memory cell.

2. 发明授权

US11696516B2 Quantum computing devices with Majorana Hexon qubits 有权
公开(公告)号：US11696516B2
公开(公告)日：2023-07-04
申请号：US17018988
申请日：2020-09-11
申请人： Microsoft Technology Licensing, LLC
发明人： Michael Freedman , Chetan Nayak , Roman Lutchyn , Torsten Karzig , Parsa Bonderson
IPC分类号： H10N60/10 , H10N69/00 , H01L39/22 , G06N10/00 , H01L27/18 , B82Y10/00
CPC分类号： H01L39/228 , G06N10/00 , H01L27/18 , B82Y10/00
摘要： Various embodiments of a modular unit for a topologic qubit and of scalable quantum computing architectures using such modular units are disclosed herein. For example, one example embodiment is a modular unit for a topological qubit comprising 6 Majorana zero modes (MZMs) on a mesoscopic superconducting island. These units can provide the computational MZMs with protection from quasiparticle poisoning. Several possible realizations of these modular units are described herein. Also disclosed herein are example designs for scalable quantum computing architectures comprising the modular units together with gates and reference arms (e.g., quantum dots, Majorana wires, etc.) configured to enable joint parity measurements to be performed for various combinations of two or four MZMs associated with one or two modular units, as well as other operations on the states of MZMs.

3. 发明授权

US11683996B2 Gate voltage-tunable electron system integrated with superconducting resonator for quantum computing device 有权
公开(公告)号：US11683996B2
公开(公告)日：2023-06-20
申请号：US17061177
申请日：2020-10-01
申请人： International Business Machines Corporation
发明人： Sean Hart , Jay M. Gambetta , Patryk Gumann
IPC分类号： H01L29/43 , H01L39/22 , H01L29/15 , H01L29/16 , H01L29/165 , H01L29/205 , H01L39/02 , H01L39/24
CPC分类号： H01L39/223 , H01L29/155 , H01L29/165 , H01L29/1606 , H01L29/205 , H01L29/437 , H01L39/025 , H01L39/228 , H01L39/2493
摘要： A superconducting coupling device includes a resonator structure. The resonator structure has a first end configured to be coupled to a first device and a second end configured to be coupled to a second device. The device further includes an electron system coupled to the resonator structure, and a gate positioned proximal to a portion of the electron system. The electron system and the gate are configured to interrupt the resonator structure at one or more predetermined locations forming a switch. The gate is configured to receive a gate voltage and vary an inductance of the electron system based upon the gate voltage. The varying of the inductance induces the resonator structure to vary a strength of coupling between the first device and the second device.

4. 发明授权

US10873019B2 Topological programmable scalable quantum computing machine utilizing chord line quasi unidimensional aperature tunneling semiconductor structures 有权
公开(公告)号：US10873019B2
公开(公告)日：2020-12-22
申请号：US16524259
申请日：2019-07-29
申请人： equal1.labs Inc.
发明人： Dirk Robert Walter Leipold , George Adrian Maxim , Michael Albert Asker
IPC分类号： H01L39/22 , H01L27/18 , G06N10/00 , H01L39/24 , H01L39/02
CPC分类号： H01L39/228 , G06N10/00 , H01L27/18 , H01L39/025 , H01L39/223 , H01L39/2493
摘要： A novel and useful topological, scalable, and reprogrammable quantum computing machine having one or more quasi-unidimensional chord lines along which the movement of a particle is constrained. The unidimensional passage has localized energy levels that can be controlled with classic electronics. The chord line has two or more quantum dots between which a quasi-unidimensional channel is formed for the particle to travel from one qdot to the other. The tunneling path may be polysilicon, metal, thin oxide, or induced depletion region. The chord line can be in a two-dimensional space for a planar process or in a three-dimensional space with multiple layers of signal processing for a three dimensional process. A quantum structure has semiconductor dots with a layer that provides the chord line for the quantum particle evolution to occur from one dot to the other. The various layers may include polysilicon, metal, thin oxide, or induced depletion region either fully overlapped or partially overlapped.

5. 发明授权

US10614372B2 Constructing and programming quantum hardware for robust quantum annealing processes 有权
公开(公告)号：US10614372B2
公开(公告)日：2020-04-07
申请号：US16450461
申请日：2019-06-24
申请人： Google LLC
发明人： Masoud Mohseni , Hartmut Neven
IPC分类号： G06N10/00 , G06N20/00 , G06F15/82 , H01L39/02 , H01L39/22 , G06F17/11 , G06N7/00
CPC分类号： G06N10/00 , G06F15/82 , G06F17/11 , G06N7/005 , G06N20/00 , H01L39/025 , H01L39/223 , H01L39/228
摘要： Among other things, an apparatus comprises quantum units; and couplers among the quantum units. Each coupler is configured to couple a pair of quantum units according to a quantum Hamiltonian characterization of the quantum by the coupler characterizing the quantum units and the couplers. The quantum Hamiltonian includes quantum annealer Hamiltonian and a quantum governor Hamiltonian. The quantum annealer Hamiltonian includes information bearing degrees of freedom. The quantum governor Hamiltonian includes non-information bearing degrees of freedom that are engineered to steer the dissipative dynamics of information bearing degrees of freedom.

6. 发明申请

US20170256698A1 RECONFIGURABLE, TUNABLE QUANTUM QUBIT CIRCUITS WITH INTERNAL, NONVOLATILE MEMORY 有权
公开(公告)号：US20170256698A1
公开(公告)日：2017-09-07
申请号：US15060290
申请日：2016-03-03
申请人： SPAWAR Systems Center Pacific
发明人： Osama M. Nayfeh , Son Dinh , Anna Leese de Escobar , Kenneth Simonsen , Shahrokh Naderi
IPC分类号： H01L39/22 , H01L39/02 , H01L39/24
CPC分类号： H01L27/18 , G06N99/002 , H01L39/225 , H01L39/228
摘要： A tunable quantum qubit circuit comprising: a plurality of interconnected Josephson tunneling junctions sculpted in-situ on-chip, wherein each Josephson tunneling junction comprises a pair of high temperature superconductors separated by an active region having a controlled charge density; a capacitive-coupled control gate operatively coupled to the Josephson tunneling junctions and configured to simultaneously modulate energy levels of the Josephson tunneling junctions; and independent control gates operatively coupled to the Josephson tunneling junctions, wherein the independent control gates are reconfigurable on-the-fly by an operator.

7. 发明授权

US09713199B2 Topological qubit fusion 有权
公开(公告)号：US09713199B2
公开(公告)日：2017-07-18
申请号：US13957268
申请日：2013-08-01
申请人： Microsoft Corporation
发明人： Michael H. Freedman , Zhenghan Wang , Roman M. Lutchyn , Chetan Nayak , Parsa Bonderson
IPC分类号： H04W99/00 , G06N99/00 , B82Y10/00
CPC分类号： G06N99/002 , B82Y10/00 , H01L39/228 , H04W99/00
摘要： A fusion outcome quasiparticle may be trapped in a potential well of a topological segment. The fusion outcome quasiparticle may be the product of fusion of a first quasiparticle and a second quasiparticle, where the first and the second quasiparticles are localized at ends of a topological segment. The potential well having the fusion outcome quasiparticle trapped therein and a third quasiparticle may be moved relative to each other such that the potential well and the third quasiparticle are brought toward each other. The quasiparticles may be Majorana modes of a nanowire.

8. 发明授权

US07749922B2 Nanowire structures and electrical devices 有权
标题翻译：纳米线结构和电气设备
公开(公告)号：US07749922B2
公开(公告)日：2010-07-06
申请号：US11417370
申请日：2006-05-04
申请人： Alexey Bezryadin , Mikas Remeika
发明人： Alexey Bezryadin , Mikas Remeika
IPC分类号： H01L29/76
CPC分类号： H01L29/7613 , B82Y10/00 , H01L29/0673 , H01L39/228 , H01L49/006 , H01L51/0048 , H01L51/0508 , Y10S977/936 , Y10S977/937 , Y10S977/938
摘要： The present invention provides structures and devices comprising conductive segments and conductance constricting segments of a nanowire, such as metallic, superconducting or semiconducting nanowire. The present invention provides structures and devices comprising conductive nanowire segments and conductance constricting nanowire segments having accurately selected phases including crystalline and amorphous states, compositions, morphologies and physical dimensions, including selected cross sectional dimensions, shapes and lengths along the length of a nanowire. Further, the present invention provides methods of processing nanowires capable of patterning a nanowire to form a plurality of conductance constricting segments having selected positions along the length of a nanowire, including conductance constricting segments having reduced cross sectional dimensions and conductance constricting segments comprising one or more insulating materials such as metal oxides.
摘要翻译：本发明提供了包括纳米线（例如金属，超导或半导体纳米线）的导电段和导电收缩段的结构和器件。本发明提供了包括导电纳米线段和具有精确选择的相包括导电纳米线区段的结构和装置，包括结晶和非晶状态，组成，形态和物理尺寸，包括沿着纳米线长度的所选截面尺寸，形状和长度。此外，本发明提供了处理纳米线的方法，该纳米线能够构图纳米线，以形成具有沿纳米线长度的选定位置的多个电导收缩段，包括具有减小的横截面尺寸的电导收缩段和包含一个或多个绝缘材料如金属氧化物。

9. 发明授权

US06919579B2 Quantum bit with a multi-terminal junction and loop with a phase shift 有权
标题翻译：具有多端点的量子位和具有相移的环路
公开(公告)号：US06919579B2
公开(公告)日：2005-07-19
申请号：US09839637
申请日：2001-04-20
申请人： Mohammad H. S. Amin , Timothy Duty , Alexander Omelyanchouk , Geordie Rose , Alexandre Zagoskin , Alexandre Blais
发明人： Mohammad H. S. Amin , Timothy Duty , Alexander Omelyanchouk , Geordie Rose , Alexandre Zagoskin , Alexandre Blais
IPC分类号： G06N99/00 , H01L39/22
CPC分类号： G06N99/002 , B82Y10/00 , H01L39/223 , H01L39/225 , H01L39/228 , Y10S977/933
摘要： A solid-state quantum computing qubit includes a multi-terminal junction coupled to a superconducting loop where the superconducting loop introduces a phase shift to the superconducting order parameter. The ground state of the supercurrent in the superconducting loop and multi-terminal junction is doubly degenerate, with two supercurrent ground states having distinct magnetic moments. These quantum states of the supercurrents in the superconducting loop create qubits for quantum computing. The quantum states can be initialized by applying transport currents to the external leads. Arbitrary single qubit operations may be performed by varying the transport current and/or an externally applied magnetic field. Read-out may be performed using direct measurement of the magnetic moment of the qubit state, or alternatively, radio-frequency single electron transistor electrometers can be used as read-out devices when determining a result of the quantum computing. Further, qubits as described above can form arrays of qubits for performing controlled quantum computing calculations. In one example, an array of qubits can be utilized as a random number generator.
摘要翻译：固态量子计算量子位包括耦合到超导环路的多端子结，其中超导环路将相移引入超导阶数参数。超导环路和多端子结中的超电流的基态是双重退化的，两个超级电流基态具有不同的磁矩。超导环路中的超电流的这些量子态产生量子计算的量子位。可以通过将输送电流施加到外部引线来初始化量子态。可以通过改变传输电流和/或外部施加的磁场来执行任意的单量子比特操作。可以使用量子位状态的磁矩的直接测量来执行读出，或者，当确定量子计算的结果时，可以使用射频单电子晶体管静电仪作为读出装置。此外，如上所述的量子位可以形成用于执行受控量子计算计算的量子位的数组。在一个示例中，可以使用量子位的阵列作为随机数发生器。

10. 发明授权

US06649929B2 Quantum computing with d-wave superconductors 失效
公开(公告)号：US06649929B2
公开(公告)日：2003-11-18
申请号：US10150035
申请日：2002-05-16
申请人： Dennis M. Newns , Chang C. Tsuei
发明人： Dennis M. Newns , Chang C. Tsuei
IPC分类号： H01L3922
CPC分类号： G06N99/002 , B82Y10/00 , H01L39/225 , H01L39/228 , Y10S977/933
摘要： A method and structure for a d-wave qubit structure includes a qubit disk formed at a multi-crystal junction (or qubit ring) and a superconducting screening structure surrounding the qubit. The structure may also include a superconducting sensing loop, where the superconducting sensing loop comprises an s-wave superconducting ring. The structure may also include a superconducting field effect transistor.

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