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1. 发明申请

US20180316313A1 AMPLIFIER OFFSET CANCELLATION USING AMPLIFIER SUPPLY VOLTAGE 审中-公开
公开(公告)号：US20180316313A1
公开(公告)日：2018-11-01
申请号：US15582233
申请日：2017-04-28
申请人： Cirrus Logic International Semiconductor Ltd.
发明人： Graeme Gordon MACKAY , Lei ZHU , Ku HE , Vamsikrishna PARUPALLI
IPC分类号： H03F1/02 , H03F3/45
CPC分类号： H03F1/0233 , H03F1/0227 , H03F1/025 , H03F1/30 , H03F3/187 , H03F3/213 , H03F3/45475 , H03F3/45973 , H03F3/45982 , H03F2200/03 , H03F2200/375 , H03F2200/511 , H03F2203/45022 , H03F2203/45042 , H03F2203/45152 , H03F2203/45212 , H03F2203/45528 , H03F2203/45588 , H03F2203/45594 , H03F2203/45596 , H03F2203/45601 , H03F2203/45681
摘要： In accordance with embodiments of the present disclosure, a method for power supply rejection for an amplifier may include generating a correction signal by multiplying a quantity indicative of a power supply voltage of the amplifier by a transfer function defining a response from the power supply voltage of the amplifier to an output signal of the amplifier and subtracting the correction signal from a signal within a signal path of a circuit comprising the amplifier.

2. 发明授权

US09306514B2 Hybrid power amplifier comprising heterojunction bipolar transistors (HBTs) and complementary metal oxide semiconductor (CMOS) devices 有权
标题翻译：包括异质结双极晶体管（HBT）和互补金属氧化物半导体（CMOS）器件的混合功率放大器
公开(公告)号：US09306514B2
公开(公告)日：2016-04-05
申请号：US14289597
申请日：2014-05-28
申请人： Avago Technologies General IP (Singapore) Pte. Ltd.
发明人： Young Kwon , David Bockelman , Marshall Maple , Joo Min Jung
IPC分类号： H03F3/187 , H03F3/21 , H03F3/19 , H03F1/52 , H03F3/45
CPC分类号： H03F3/211 , H01L2224/16225 , H01L2224/48091 , H01L2224/48137 , H03F1/0272 , H03F1/52 , H03F1/565 , H03F3/19 , H03F3/195 , H03F3/245 , H03F3/4508 , H03F2200/222 , H03F2200/318 , H03F2200/387 , H03F2200/405 , H03F2200/534 , H03F2200/537 , H03F2200/541 , H03F2200/555 , H03F2203/21139 , H03F2203/45394 , H03F2203/45544 , H03F2203/45591 , H03F2203/45594 , H03F2203/45596 , H01L2924/00014
摘要： A heterojunction bipolar transistor (HBT) hybrid type RF (radio frequency) power amplifier includes a first device including an input terminal for receiving an RF signal, a pre-driver stage for amplifying the received RF signal, and an output terminal, the input terminal, the pre-driver stage and the output terminal being disposed in or over a first substrate; and a second device having a main stage having an HBT amplifier circuit disposed in or over a second substrate to further amplify the RF signal amplified by the pre-driver stage. The RF signal further amplified by the main stage is output through the output terminal of the first device.
摘要翻译：异质结双极晶体管（HBT）混合型RF（射频）功率放大器包括：第一器件，包括用于接收RF信号的输入端，用于放大接收的RF信号的预驱动级;以及输出端; 所述预驱动器级和所述输出端设置在第一基板中或上方; 以及第二装置，其具有设置在第二基板中或上方的HBT放大器电路的主级，以进一步放大由预驱动器级放大的RF信号。由主级进一步放大的RF信号通过第一装置的输出端输出。

3. 发明授权

US09287841B2 Gain control circuit and method capable of easing leakage current influence 有权
标题翻译：增益控制电路和方法能够缓解漏电流的影响
公开(公告)号：US09287841B2
公开(公告)日：2016-03-15
申请号：US14334498
申请日：2014-07-17
申请人： REALTEK SEMICONDUCTOR CORPORATION
发明人： Ming-Cheng Chiang , Yuan-Ping Hsu , Li-Lung Kao
IPC分类号： H03G3/20 , H03G1/00 , H03F3/45
CPC分类号： H03G1/0023 , H03F3/45475 , H03F2203/45528 , H03F2203/45534 , H03F2203/45596 , H03F2203/45616 , H03G1/0088 , H03G3/20
摘要： The present invention discloses a gain control circuit capable of easing leakage current influence. According to an embodiment of the present invention, the gain control circuit comprises: at least one signal input end for receiving at least one input signal; a signal output end for outputting an output signal; an amplifier coupled between an amplifier input end and the signal output end; and a plurality of gain schemes. Each of the gain schemes is set between the at least one signal input end and the signal output end; and when one of the gain schemes is activated to generate the output signal, the rest gain schemes are inactivated to stop gain production and concurrently discharge leakage currents through their respective grounding paths.
摘要翻译：本发明公开了一种能够缓解漏电流影响的增益控制电路。根据本发明的实施例，增益控制电路包括：用于接收至少一个输入信号的至少一个信号输入端; 用于输出输出信号的信号输出端; 耦合在放大器输入端和信号输出端之间的放大器; 和多个增益方案。每个增益方案被设置在至少一个信号输入端和信号输出端之间; 并且当其中一个增益方案被激活以产生输出信号时，其余的增益方案被停用以停止增益产生并同时通过它们各自的接地路径泄漏泄漏电流。

4. 发明申请

US20120086448A1 AMPLIFYING DRIVING UNIT USING GIANT MAGNETO RESISTANCE SENSOR AND DIAGNOSIS DEVICE USING THE SAME 审中-公开
标题翻译：使用大容量磁阻电阻传感器和诊断装置的放大驱动单元
公开(公告)号：US20120086448A1
公开(公告)日：2012-04-12
申请号：US13257122
申请日：2010-03-19
申请人： Young Muk Kim , Jeong Ryul Kim , Man Hue Choi , Chung Wan Lee , Ji Hye Yang , Mun Suk Kang
发明人： Young Muk Kim , Jeong Ryul Kim , Man Hue Choi , Chung Wan Lee , Ji Hye Yang , Mun Suk Kang
IPC分类号： G01R33/09 , H03F3/45
CPC分类号： A61B5/055 , G01R33/093 , H01F10/325 , H03F3/347 , H03F3/45475 , H03F3/45928 , H03F3/45991 , H03F2200/261 , H03F2203/45101 , H03F2203/45152 , H03F2203/45154 , H03F2203/45581 , H03F2203/45596
摘要： The present invention relates to an amplifying unit comprising: a pull up down unit pulling up or pulling down a positive GMR signal and a negative GMR signal provide by a GMR sensor; a GMR amplifying unit including a plurality of amplifying units generating a GMR signal by amplifying a difference between the stand-alone type signal and the negative GMR signal according to the GMR sensor; a low pass filtering unit attenuating noise of the GMR signal; a reference converting unit generating a reference voltage having a predetermined range for generating a GMR signal; and a gain converting unit amplifying the GMR signals inputted to the plurality of amplifying units by several ten or hundred times.
摘要翻译：放大单元技术领域本发明涉及一种放大单元，包括：上拉单元，其上拉或下拉由GMR传感器提供的正GMR信号和负GMR信号; GMR放大单元，包括通过根据GMR传感器放大独立型信号和负GMR信号之间的差产生GMR信号的多个放大单元; 低通滤波单元衰减GMR信号的噪声; 产生具有用于产生GMR信号的预定范围的参考电压的参考转换单元; 以及增益转换单元，其将输入到所述多个放大单元的GMR信号放大几十次或者100次。

5. 发明授权

US08035438B2 Integrated circuits and methods for enabling high-speed AC-coupled networks to suppress noise during low-frequency operation 失效
标题翻译：用于使高速交流耦合网络在低频操作期间抑制噪声的集成电路和方法
公开(公告)号：US08035438B2
公开(公告)日：2011-10-11
申请号：US12467259
申请日：2009-05-16
申请人： Gerald Lee Esch, Jr.
发明人： Gerald Lee Esch, Jr.
IPC分类号： H03L5/00
CPC分类号： H03F1/52 , H03F3/45475 , H03F2203/45536 , H03F2203/45541 , H03F2203/45542 , H03F2203/45561 , H03F2203/45591 , H03F2203/45594 , H03F2203/45596
摘要： An alternating-current (AC) coupling integrated circuit (IC) suppresses signal errors introduced by a steady-state input signal. The IC includes an operational amplifier, a true direct-current (DC) bias network, a complimentary DC-bias network and first and second feedback elements. The operational amplifier has an inverting input, a non-inverting input and an output. The true DC-bias network has first and second branches that are coupled to one another and the non-inverting input. The complimentary DC-bias network has third and fourth branches that are coupled to one another and the inverting input. First and second feedback elements generate first and second control signals in response to a characteristic of one of the true input signal and the complimentary input signal. The control signals prevent the voltage at the inputs to the operational amplifier from reaching an equivalent, steady-state, DC-bias voltage.
摘要翻译：交流（AC）耦合集成电路（IC）抑制由稳态输入信号引入的信号误差。 IC包括运算放大器，真正的直流（DC）偏置网络，互补的DC偏置网络以及第一和第二反馈元件。运算放大器具有反相输入，非反相输入和输出。真正的DC偏置网络具有彼此耦合的第一和第二分支和非反相输入。互补DC偏置网络具有彼此耦合的第三和第四分支和反相输入。第一和第二反馈元件响应于真实输入信号和互补输入信号之一的特性产生第一和第二控制信号。控制信号可防止运算放大器输入端的电压达到等效的稳态直流偏置电压。

6. 发明申请

US20100289565A1 INTEGRATED CIRCUITS AND METHODS FOR ENABLING HIGH-SPEED AC-COUPLED NETWORKS TO SUPPRESS NOISE DURING LOW-FREQUENCY OPERATION 失效
标题翻译：一体化电路和方法，用于在低频操作期间实现高速交流耦合网络以抑制噪声
公开(公告)号：US20100289565A1
公开(公告)日：2010-11-18
申请号：US12467259
申请日：2009-05-16
申请人： Gerald Lee Esch, JR.
发明人： Gerald Lee Esch, JR.
IPC分类号： H03F1/00
CPC分类号： H03F1/52 , H03F3/45475 , H03F2203/45536 , H03F2203/45541 , H03F2203/45542 , H03F2203/45561 , H03F2203/45591 , H03F2203/45594 , H03F2203/45596
摘要： An alternating-current (AC) coupling integrated circuit (IC) suppresses signal errors introduced by a steady-state input signal. The IC includes an operational amplifier, a true direct-current (DC) bias network, a complimentary DC-bias network and first and second feedback elements. The operational amplifier has an inverting input, a non-inverting input and an output. The true DC-bias network has first and second branches that are coupled to one another and the non-inverting input. The complimentary DC-bias network has third and fourth branches that are coupled to one another and the inverting input. First and second feedback elements generate first and second control signals in response to a characteristic of one of the true input signal and the complimentary input signal. The control signals prevent the voltage at the inputs to the operational amplifier from reaching an equivalent, steady-state, DC-bias voltage.
摘要翻译：交流（AC）耦合集成电路（IC）抑制由稳态输入信号引入的信号误差。 IC包括运算放大器，真正的直流（DC）偏置网络，互补的DC偏置网络以及第一和第二反馈元件。运算放大器具有反相输入，非反相输入和输出。真正的DC偏置网络具有彼此耦合的第一和第二分支和非反相输入。互补DC偏置网络具有彼此耦合的第三和第四分支和反相输入。第一和第二反馈元件响应于真实输入信号和互补输入信号之一的特性产生第一和第二控制信号。控制信号可防止运算放大器输入端的电压达到等效的稳态直流偏置电压。

7. 发明申请

US20100231299A1 AUTOMATIC GAIN CONTROL 有权
标题翻译：自动增益控制
公开(公告)号：US20100231299A1
公开(公告)日：2010-09-16
申请号：US12400898
申请日：2009-03-10
申请人： Zhengyu Wang , Xiaoju Wu
发明人： Zhengyu Wang , Xiaoju Wu
IPC分类号： H03F3/45
CPC分类号： H03F3/45475 , H03F3/45179 , H03F3/45659 , H03F2200/411 , H03F2203/45418 , H03F2203/45424 , H03F2203/45528 , H03F2203/45536 , H03F2203/45594 , H03F2203/45596 , H03F2203/45652 , H03G1/0029 , H03G1/0088
摘要： A method and system for providing automatic gain control for a differential amplifier are provided. An impedance network is set to have a first impedance that corresponds to a first gain for a differential amplifier, which amplifies an input signal by the first gain. Once the amplified input signal is greater than a first threshold voltage, the impedance network is set to have a second impedance that corresponds to a second gain for the differential amplifier, which amplifies the input signal. Once amplified input signal is greater than a second threshold voltage and a predetermined period has lapsed, the impedance network is reset to have the first impedance that corresponds to a first gain for the differential amplifier.
摘要翻译：提供了一种用于为差分放大器提供自动增益控制的方法和系统。阻抗网络被设置为具有对应于差分放大器的第一增益的第一阻抗，该差分放大器通过第一增益来放大输入信号。一旦放大的输入信号大于第一阈值电压，阻抗网络被设置为具有对应于放大输入信号的差分放大器的第二增益的第二阻抗。一旦放大输入信号大于第二阈值电压并且预定周期已经过去，则阻抗网络被复位为具有对应于差分放大器的第一增益的第一阻抗。

8. 发明申请

US20080284489A1 TRANSCONDUCTOR AND MIXER WITH HIGH LINEARITY 审中-公开
标题翻译：具有高线性度的TRANSCONDUCTOR AND MIXER
公开(公告)号：US20080284489A1
公开(公告)日：2008-11-20
申请号：US11748014
申请日：2007-05-14
申请人： Eng Chuan Low
发明人： Eng Chuan Low
IPC分类号： H03F3/189
CPC分类号： H03F1/3211 , H03D7/1441 , H03D7/145 , H03D7/1458 , H03D7/1491 , H03D2200/0084 , H03F3/45197 , H03F2203/45326 , H03F2203/45364 , H03F2203/45596
摘要： A transconductor. The transconductor comprises first and second active device networks. The first active device network has a first node and a second node and comprises a first MOS transistor having a gate, a source coupled to the first node, and a drain coupled to the second node. The second active device network has a first node and a second node respectively connected to the first and second nodes of the first active device network and comprises a second MOS transistor and a voltage drop generator. The second MOS transistor has a gate and a source respectively connected to the gate and the source of the first MOS transistor. The voltage drop generator is coupled between a drain of the second MOS transistor and the second nodes of the first and second active device networks and generates a voltage drop across the same.
摘要翻译：跨导体。跨导体包括第一和第二有源器件网络。第一有源器件网络具有第一节点和第二节点，并且包括具有栅极的第一MOS晶体管，耦合到第一节点的源极和耦合到第二节点的漏极。第二有源器件网络具有分别连接到第一有源器件网络的第一和第二节点的第一节点和第二节点，并且包括第二MOS晶体管和电压降发生器。第二MOS晶体管具有分别连接到第一MOS晶体管的栅极和源极的栅极和源极。电压降发生器耦合在第二MOS晶体管的漏极和第一和第二有源器件网络的第二节点之间，并在其上产生一个电压降。

9. 发明授权

US07400196B2 Ultra wide band, differential input/output, high frequency amplifier in an integrated circuit 有权
标题翻译：超宽带，差分输入/输出，集成电路中的高频放大器
公开(公告)号：US07400196B2
公开(公告)日：2008-07-15
申请号：US11504431
申请日：2006-08-15
申请人： Michael A. Wyatt
发明人： Michael A. Wyatt
IPC分类号： H03F3/18
CPC分类号： H03F3/195 , H03F1/42 , H03F3/45085 , H03F3/45475 , H03F3/45497 , H03F3/45941 , H03F2200/36 , H03F2203/45178 , H03F2203/45352 , H03F2203/45418 , H03F2203/45434 , H03F2203/45576 , H03F2203/45596 , H03F2203/45601 , H03F2203/45622 , H03F2203/45638 , H03F2203/45696
摘要： A wide band amplifier includes a core amplifier having input terminals and output terminals for, respectively, receiving differential input signals and providing amplified differential output signals. A bandwidth peaking network is coupled to the core amplifier and includes (a) a first coil and a first resistor connected in series and (b) a second coil and a second resistor connected in series. The first coil and resistor and the second coil and resistor, respectively, are coupled to the core amplifier for receiving the amplified differential output signals. The bandwidth peaking network is configured to increase the frequency bandwidth of the amplifier. The bandwidth peaking network includes (a) a first node formed between the first coil and resistor, (b) a second node formed between the second coil and resistor, and (c) a third resistor is connected between the first node and the second node. This resistor is free of current flow at low frequency operation of the amplifier.
摘要翻译：宽带放大器包括具有输入端的核心放大器和用于分别接收差分输入信号并提供放大的差分输出信号的输出端。带宽峰化网络耦合到核心放大器，并且包括（a）串联连接的第一线圈和第一电阻器，以及串联连接的第二线圈和第二电阻器。第一线圈和电阻器以及第二线圈和电阻器分别耦合到核心放大器以接收放大的差分输出信号。带宽峰化网络被配置为增加放大器的频率带宽。带宽峰化网络包括（a）形成在第一线圈和电阻器之间的第一节点，（b）形成在第二线圈和电阻器之间的第二节点，以及（c）第三电阻器连接在第一节点和第二节点之间。该放大器的低频工作时，该电阻没有电流流动。

10. 发明申请

US20080018405A1 Ultra wide band, differential input/output, high frequency amplifier in an integrated circuit 有权
公开(公告)号：US20080018405A1
公开(公告)日：2008-01-24
申请号：US11504431
申请日：2006-08-15
申请人： Michael A. Wyatt
发明人： Michael A. Wyatt
IPC分类号： H03F3/04
CPC分类号： H03F3/195 , H03F1/42 , H03F3/45085 , H03F3/45475 , H03F3/45497 , H03F3/45941 , H03F2200/36 , H03F2203/45178 , H03F2203/45352 , H03F2203/45418 , H03F2203/45434 , H03F2203/45576 , H03F2203/45596 , H03F2203/45601 , H03F2203/45622 , H03F2203/45638 , H03F2203/45696
摘要： A wide band amplifier includes a core amplifier having input terminals and output terminals for, respectively, receiving differential input signals and providing amplified differential output signals. A bandwidth peaking network is coupled to the core amplifier and includes (a) a first coil and a first resistor connected in series and (b) a second coil and a second resistor connected in series. The first coil and resistor and the second coil and resistor, respectively, are coupled to the core amplifier for receiving the amplified differential output signals. The bandwidth peaking network is configured to increase the frequency bandwidth of the amplifier. The bandwidth peaking network includes (a) a first node formed between the first coil and resistor, (b) a second node formed between the second coil and resistor, and (c) a third resistor is connected between the first node and the second node. This resistor is free of current flow at low frequency operation of the amplifier.

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