专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US09734012B2 Data encoding in solid-state storage devices 有权
公开(公告)号：US09734012B2
公开(公告)日：2017-08-15
申请号：US14730321
申请日：2015-06-04
申请人： International Business Machines Corporation
发明人： Thomas Mittelholzer , Nikolaos Papandreou , Thomas Parnell , Charalampos Pozidis
IPC分类号： G06F11/10 , G11C11/56 , G11C13/00 , G11C29/04 , H03M13/11 , H03M13/25 , H03M13/27
CPC分类号： G06F11/1072 , G11C11/56 , G11C13/00 , G11C2029/0411 , H03M13/11 , H03M13/116 , H03M13/255 , H03M13/271 , H03M13/275 , H03M13/2767
摘要： Methods and apparatus 3 are provided for encoding data for storage in multilevel memory cells 2 having q cell-levels. Input data words are encoded into respective codewords, each having N symbols with one of q symbol-values, via an encoding scheme adapted such that the q symbol-values have unequal multiplicities within at least some codewords, and the multiplicity of each of the q symbol-values in every codeword is no less than μ, where μ≧2 and more preferably ≧3. A first type of encoding scheme uses recursive symbol-flipping to enforce the μ-constraint, adding indicator symbols to indicate the flipped symbols. A second type of encoding scheme maps data words to codewords of a union of permutation codes, the initial vectors for these permutation codes being selected to enforce the μ-constraint. The N qary symbols of each codeword are supplied for storage in respective cells of the multilevel memory 2.

2. 发明授权

US09706272B2 Bit-interleaver for an optical line terminal 有权
公开(公告)号：US09706272B2
公开(公告)日：2017-07-11
申请号：US14409421
申请日：2013-07-23
申请人： Alcatel Lucent
发明人： Arnaud Dupas , Roger Boislaigue
IPC分类号： H04Q11/00 , H04L1/00 , H03M13/27 , H03M13/00
CPC分类号： H04Q11/0005 , H03M13/27 , H03M13/2703 , H03M13/275 , H03M13/2757 , H03M13/2771 , H03M13/2778 , H03M13/2782 , H03M13/6561 , H04L1/0071 , H04Q11/0003
摘要： Proposed is a bit-interleaver for an optical line terminal of an optical access network. The bit-interleaver contains a memory reader, that provides data streams at bit level to a space-time switch. The space-time switch reads within one input cycle up to N bit sets from the data streams. The switch switches within one writing cycle up to N bits onto up to its output ports, which provide respective output vectors. A number of N OR-function elements determine within the writing cycle respective single output bits. A number of N memory elements write within the one writing cycle a respective one of the output bits into a respective one of their bit sub-elements. A control unit that controls the reading of the data streams and also the switching of the bits by the switch. The control unit controls a choice of the writing addresses.

3. 发明授权

US09641196B2 Data block interleaving and deinterleaving method and apparatus for communication equipments 有权
公开(公告)号：US09641196B2
公开(公告)日：2017-05-02
申请号：US14596709
申请日：2015-01-14
申请人： HI-TREND TECHNOLOGY (SHANGHAI) CO., LTD.
发明人： Xuming Zhang
IPC分类号： H03M13/27
CPC分类号： H03M13/276 , H03M13/275
摘要： The present invention relates to communication field, disclosing a data block interleaving and deinterleaving method and apparatus for communication equipments. In the present invention, a recursive method for calculating interleaver or deinterleaver addresses for existing power line communication standards is proposed. The complex modulo operation is simplified to a series of Add-Compare-Subtract operations. Therefore, the hardware implementation complexity is significantly reduced.

4. 发明授权

US09014296B2 Method and apparatus for transmitting encoded signals with frequency hopping environment 有权
标题翻译：用跳频环境传输编码信号的方法和装置
公开(公告)号：US09014296B2
公开(公告)日：2015-04-21
申请号：US13377456
申请日：2010-09-30
申请人： Min Gyu Kim , Dae Won Lee , Dong Wook Roh , Joon Kui Ahn , Suck Chel Yang , Ki Jun Kim , Dong Youn Seo
发明人： Min Gyu Kim , Dae Won Lee , Dong Wook Roh , Joon Kui Ahn , Suck Chel Yang , Ki Jun Kim , Dong Youn Seo
IPC分类号： H04L27/00 , H04L5/00 , H03M13/27 , H03M13/31 , H04L1/00 , H04L1/04 , H03M13/13
CPC分类号： H04L5/0053 , H03M13/13 , H03M13/275 , H03M13/31 , H04L1/0041 , H04L1/04 , H04L5/0057
摘要： This document is related to a wireless communication system, and more particularly to a method and an apparatus for transmitting encoded signals with frequency hopping environment. A method of transmitting signals by a user equipment (UE) comprises: encoding an input signal having a length of (A) bits by using (A) basis sequences having a length of 20 bits to output an encoded signal having a length of 20 bits, wherein (A) is a natural number less than 14; mapping the encoded signal having the length of 20 bits to two different resource regions, wherein the first 10 bits of the encoded signal are mapped to a first resource region, and the second 10 bits of the encoded signal are mapped to a second resource region; and transmitting the resource-mapped signals to a Node B, wherein the encoded signal or the (A) basis sequences are cyclic shifted with a value of (x) before mapping the encoded signal to the two different resource regions, wherein (x) is a natural number less than 20.
摘要翻译：本文件涉及无线通信系统，更具体地涉及一种用跳频环境发送编码信号的方法和装置。一种由用户设备（UE）发送信号的方法包括：通过使用（A）具有20比特长度的基本序列来编码具有（A）比特长度的输入信号，以输出具有20比特长度的编码信号，其中（A）是小于14的自然数; 将具有20比特长度的编码信号映射到两个不同的资源区域，其中编码信号的前10位被映射到第一资源区域，并且编码信号的第二个10比特被映射到第二资源区域; 并且将所述资源映射信号发送到节点B，其中，在将所述编码信号映射到所述两个不同的资源区域之前，所述编码信号或所述（A）基本序列以（x）的值循环移位，其中（x）是自然数小于20。

5. 发明授权

US08484532B2 Random-access multi-directional CDMA2000 turbo code interleaver 失效
公开(公告)号：US08484532B2
公开(公告)日：2013-07-09
申请号：US12399938
申请日：2009-03-07
申请人： Steven J. Halter
发明人： Steven J. Halter
IPC分类号： H03M13/00
CPC分类号： H03M13/2957 , H03M13/271 , H03M13/275 , H03M13/2764 , H03M13/2771 , H03M13/2789
摘要： An interleaver that implements the LCS turbo interleaver algorithm utilized by the CDMA2000 standard is described. The interleaver includes a first computation unit for receiving an input address and computing a first sequential interleaved address during a first clock cycle in response thereto. A second computation unit is included for receiving an input address and computing a second sequential interleaved address during the first clock cycle in response thereto. The interleaver further includes a comparator for determining whether the first or the second sequential interleaved address is invalid and generating a signal in response thereto. The output of the comparator provides a control signal to a switch which selects the first or the second sequential interleaved address as an output interleaved address for the first clock cycle. The interleaver is further designed to move in a forward direction or a reverse direction.

6. 发明申请

US20130064022A1 Method and Apparatus for Memory Access 有权
标题翻译：存储器访问的方法和装置
公开(公告)号：US20130064022A1
公开(公告)日：2013-03-14
申请号：US13483795
申请日：2012-05-30
申请人： Andrew Murphy , Oliver Paul Haffenden
发明人： Andrew Murphy , Oliver Paul Haffenden
IPC分类号： G11C7/22
CPC分类号： G11C8/18 , G11C8/12 , H03M13/275 , H03M13/276 , H03M13/2789 , H03M13/6552
摘要： An interleaver or deinterleaver comprises a memory having M logical memory units arranged in groups of N memory units such that accesses to memory units within a group are faster after a first access to a memory in that group using first access. An address generator is arranged to write consecutive data items a number of memory units apart that is less than the size of groups N of memory units so that two or more data items are written within groups. The arrangement provides fast interleaving without increasing memory size.
摘要翻译：交织器或解交织器包括具有以N个存储器单元分组排列的M个逻辑存储器单元的存储器，使得在使用第一访问对该组中的存储器的第一次访问之后，对组内的存储器单元的访问更快。地址发生器被布置为将连续的数据项写入数量小于存储器单元组N的大小的存储器单元，使得两个或多个数据项被写入组内。该装置提供快速交错而不增加存储器大小。

7. 发明授权

US08335962B2 Interleaver apparatus and receiver for a signal generated by the interleaver apparatus 有权
标题翻译：用于由交织器装置产生的信号的交织器装置和接收器
公开(公告)号：US08335962B2
公开(公告)日：2012-12-18
申请号：US12303555
申请日：2007-06-05
申请人： Ernst Eberlein , Marco Breiling , Cedric Keip , Holger Stadali , Albert Heuberger
发明人： Ernst Eberlein , Marco Breiling , Cedric Keip , Holger Stadali , Albert Heuberger
IPC分类号： G06F11/00
CPC分类号： H03M13/275 , H03M13/2707 , H03M13/2732 , H04L1/0071
摘要： A convolution interleaver for processing a codeword derived from an input block of symbols using a redundancy-adding coding, and having more symbols than the input block, wherein the codeword has a sequence of interleaving units, wherein each interleaving unit has at least two symbols, includes an interleaver. The interleaver changes the sequence of interleaving units to obtain an interleaved codeword having a changed sequence of interleaving units. In particular, the order of the symbols within an interleaving unit is not changed by the interleaver. The order of the interleaving units in the codeword among each other or with respect to a previous or subsequent codeword is changed, however.
摘要翻译：一种卷积交织器，用于使用冗余加法编码处理从输入符号块导出的码字，并且具有比输入块更多的码元，其中码字具有交织单元序列，其中每个交织单元具有至少两个符号，包括交织器。交织器改变交织单元的序列，以获得具有改变的交织单元序列的交错码字。具体地说，交错单元内的符号顺序不会被交织器改变。然而，改变了彼此之间或相对于先前或后续码字的码字中的交织单元的顺序。

8. 发明申请

US20120124453A1 METHOD AND APPARATUS FOR A PARAMETERIZED INTERLEAVER DESIGN PROCESS 有权
标题翻译：用于参数交互设计过程的方法和装置
公开(公告)号：US20120124453A1
公开(公告)日：2012-05-17
申请号：US13231474
申请日：2011-09-13
申请人： Rohit Seshadri , Mustafa Eroz , Lin-Nan Lee
发明人： Rohit Seshadri , Mustafa Eroz , Lin-Nan Lee
IPC分类号： H03M13/27 , G06F11/10
CPC分类号： H03M13/2767 , H03M13/275 , H03M13/276 , H03M13/2789
摘要： A parameterized interleaver design process is provided, which optimizes the design for interleavers of any size, and can be completely specified using only a few design parameters. According to the parameterized interleaver design process an interleaver π(i) of a length N is generated. A number of subpermutation masks are defined, and a first intermediate interleaver permutation is partitioned into a number of subgroups, wherein the number of subgroups corresponds with the number of subpermutation masks. Each of the subgroups of the first intermediate interleaver permutation is partitioned into a number of further subgroups, and each of the subpermutation masks is applied to each of the further subgroups of a corresponding subgroup of the first intermediate interleaver permutation, resulting in a corresponding portion of a second intermediate interleaver permutation. The resulting interleaver π(i) is generated based at least in part on the first and second intermediate interleaver permutations.
摘要翻译：提供了一种参数化的交织器设计过程，其优化了任何尺寸的交织器的设计，并且可以仅使用少量设计参数来完全指定。根据参数化交织器设计过程，生成长度为N的交织器（i）。定义了多个子鉴别掩码，并且将第一中间交织器置换分割成多个子组，其中子组的数量对应于子鉴别掩码的数量。第一中间交织器置换的每个子组被划分成多个其他子组，并且每个子精确掩码被应用于第一中间交织器排列的相应子组的其他子组中的每一个，导致相应部分第二中间交织器排列。至少部分地基于第一和第二中间交织器排列来生成所产生的交织器（i）。

9. 发明申请

US20120093197A1 METHOD AND APPARATUS FOR TRANSMITTING ENCODED SIGNALS WITH FREQUENCY HOPPING ENVIRONMENT 有权
标题翻译：用于传输带有频率环境的编码信号的方法和装置
公开(公告)号：US20120093197A1
公开(公告)日：2012-04-19
申请号：US13377456
申请日：2010-09-30
申请人： Min Gyu Kim , Dae Won Lee , Dong Wook Roh , Joon Kui Ahn , Suck Chel Yang , Ki Jun Kim , Dong Youn Seo
发明人： Min Gyu Kim , Dae Won Lee , Dong Wook Roh , Joon Kui Ahn , Suck Chel Yang , Ki Jun Kim , Dong Youn Seo
IPC分类号： H04B1/00
CPC分类号： H04L5/0053 , H03M13/13 , H03M13/275 , H03M13/31 , H04L1/0041 , H04L1/04 , H04L5/0057
摘要： This document is related to a wireless communication system, and more particularly to a method and an apparatus for transmitting encoded signals with frequency hopping environment. A method of transmitting signals by a user equipment (UE) comprises: encoding an input signal having a length of (A) bits by using (A) basis sequences having a length of 20 bits to output an encoded signal having a length of 20 bits, wherein (A) is a natural number less than 14; mapping the encoded signal having the length of 20 bits to two different resource regions, wherein the first 10 bits of the encoded signal are mapped to a first resource region, and the second 10 bits of the encoded signal are mapped to a second resource region; and transmitting the resource-mapped signals to a Node B, wherein the encoded signal or the (A) basis sequences are cyclic shifted with a value of (x) before mapping the encoded signal to the two different resource regions, wherein (x) is a natural number less than 20.
摘要翻译：本文件涉及无线通信系统，更具体地涉及一种用跳频环境发送编码信号的方法和装置。一种由用户设备（UE）发送信号的方法包括：通过使用（A）具有20比特长度的基本序列来编码具有（A）比特长度的输入信号，以输出具有20比特长度的编码信号，其中（A）是小于14的自然数; 将具有20比特长度的编码信号映射到两个不同的资源区域，其中编码信号的前10位被映射到第一资源区域，并且编码信号的第二个10比特被映射到第二资源区域; 并且将所述资源映射信号发送到节点B，其中，在将所述编码信号映射到所述两个不同的资源区域之前，所述编码信号或所述（A）基本序列以（x）的值循环移位，其中（x）是自然数小于20。

10. 发明申请

US20090296850A1 ENCODED CONTROL CHANNEL INFORMATION INTERLEAVING 有权
标题翻译：编码控制信道信息交互
公开(公告)号：US20090296850A1
公开(公告)日：2009-12-03
申请号：US12431410
申请日：2009-04-28
申请人： Hao Xu , Durga Prasad Malladi , Peter Gaal , Zhifei Fan
发明人： Hao Xu , Durga Prasad Malladi , Peter Gaal , Zhifei Fan
IPC分类号： H04L27/00
CPC分类号： H04L1/0026 , H03M13/136 , H03M13/271 , H03M13/275 , H03M13/6362 , H03M13/6525 , H03M13/6544 , H04L1/001 , H04L1/0057 , H04L1/0071 , H04L1/0072
摘要： Systems and methodologies are described that facilitate interleaving encoded control channel information for transmission over an uplink channel. The encoded control channel information, for example, can include encoded Channel Quality Indicator (CQI) information, encoded Precoding Matrix Indicator (PMI) information, and/or Rank Indicator (RI) information. CQI information, PMI information, and/or RI information can be encoded at an access terminal, for instance, by applying a punctured Reed Muller block code to generate a sequence of encoded bits. The encoded bits can be interleaved to reorder the sequence utilizing one or more interleaving approaches. Examples of interleaving approaches that can be leveraged include prime number based interleaving, generalized bit reversal interleaving, column-row interleaving with column bit reversal, and/or M-sequence based interleaving. Further, the reordered sequence of encoded bits can be transmitted to a base station over an uplink channel.
摘要翻译：描述了促进交织编码的控制信道信息以在上行链路信道上传输的系统和方法。编码的控制信道信息例如可以包括编码信道质量指示符（CQI）信息，经编码的预编码矩阵指示符（PMI）信息和/或秩指示符（RI）信息。 CQI信息，PMI信息和/或RI信息可以在接入终端进行编码，例如通过应用穿孔的Reed Muller块码来生成编码比特序列。编码比特可以被交织，以便利用一个或多个交织方法对序列重排序。可以利用的交织方法的示例包括基于素数的交织，广义比特反转交织，具有列比特反转的列行交织和/或基于M序列的交织。此外，编码比特的重新排序的序列可以通过上行链路信道发送到基站。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式