Document Document Title
US09055164B2 Mobile terminal device, time control method, and timer control program
Provided is a mobile terminal device capable of performing, when a user moves the mobile terminal device as if the user operated an hourglass, a screen display and a time measurement accordingly. The mobile phone device 10 comprises a display unit 13, an inclination sensor 20, an hourglass function control unit 31 for measuring a set time and displaying the image of the hourglass on the display unit 13, and an inclination deciding unit 32 for controlling the time measured by the hourglass function control unit 31, on the basis of measured data from the inclination sensor 20.
US09055163B1 Methods of operating wireless parameter-sensing nodes and remote host
A method (of operating a mobile parameter-sensing node (e.g., a mobile phone) connectable wirelessly to a remote host (e.g., a base station or NIB)) includes: sampling values of parameters that are internal to and/or ambient to the node; selectively collecting data representing the sampled values according to a first subject list (defining which ones amongst the parameters will have data representative thereof collected) and/or a first frequencies-of-collection list (of collection frequencies at which the data are to be collected); analyzing, locally to the node, the collected data in terms of alarm criteria; and selectively collecting data according to a second subject list and/or a second frequencies-of-collection list when one or more of the alarm criteria are satisfied, the second subject list and the second frequencies-of-collection list being more inclusive than the first subject list and the second frequencies-of-collection list.
US09055145B1 Recovery of DTMF tones in the presence of periodic interference and obstruction
While a dual tone multi-frequency (DTMF) signal can be easily processed if cleanly obtained, difficulties can arise if the DTMF signal is not cleanly obtained. In one example, part of the signal can be cleanly obtained, but part of the signal can be obstructed. In order to determine the content of the DTMF signal the parts that are cleanly obtained can be compared with known DTMF signals, such as DTMF signals that correspond with buttons on a telephone keypad. A classification of a closest matching known DTMF signal can be identified and that classification can be assigned to the partially obtained DTMF signal. Thus, without clearly obtaining the whole DTMF signal a content of the DTMF signal can be ascertained.
US09055144B2 Handle for handheld terminal
A handle for a handheld terminal includes a first interface module, a first key module, a first power supply module, and a base handle module. The handle couples with the handheld terminal. The handle makes a wireless connection with the handheld terminal the first interface module or a wired connection with the handheld terminal via the first interface module. The first key module includes one or more user operation command keys. The first power supply module supplies power for the handle. The handle is operable with one hand.
US09055128B2 Information processing device
An information processing device is configured to start a download module at a predefined date and time. A transmitter unit is configured to transmit authentication information to an authentication server. A determination unit is configured to determine a file to be downloaded after an authentication process by the authentication server. A download execution unit is configured to download the determined file from a file provider server.
US09055123B2 Enhanced reboot command
A method and system allows a computer system to perform a network reboot in response to an enhanced reboot command. The computer system receives a command to load an operating system and interprets the command to determine whether a physical machine or a virtual machine is to be rebooted. In response to a determination that the command indicates the use of a network option, the computer system loads the operating system from a networked server, and perform rebooting according to the interpreted command with the use of the operating system.
US09055114B1 Packet parsing and control packet classification
A system may include receiving a packet, of a packet stream, including control tags in a header portion of the packet and classifying each of the control tags into a category selected from a set of possible categories. The set of possible categories may include an unambiguous interposable (UI) category that is assigned to a control tag that corresponds to an unambiguous parsing interpretation and that is interposable within a sequence of the control tags, and an ambiguous interposable (AI) category that is assigned to a control tag in which the control tag has an ambiguous parsing interpretation and in which the control tag is interposable within the sequence of the control tags. The method may further include determining parsing operations to perform for the packet based on the classified categories of the control tags and based on the packet stream of the packet.
US09055106B2 Peer to peer sharing of functionality of mobile devices
Functionality is shared among mobile devices in a peer to peer manner. A mobile device can include a plurality of functional components that can each perform respective functionality. Examples of the functionalities can include transceiver communications, processing, power, memory, input and output for the mobile device. Further, the mobile device can include a sharing component that enables sharing a particular third party functional component to replace or supplement operation of a corresponding functional component of the mobile device. The third party functional component, for instance, can be made available for sharing by at least one of a disparate mobile device or a stand alone functional component. Moreover, a host component can allow a disparate mobile device to use an available one or more of the plurality of functional components of the mobile device.
US09055096B2 Apparatus and method for detecting an attack in a computer network
Upon acquiring first data transmitted from an outside of a predetermined range in a network, an apparatus stores, in a memory, first information including transmission source and destination addresses of the first data. Upon acquiring second data addressed to an inside of the predetermined range and indicating predetermined communication data of service initiation, the apparatus extracts the first information including as the transmission source address a source address of the second data, and stores, in the memory, second information indicating a service initiation and including a destination address of the second data, in association with the first information. When the second information including as the transmission destination address a source address of the second data is stored in the memory and a destination address of the second data coincides with the transmission source address in the first information associated with the second information, the apparatus notifies detection of an attack.
US09055091B2 Adaptive timing of distributed device response to maximize channel capacity utilization
Embodiments of systems and methods for providing access to a server by remote devices are shown. In some embodiments, the system includes a scheduling module, a connection module, and/or a timer module. The scheduling module may compute a timer period and timer offset for each remote device on the server to facilitate evenly distributing connections by remote devices and avoid exceeding the maximum bandwidth of the communication channel. The connection module may initiate a connection from each remote device to the server to retrieve the timer period and timer offset. The timer module on each remote device may be controlled by the timer period and timer offset, and trigger the initiation of the connection module. A remote device's status may be offline if the initiation of the connection falls outside a tolerance window corresponding to the timer period and timer offset.
US09055087B2 Method and system for securely providing and storing content in a multiple dwelling unit system
A communication system 10 includes a head end 12. The head end communicates with a system gateway 26. A plurality of user devices 28 is coupled to the gateway 26 that includes a memory device 94 for storing content therein. The gateway 26 receives the plurality of first encrypted signals and stores the signals in the memory device 94. The storing in the memory device 94 may be performed after further encryption. One of the user devices 28 generates a request for content and communicates the request to the gateway 26. The gateway 26 communicates content corresponding to the request to the user device 28.
US09055075B2 Project resource access control
Embodiments are directed towards a system and method for a cloud-based front end that may abstract and enable access to the underlying cloud-hosted elements and objects that may be part of a multi-tenant application, such as a search application. Search objects may be employed to access indexed objects. An amount of indexed data accessible to a user may be based on an index storage limit selected by the user, such that data that exceeds the index storage limit may continue to be indexed. Also, one or more projects can be elastically scaled for a user to provide resources that may meet the specific needs of each project.
US09055074B2 System and method for generating, accessing, and updating geofeeds
A system and method for generating a geofeed is provided. A geofeed includes a collection of content, aggregated from various content providers, that is relevant to one or more geographically definable locations. The generated content may include, for example, video, audio, images, text, hyperlinks, and/or other content that may be relevant to a geographically definable location. The content providers may include, for example, social media platforms, online knowledge databases, individual content creators, and/or other providers that can distribute content that may be relevant to a geographically definable location. The geographically definable location may be specified by a boundary, geo coordinates, an address, a place name, a point of interest, a zip code, and/or other information that can spatially identify an area. The geofeed may be presented via an interface that spatially arranges the content according to a geo-location related to the content and/or for integration with other data collection systems.
US09055068B2 Advertisement of conditional policy attachments
Framework for conditionally attaching web service policies to a policy subject (e.g., a web service client or service endpoint) at subject runtime. In one set of embodiments, a constraint expression can be defined that specifies one or more runtime conditions under which a policy should be attached to a policy subject. The constraint expression can be associated with the policy and the policy subject via policy attachment metadata. The constraint expression can then be evaluated at runtime of the policy subject to determine whether attachment of the policy to the policy subject should occur. If the evaluation indicates that the policy should be attached, the attached policy can be processed at the policy subject (e.g., enforced or advertised) as appropriate. Using these techniques, the policy subject can be configured to dynamically exhibit different behaviors based on its runtime context.
US09055066B2 Apparatus and method for providing a game service in cloud computing environment
An apparatus and method for providing a game service in cloud computing environment. A method may be provided for providing a streaming game service using a plurality of cloud computing servers. The method may include receiving user inputs from at least one user equipments, executing and progressing at least one game program in response to the user inputs, capturing audio and video data as progress results of the executed at least one game program, and streaming the captured audio and video data to a respective user equipment.
US09055065B2 Managing participant order in distributed transactions
A coordinator running on a computing device identifies a plurality of participants for a distributed transaction, wherein the coordinator coordinates the distributed transaction. The coordinator determines a participant order for the plurality of participants based on one or more ordering rules. The coordinator sends a message to a first participant in the determined participant order. The coordinator then waits until a response is received from the first participant before sending the message to a second participant in the determined participant order.
US09055064B2 Systems and methods for a VPN ICA proxy on a multi-core system
The present invention is directed towards systems and methods for sharing licenses across resources via a multi-core intermediary device. A device intermediary to a plurality of clients and a server may grant a license for a virtual private network (VPN) session established by a first core of a plurality of cores of the device with a client. A second core of the plurality of cores may receive a first request from the client to establish an application connection between an application and a server via the VPN session. The second core may send a second request to the first core to share the license of the VPN session responsive to determining that the first core owns the VPN session. The second core may establish the application connection responsive to receiving from the first core a response accepting the second request to share the license of the VPN session.
US09055046B2 Safe output protocol for files to multiple destinations with integrity check
Protocol is provided for safe transfer of files from between nodes of a communication system. The protocol includes a handshake operation between a source (local or initiating) node sending one or more files and a remote (responding) node receiving the files to ensure that control of the file remains with the source node until the file is successfully transferred. The protocol is provided by a file transfer manager that controls the transfer process through a series of file moves that include moving the file into a directory associated with the file transfer manager, from which the file is sent and moving the file out of that directory after the remote node acknowledges a safe copy operation of the file. Files are maintained in the sending directory and under control of the source node at least for a configurable amount of time until the file is safely transferred. Files can be retrieved by the remote node after they have been transmitted for a configurable amount of time, after which they will be deleted from the local node.
US09055035B2 Medical device with secure data transmission
Secure transmission of electronic data via a data communication link is provided between a device and an additional device with independent transmission channels, wherein at least one of the devices is a medical device. Secure transmission comprises the following steps or means: providing a password in the device, receiving the password in the a additional device separate from the data communication link, selecting one of the independent transmission channels, encrypting the channel identification of the selected independent transmission channel using the received password in the additional device, transmitting the encrypted channel identification from the additional device to the device via the data communication link and decrypting the encrypted channel identification in the device, providing a session key in the device and the additional device and transmitting encrypted electronic data between the device and the additional device via the independent transmission channel.
US09055032B2 Secure network tunnel between a computing device and an endpoint
The present disclosure presents a system, method and apparatus herein enabling secure coupling of a computing device, such as a mobile device with an endpoint, such as an application server. The computing device can include any electronic device such as a computer, a server, an application server, a mobile device or tablet. The endpoint can be any electronic device as well that is located within an enterprise network. In at least one embodiment, the secure coupling of the mobile device with a computing device can include a security gateway server. In one example, the security gateway server can be a tunnel service server. In another embodiment, an application server can include a tunnel service module to provide the secure coupling with the mobile device.
US09055031B1 Integration of cloud management systems with on-premise systems
A check in communication is received from an agent running inside a firewall via a permitted firewall communication channel. The check in communication is received via the permitted firewall communication channel without modifying a firewall configuration. The check in communication is responding to with an instruction to be performed by the agent running inside the firewall, where the response is via the permitted firewall communication channel.
US09055029B2 Token based multifactor authentication
A multifactor authentication (MFA) enforcement server provides multifactor authentication services to users and existing services. During registration, the MFA enforcement server changes a user's password on an existing service to a password unknown to the user. During normal usage when the user accesses the existing service through the MFA enforcement server, the MFA enforcement server enforces a multifactor authentication enforcement policy.
US09055028B1 Flexibly targeting information sent over a broadcast communications medium
A system for flexibly targeting information sent over a broadcast communications medium includes a sender of information signals each carrying information and a targeter for use by a user having a receiver with a targeter. There are a number of the receivers constructed and arranged to receive signals from the sender through a broadcast communications medium. The targeter includes a number of selectors associated with an action ID and a number of key value pairs, constructed and arranged to indicate action to be taken by a user of a selected receiver in the condition that the selector evaluates to true given the values stored in the targeters.
US09055026B2 Systems and methods for the demand-driven deployment of location-neutral software
Techniques for providing and consuming web services, including a service library configured to store one or more web services and a host directory connected to service hosts, configured to store data related to the service hosts. The service hosts are a network and adapted to receive and fulfill deployment requests for the web services stored in the service library by instantiating one or more endpoints of one of the web services. A manager is configured to query the host directory and the service library, generate a deployment plan, and transmit deployment requests to the one or more service hosts.
US09055020B2 Method and apparatus for sharing user information
An approach is presented for sharing user information among devices. The identity discovery module determines one or more user identifiers. Further, the identity discovery module determines to generate a first device identifier based, at least in part, on the one or more user identifiers. Then, the identity discovery module determines to present the first device identifier in place of a second identifier as a discoverable identity of a device.
US09055016B2 Mass multimedia messaging
A method and system of mass multimedia messaging in a system having a service provider and a plurality of subscriber communication terminals supported by the service provider, wherein at least some of the subscriber terminals have different messaging capabilities and different message format requirements. The method includes adaptation and handling of a mass multimedia message, and mass multimedia message notification. The system uses a retrieval platform and a processing platform. The retrieval platform generates a unique message identifier for the mass multimedia message, and pre-adapts the message into adapted content messages for the terminal types supported by the service provider. The processing platform formats message notifications for the subscriber terminals based on each terminal's messaging capabilities, with each notification containing the unique message identifier.
US09055012B2 Bot-network detection based on simple mail transfer protocol (SMTP) characteristics of e-mail senders within IP address aggregates
A method and system for determining whether an IP address is part of a bot-network are provided. The IP-address-aggregate associated with the IP address of an e-mail sender is determined. The IP-address-aggregate is associated with an IP-address-aggregate-category based on the current SMTP traffic characteristics of the IP-address-aggregate and the known SMTP traffic characteristics of an IP-address-aggregate-category. A bot-likelihood score of the IP-address-aggregate-category is then associated with IP-address-aggregate. IP-address-aggregate-categories can be established based on historical SMTP traffic characteristics of the IP-address-aggregates. The IP-address-aggregates are grouped based on SMTP characteristics, and the IP-address-aggregate-categories are defined based on a selection of IP-address-aggregates with similar SMTP traffic characteristics that are diagnostic of spam bots vs. non-botnet-controllers spammers. Bot likelihood scores are determined for the resulting IP-address-aggregate-categories based on historically known bot IP addresses.
US09055006B2 Techniques for traffic diversion in software defined networks for mitigating denial of service attacks
A method for mitigating of denial of service (DoS) attacks in a software defined network (SDN). The method comprises receiving a DoS attack indication performed against at least one destination server; programming each network element in the SDN to forward a packet based on a diversion value designated in a packet diversion field, upon reception of the DoS attack indication; instructing at least one peer network element in the SDN to mark a diversion field in each packet in the incoming traffic addressed to the destination server to allow diversion of the packet to a security server; and instructing edge network elements in the SDN to unmark the diversion field of each packet output by the security server, wherein each network element in the SDN is programmed to forward the unmarked packets processed by the security server to the at least one destination server.
US09055001B2 Border gateway protocol extended community attribute for layer-2 and layer-3 virtual private networks
Described are a network, computer program product, and method of distributing routing information for a virtual private network (VPN) application through a packet-switched network (PSN) having fully meshed provider edge (PE) routers through Provider Backbone Bridge (PBB) tunnels. A PE router is configured to participate in a VPN and to run a BGP (Border Gateway Protocol) as an auto-discovery process for finding one or more other PE routers participating in the VPN. The VPN is associated with a PBB tunnel. A service instance identifier (I-SID) is assigned to the VPN. The PE router advertises membership in the VPN by including the I-SID assigned to the VPN in a BGP message issued during the auto-discovery process.
US09054998B2 System and method for maintaining packet order in an ordered data stream
A source processor can divide each packet of a data stream into multiple segments prior to communication of the packet, allowing a packet to be transmitted in smaller chunks. The source processor can process the segments for two or more packets for a given data stream concurrently, and provide appropriate context information in each segments header to facilitate in order transmission and reception of the packets represented by the individual segments. Similarly, a destination processor can receive the packet segments packets for an ordered data stream from a source processor, and can assign different contexts, based upon the context information in each segments header. When a last segment is received for a particular packet, the context for the particular packet is closed, and a descriptor for the packet is sent to a queue. The order in which the last segments of the packets are transmitted maintains order amongst the packets.
US09054990B2 System and method for data center security enhancements leveraging server SOCs or server fabrics
A data center security system and method are provided that leverage server systems on a chip (SOCs) and/or server fabrics. In more detail, server interconnect fabrics may be leveraged and extended to dramatically improve security within a data center.
US09054987B2 Single instruction processing of network packets
Executing a single instruction/multiple data (SIMD) instruction of a program to process a vector of data wherein each element of the packet vector corresponds to a different received packet.
US09054986B2 System and method for enabling communications over a number of packet networks
The disclosed embodiments include a computer implemented method for routing data packets. In one embodiment, the method includes storing network usage information of a packet network managed by a communications carrier including network usage information associated with communications by subscribers of other communications carrier that communicate data packets over the packet network, the network usage information distinguishing between data packets associated with a first service and data packets associated with a second service; determining pricing information for communicating the data packets via a plurality of networks, wherein each network is associated with a different communications carrier; and selecting one of the plurality of networks for routing the data packets based on cost, wherein the cost includes a first cost for communicating the data packets that are associated with the first service and a second cost for communicating the data packets that are associated with the second service.
US09054982B2 Satellite controlling bridge architecture
A system and a method include a port extender communicatively linked to a controlling bridge. Network data is received from a local network peer downstream to the port extender. Whether a destination of the network data is a recognized downstream network peer of the port extender is determined. The network data is selectively routed according to whether the destination of the network data is a recognized downstream network peer of the port extender.
US09054981B2 System and methods for identifying and remedying traffic imbalances and inequities between networks
Implementations described and claimed herein provide a system and methods for balancing network loads across distinct provider networks. In one implementation, a virtual network representative of at least a first provider network is established having at least one interconnection point where network traffic is exchanged between the first provider network and a second provider network and having at least one provider edge port and at least one potential interconnection point. A measurement of a bandwidth between the at least one provider edge port and the at least one interconnection point is obtained. A measurement of a distance between the at least one provider edge port and a geographically closest of the at least one potential interconnection point or the at least one interconnection point is obtained. A network load indication for the first provider network as a function of the bandwidth measurement and the distance measurement is obtained.
US09054979B2 Switching system employing independent data switches connecting orthogonal sets of nodes
A switching system formed of a number of nodes interfacing with external network elements and interconnected through a number of independent switches is disclosed. The switches are arranged into a set of primary switches, a set of secondary switches, and a set of tertiary switches and each node connects to a respective primary switch, a respective secondary switch, and a respective tertiary switch. The connection pattern of nodes to switches is selected so that any set of nodes connecting to any primary switch, any set of nodes connecting to any secondary switch, and any set of nodes connecting to any tertiary switch are mutually orthogonal. A distributed control system sets a path from any node to any other node traversing at most two switches. The switching system may serve as a large-scale data-switching center or a geographically distributed network.
US09054973B2 Method and system for Ethernet congestion management
Certain aspects of a method and system for Ethernet congestion management may include transmitting one or more data packets in a network flow from a source node to a destination node. The source node may be enabled to receive one or more congestion notification frames based on detecting congestion at one or more switches in the network flow. A probe packet comprising a departure timestamp, Ts, may be transmitted from the source node to the destination node based on receiving one or more congestion notification frames. The arrival rate, Ra, of one or more data packets at the destination node may be calculated based on an arrival timestamp, Ta, inserted into the probe packet at the destination node. A rate limiter at the source node may be enabled to limit a rate of one or more data packets based on the calculated arrival rate, Ra.
US09054962B2 Rule-based application access management
A container that manages access to protected resources using rules to intelligently manage them includes an environment having a set of software and configurations that are to be managed. A rule engine, which executes the rules, may be called reactively when software accesses protected resources. The engine uses a combination of embedded and configurable rules. It may be desirable to assign and manage rules per process, per resource (e.g. file, registry, etc.), and per user. Access rules may be altitude-specific access rules.
US09054960B2 Method for monitoring a communication system
The invention relates to a method for monitoring a communication system, comprising: acquiring and storing data about timeout events or faulty transfers in connection with at least one signaling process in at least one first communication terminal (1, 2, 3) of the communication system; and creating a collection of such data and transferring (7, 8, 10) said collection to a collection point (4) for said data in the communication system.
US09054953B2 Home appliance and home appliance system
A home appliance and a home appliance system are provided. The home appliance receives input of a sound including update information, and updates a product operating program. The home appliance system receives a sound including product information from the home appliance, judges whether to update the product operating program of the home appliance, and transmits update information.
US09054940B2 System and method for linearizing power amplifiers
A power encoder includes an amplitude-phase splitter for splitting an input signal into an envelope signal and a phase modulated signal, and a pre-distortion unit for distorting the envelope signal using a look-up table (LUT) to produce a distorted envelope signal. The power encoder also includes a digital converter for combining the distorted envelope signal with the phase modulated signal to produce a distorted input signal, a pulse width modulator (PWM) for modulating the distorted input signal according to the transformation function to produce a modulated signal, and a switch mode power amplifier for amplifying the modulated signal. The look-up table stores a non-linear mapping of a transformation function and a relationship between the distorted input signal and the modulated signal is non-linear.
US09054939B2 Method of processing data and a display apparatus performing the method
A method of processing data including dividing, at a transmitter, data into 3-bit units, generating, at the transmitter, first and second clock embedded data signals and a third data signal, wherein a clock signal and first bits of the units are included in the first clock embedded data signal, the clock signal and second bits of the units are included in the second clock embedded data signal and third bits of the units are included in the third data signal, transmitting, from the transmitter to a receiver, the first and second clock embedded data signals and the third data signal, and restoring, at the receiver, the first and second bits and the clock signal from the first and second clock embedded data signals and the third bits from the third data signal.
US09054938B2 Quadrature gain and phase imbalance correction
Generally speaking, methods and apparatuses which correct errors related to phase and gain imbalances in quadrature tuners are disclosed. The quadrature tuner may be online and operating, receiving data. An embodiment may generate a squared signal from the IF frequency signal of the tuner. In generating the squared signal, the embodiment may enable the extraction of phase error and gain error information of the IF signal. The embodiment may determine a phase error component, a gain error component, or both, by frequency translation. The frequency translation may involve down-converting the signal associated with the error component to direct current (DC) signals and enable the determination of the associated phase error and/or gain error. The embodiments may generate an adjusted signal via the IF signal by applying a phase correction signal or gain correction signal to components used to correct the IF signal.
US09054931B2 Method and apparatus for data transmission in home networks
A multi-tone modem with components forming a transmit path and a receive path configured to couple to a wired communication medium for at least intermittent communication of frequency division multiplexed multi-tone modulated communication channels thereon. A Fourier transform component transforms received communication channels between a time domain and a frequency domain and vice-versa. Selected components on the receive path determine alignments between the received multiplexed communication channels in the time domain using alignment determinations made in both a time domain and frequency domain portions of the receive path. The Fourier transform component transforms a stream of digitized samples of the received multiplexed communication channels from the time to the frequency domain using the alignment determinations made by the selected components on the receive path.
US09054914B2 Transmitting device, receiving device, circuit device, communication method and program
A transmitting device, a receiving device, a circuit device, and a communication method and program. The transmitting device including: a model storage unit for storing a change model for a reference level of a signal on the receiving device end due to coupling between the transmitting device and a receiving device; a compensation calculating unit for calculating a compensation value for offsetting a change in the reference level of the signal constituting a symbol sequence; and an output waveform changing unit for changing an output waveform of the signal constituting the symbol sequence on the basis of the compensation value for the change in the reference level.
US09054912B2 Communication application for conducting conversations including multiple media types in either a real-time mode or a time-shifted mode
Computer code is configured to support a conversation among participants over a communication network. The computer code is configured to (i) progressively store the incoming and outgoing messages of a conversation on a communication device, (ii) display the message history of the conversation on the communication device, (iii) provide rendering options on the communication device, (iv) selectively transition participation in the conversation between a real-time mode and a time-shifted mode and (v) designate an interrupt mode for the conversation.
US09054911B1 Multicast group ingestion
A system and method for processing multicast streams is disclosed. A router receives the multicast streams and communicates the streams via communication tunnels to a set of ingestion pipelines. Each communication tunnel can be terminated upon the ingestion pipeline receiving a multicast stream. The set of ingestion pipelines process and deliver the multicast streams across existing IP infrastructure for real time distribution.
US09054889B2 Method and apparatus for providing dynamically changed UPnP description
Provided is a method, medium and apparatus for providing a dynamically changed universal plug and play (UPnP) description. The method includes sensing a change of a service configuration of a device complying with a predetermined standard, updating a description including information about a service based on the change of the service configuration, and advertising that the description is updated. Thus, the service configuration is matched with the description and a control point can correctly control the device whose service configuration is changed.
US09054884B2 Proximity initiated co-browsing sessions
Methods and systems of conducting co-browsing sessions may provide for detecting a proximity event between a first device and a second device, and initiating a co-browsing session between the first device and the second device based on the proximity event. In one example, the proximity event is a physical bump between the first and second devices.
US09054861B2 Enhanced key agreement and transport protocol
A key agreement protocol for use in a public key cryptographic scheme between a pair of correspondents each of which has a long term public key and an ephemeral public key. The protocol includes the steps of exchanging the ephemeral public keys between the correspondents for computing a shared secret at each correspondent and utilizing the shared secret to obtain a common key, wherein the validity of the ephemeral public keys is checked by the recipient thereof prior to use of the common key.
US09054859B1 FPGA configuration bitstream encryption using modified key
Circuits, methods, and apparatus that prevent detection and erasure of a configuration bitstream or other data for an FPGA or other device. An exemplary embodiment of the present invention masks a user key in order to prevent its detection. In a specific embodiment, the user key is masked by software that performs a function on it a first number of times. The result is used to encrypt a configuration bitstream. The user key is also provided to an FPGA or other device, where the function is performed a second number of times and the result stored. When the device is configured, the result is retrieved, the function is performed on it the first number of times less the second number of times and then it is used to decrypt the configuration bitstream. A further embodiment uses a one-time programmable fuse (OTP) array to prevent erasure or modification.
US09054858B2 Transmission and detection in multiple-antenna transmission systems
An apparatus includes a transmit diversity encoder configured to use a block code of a length greater than one for encoding at least two consecutive symbols. A first symbol of the at least two consecutive symbols is dedicated to a first user and the second symbol of the at least two consecutive symbols is dedicated to a second user.
US09054857B2 Parallelizeable integrity-aware encryption technique
A parallelizable integrity-aware encryption technique is provided. In at least one embodiment of the present disclosure, a parallelizable integrity-aware encryption method comprises whitening at least one message block with a first mask value, encrypting the whitened at least one message block using a block cipher and a first key, and whitening the encrypted at least one message block with a second mask value to generate at least one corresponding output ciphertext block. In another embodiment of the present disclosure, a parallelizable integrity-aware encryption method comprises applying a XOR function to all blocks of a message to compute a XOR-sum, applying a first mask value to the XOR-sum; encrypting the masked XOR-sum using a block cipher and a first key, and applying a second mask value to the encrypted XOR-sum to generate an integrity tag.
US09054856B2 Processing samples of a received RF signal
An exemplary apparatus includes: means configured to obtain a set of plural samples of signals, the set comprising at least one sample for each of L antenna elements of a receiver, where L is an integer greater than two and where the samples are of an RF signal that has been downconverted by a downconversion frequency; means configured, for each antenna element, to perform autocorrelation on the samples relating to that antenna element; means configured to sum the results of autocorrelation for all antenna elements; means configured to convert the summed results into the frequency domain; means configured to determine a maximum value of the summed results in the frequency domain; and means configured to use the determined maximum value to provide an output indicative of an offset between a carrier of the RF signal and the downconversion frequency.
US09054848B2 Electronic apparatus and encryption method thereof
An electronic apparatus includes a secure unit to store public key information, an input unit to receive user authentication information and a data searching word, a user authenticating unit to perform user authentication with the inputted user authentication information, an encryption generating unit to generate a searching word encryption to use in data search, and a control unit to control generating the searching word encryption using the previously-stored public key information, the inputted user authentication information, and the data searching word.
US09054846B2 Power control for simultaneous transmission of ACK/NACK and channel-state information in carrier aggregation systems
Channel-state information and hybrid-ARQ ACK/NACK information for multiple carriers are simultaneously transmitted using a PUCCH Format 3 structure, where the hybrid-ARQ ACK/NACK bits and CSI bits are separately encoded and interleaved. In an example method, a power control offset parameter is calculated (2110) as a linear combination of at least a number N, representing a number of channel-state information bits and a number M, representing a number of hybrid-ARQ ACK/NACK bits. The method continues with the calculating (2120) of a power level for a transmission on a physical uplink control channel (PUCCH), using the power control offset parameter. In some embodiments, encoded channel-state information and hybrid-ARQ ACK/NACK bits are then transmitted (2060) according to the calculated power level. In some embodiments, the linear combination is of the form aN+bM+c, where a, b, and c are non-zero constants.
US09054841B2 Radio communication system, mobile station apparatus, radio communication method and integrated circuit
For efficient transmission of a first reference signal and a second reference signal for channel estimation without deteriorating a channel estimation accuracy, and without deteriorating a communication quality, a mobile station apparatus, in the case where a transmission of the first reference signal and a transmission of the second reference signal coincide in the same timing (Step S101, YES), performs transmission of the first reference signal (Step S102), and in contrast, in the case where a transmission of the first reference signal and a transmission of the second reference signal have happened to coincide in different component carriers in the same timing (Step S101, NO), performs a transmission of the first reference signal and a transmission of the second reference signal simultaneously (Step S103).
US09054839B2 Integrated multi-datastream transmission technology
The present invention is related to integrated multi-datastream transmission technology, more particularly, to integrated multi-datastream modulation technology. According to one aspect of the present invention, there is provided a modulation equipment (10), including: a symbol integration means (101), configured to combine a first bit stream with a second bit stream to form a symbol to be modulated; a symbol mapping means (102), configured to map the symbol to be modulated into a QAM modulation symbol according to a set of predetermined mapping rules; wherein, in the set of predetermined mapping rules, multiple constellations corresponding to any first bit stream are located in at least two quadrants in the constellation diagram, while multiple constellations corresponding to any second bit stream are located in at least two quadrants in the constellation diagram. The integrated transmission of a first service data and a second service data (e.g., unicast service data and MBMS data) may be supported and has a better performance than the prior art especially in single cell scenario by using the method, equipment and device in the present invention.
US09054835B2 Apparatus and method for establishing uplink synchronization in a wireless communication system
Uplink synchronization establishment in a base station which operates a plurality of component carriers according to one embodiment of the present description, is performed in that the base station is connected to a user equipment, sets component carrier aggregation information, generates an uplink timing groups in the set component carrier aggregation, and transmits information on the thus-generated uplink timing groups to the user equipment.
US09054834B2 Selection of transport format in wireless communication systems
Disclosed herein is a first network node and a method in a first network node for selecting a transport format among a plurality of available transport formats for communicating information with a second network node via a wireless link, which transport formats are such that a first transport format has a first maximum capacity and all the other transport formats have a higher maximum capacity in an increasing order. The method comprises the steps of: obtaining a quality indicator, which quality indicator indicates the current channel quality of the wireless link; determining a throughput indicator, which throughput indicator indicates the throughput format being available at the obtained quality indicator; calculating a switching value based on the quality indicator and the throughput indicator; switching to the second transport format when the quality indicator indicates that the switching value is reached or exceeded with respect to the second transport format; sending a notification to the second node, which notification indicates the switch to the second transport format.
US09054831B2 Optical communication network path restoration
A method and system of determining a new path through an optical network from a source node to a destination node when a link in an original path fails are disclosed. When a fault on a link is detected, adjoint weights are assigned to each operational link for each node on the original path. A connection cost is determined for each node based on the adjoint weights of the links connected to the node. A new path through the optical network is determined based at least in part on the adjoint weights and the connection costs.
US09054826B2 Adaptive system for efficient transmission of power and data through acoustic media
An apparatus and method for transmitting data and power through a metal barrier using ultrasonic waves, having ultrasonic transmission channels through the barrier formed by coupling ultrasonic transducers on opposite sides of the barrier. A power transmitter sends power over a channel and forward and reverse data transmitters send forward and reverse data signals by orthogonal frequency-division multiplexing OFDM over a separate channel. The data signals are made up of plural sub-carriers at plural different sub-carrier frequencies with none of the sub-carriers of the forward transmission signal being at a power harmonic frequency.
US09054817B2 Apparatus and method for selecting geographical area information at a weather band, or other, radio device
Apparatus, and an associated method, for a weather band radio that annunciates anomaly conditions. The radio has a set-up mode permitting a user to enter a home geographical area and also associated areas within a selected proximity to the home geographical area. When a National Weather Service SAME message is received at the radio that identifies the home geographical area or any of the associated geographical areas, the radio generates an alert.
US09054808B2 Controlled depolarization using chirp for mitigation of nonlinear polarization scattering
A coherent optical transmitter circuit is disclosed in which controlled chirp is employed, enabling the suppression of nonlinear polarization scattering in dual polarization coherent systems, such as those which employ dual polarization-quadrature phase-shift keying (DP-QPSK). By separately chirping the modulated signals of each polarization tributary signal, the polarization state of the output DP-QPSK signal varies during a time period corresponding to a symbol bit period. Such controlled variations in the output DP-QPSK signal result in the mitigation of nonlinear effects associated with the network infrastructure over which the signal is transmitted, resulting in enhanced system performance. Enhanced system performance, for example, can be seen in greater reach and improved signal quality of the transmitted signal.
US09054807B2 Reducing crosstalk in optical wavelength converters
An optical fiber transmission system includes a series of optical fiber transmission spans and one or more all-optical signal processors. The optical fiber transmission spans are connected to form an optical communication path. Each all-optical signal processor directly connects a corresponding adjacent pair of the spans. Each all-optical signal processor includes an optical wavelength converter having input and output ports and a dispersion adjustment module connected to the input port of the optical wavelength converter of the same processor. The dispersion module is also configured to adjust cumulative dispersions of some received optical pulses to be outside of a range for the cumulative dispersions of corresponding optical pulses in the span directly preceding the same processor.
US09054798B2 Non-foster circuit stabilization method
A method of and circuit for improving stabilization of a non-Foster circuit. The method comprises steps of and the circuit includes means for measuring a noise hump power at an antenna port or an output port of the non-Foster circuit, comparing the measured noise hump power with a desired level of noise power that corresponds to a desired operating state of the non-Foster circuit, and tuning the non-Foster circuit to generate the desired level of noise power to achieve the desired operating state of the non-Foster circuit.
US09054794B2 Detecting faults affecting communications links
A modem or associated computing or testing device is configured to detect the presence of one or more faults that affect DSL communications, and upon their detection, generate, for example, an indication, communication or message that recommends corrective action. In this context, a fault is generally caused by one or more unfiltered devices, impulsive noises, malfunctioning modems, or other factor that does not affect measured attenuation or measured noise, but does affect the signal-to-noise ratio (SNR) of the link. In addition to being able to generate a message guiding a user through corrective action, the system can estimate the rate impact of the detected fault.
US09054787B2 Method and apparatus for alignment in neighboring networks
A method includes detecting, at a first timing with reference to a periodic signal that is common to a first domain and a second domain, a first signal indicative of the first domain. The first signal is used by the first domain to signal presence of the first domain and a time used by the first domain for inter domain communication with other domains. Further, the method includes comparing, the first timing to a second timing with reference to the periodic signal. The second domain uses a second signal at the second timing to signal presence of the second domain and a time used by the second domain for inter domain communication with other domains. Then, the method includes aligning the first signal and the second signal to enable inter domain communication between the first domain and the second domain.
US09054782B2 Methods for canceling interfering wireless signals in cable customer premises equipment devices and outside plant
A noise reduction device for use with a cable signal distributed by an outside plant of a cable system. The device includes an antenna and a signal processing system. The outside plant receives an interfering radio frequency (“RF”) signal generated by one or more external wireless signal sources and combines the interfering RF signal with the cable signal to produce a noisy cable signal. The antenna receives the interfering RF signal as a copy signal. The signal processing system modifies the copy signal to produce a processed copy signal, and combines the noisy cable signal and the processed copy signal to produce a combined signal. The signal processing system also monitors error rate values of the combined signal, and adjusts the copy signal such that the copy signal at least partially cancels the interfering RF signal in the combined signal thereby reducing the error rate values of the combined signal.
US09054778B2 Transmission line protective relay device
In a protective relay device for a three-terminal transmission line comprising terminal A, terminal B and terminal C, when for example terminal information is transmitted to a protective relay Ry-A of one remote terminal (terminal A) from the protective relay Ry-C of the terminal C, terminal information Db that was sent from the protective relay Ry-B of another remote terminal (terminal B) is transmitted, in addition to the information Dc of the terminal in question. In the same way, when terminal information is transmitted to a protective relay Ry-B of the terminal B from the protective relay Ry-C of the terminal C, terminal information Da that was sent from the protective relay Ry-A of the terminal A is transmitted, in addition to the information Dc of the terminal in question.
US09054763B2 Wireless communication device and wireless communication method
A bias of reception qualities between spatial streams to a plurality of terminal devices is suppressed in a multiuser MIMO transmission. A wireless communication device according to the invention is one for performing a spatial multiplexing transmission to the plurality of terminal devices, that includes an additional data area setting section that allocates, as an additional data area, a part of a resource allocation area to which no data addressed to each terminal device of the plurality of terminal devices is allocated among resource allocation areas for the spatial multiplexing transmission which are allocated to each terminal device of the plurality of terminal devices, an additional data generator that generates additional data corresponding to the additional data area allocated by the additional data area setting section, and a transmitter that transmits the data which is addressed to each of the plurality of terminal devices and the additional data.
US09054750B2 Methods and apparatus for improving RF discovery for peer mode communications
Aspects disclosed herein relate to providing peer mode passive communications while accounting for a power level available to operate a NFC device. In the disclosed aspects, a near field communication (NFC) device may be equipped to detect a value for a power level available to operate the NFC device. The NFC device may be further equipped to determine a first duration to allocate for a listening mode and a second duration to allocate for a polling mode based at least in part on the determined available power level value and select a RF discovery loop based on the determined first duration and second duration. The NFC device may be further operable to perform peer mode discovery using the selected RF discovery loop.
US09054749B2 Optimizing power consumption in a near field communications (NFC) environment
An apparatus and method is disclosed to optimize power consumption in a NFC environment. A first NFC capable device provides a polling command to a second NFC capable device. The second NFC capable device provides a response to the polling command. The first NFC capable device provides a read command to the second NFC capable device. The second NFC capable device provides a response to the read command that indicates an overvoltage condition is present. The first NFC capable device adjusts a power level that is to be used to transmit further commands when the overvoltage condition is present.
US09054740B1 Low density parity check decoding with early termination based on nonzero-circulant flags
A method includes receiving a codeword over a communications channel and initializing a test codeword to be equal to the codeword received over the communications channel. The method includes performing, for each row of a low-density parity check (LDPC) matrix, an LDPC processing operation on the test codeword. The method includes, once the LDPC processing operations have been performed for all of the rows of the LDPC matrix, repeating the LDPC processing operations. The method includes monitoring progress of the LDPC processing operations. The method includes selectively generating a termination signal in response to the test codeword being a valid codeword according to the LDPC matrix. The method includes terminating the LDPC processing operations in response to generation of the termination signal.
US09054737B1 Analog to digital converter circuit
An analog-digital converter circuit is disclosed. Voltage control means is configured to control a voltage. Comparing means is configured to send a resulting comparative signal to the voltage control means. A first DAC is connected to the comparing means and to the voltage control means. Switching means connects an input means to the comparing means during a sampling phase. A second DAC is connected to the comparing means and to the voltage control means. A switching means connects input to the second DAC during a sampling phase, and connects voltage control means to DAC during a conversion phase. Switching means connects a second input to comparing means during a sampling phase.
US09054735B1 Method for encoding and decoding using variable length coding and system thereof
A method for encoding using a variable length coding is provided, which includes at an encoding system, determining variable length codes for coding a data set to be encoded, dividing a corresponding code corresponding to a specific data included in the data set into a first partial code and a second partial code and storing the divided first and second partial codes at the encoding system, and compressing a first partial code, which is a set of the first partial code, and storing the compressed result at the encoding system.
US09054731B2 Integrator output swing reduction
In one example implementation, the present disclosure provides a loop filter for use in a continuous-time sigma-delta analog-to-digital converter. Specifically, a capacitive feedback digital-to-analog converter path is provided at the input of a first opamp in a series of opamp integrators. The capacitive feedback digital-to-analog converter at the input of the first opamp reduces the signal content at the output of the first opamp, and thereby reduces the output swing of the first opamp. A reduction in output swing provides a more efficient loop filter.
US09054730B2 Method and system for LZW based decompression
A computer implemented method, computer program product, and system for decompressing compressed data. The system (400) has an interface component (420) configured to access and read a compressed data set (310) encoded with a LZW based compression algorithm. The compressed data set (310) includes a sequence of elements including byte characters (B) and symbols (S1/S2), each symbol corresponding to an encoded subset of the data set, and each symbol having a first portion (S1) including a previous symbol or a byte character and having a second portion (S2) including a byte character. The system further has a decoder (410) configured to generate a decompressed data set (320) by applying a LZW based decompression algorithm to the compressed data set (310) The decoder (410) makes use of a reverse order stack (440) configured for intermediate storage of byte characters decoded by the decoder (410) from the compressed data set (310). In one embodiment the system further has a dictionary which can store the full content values of symbols.
US09054726B2 Passive amplification circuit and analog-digital convertor
A differential signal is amplified by passive amplification which does not a reference of a common-mode voltage. At this time, the voltage of the differential signal is passive-amplified twice before carrying out a successive approximation type analog-digital conversion operation. The passive amplification is attained by providing a plurality of capacitances which carry out a sampling operation, and switching these connection relation by using switches. Without being accompanied by the increase of the consumed power and the chip size, an influence by the noise of s comparator is reduced to a half so that the effective resolution can be increased for one bit.
US09054724B2 Diagnostic circuit for monitoring an analog-digital converter circuit
Described is monitoring of an analog-digital conversion of a measured value of at least one of a pressure gauge, a level gauge and a flowmeter. Different measured values can be provided for the analog-digital converter by means of a first microcontroller, wherein these measured values are subsequently transmitted from this first area into a second area by means of a unidirectional coupler. These values are acquired by a second microcontroller in the second area and compared with reference values that are stored in the second area or at another location. This diagnostic circuit may make it possible to detect drifts of resistances and of reference voltages, as well as a faulty analog-digital converter or a program execution error of the first microcontroller.
US09054722B2 Circuitry and methods for use in mixed-signal circuitry
A method of calibrating switching circuitry, the switching circuitry comprising a measurement node and a plurality of output switches connected to the measurement node, and the circuitry being configured, in each clock cycle of a series of clock cycles, to control whether or not one or more of said output switches carry a given current based upon input data, the method comprising: inputting a plurality of different data sequences to the circuitry, each sequence causing a given pattern of voltages to occur at the measurement node as a result of currents passing through the output switches; measuring the voltages occurring at the measurement node for each said sequence; and calibrating the switching circuitry in dependence upon a result of said measuring.
US09054721B1 Systems and methods for digital calibration of successive-approximation-register analog-to-digital converter
Systems and methods of calibrating a successive approximation register analog-to-digital converter (ADC) are disclosed. A plurality of capacitor stages, a first capacitor array, and a first capacitor stage are coupled in parallel. A capacitance of the first capacitor stage is compared to a sum of capacitances of the plurality of capacitor stages and of the first capacitor array. In response to the comparing, the capacitance of the first capacitor stage is increased by increasing the capacitance of a second capacitor array if the capacitance of the first capacitor stage is less than the sum of the capacitances of the plurality of capacitor stages and of the first capacitor array.
US09054707B2 Systems, circuits, devices, and methods with bidirectional bipolar transistors
Methods, systems, circuits, and devices for power-packet-switching power converters using bidirectional bipolar transistors (BTRANs) for switching. Four-terminal three-layer BTRANs provide substantially identical operation in either direction with forward voltages of less than a diode drop. BTRANs are fully symmetric merged double-base bidirectional bipolar opposite-faced devices which operate under conditions of high non-equilibrium carrier concentration, and which can have surprising synergies when used as bidirectional switches for power-packet-switching power converters. BTRANs are driven into a state of high carrier concentration, making the on-state voltage drop very low.
US09054705B2 Self-powered source driving circuit and switching power supply thereof
In one embodiment, a source driving circuit configured for a switching power circuit, can include: (i) a source transistor coupled between a source of a main power transistor and ground, where the source transistor can be controlled by a PWM control signal; (ii) the main power transistor being on when the source transistor is on and a gate-source voltage of the main power transistor exceeds a conduction threshold voltage; (iii) a source diode having an anode coupled to the main power transistor source, and a cathode coupled to a delay circuit and a power supply capacitor; and (iv) the delay circuit controlling the main power transistor to turn off a delay time after the source transistor is turned off, where the delay time allows charging of the power supply capacitor such that a voltage across the power supply capacitor is at least a level of a reference voltage.
US09054704B2 Method, system, and apparatus for efficiently driving a transistor with a booster in voltage supply
A method, system, and apparatus for driving a Silicon Carbide (SiC) Junction Field Effect Transistor (JFET) are provided. A boosting capacitor is used in combination with two drivers to efficiently provide a boosting current to the SiC JFET and then a holding current to the SiC JFET. The boosting capacitor, upon discharge, creates the boosting current and once discharged the holding current is provided by one of the first and second drivers.
US09054703B2 Device for detecting drive current of PWM load device, drive current detection method, fault detection device, and fault detection method
It is an object of the invention to, in fault detection of a PWM load device, provide a fault detection device and a fault detection method, which are capable of appropriately detecting fault of the load device in the case where such load device is connected the duty ratio of the PWM waveform of which is different, or where such load device is connected the magnitude of current of which is different. The fault detection device samples a current flowing through the load device on a predetermined cycle, decides, based on sampled values, a current-driven period and decides, by using sampled values in the current-driven period, a drive current value for determining whether or not there is a fault.
US09054696B2 Gate driving circuit, and array substrate and display panel using the same
The present invention relates to a gate driving circuit, and a array substrate and a display using the same. The gate driving circuit comprises multiple-stage gate driving units, and each gate driving unit includes: an actuating unit configured to transmit an actuation signal; an energy storage unit configured to execute a charging process under the action of the actuation signal to output a driving voltage; a pull-up unit, a first pull-down unit, a second pull-down unit and a third pull-down unit operating under the action of the driving voltage, wherein a third pull-down unit pulls the driving voltage down to a second reference voltage to apply a reverse bias voltage to the gate-source and/or the gate-drain of transistors in the gate driving circuit, such that the threshold voltage of respective transistors under positive offset can offset reversely, thus effectively eliminating adverse effects of a threshold voltage offset phenomenon of the transistors on the gate driving circuit and improving the operation reliability of the gate driving circuit as well as the array substrate and the display panel thereof.
US09054694B2 Circuit arrangements and methods of operating the same
In various embodiments, a circuit arrangement may be provided. The circuit arrangement may include a level shifting stage configured to be coupled to a first reference voltage, the level shifting stage having an output node. The circuit arrangement may further include a first input electrode in electrical connection with the level shifting stage. The circuit arrangement may also include a second input electrode in electrical connection with the level shifting stage. The circuit arrangement may further include a load having a first end and a second end, the first end coupled to the level shifting stage and the second end for coupling to a second reference voltage. In addition, the circuit arrangement may include a bypass circuit element connected in parallel to the load. The bypass circuit element may be configured to allow current to flow through upon application of an external voltage for bypassing the load.
US09054691B2 Information processing apparatus or information processing method
According to the present invention, a phase shift of data received by an external device controller is delayed and corrected, and a control signal used for the data load control on the external device controller side is delayed period-by-period. Further, the phase shift is adjusted and then the control signal is adjusted. The adjustment can beneficially be performed very quickly. Moreover, the present invention is also beneficial for preventing a failure to load data.
US09054682B2 Wide bandwidth resonant global clock distribution
A wide bandwidth resonant clock distribution comprises a clock grid configured to distribute a clock signal to a plurality of components of an integrated circuit, a tunable sector buffer configured to receive the clock signal and provide an output to the clock grid, at least one inductor, at least one tunable resistance switch, and a capacitor network. The tunable sector buffer is programmable to set latency and slew rate of the clock signal. The inductor, tunable resistance switch, and capacitor network are connected between the clock grid and a reference voltage. The at least one tunable resistance switch is programmable to dynamically switch the at least one inductor in or out of the clock distribution to effect at least one resonant mode of operation or a non-resonant mode of operation based on a frequency of the clock signal.
US09054668B2 Broadband absorptive-loading filter
In one embodiment, front end circuitry for an electronic appliance, the front end circuitry comprising: a first port configured to conduct signals from a signal source, the signals comprising a first signal and a second signal; a first filter coupled to the first port, the first filter configured to filter the first signal according to a first frequency band and output the filtered first signal for further processing; a second filter coupled to the first port and arranged in parallel with the first filter, the second filter configured to absorb the second signal according to a second frequency band that is a stopband for the first filter; and an impedance load coupled between an output of the second filter and ground.
US09054641B2 Variable phase shifter, semiconductor integrated circuit and phase shifting method
A variable phase shifter. The variable phase shifter includes: a transmission line that outputs quadrature signals from a pair of output ports in response to an input signal of a specific frequency; a synthesizer that includes a first transistor connected to a first port of the pair of output ports and a second transistor connected to a second port of the pair of output ports, and that on input of the input signal takes signals output from the pair of output ports of the transmission line with a phase according to their respective load impedances and employs the first and the second transistors to amplify and combine the signals; and a phase controller that controls the phase of the output signal that is combined and output by the synthesizer by controlling the amplification operation of each of the first and second transistors of the synthesizer.
US09054639B2 Frequency dividing system and input level triggering device
A frequency dividing system, which comprises a control circuit, a first multiple input sharing input level triggering device, a first input level triggering group and a second input level triggering group. The first multiple input sharing input level triggering device receives a first frequency dividing signal to generate a feedback signal according to a level of a first clock signal, or receives a second frequency dividing signal to generate the feedback signal according to a level of a second clock signal. The first/second input level triggering group generates the first/second frequency dividing signal to the first multiple input sharing input level triggering device according to the feedback signal if active; and outputs a fixed voltage to the first multiple input sharing input level triggering device if non-active.
US09054638B2 Optical module and atomic oscillator
An optical module of an atomic oscillator using a quantum interference effect includes a light source to generate first light including a fundamental wave having a center wavelength, and including a first sideband wave and a second sideband wave having wavelengths that are different from each other, a wavelength selection unit that emits second light by selecting the first sideband wave and the second sideband wave of the first light and by allowing them to pass through, a gas cell in which an alkali metal gas is sealed and to which the second light is irradiated, and a light detection unit that detects an intensity of the second light passing through the gas cell.
US09054635B2 Crystal oscillator with reduced acceleration sensitivity
A crystal oscillator having a plurality of quartz crystals that are manufactured so that the directional orientation of the acceleration sensitivity vector is essentially the same for each crystal. This enables convenient mounting of the crystals to a circuit assembly with consistent alignment of the acceleration vectors. The crystals are aligned with the acceleration vectors in an essentially anti-parallel relationship and can be coupled to the oscillator circuit in either a series or parallel arrangement. Mounting the crystals in this manner substantially cancels the acceleration sensitivity of the composite resonator and oscillator, rendering it less sensitive to vibrational forces and shock events.
US09054631B2 Servo control apparatus and method for controlling the same
A servo control apparatus and method, the servo control apparatus including an input unit configured to receive an execution command with respect to one of a first control mode and a second control mode that are configured to control a motor, a plurality of detection units each configured to detect sensing data required for executing each of the first control mode and the second control mode, and a control unit configured to receive a feedback of the plurality of pieces of sensing data detected through the plurality of detection units while executing the first control mode, determine a point of time when a control mode is needed to be changed if the execution command with respect to the second control mode is input through the input unit, and check the sensing data required for executing the second control mode among the plurality of sensing data that are fed back.
US09054630B2 Synchronous machine controller
A synchronous machine controller includes a position detecting unit that detects a position of a rotor, a current detecting unit that detects an armature current, a current command generating unit that generates first and second current commands, a voltage command generating unit that generates a voltage command on the basis of the current commands, the position of the rotor, and the armature current, a power converting unit that outputs a voltage to the synchronous machine on the basis of the voltage command, a magnetic flux estimating unit that estimates an armature interlinkage flux on the basis of a rotational velocity calculated from a variation of the position of the rotor, the voltage command, and the armature current, and a magnet state estimating unit that estimates a magnetic flux or a temperature of the permanent magnet from the position of the rotor, the armature current, and the armature interlinkage flux.
US09054626B2 Motor control apparatus
Provided is a motor control apparatus that can easily distinguish between a current sensor abnormality and a rotation-angle sensor abnormality, without making a current sensor a duplex system. An MGECU estimates a W-phase current on the basis of a V-phase current detected by a current sensor, and estimates the V-phase current on the basis of a detected W-phase current. An actual torque of a motor generator is estimated on the basis of the detected V-phase current and the estimated W-phase current, and the actual torque of the motor generator is also estimated on the basis of the detected W-phase current and the estimated V-phase current. Then, an evaluation is made whether an abnormality is an abnormality of the current sensor or an abnormality of a resolver, on the basis of the differences between the torque command value for the motor generator and both the estimated actual torques.
US09054620B2 Motor driving device including electric storage device
A motor driving device includes a rectifier, an inverter connected to a DC link on a DC side of the rectifier, a power failure detecting unit for detecting a power failure on the alternating side of the rectifier, an electric storage device connected to the DC link, a charging unit that possesses a voltage boosting function of charging the electric storage device by direct current power at the DC link, a discharging unit that causes direct current power stored in the electric storage device to be discharged to the DC link, and a control unit that causes the charging unit to operate when the power failure detecting unit does not detect a power failure, or before start of motor drive, and causes the discharging unit and the inverter to operate when the power failure detecting unit detects a power failure.
US09054610B2 Generator architecture with main field rotating power converter
A generator includes a stationary portion and a rotating portion. The stationary portion includes a main armature winding and the rotating portion includes a main field winding a main field rotating power converter that selectively controls current supplied to the main field winding.
US09054602B2 Resonant circuit with constant current characteristics
An electronic resonant circuit of very high efficiency which is suitable for driving loads with a known and controlled current. The resonant circuit has input terminals and output terminals with a first reactance Xs, in series with an input terminal, a second reactance XL, in series with an output terminal, and a reactance Xp, connected such that there is a series connection path between the first input terminal through Xs and Xp to the second input terminal and such that there is also a second series connection path between the first output terminal through XL and Xp to the second output terminal the input terminals being driven from a high frequency inverter, the output terminals being connected to a load, the value of the reactances Xs, XL and Xp being chosen such that at least one frequency, the reactances of Xs, XL and Xp are approximately similar in magnitude. The reactance Xs and second reactance XL, are predominantly capacitive over a wide range of the frequency of operation and the reactance Xp, is predominantly inductive over a wide range of the frequency of operation. The circuit according to this invention is particularly suited to driving LED lighting systems, constant torque motors, battery charging and capacitor charging.
US09054601B2 Maximum power point tracker, power conversion controller, power conversion device having insulating structure, and method for tracking maximum power point thereof
Disclosed are a maximum power point tracker, a power conversion controller, a power conversion device having an insulating structure, and a method for tracking maximum power point. The power conversion device includes: a DC/AC converter including a primary DC chopper unit having a primary switch, a transformer, and an AC/AC conversion unit including a secondary switch; a current detector detecting current from an input stage of the DC/AC converter and providing a detected current value; a voltage detector detecting a system voltage from an output stage of the DC/AC converter; and a power conversion controller generating a primary PWM signal to be provided to the primary DC chopper unit and secondary first and second PWM signals, having the mutually opposing phases, to be provided to the AC/AC conversion unit by using the detected current value and the system voltage.
US09054595B2 AC-DC converter
An AC-DC converter includes two series circuits, an inductor, and a common snubber circuit. Each series circuit includes a switch and a current block device. The block device blocks a current from its high potential side to its low potential side when the first device is closed and allows the current from the low potential side to the high potential side when the first device is opened. The inductor is interposed between a first connection point between the switch and the block device of one series circuit and a second connection point between the switch and the block device of the other series circuit. The common snubber circuit is connected between each of the first connection point and the second connection point and at least one of both ends of the one series circuit.
US09054593B2 Impedance control for a power converter
A power supply system and method are disclosed. The system includes a power converter comprising a switching stage to conduct an output current in response to switching signals having a defined duty-cycle. The output current can be provided at an output of the power converter system. The system also includes a current monitor to sense a magnitude of the output current. The system further includes a gate drive controller to generate the switching signals and to control an output impedance of the switching stage based on the sensed magnitude of the output current to control the magnitude of the output current.
US09054588B2 Three-phase AC to DC converter and air conditioning apparatus using three-phase AC to DC converter
A three-phase AC to DC converter includes a three-phase AC power supply, a three-phase rectifier bridge circuit that is connected to the three-phase AC power supply and includes rectifying devices which are connected in a bridge configuration, a three-phase full-bridge circuit that includes two serially-connected switching devices for each of three phases, the two serially-connected switching devices being connected at an output side of the three-phase rectifier bridge circuit, and includes reverse blocking diodes which are connected in parallel to the respective switching devices, a reactor that connects the three-phase full-bridge circuit to the three-phase AC power supply, a smoothing capacitor connected to an output side of the three-phase full-bridge circuit, DC voltage detection means that detects an output voltage, power supply phase detection means that detects a power supply phase of the three-phase AC power supply, and pulse width modulator that outputs PWM signals which control the switching devices.
US09054570B2 Stator assembly for motor having hall sensor part fixed to end of tooth of stator
Disclosed therein is a stator assembly including: a stator core (10) having a round base, a plurality of teeth radially formed along the outer circumferential surface of the base, and at least one connector bushing formed on the inner circumferential surface of the base; and an insulation coating layer (20) formed on the surface of the stator core, wherein the insulation coating layer (20) is coated to the outer diameter surfaces of the teeth of the stator core.
US09054559B2 Method and system for distributing energy
A method of delivering electrical energy to a point in an electrical power grid, including accessing a source of energy at a first location and converting the energy into a form of transportable energy. The next step is transporting the transportable energy via a bulk transportation network from the first location to the point on said electrical power grid at a second location having a need for additional electrical power without the transportable energy going through the electrical power grid to get to the point. The next step is converting the form of transportable energy into electrical energy suitable for connecting to the power grid and discharging the electrical energy into the power grid at the second location. A system for delivering electrical energy is also provided. The transportable energy preferably takes the form of charged electrolytes, compressed air or thermal storage units, transported, for example, by way of trains.
US09054555B1 Methods and systems for charging a rechargeable battery device on a marine vessel
Systems and methods for charging a rechargeable battery device on a marine vessel utilize a rechargeable battery device, a charger charging the battery device, and a control circuit. The control circuit calculates an amount of current that is available to charge the battery device based upon an amount of current that is available from the shore power source and an amount of current that is being drawn from the shore power source by devices other than a voltage charger and limits the amount of current being drawn by the voltage charger to charge the battery device to an amount that is equal to or less than the calculated amount of current that is available to charge the battery device. The control circuit can repeatedly calculate the amount of current that is available to charge the battery device and limit the amount of current being drawn by a voltage charger to charge the battery device to thereby actively adjust an amount of charge applied to the battery device.
US09054548B2 Contactless power feeding system
The contactless power feeding system includes a power transmitting device including an AC power source, a power transmitting element transmitting an AC power and a first microprocessor generating a transmission signal, and a power receiving device including a power receiving element receiving the AC power, a rectifier circuit, a smoothing circuit, a voltage conversion circuit, a second microprocessor generating a response signal in accordance with the transmission signal, a charge control circuit changing a charging rate for a power storage device in accordance with the response signal and the power storage device whose charging is controlled by the charge control circuit. Then, a resistance value of the power storage device changes, an impedance changes, and a modulation signal is generated. The generated modulation signal is transmitted from the power receiving device to the power transmitting device and is processed by the first microprocessor.
US09054544B2 Power feeding device, power receiving device, and wireless power feed system
A wireless power feed system with high transfer efficiency of electric power is disclosed. The wireless power feed system includes a power feeding device and a power receiving device, wherein the power feeding device includes a first electromagnetic coupling coil that is connected to an AC power source via a directional coupler; a first resonant coil; a switch connected to the opposite ends of the first resonant coil; a control circuit which conducts switching on/off of the switch based on a parameter of an amplitude of a reflective wave detected by the directional coupler; and an analog-digital converter provided between the first electromagnetic coupling coil and the control circuit; and the power receiving device includes a second resonant coil; and a second electromagnetic coupling coil, and wherein the first electromagnetic coupling coil is provided between the first resonant coil and the second resonant.
US09054533B2 Protective circuit for a rechargeable battery pack
The invention is directed to a protective circuit for a multiplicity of individual cells arranged in a rechargeable battery pack, wherein a predefined number of individual cells forms a cell network. A monitoring circuit for the state of charge of the individual cells in the cell network is provided wherein the voltage at an individual cell is detected and the detected voltages of a plurality of individual cells are compared among one another to output a signal when an unbalancing limit is exceeded unbalancing limit indicates a permissible voltage difference between two selected individual cells of the cell network. The unbalancing limit of the cell network is provided as a characteristic curve variable over its state of charge. To alter the unbalancing limit, the characteristic curve is altered in dependence on a correction value.
US09054532B2 Dispatching vehicle-to-grid ancillary services with discrete switching
Techniques for controlling dispatch of electric vehicles (EVs) to perform vehicle-to-grid regulation of power of an electric grid are presented. An aggregator component can individually control transitioning respective EVs of a set of EVs between a charging state and a not-charging state. The aggregator component includes a dispatch controller component (DCC) that can employ a defined dispatch algorithm for EVs to facilitate enabling the DCC to perform unidirectional regulation. The DCC can switch EV charging stations on and off using remote switches to meet a system regulation signal. The DCC can use the dispatch algorithm to make determinations regarding which EV to switch using charging priorities, in accordance defined power regulation criterion(s). The aggregator component can reduce communication signals used to adjust dispatch by sending switching signals to only those EVs of the set of EVs that are changing their charging state at a given time.
US09054526B2 Method for operating a converter and a switching cell and a converter
Exemplary embodiments are directed to a method for operating a converter, wherein the converter includes a plurality of bridge branches having one or more switching cells connected in series. Each bridge branch connects one of a plurality of inputs to one of a plurality of outputs of the converter. The method includes monitoring each of the switching cells in order to determine a fault. If a fault is identified in one of the switching cells, triggering one of the triggering elements for short-circuiting switching cell connections if the fault identified in the switching cell is not followed by identification of a fault in a further one of the switching cells within a predetermined period of time.
US09054522B2 On-load tap changer
The invention relates to an on-load tap changer for switching among winding taps of a step transformer without interruption. According to the invention, in each auxiliary current branch of the on-load tap changer, which operates with vacuum switching tubes as switching elements, additional switches are provided in series with the vacuum switching tubes and the respective winding tap. Said additional switches cause a complete galvanic isolation of the vacuum switching tubes in the auxiliary current branches in steady-state operation.
US09054519B2 Electrical circuit with surge protection monitoring
An electrical circuit comprising a power supply, a load and a surge protection device adapted to protect said load and/or power supply from electrical fast transient events according to the requirements of IEC 61000-4-2 or 4 and which comprises a stress threshold, in which the electrical circuit further comprises a monitoring device adapted to monitor the current in said surge protection device and detect the breaching of said threshold by electrical fast transient events.
US09054518B2 Display apparatus
A display apparatus includes a display unit including a thin film transistor (TFT) and a display device. The display device is electrically connected to the TFT and displays an image. A circuit unit is disposed at a side of the display unit and includes a driving device or a signal line unit. The circuit unit includes a damage inducing unit electrically coupled to a conductor in the circuit unit. The damage inducing unit forcibly discharges an electrostatic discharge (ESD) introduced into the circuit unit, thus preventing damage to the driving device or the signal line unit due to the ESD.
US09054511B1 Sheet metal structure having twist-out tabs for removing a knockout
A knockout can be removed from a parent part in a sheet metal structure by removing one or more twistable tabs located on a perimeter of the knockout. A tab is defined by a region of sheet metal within a perimeter consisting of a first and a second cut. The first and second cuts extend through the sheet metal along first and second paths. A first neck extends between the first end of the first cut and the first end of the second cut and between the tab and the parent part. A second neck extends between the second end of the first cut and the second end of the second cut and extends between the tab and the knockout. To remove the tab, the tab is rotated such that the two necks twist about an axis between them, until torsional fatigue fractures the necks.
US09054510B2 Utility meter socket and conduit and method of installation
A system may include a load-side conduit including a plurality of punch-outs for passing utility wires to a building. The system may also include a utility box having an opening to receive the load-side conduit. The utility box receives utility wires from a utility-side conduit. In one embodiment, the load-side conduit may include a plurality of mounting flanges for suspending the load-side conduit from the utility box. In one embodiment, the load-side conduit includes a mounting strap, attached to the load-side conduit, for mounting the load-side conduit onto a building. In one embodiment, the load-side conduit includes a body and a cover. The body may include locking flanges and the cover may include hooks to engage the locking flanges to secure the cover to the body.
US09054509B2 Wire protective insert sleeve for electrical switches, receptacles and junction boxes
A wire protecting device for boxes containing electrical wires, the device having an insert sleeve having a substantially solid exterior and a penetrable interior and a structure for attaching the insert sleeve proximate a fastener hole capable of receiving a fastener which extends in a longitudinal direction into the box when in an at least partially fastened position.
US09054500B2 Integrated micro-plasma limiter
A plasma power limiter fabricated using wafer-level fabrication techniques with other circuit elements. The plasma limiter includes a signal substrate and a trigger substrate defining a hermetically sealed cavity therebetween in which is encapsulated an ionizable gas. The signal substrate includes a signal line within the cavity and the trigger substrate includes at least one trigger probe extending from the trigger substrate towards the transmission line. If a signal propagating on the transmission line exceeds a power threshold, the gas within the cavity is ionized creating a conduction path between the transmission line and the trigger probe that draws off the high power current.
US09054489B2 Hybrid vertical cavity laser for photonic integrated circuit
According to example embodiments, a hybrid vertical cavity laser for a photonic integrated circuit (PIC) includes: a grating mirror between first and second low refractive index layers, an optical waveguide optically coupled to one side of the grating mirror, a III-V semiconductor layer including an active layer on an upper one of the first and second low refractive index layers, and a top mirror on the III-V semiconductor layer. The grating mirror includes a plurality of bar-shaped low refractive index material portions arranged parallel to each other. The low refractive index material portions include a plurality of first portions having a first width and a plurality of second portions having second width in a width direction. The first and second widths are different.
US09054487B2 Semiconductor stripe laser
A semiconductor stripe laser has a first semiconductor region having a first conductivity type and a second semiconductor region having a different, second conductivity type. An active zone for generating laser radiation is located between the semiconductor regions. A stripe waveguide is formed in the second semiconductor region and is arranged to guide waves in a one-dimensional manner and is arranged for a current density of at least 0.5 kA/cm2. A second electrical contact is located on the second semiconductor region and on an electrical contact structure for external electrical contacting. An electrical passivation layer is provided in certain places on the stripe waveguide. A thermal insulation apparatus is located between the second electrical contact and the active zone and/or on the stripe waveguide.
US09054486B2 Optical amplifier device
An optical amplifier device comprising an input/output section that inputs incident light and outputs emission light; a polarized light splitting section that causes a polarized light component of the incident light input from the input/output section to branch, and outputs first polarization mode light having a first polarization and second polarization mode light having a second polarization different from the first polarization; a polarization converting section that receives the first polarization mode light, converts the first polarization to the second polarization, and outputs first polarization converted light; and an optical amplifying section that amplifies the first polarization converted light input to one end of a waveguide, outputs the resulting amplified first polarization converted light from another end of the waveguide, amplifies the second polarization mode light input to the other end of the waveguide, and outputs the resulting amplified second polarization mode light from the one end of the waveguide.
US09054483B2 Photoelectric converting module
A photoelectric converting module includes a circuit board, a locating frame fixed on the circuit board, and a photoelectric coupling element. The photoelectric coupling element includes a bottom surface. The bottom surface defines a groove. A shape of the groove coincides with that of the locating frame and a size of the groove is slightly greater than that of the locating frame. The groove receives the locating frame.
US09054478B2 Electrical connector having a designed breaking strength
An improved method is employed to produce a plug connector having a defined breaking strength. The plug connector is receivable in a receptacle connector disposed in an electronic device. The plug connector has an inner enclosure bonded to a tab of the connector. The bonds are designed to break at a torque that is less than the breaking strength of the tab of the connector and/or the receptacle connector. The designed breaking strength protects the receptacle connector and/or the electronic device from damage when a force is applied to the plug connector.
US09054473B2 Processor loading system
A component loading system includes a board having a socket. A first base member is secured to the board through a plurality of first heat dissipater coupling posts. A first securing member is moveably coupled to the first base member. A second base member is secured to the board through a plurality of second heat dissipater coupling posts. A second securing member is moveably coupled to the second base member. A loading member is moveably coupled to the first base member. A heat dissipater is operable to be coupled to the plurality of first heat dissipater coupling posts and the plurality of second heat dissipater coupling posts. The loading member is operable to be secured to the board by moving the first securing member into engagement with the second base member and moving the second securing member into engagement with the first base member.
US09054472B2 Power adapter with plug member stowable in housing
An exemplary power adapter includes a plug member and a housing. The plug member includes a base and a pair of conductive pins located on the base. A number of protrusions protrude from a side of the base. The housing includes a receiving space for receiving the conductive pins. A receiving slot is located on the sidewall of the receiving space. A number of guiding cutouts extends from a top surface of the housing. The guiding cutouts are in communication with the receiving slot and the receiving space.
US09054459B2 Electrical connector assembly with a CPA element
An electrical connector assembly including a first connector having a first casing and a plurality of contacts and a second connector having a second casing and a plurality of mating contacts. The first and second connectors are configured to transition between an unassembled condition and an assembled condition to connect the plurality of contacts together with the mating contacts. The second connector supports a connector position assurance (CPA) element. In the unassembled condition, the CPA element abuts against a surface borne by one of connectors, thereby preventing movement of the CPA element relative to the second connector between a safety and an active position. In the assembled condition, the CPA element does not abut against the surface and is movable relative to the second connector between the safety and active positions, so as to connect the mating contact carried by the CPA element with the corresponding contact.
US09054458B1 Connector position assurance
A connector assembly having a first connector housing, a second connector housing and a connector position assurance (CPA) member that is slidably mounted on the first connector housing for movement between first and second CPA positions. When the CPA member is in the first CPA position and the first connector housing is not fully mated to the second connector housing, the CPA member engages the first connector housing to inhibit sliding movement toward the second CPA position. Fully mating the first and second connector housings together unlocks the CPA member to permit it to be slid to the second CPA position to engage the second connector housing.
US09054442B2 Terminal connection structure having a holder to hold two terminals in an overlapping state
[Problem] To provide a terminal connection structure that can reliably connect terminals together even if the positional offset between the terminals is great.[Solution] The terminal connection structure connects a busbar and a first terminal connected to the coil of a motor. The terminal connection structure is provided with: a base having a bottom wall; a terminal holder that can hold the first terminal and the busbar in an overlapping state; and a mobile attachment section. The mobile attachment section has: a bottom plate section that is provided to the terminal holder and that is parallel to the bottom wall; and a holding slit that is provided to the base, is entered by the bottom plate section, and is larger than the bottom plate section. The mobile attachment section attaches the terminal holder to the base movably in parallel to the surface of the bottom wall.
US09054432B2 Terminal plate set and electric connector including the same
A terminal plate set and an electric connector including the terminal plate set are disclosed. The terminal plate set includes two signal terminal plates and two grounding terminal plates, and the signal terminal plates are parallel to each other and disposed between the grounding terminal plates. A partition channel is formed between the grounding terminal plates, between the signal terminal plates, between the signal terminal plate and the grounding terminal plate, or between the terminal plates. The electric connector includes the terminal plate set and a front body, and the terminal plate set is installed at the front body, and a front convection hole is formed on a plug side of the front body. The impedance of the signal terminal plates and the grounding terminal plates can be adjusted within the best range to improve the heat dissipation efficiency of the terminal plate set and the electric connector.
US09054430B2 Connection terminal
A connection terminal includes a box-shaped terminal body, a male contact piece protruding from a first side wall of the terminal body, a female contact portion arranged inside of the terminal body, a slit formed in a second side wall and at least one of a front wall closing up a front opening of the terminal body and a rear wall close up a rear opening of the terminal body.
US09054427B2 Planar Vivaldi antenna array
A planar Vivaldi antenna array, and method of forming such an array, the array comprising: a plurality of slots at an end of the antenna array, the slots extending through the whole thickness of the planar structure of the antenna array; and a plurality of grooves extending from the slots; wherein: the grooves do not extend through the whole thickness of the planar structure of the antenna array; and the cross-sectional shape of the grooves is complementary to the cross-sectional shape of the slots.
US09054420B2 Antenna module
An antenna module is provided. The antenna module includes a first ground element, a body, a radiator and a parasitic element. The body is electrically connected to the first ground element. The radiator is connected to the body, wherein the radiator includes an extending portion, a bending portion and a terminal portion, and the bending portion is connected to the extending portion, and the terminal portion is connected to the bending portion. The parasitic element includes a parasitic extending portion and a parasitic conductive portion, wherein the parasitic extending portion is connected to the parasitic conductive portion, and the terminal portion and the parasitic extending portion is located on a same straight line, and the terminal portion is separated from the parasitic extending portion.
US09054418B2 Antenna structure for a wireless device with a ground plane shaped as a loop
This invention refers to an antenna structure for a wireless device comprising a ground plane and an antenna element, wherein the ground plane has the shape of an open loop. The invention further refers to an antenna structure for a wireless device, such as a light switch or a wrist sensor or wristwatch, comprising an open loop ground plane having a first end portion and a second end portion, the open loop ground plane defining an opening between the first end portion and the second end portion;and an antenna component positioned within the opening defined between the first end portion and the second end portion and overlapping at least one of the first end portion or the second end portion. Further the invention refers to a corresponding wireless device and to a method for integrating such an antenna structure in a wireless device.
US09054414B2 Antenna system for low-earth-orbit satellites
The present invention regards an antenna system comprising a reflection system that comprises a reflector having a rotational symmetry with respect to an axis of symmetry. Moreover, the antenna system also comprises an electronically steerable planar radiating array that is arranged in a focal region of the reflection system, has a rotational symmetry with respect to the axis of symmetry and is operable to radiate a primary radiofrequency beam oriented in a predefined direction of illumination with respect to the axis of symmetry in such a way as to cause a specific region of the reflector to be illuminated by said primary radiofrequency beam. Said specific region of the reflector is designed, when illuminated by said primary radiofrequency beam, to generate by reflection a secondary radiofrequency beam oriented in at least one predefined direction of transmission with respect to the axis of symmetry.
US09054412B2 Channel estimation filter normalization
Disclosed are various embodiments providing processing circuitry for selecting a channel estimation filter from a plurality of channel estimation filters based on a channel quality metric, the selected channel estimation filter being associated with an intrinsic coefficient. The processing circuitry may then determine a scaled coefficient, the scale coefficient being based on scaling the intrinsic coefficient with respect to a bit size constraint, the bit size constraint being determined by a bit length of a multiplication circuitry operand. Moreover, the processing circuitry may generate an output based on the scaled coefficient and an input signal.
US09054408B2 Removable card for a contactless communication, its utilization and the method of production
Removable card for a contactless communication contains an antenna (4) formed of threads (10) placed on the external surface of the body (1) of the card and covered by a layer (7) of a ferromagnetic material. In advantageous adjustment the antenna (4) contains on one area (2) of the card eight threads (10) and both areas (2) of the card are covered by a layer (7) of a ferritic foil. The antenna (4) is connected to the series with element (12) with capacity and the resistance (11) on the other side. Resonant circuit is tuned in for the final frequency from 13.0 to 15.0 MHz. The signal from the antenna (4) is read between the first and the second thread (10) from the side of the element (12) with capacity. The production method for the antenna on the body of the removable card resides in the fact that a groove of the conductive path (5) shape is dredged on the surface of the card's body (1), the groove is filled with a conductive material and a ferromagnetic material layer (7) is applied on the surface of the area (2) covering the antenna (4).
US09054407B2 Antenna device, antenna module, and portable terminal
Radiation electrodes are formed on a dielectric base body of an antenna chip. A capacitive feeding electrode is formed on a first end surface of the dielectric base body. A ground electrode, a feeding circuit connection electrode, feeding lines, a tip electrode, and the like are formed on the top surface of a base member of a substrate. When a first switching element selects the feeding line side, a second switching element is made to enter a conducting state. In this state, the radiation electrodes are capacitively fed. When the first switching element selects the feeding line side, the second switching element is made to enter an open state. In this state, the radiation electrodes are directly fed. In this manner, the directivity direction of an antenna can be switched using a single radiation element.
US09054397B2 Battery cell with integrated sensing platform
A battery cell that comprises a sensing platform with sensing elements configured to provide information about in-situ characteristics and parameters of the battery cell. Embodiments of the battery cell can have the sensing platform integrated into the structure of the battery cell, as a separate structure incorporated in the battery cell, and combinations thereof. In one embodiment, the battery cell comprises a sensing platform having sensing elements proximate a localized measurement region, where the sensing platform comprises a substrate with material layers disposed thereon. The material layers comprise at least one sensing layer that forms the sensing elements so that the sensing elements are responsive to properties of the battery cell.
US09054390B2 Electrolyte for lithium secondary battery and lithium secondary battery comprising the same
The present disclosure relates to an electrolyte for a lithium secondary battery, comprising a non-aqueous solvent, a lithium salt and an additive having a perfluoroalkyl group. By including the additive having a specific structure in the electrolyte, the output of the lithium secondary battery can be improved greatly.
US09054387B2 Electrode assembly including mandrel having removable portion
Provided is an electric storage battery including a jelly roll type electrode assembly having a mandrel. The mandrel includes a positive portion, a negative portion and a removable portion. In some embodiments, the mandrel is planar having two faces with a groove on each of the positive and negative portions. The grooves can be on the same or different faces of the mandrel. The grooves are dimensioned to accommodate a positive and negative feedthrough pin. The electrodes are wrapped around the mandrel using the removable portion to wind the mandrel. Once wrapped, the removable portion can be detached. The positive portion and the negative portion are left in the electrode assembly insulated from each other. The mandrel allows tighter wrapping of the jelly roll assembly, increasing battery miniaturization and also results in electrode assemblies in which after-placement of tabs does not result in burrs or shorting.
US09054385B2 Passive power management and battery charging for a hybrid fuel cell / battery system
Disclosed herein is a circuit for passively managing power between a fuel cell stack and a battery in a hybrid system. The circuit includes a buck-boost converter circuit, a direct charge circuit; and a network which interconnects them. The network is configured so that in response to a voltage level in the network being lower than or equal to a maximum battery charge voltage, the battery is charged via the direct charge circuit; and in response to another voltage level in the network which is higher than the maximum battery charge voltage, the battery is charged via the buck-boost converter circuit. Also disclosed is a device incorporating the circuit and a method of passively managing power.
US09054383B2 Porous carbonaceous composite material, positive electrode and lithium air battery including the material, and method of preparing the material
A porous carbonaceous composite material, a positive electrode and lithium air battery including the porous carbonaceous composite material, and a method of preparing the porous carbonaceous composite material. The porous carbonaceous composite material includes a carbon nanotube (CNT); and a modified carbonaceous material doped with a heterogeneous element, wherein the ratio of the number of surface oxygen atoms to the number of surface carbon atoms ranges upward from about 2 atom %.
US09054381B2 Si based negative electrode material
A negative electrode active material for a lithium ion battery having the composition formula SiaSnbNicTiyMmCz, wherein a, b, c, y, m and z represent atomic % values, wherein M is either one of more of Fe, Cr and Co, and wherein a>0, b>0, z>0, y≧0, 0≦m≦1, c>5, z+0.5*b>a and c+y>0.75*b. The process for preparing the active material comprises the steps of:—providing a mixture of elemental and/or alloyed powders of the elements in the composition SiaSnbNicTiyMmCz, and—high energy milling under non-oxidizing conditions of the powder mixture.
US09054374B2 Cathode active material, method of manufacturing the same and battery
A cathode active material capable of obtaining a high capacity and capable of improving stability or low-temperature characteristics, a method of manufacturing the same, and a battery are provided. A cathode (21) includes a cathode active material including a lithium complex oxide including Li and at least one kind selected from the group consisting of Co, Ni and Mn, and P and at least one kind selected from the group consisting of Ni, Co, Mn, Fe, Al, Mg and Zn as coating elements on a surface of the lithium complex oxide. Preferably, the contents of the coating elements are higher on the surface of the cathode active material than those in the interior thereof, and decrease from the surface to the interior.
US09054373B2 Anode materials for lithium ion batteries
A composite material has general Formula (1-x)J-(x)Q wherein: J is a metal carbon alloy of formula SnzSiz′MetwMet′w′Ct; Q is a metal oxide of formula AγMαM′α′Oβ; A is Li, Na, or K; M, M′, Met, and Met′ are individually Ge, Mo, Al, Ga, As, Sb, Te, Ti, Ta, Zr, Ca, Mg, Sr, Ba, Li, Na, K, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Nb, Rt, Ru or Cd; 0
US09054337B2 Display devices and methods of manufacturing display devices
A display device includes a first optical resonance layer on a substrate, a switching structure on the first optical resonance layer, a first electrode on the switching structure, a light emitting structure on the first electrode, and a second electrode on the emitting structure. The switching structure may include a switching device and an optical distance controlling insulation layer covering the switching device. A first optical resonance distance for an optical resonance of the light may be provided between an upper face of the first optical resonance layer and a bottom face of the second electrode.
US09054331B2 Organic EL display and method of manufacturing the same
An organic EL display includes: lower electrodes arranged on a substrate so as to correspond to red, green and blue organic EL elements, respectively; hole injection/transport layers arranged on the lower electrodes so as to correspond to the red, green and blue organic EL elements, respectively, the hole injection/transport layers having one or both of hole injection and hole transport properties; red and green organic light-emitting layers arranged on the hole injection/transport layers for the red and green organic EL elements, respectively, and including a low-molecular material; a blue organic light-emitting layer arranged on whole surfaces of the red and green organic light-emitting layers and the hole injection/transport layer for the blue organic EL element; and an electron injection/transport layer and an upper electrode arranged on a whole surface of the blue light-emitting layer, the electron injection/transport layer having one or both of electron injection properties and electron transport properties.
US09054329B2 Light-emitting devices and displays with improved performance
Light-emitting devices and displays with improved performance are disclosed. A light-emitting device includes an emissive material disposed between a first electrode, and a second electrode. Various embodiments include a device having a peak external quantum efficiency of at least about 2.2%; a device that emits light having a CIE color coordinate of x greater than 0.63; a device having an external quantum efficiency of at least about 2.2 percent when measured at a current density of 5 mA/cm2. Also disclosed is a light-emitting device comprising a plurality of semiconductor nanocrystals capable of emitting red light upon excitation, wherein the device has a peak luminescent efficiency of at least about 1.5 lumens per watt. Also disclosed is a light-emitting device comprising a plurality of semiconductor nanocrystals capable of emitting red light upon excitation, wherein the device has a luminescent efficiency of at least about 1.5 lumens per watt when measured at a current density of 5 milliamps/square centimeter. Also disclosed is a light-emitting device comprising a plurality of semiconductor nanocrystals capable of emitting green light upon excitation, wherein the device has a peak external quantum efficiency of at least about 1.1 percent. Further disclosed is a light-emitting device comprising a plurality of semiconductor nanocrystals, wherein the device has a luminescent efficiency of at least about 3 lumens per watt when measured at a current density of 5 mA/cm2. Further disclosed is a light-emitting device comprising a plurality of semiconductor nanocrystals capable of emitting green light upon excitation, wherein the device has an external quantum efficiency of at least about 2% when measured at a current density of 5 mA/cm2. Other light-emitting devices and displays with improved performance are disclosed. Also disclosed are methods for preparing and for purifying semiconductor nanocrystals.
US09054319B2 Organic electroluminescence device
An organic electroluminescence device includes an anode, a cathode, and an organic thin-film layer interposed between the anode and the cathode. The organic thin-film layer includes a phosphorescent-emitting layer containing a host and a phosphorescent dopant, and an electron transporting layer that is provided closer to the cathode than the phosphorescent-emitting layer. The host contains a substituted or unsubstituted polycyclic fused aromatic skeleton.
US09054318B2 Organic light emitting device
An organic light emitting device including a plurality of organic layers between a first electrode and an emitting layer, wherein the organic layer includes an electron blocking layer. In one embodiment, a first organic layer, an electron blocking layer, a second organic layer and an emitting layer are formed on the first electrode. The electron blocking layer has a Lowest Unoccupied Molecular Orbital (LUMO) level which is lower than that of the first organic layer. Thus, the electron blocking layer traps excess electrons injected from the emitting layer, thereby improving lifetime characteristics of the OLED.
US09054316B2 Method of manufacturing organic EL element and organic EL element
A method of manufacturing an organic EL element includes: a first step of forming a lower electrode on a substrate; a second step of forming an organic functional layer on the lower electrode; and a third step of forming an upper electrode on the organic functional layer, wherein the third step includes: a first film-forming step of forming a thin film on the organic functional layer by magnetron sputtering, the thin film being formed of material of the upper electrode; and a second film-forming step of forming, after the first film-forming step, another thin film by a film-forming process different from the magnetron sputtering on the thin film formed in the first film-forming step, said another thin film being formed of the material of the upper electrode.
US09054312B2 Method for making electrostrictive composite
A method for making an electrostrictive composite includes the following steps. Carbon nanotubes and a first polymer precursor are mixed. The first carbon nanotubes and the polymer precursor are polymerized to obtain a first material layer. A second material layer is applied to the first material layer, wherein the thermal expansion coefficient of the first material layer is different from the thermal expansion coefficient of the second material layer.
US09054305B2 Nonvolatile memory device and method of manufacturing the same
A nonvolatile memory device includes a plurality of nonvolatile memory elements each having an upper electrode, a variable resistance layer, and a lower electrode; a first insulating layer embedding the plurality of nonvolatile memory elements, and ranging from a lowermost part of the lower electrode to a position higher than an uppermost part of the upper electrode in each of the nonvolatile memory elements; a second insulating layer being formed on the first insulating layer, and having an average size of vacancies larger than an average size of vacancies included in the first insulating layer, or having an average carbon concentration higher than an average carbon concentration of the first insulating layer; and a conductive layer penetrating the second insulating layer and a part of the first insulating layer and being connected to at least one of the upper electrodes included in the nonvolatile memory elements.
US09054296B2 Semiconductor device having diode and method of forming the same
A semiconductor device includes a conductive line, a diode on the conductive line, one or more insulating patterns adjacent to diode, and a data storage region coupled to the diode. An upper surface of the diode is between the one or more insulating patterns and the data storage region. The data storage region may include a phase-change region, and the diode may taper in width between two insulating patterns in one arrangement.
US09054290B2 Electronic devices with yielding substrates
In accordance with certain embodiments, a semiconductor die is adhered directly to a yielding substrate with a pressure-activated adhesive notwithstanding any nonplanarity of the surface of the semiconductor die or non-coplanarity of the semiconductor die contacts.
US09054289B2 Light-emitting diode package and method for manufacturing the same
The present disclosure provides a light-emitting diode package, including: a carrier; a light-emitting diode chip disposed over the carrier and electrically connected to the carrier, wherein the light-emitting diode chip includes at least two recesses at corners located on a diagonal line of the light-emitting diode chip; a eutectic layer disposed between the light-emitting diode chip and the carrier, wherein the eutectic layer includes at least two metal pillars embedded into the at least two recesses respectively, wherein an upper portion of the metal pillars covers a portion of a top surface of the light-emitting diode chip. The present disclosure also provides a method for manufacturing a light-emitting diode package.
US09054282B2 Semiconductor light emitting devices with applied wavelength conversion materials and methods for forming the same
A semiconductor structure includes an active region configured to emit light upon the application of a voltage thereto, a window layer configured to receive the light emitted by the active region, and a plurality of discrete phosphor-containing regions on the window layer and configured to receive light emitted by the active region and to convert at least a portion of the received light to a different wavelength than a wavelength of light emitted by the active region. Methods of forming a semiconductor structure including an active region configured to emit light and a window layer include forming a plurality of discrete phosphor-containing regions on the window layer.
US09054279B2 Optoelectronic component disposed in a recess of a housing and electrical componenet disposed in the housing
A plastic housing is arranged on a carrier element and is provided with a recess in which an optoelectronic component is arranged. On the side facing away from the carrier element, the recess has an opening to the outside which can be provided with a transparent cover. One or more structures can be provided on the plastic housing in order to orient the cover and/or optical components relative to the optoelectronic component.
US09054268B2 Method for manufacturing absorber layer of thin film solar cell using MOCVD
A method for manufacturing an absorber layer of thin film solar cells is revealed. Firstly vapors of different metal-organic sources are generated in a plurality of containers used for mounting different metal-organic sources. Then the vapors of the metal-organic sources are mixed with a carrier gas and are filled into a reaction together with a reaction gas chamber through pipelines. Next the metals and the compounds are deposited on a substrate in the reaction chamber to form an absorber layer of a thin film solar cell. A flow rate of each metalorganic vapors filled into the reaction chamber is controlled by a mass flow controller respectively.
US09054261B2 Photodiode device and method for production thereof
The photodiode device has an electrically conductive cathode layer (3) at a photodiode layer (4) composed of a semiconductor material. Doped anode regions (5) are situated at a top side of the photodiode layer facing away from the cathode layer. A trench (14) subdivides the photodiode layer. A conductor layer (7) is arranged in or at the trench and electrically conductively connects the cathode layer with a cathode connection (11). Anode connections (12) are electrically conductively connected with the anode regions.
US09054259B2 Light-emitting device and method of manufacturing the same
The present application relates to a light-emitting device and method of manufacturing the same. The device includes a lower portion, and vertical light-emitting structures disposed on the lower portion. A conductive member partially surrounds the vertical light-emitting structures, and reflective members are disposed between the vertical light-emitting structures. The reflective members reflect light that is emitted in a lateral direction from the vertical light-emitting structures to minimize the number of times that light emitted in a lateral direction from the vertical light-emitting structure is transmitted through the light-absorbing member, thereby increasing a luminous efficiency.
US09054254B2 Solar cell and method of manufacturing solar cell
A solar cell includes a rear surface electrode layer a semiconductor layer formed on a surface of rear surface electrode layer a front surface electrode layer formed on a surface of semiconductor layer and a support layer on a surface of rear surface electrode layer at a side opposite the side where semiconductor layer is formed. Semiconductor layer includes at least one p-n junction. A plurality of through holes are provided, which through holes are cavities connecting support layer openings provided on a surface of support layer at a side opposite the side where rear surface electrode layer is formed with semiconductor layer openings provided on a surface of semiconductor layer at a side opposite the side where rear surface electrode layer is formed. Front surface electrode layer is formed in a region where semiconductor layer openings are not provided. A method of manufacturing the solar cell is also disclosed.
US09054250B2 Tempered glass substrate and method of producing the same
A tempered glass substrate of the present invention is a tempered glass substrate, which has a compression stress layer on a surface thereof, and has a glass composition comprising, in terms of mass %, 40 to 71% of SiO2, 3 to 21% of Al2O3, 0 to 3.5% of Li2O, 7 to 20% of Na2O, and 0 to 15% of K2O.
US09054248B2 Hollow photovoltaic fiber
A hollow photovoltaic fiber. The hollow photovoltaic fiber includes semiconductor formed on the inner surface of a hollow tube or on a flexible substrate subsequently formed into a hollow tube. The hollow photovoltaic fiber is suitable a variety of semiconductor devices, including solar cells. Light entering the hollow photovoltaic fiber deposits energy in the semiconductor as it travel through the tube. The hollow photovoltaic fiber exhibits improved energy conversion efficiency over planar thin film solar cells due to the large semiconductor surface area and longer light travel path provided by the tube. Embodiments of the hollow photovoltaic fiber are lightweight and flexible allowing the creation of non-planar solar cells and the applications for solar cells to extend into such areas as the manufacture of photovoltaic textiles or photovoltaic non-woven fabrics.
US09054247B2 Single-photon nano-injection detectors
Single-photon detectors, arrays of single-photon detectors, methods of using the single-photon detectors and methods of fabricating the single-photon detectors are provided. The single-photon detectors combine the efficiency of a large absorbing volume with the sensitivity of nanometer-scale carrier injectors, called “nanoinjectors”. The photon detectors are able to achieve single-photon counting with extremely high quantum efficiency, low dark count rates, and high bandwidths.
US09054246B2 Quantum dot optical devices with enhanced gain and sensitivity and methods of making same
Various embodiment include optical and optoelectronic devices and methods of making same. Under one aspect, an optical device includes an integrated circuit having an array of conductive regions, and an optically sensitive material over at least a portion of the integrated circuit and in electrical communication with at least one conductive region of the array of conductive regions. Under another aspect, a film includes a network of fused nanocrystals, the nanocrystals having a core and an outer surface, wherein the core of at least a portion of the fused nanocrystals is in direct physical contact and electrical communication with the core of at least one adjacent fused nanocrystal, and wherein the film has substantially no defect states in the regions where the cores of the nanocrystals are fused. Additional devices and methods are described.
US09054245B2 Doping an absorber layer of a photovoltaic device via diffusion from a window layer
Methods for doping an absorbent layer of a p-n heterojunction in a thin film photovoltaic device are provided. The method can include depositing a window layer on a transparent substrate, where the window layer includes at least one dopant (e.g., copper). A p-n heterojunction can be formed on the window layer, with the p-n heterojunction including a photovoltaic material (e.g., cadmium telluride) in an absorber layer. The dopant can then be diffused from the window layer into the absorber layer (e.g., via annealing).
US09054242B2 Process for the production of a MWT silicon solar cell
A process for the production of a MWT silicon solar cell comprising the steps: (1) providing an n-type silicon wafer with (i) holes forming vias between the front-side and the back-side of the wafer and (ii) a p-type emitter extending over the entire front-side and the inside of the holes, (2) applying a conductive metal paste to the holes of the silicon wafer to provide at least the inside of the holes with a metallization, (3) drying the applied conductive metal paste, and (4) firing the dried conductive metal paste, whereby the wafer reaches a peak temperature of 700 to 900° C., wherein the conductive metal paste has no or only poor fire-through capability and comprises (a) at least one particulate electrically conductive metal selected from the group consisting of silver, copper and nickel, (b) at least one particulate p-type dopant, and (c) an organic vehicle.
US09054241B2 Back contact electrodes for cadmium telluride photovoltaic cells
A method for forming a back contact for a photovoltaic cell that includes at least one semiconductor layer is provided. The method includes applying a continuous film of a chemically active material on a surface of the semiconductor layer and activating the chemically active material such that the activated material etches the surface of the semiconductor layer. The method further includes removing the continuous film of the activated material from the photovoltaic cell and depositing a metal contact layer on the etched surface of the semiconductor layer.
US09054237B2 Interdigitated back contact silicon solar cells fabrication using diffusion barriers
Interdigitated back contact (IBC) solar cells are produced by depositing spaced-apart parallel pads of a first dopant bearing material (e.g., boron) on a substrate, heating the substrate to both diffuse the first dopant into corresponding first (e.g., p+) diffusion regions and to form diffusion barriers (e.g., borosilicate glass) over the first diffusion regions, and then disposing the substrate in an atmosphere containing a second dopant (e.g., phosphorus) such that the second dopant diffuses through exposed surface areas of the substrate to form second (e.g., n+) diffusion regions between the first (p+) diffusion regions (the diffusion barriers prevent the second dopant from diffusion into the first (p+) diffusion regions). The substrate material along each interface between adjacent first (p+) and second (n+) diffusion regions is then removed (e.g., using laser ablation) such that elongated grooves, which extend deeper into the substrate than the diffused dopant, are formed between adjacent diffusion regions.
US09054229B2 Semiconductor light emitting device
According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a second semiconductor layer, a light emitting layer, a dielectric layer, a first electrode, a second electrode and a support substrate. The first layer has a first and second surface. The second layer is provided on a side of the second surface of the first layer. The emitting layer is provided between the first and the second layer. The dielectric layer contacts the second surface and has a refractive index lower than that of the first layer. The first electrode includes a first and second portion. The first portion contacts the second surface and provided adjacent to the dielectric layer. The second portion contacts with an opposite side of the dielectric layer from the first semiconductor layer. The second electrode contacts with an opposite side of the second layer from the emitting layer.
US09054227B2 Micro electro mechanical system, semiconductor device, and manufacturing method thereof
The present invention provides a MEMS and a sensor having the MEMS which can be formed without a process of etching a sacrifice layer. The MEMS and the sensor having the MEMS are formed by forming an interspace using a spacer layer. In the MEMS in which an interspace is formed using a spacer layer, a process for forming a sacrifice layer and an etching process of the sacrifice layer are not required. As a result, there is no restriction on the etching time, and thus the yield can be improved.
US09054224B2 Method for the wafer-level integration of shape memory alloy wires
The present invention relates to a method to attach a shape memory alloy wire to a substrate, where the wire is mechanically attached into a 3D structure on the substrate. The present invention also relates to a device comprising a shape memory alloy wire attached to a substrate, where the wire is mechanically attached into a 3D structure on the substrate.
US09054223B2 Varistor in base for MEMS microphones
A micro electro mechanical system (MEMS) apparatus includes a substrate. The substrate includes a first surface and a second surface. The first surface and the second surface are on opposing sides of the substrate. A programming contact pad is disposed on the second surface of the substrate. A MEMS device is disposed on the first surface of the substrate. An integrated circuit is disposed on the first surface of the substrate and electrically connected to the MEMS device and the contact pad. An anti-fuse region is coupled to the pad and to ground. When the anti-fuse region is not fused, a first electrical path exists from the programming contact pad to the integrated circuit. When the anti-fuse region is fused, a second electrical path is created from the programming contact pad to ground and the first electrical path is no longer available for programming purposes.
US09054216B2 Methods of forming a vertical transistor
Trenches are formed into semiconductive material. Masking material is formed laterally over at least elevationally inner sidewall portions of the trenches. Conductivity modifying impurity is implanted through bases of the trenches into semiconductive material there-below. Such impurity is diffused into the masking material received laterally over the elevationally inner sidewall portions of the trenches and into semiconductive material received between the trenches below a mid-channel portion. An elevationally inner source/drain is formed in the semiconductive material below the mid-channel portion. The inner source/drain portion includes said semiconductive material between the trenches which has the impurity therein. A conductive line is formed laterally over and electrically coupled to at least one of opposing sides of the inner source/drain. A gate is formed elevationally outward of and spaced from the conductive line and laterally adjacent the mid-channel portion. Other embodiments are disclosed.
US09054213B2 FinFET with metal gate stressor
A gate stressor for a fin field effect transistor (FinFET) device is provided. The gate stressor includes a floor, a first stressor sidewall, and a second stressor sidewall. The floor is formed on a first portion of a gate layer. The gate layer is disposed above a shallow trench isolation (STI) region. The first stressor sidewall formed on a second portion of the gate layer. The second portion of the gate layer is disposed on sidewalls of a fin. The second stressor sidewall formed on the third portion of the gate layer. The third portion of the gate layer is disposed on sidewalls of a structure spaced apart from the fin. The first stressor side wall and the second stressor sidewall do not exceed a height of the fin.
US09054206B2 Method for manufacturing semiconductor device
After a gate insulating film is formed over a gate electrode, in order to improve the quality of a microcrystalline semiconductor film which is formed in an early stage of deposition, a film near an interface with the gate insulating film is formed under a first deposition condition in which a deposition rate is low but the quality of a film to be formed is high, and then, a film is further deposited under a second deposition condition in which a deposition rate is high. Then, a buffer layer is formed to be in contact with the microcrystalline semiconductor film. Further, plasma treatment with a rare gas such as argon or hydrogen plasma treatment is performed before formation of the film under the first deposition condition for removing adsorbed water on a substrate.
US09054198B2 Pixel unit structure, array substrate and display device
The invention discloses a pixel unit structure, an array substrate and a display device and relates to the technical field of liquid crystal displays. The pixel unit structure has a storage capacitor and has a high aperture ratio and a low manufacturing cost of the pixel unit. The pixel unit structure comprises a thin film transistor (TFT) and a first barrier layer, wherein the first barrier layer is opposite to a drain region of an active layer of the TFT, and is connected to a common electrode of an array substrate, thereby a capacitor can be formed between the first barrier layer and the drain region of the active layer.
US09054197B2 Thin-film transistor, display unit, and electronic apparatus
A thin-film transistor includes: a gate electrode; a gate insulating film disposed on the gate electrode; an oxide semiconductor layer disposed on the gate insulating film and having a channel region located to face the gate electrode; a channel protective layer disposed on the gate insulating film and the oxide semiconductor layer; and source and drain electrodes each connected to the oxide semiconductor layer through a connection hole formed in the channel protective layer, in which the oxide semiconductor layer has, in a part of the channel region, a narrow region with a narrower width than a width of the connection hole.
US09054196B2 Sputtering target comprising an oxide sintered body comprising In, Ga, and Zn
A thin film transistor including an active layer, and has a field-effect mobility of 25 cm2/Vs or more, the active layer being formed of an oxide that includes In, Ga, and Zn in an atomic ratio that falls within the following region 1, region 2, or region 3, the region 1 being defined by 0.58≦In/(In+Ga+Zn)≦0.68 and 0.15
US09054191B2 High ion and low sub-threshold swing tunneling transistor
Devices and manufacturing methods thereof are presented. The device includes a substrate and a fin-type transistor disposed on the substrate. The transistor includes a fin structure that protrudes from the substrate to serve as a source of the transistor. The fin structure is doped with dopants of a first polarity. The transistor also includes a gate layer formed over and around a first end of the fin structure to serve as a gate of the transistor. A drain layer is disposed over the fin structure and adjacent to the gate layer to serve as a drain of the transistor. The drain layer is doped with dopants of a second polarity opposite the first polarity.
US09054188B2 Curved wafer processing on method and apparatus
An apparatus for and a method of forming a semiconductor structure is provided. The apparatus includes a substrate holder that maintains a substrate such that the processing surface is curved, such as a convex or a concave shape. The substrate is held in place using point contacts, a plurality of continuous contacts extending partially around the substrate, and/or a continuous ring extending completely around the substrate. The processing may include, for example, forming source/drain regions, channel regions, silicides, stress memorization layers, or the like.
US09054184B2 Semiconductor device and method of forming the same
A semiconductor device includes a semiconductor substrate having a first gate groove having first and second side walls facing to each other. A first gate insulating film covers the first and second side walls. A first gate electrode is disposed on the first gate insulating film and in a lower portion of the first gate groove. A first burying insulating film buries the first gate groove and covers the first gate electrode. A first diffusion region is adjacent to a first upper portion of the first gate insulating film. The first upper portion is positioned on an upper portion of the first side wall of the first gate groove. A second diffusion region is in contact with an upper portion of the second side wall of the first gate groove.
US09054183B2 Trenched and implanted accumulation mode metal-oxide-semiconductor field-effect transistor
The present invention provides AccuFETs with single or dual accumulation channels and methods for manufacturing the same. The present invention also provides for products produced by the methods of the present invention and for apparatuses used to perform the methods of the present invention.
US09054176B2 Multi-step and asymmetrically shaped laser beam scribing
Methods of dicing substrates by both laser scribing and plasma etching are disclosed. A method includes laser ablating material layers, the ablating leading with a first irradiance and following with a second irradiance, lower than the first. Multiple passes of a beam adjusted to have different fluence level or multiple laser beams having various fluence levels may be utilized to ablate mask and IC layers to expose a substrate with the first fluence level and then clean off redeposited materials from the trench bottom with the second fluence level. A laser scribe apparatus employing a beam splitter may provide first and second beams of different fluence from a single laser.
US09054174B2 Semiconductor device and method for producing the same
In a MOSFET using a SiC substrate, a source region having low resistance and high injection efficiency is formed without performing a high-temperature heat treatment.A vertical Schottky barrier transistor in which a source region SR on a SiC epitaxial substrate is constituted by a metal material is formed. The source region SR composed of a metal material can be brought into a low resistance state without performing a high-temperature activation treatment. Further, by segregating a conductive impurity DP at an interface between the source region SR composed of a metal material and the SiC epitaxial substrate, the Schottky barrier height can be reduced, and the carrier injection efficiency from the source region SR can be improved.
US09054169B2 Strained InGaAs quantum wells for complementary transistors
An InGaAs n-channel quantum well heterostructure for use in a complementary transistor having a Sb-based p-channel. The heterostructure includes a buffer layer having a lattice constant intermediate that of the n- and p-channel materials and which is configured to accommodate the strain produced by a lattice-constant mismatch between the n-channel and p-channel materials.
US09054165B2 Semiconductor devices including a through-substrate conductive member with an exposed end
Semiconductor devices and methods of manufacturing semiconductor devices. One example of a method of fabricating a semiconductor device comprises forming a conductive feature extending through a semiconductor substrate such that the conductive feature has a first end and a second end opposite the first end, and wherein the second end projects outwardly from a surface of the substrate. The method can further include forming a dielectric layer over the surface of the substrate and the second end of the conductive feature such that the dielectric layer has an original thickness. The method can also include removing a portion of the dielectric layer to an intermediate depth less than the original thickness such that at least a portion of the second end of the conductive feature is exposed.
US09054160B2 Interconnect structure and method for fabricating on-chip interconnect structures by image reversal
An interconnect structure includes a patterned and cured dielectric layer located directly on a surface of a patterned permanent antireflective coating. The patterned and cured dielectric layer and the permanent antireflective coating form shaped openings. The shaped openings include an inverse profile which narrows towards a top of the shaped openings. A conductive structure fills the shaped openings wherein the patterned and cured dielectric layer and the permanent antireflective coating each have a conductively filled region.
US09054157B2 High performance on-chip vertical coaxial cable, method of manufacture and design structure
A high performance on-chip vertical coaxial cable structure, method of manufacturing and design structure thereof is provided. The coaxial cable structure includes an inner conductor and an insulating material that coaxially surrounds the inner conductor. The structure further includes an outer conductor which surrounds the insulating material. Both the inner and outer conductors comprise a plurality of metal layers formed on different wiring levels and interconnected between the different wiring levels by conductors. The coaxial cable structure is formed upon a surface of a semiconductor substrate and is oriented in substantially perpendicular alignment with the surface.
US09054149B2 Semiconductor device with diagonal conduction path
A method of fabricating a bipolar transistor including emitter and base regions having first and second conductivity types, respectively, includes forming an isolation region at a surface of a semiconductor substrate, the isolation region having an edge that defines a boundary of an active area of the emitter region, and implanting dopant of the second conductivity type through a mask opening to form the base region in the semiconductor substrate. The mask opening spans the edge of the isolation region such that an extent to which the dopant passes through the isolation region varies laterally to establish a variable depth contour of the base region.
US09054143B2 Packaging for substrates and packaging unit having such packaging
A packaging for substrates, in particular for metal-ceramic substrates, having a tray-like packaging part formed from a sheet material, for example a plastic sheet material by deep drawing. The packaging has at least one seat formed by an indentation in an upper base section of the packaging part for a plurality of substrates collected together into a substrate stack or part stack.
US09054139B2 Chemical liquid supplying apparatus
In a chemical liquid supplying apparatus 10a for discharging chemical liquid by expanding and contracting a pump chamber 16 which communicates with a chemical liquid inlet 21 and a chemical liquid outlet 22, the apparatus has a cylinder 12 in which a piston 31 is accommodated and reciprocally movable in an axial direction. A bellows 35 which is elastically deformable in the axial direction is mounted to a cylinder hole 30 between the tip of a connection rod 34 and the cylinder 12. On the inside of the bellows 35, an expanding/contracting chamber 37 is formed as a compartment between the connection rod 34 and the bellows 35, a pressure chamber 38 which communicates with the expanding/contracting chamber 37 is provided on the tip side of the piston 31, and an incompressible indirect medium 39 is enclosed in the expanding/contracting chamber 37 and the pressure chamber 38. The average effective diameter D2 of this bellows 35 is set so as to be smaller than the outer diameter D1 of a sliding surface 32 of the piston 31.
US09054124B2 Electrostatic discharge resistant diodes
A diode and a method for an electrostatic discharge resistant diode. The method includes, for example, receiving a wafer. The wafer includes a silicon layer electrically isolated from a silicon substrate by a buried oxide (BOX) layer. The BOX layer is in physical contact with the silicon layer and the silicon substrate. An N-type well is implanted in the silicon substrate. Furthermore, a vertical column of P+ doped epitaxial silicon and a vertical column of N+ doped epitaxial silicon are formed over the N-type well and extend through the BOX layer and the silicon layer. Both vertical columns may form electrical junctions with the N-type well.
US09054120B2 Semiconductor device, semiconductor device design method, semiconductor device design apparatus, and program
A semiconductor device includes a semiconductor chip, the semiconductor chip including a substrate, a multilayer interconnect layer formed over the substrate, an outer peripheral cell column disposed along an edge of the substrate in a plan view, the outer peripheral cell column having at least one first I/O cell, and an inner peripheral cell column formed at an inner peripheral side of the outer peripheral cell column, the inner peripheral cell column having at least one second I/O cell.
US09054118B2 Heat dissipating semiconductor device packages and related methods
An embodiment of a method for making semiconductor device packages includes a heat sink matrix and a substrate. A plurality of semiconductor devices is attached to the substrate. Then, a package body is formed between the heat sink matrix and the substrate, wherein the package body encapsulates the semiconductor devices. Then, a plurality of first cutting slots is formed, wherein the first cutting slots extend through the heat sink matrix and partially extend into the package body. Then, a plurality of second cutting slots is formed, wherein the second cutting slots extend through the substrate and through the package body to the first cutting slot, thereby singulating the heat sink matrix and substrate into a plurality of individual semiconductor device packages.
US09054116B2 Manufacturing method of substrate for a semiconductor package, manufacturing method of semiconductor package, substrate for a semiconductor package and semiconductor package
A manufacturing method of a substrate for a semiconductor package includes a resist layer forming step to form a resist layer on a surface of a conductive substrate; an exposure step to expose the resist layer using a glass mask with a mask pattern including a transmission area, a light shielding area, and an intermediate transmission area, wherein transmittance of the intermediate transmission area is lower than that of the transmission area and is higher than that of the light shielding area; a development step to form a resist pattern including a hollow with a side shape including a slope part decreasing in hollow circumference as the hollow circumference approaches the substrate; and a plating step to plate on an exposed area to form a metal layer with a side shape including a slope part decreasing in circumference as the circumference approaches the substrate.
US09054112B2 Semiconductor device comprising a die seal having an integrated alignment mark
In semiconductor devices, the alignment mark for performing alignment processes of measurement tools and the like may be positioned within the die seal area on the basis of a geometric configuration, which still preserves mechanical integrity of the die seal without compromising the spatial information encoded into the alignment marks. For example, L-shaped alignment marks may be provided at one or more corners of the die seal area.
US09054108B2 Random local metal cap layer formation for improved integrated circuit reliability
A method and structure for preventing integrated circuit failure due to electromigration and time dependent dielectric breakdown is disclosed. A randomly patterned metal cap layer is selectively formed on the metal interconnect lines (typically copper (Cu)) with an interspace distance between metal cap segments that is less than the critical length (for short-length effects). Since the diffusivity is lower for the Cu/metal cap interface than for the Cu/dielectric cap interface, the region with a metal cap serves as a diffusion barrier.
US09054106B2 Semiconductor structure and method for manufacturing the same
A semiconductor structure and a method for manufacturing the same are provided. A semiconductor structure includes a device substrate, a conductive film, a dielectric film and a conductive plug. The device substrate includes a semiconductor substrate and a conductive structure on an active surface of the semiconductor substrate. The device substrate has a substrate opening passing through the semiconductor substrate and exposing the conductive structure. The conductive film, the conductive plug and the dielectric film between the conductive film and the conductive plug are disposed in the substrate opening.
US09054105B2 Semiconductor package and method for fabricating the same
A semiconductor package includes a mounting board including a bonding pad, first and second semiconductor chips sequentially stacked on the mounting board, a first wire connecting a first region of the bonding pad to a chip pad of the first semiconductor chip, and a second wire connecting the first region of the bonding pad to a chip pad of the second semiconductor chip, the second wire having a reverse loop configuration.
US09054102B2 Semiconductor device and a manufacturing method thereof
The performances of a semiconductor device are improved. The device includes a first MISFET in which hafnium is added to the gate electrode side of a first gate insulation film including silicon oxynitride, and a second MISFET in which hafnium is added to the gate electrode side of a second gate insulation film including silicon oxynitride. The hafnium concentration in the second gate insulation film of the second MISFET is set smaller than the hafnium concentration in the first gate insulation film of the first MISFET; and the nitrogen concentration in the second gate insulation film of the second MISFET is set smaller than the nitrogen concentration in the first gate insulation film of the first MISFET. As a result, the threshold voltage of the second MISFET is adjusted to be smaller than the threshold voltage of the first MISFET.
US09054098B2 Integrated circuit packaging system with redistribution layer and method of manufacture thereof
A method of manufacture of an integrated circuit packaging system includes: forming a peripheral interconnect having a bond finger and a contact pad with a trace in direct contact with the bond finger and the contact pad, the bond finger vertically offset from the contact pad; connecting an integrated circuit die and the bond finger; and forming a module encapsulation on the integrated circuit die, the bond finger and the trace exposed from the module encapsulation.
US09054097B2 Compliant printed circuit area array semiconductor device package
An integrated circuit (IC) package for an IC device, and a method of making the same. The IC package includes an interconnect assembly with at least one printed compliant layer, a plurality of first contact members located along a first major surface, a plurality of second contact members located along a second major surface, and a plurality of printed conductive traces electrically coupling a plurality of the first and second contact members. The compliant layer is positioned to bias at least the first contact members against terminals on the IC device. Packaging substantially surrounds the IC device and the interconnect assembly. The second contact members are accessible from outside the packaging.
US09054096B2 Noise attenuation wall
An embodiment of an apparatus is disclosed. For this embodiment of the apparatus, an interposer has first vias. First interconnects and second interconnects respectively are coupled on opposite surfaces of the interposer. A first portion of the first interconnects and a second portion of the first interconnects are spaced apart from one another defining an isolation region between them. A substrate has second vias. Third interconnects and the second interconnects are respectively coupled on opposite surfaces of the package substrate. A first portion of the first vias and a first portion of the second vias are both in the isolation region and are coupled to one another with a first portion of the second interconnects.
US09054093B2 Semiconductor device
A semiconductor chip and a wiring board are coupled to each other through conductor posts. The centers of conductor posts situated above openings at the outermost periphery shift from the centers of the openings in a direction away from the center of the semiconductor chip. When a region where each of the conductor posts and an insulating layer are overlapped with each other is designated as an overlapped region, the width of the overlapped region more on the inner side than the opening is smaller than the width of the overlapped region more on the outer side than the opening. Thus, while stress applied to the conductor posts is relaxed, coupling reliability between the semiconductor chip and the wiring board is retained.
US09054091B2 Hybrid packaged lead frame based multi-chip semiconductor device with multiple semiconductor chips and multiple interconnecting structures
A hybrid packaging multi-chip semiconductor device comprises a lead frame unit, a first semiconductor chip, a second semiconductor chip, a first interconnecting structure and a second interconnecting structure, wherein the first semiconductor chip is attached on a first die paddle and the second semiconductor chip is flipped and attached on a third pin and a second die paddle, the first interconnecting structure electrically connecting a first electrode at a front surface of the first semiconductor chip and a third electrode at a back surface of the second semiconductor chip and a second electrode at the front surface of the first semiconductor chip is electrically connected by second interconnecting structure.
US09054086B2 Module having a stacked passive element and method of forming the same
A module having a discrete passive element and a semiconductor device, and method of forming the same. In one embodiment, the module includes a patterned leadframe, a discrete passive element mounted on an upper surface of the leadframe, and a thermally conductive, electrically insulating material formed on an upper surface of the discrete passive element. The module also includes a semiconductor device bonded to an upper surface of the thermally conductive, electrically insulating material.
US09054082B2 Semiconductor package, semiconductor device, and method for manufacturing semiconductor package
A semiconductor device includes a semiconductor chip, a core substrate, first and second insulating layers, and first and second wiring layers. Adhesiveness of the insulating layer to a metal is higher than adhesiveness of the core substrate to the metal. A through hole extends through the insulating layer in the thickness direction. A through via covers the hole wall surface of the through hole, extends in the thickness direction traversing the insulating layer, and electrically connects the first and second wiring layers.
US09054075B2 Strip-shaped gate tunneling field effect transistor with double-diffusion and a preparation method thereof
The present invention discloses a strip-shaped gate-modulated tunneling field effect transistor with double-diffusion and a preparation method thereof, belonging to a field of CMOS field effect transistor logic device and the circuit. The tunneling field effect transistor includes a semiconductor substrate, a highly-doped source region, a highly-doped drain region, a double-diffusion source region, a gate dielectric layer, and a control gate, wherein the control gate has a strip-shaped structure with a gate length greater than a gate width, and at one side thereof is connected to the highly-doped drain region and at the other side thereof extends laterally into the highly-doped source region; a region located below the control gate is a channel region; the gate width of the control gate is less than twice width of a source depletion layer; the double-diffusion region has the same doping region as the highly-doped source region and the double-diffusion region has the same doping type as the highly-doped drain region; and the channel region located below a portion of the control gate portion in the highly-doped source region has double-diffusion source doped impurities. The TFET device according to the invention improves its performance, and the preparation method thereof is simple.
US09054064B2 Stacked interconnect heat sink
A heat spreader that is configured to be attached to an integrated circuit substrate. The heat spreader includes a thermally conductive core and a heat spreader via that passes through the thermally conductive core. A connection point of the thermally conductive core is configured to form a solder connection to an integrated circuit substrate plug.
US09054059B2 Flexible organic electroluminescent device
The present invention relates to a flexible organic electroluminescent device, and the invention disclosed herein includes a switching thin film transistor and a drive thin film transistor formed at the each pixel region on a substrate; a first electrode connected to a drain electrode of the drive thin film transistor, and formed at the each pixel region; a bank formed on the display area and non-display area of the substrate; a spacer formed on a bank in the non-display area, and disposed in the vertical direction in parallel to a lateral surface of the display area; an organic light emitting layer separately formed for each pixel region; a second electrode formed on an entire surface of the organic light emitting layer; an organic layer formed on an entire surface of the substrate; a barrier film located to face the substrate.
US09054044B2 Method for forming a semiconductor device and semiconductor device structures
Semiconductor device structures and methods for forming a semiconductor device are provided. In embodiments, one or more fins are provided, each of the one or more fins having a lower portion and an upper portion disposed on the lower portion. The lower portion is embedded in a first insulating material. The shape of the upper portion is at least one of a substantially triangular shape and a substantially rounded shape and a substantially trapezoidal shape. Furthermore, a layer of a second insulating material different from the first insulating material is formed on the upper portion.
US09054043B2 Method for directed self-assembly (DSA) of block copolymers
In directed self-assembly (DSA) of a block copolymer (BCP), a patterned sublayer on a substrate serves as a guiding chemical prepattern on which BCPs form more uniform and/or denser patterns. A layer of a blend of a BCP and functional homopolymers, referred to as inks, is deposited on the patterned sublayer and annealed to change the initial chemical prepattern to a 1:1-like chemical pattern that is more favorable to DSA. After annealing, the inks selectively distribute into blocks by DSA, and part of the inks graft on the substrate underneath the blocks. The BCP blend layer is then rinsed away, leaving the grafted inks A second layer of BCP is then deposited and annealed as a second DSA step to form alternating lines of the BCP components. One of the BCP components is removed, leaving lines of the other BCP component as a mask for patterning the substrate.
US09054041B2 Methods for etching dielectric materials in the fabrication of integrated circuits
Methods for etching dielectric materials in the fabrication of integrated circuits are disclosed herein. In one exemplary embodiment, a method for fabricating an integrated circuit includes forming a layer of a first dielectric material over a gate electrode structure formed on a semiconductor substrate. The gate electrode structure includes a horizontal top surface and sidewall vertical surfaces adjacent to the horizontal top surface. The method further includes forming a layer of a second dielectric material over the layer of the first dielectric material. The first dielectric material is different than the second dielectric material. Still further, the method includes applying an etchant to the second material that fully removes the second material from the sidewall vertical surfaces while only partially removing the second material from the horizontal top surface and while substantially not removing any of the layer of the first dielectric material.
US09054035B2 Increasing the doping efficiency during proton irradiation
A description is given of a method for doping a semiconductor body, and a semiconductor body produced by such a method. The method comprises irradiating the semiconductor body with protons and irradiating the semiconductor body with electrons. After the process of irradiating with protons and after the process of irradiating with electrons, the semiconductor body is subjected to heat treatment in order to attach the protons to vacancies by means of diffusion.
US09054031B2 Embedded non-volatile memory
The present invention is a method of incorporating a non-volatile memory into a CMOS process that requires four or fewer masks and limited additional processing steps. The present invention is an epi-silicon or poly-silicon process sequence that is introduced into a standard CMOS process (i) after the MOS transistors' gate oxide is formed and the gate poly-silicon is deposited (thereby protecting the delicate surface areas of the MOS transistors) and (ii) before the salicided contacts to those MOS transistors are formed (thereby performing any newly introduced steps having an elevated temperature, such as any epi-silicon or poly-silicon deposition for the formation of diodes, prior to the formation of that salicide). A 4F2 memory array is achieved with a diode matrix wherein the diodes are formed in the vertical orientation.
US09054030B2 Memory cells, semiconductor device structures, memory systems, and methods of fabrication
Memory cells are disclosed. Magnetic regions within the memory cells include an alternating structure of magnetic sub-regions and coupler sub-regions. The coupler material of the coupler sub-regions antiferromagnetically couples neighboring magnetic sub-regions and effects or encourages a vertical magnetic orientation exhibited by the neighboring magnetic sub-regions. Neighboring magnetic sub-regions, spaced from one another by a coupler sub-region, exhibit oppositely-directed magnetic orientations. The magnetic and coupler sub-regions may each be of a thickness tailored to form the magnetic region in a compact structure. Interference between magnetic dipole fields emitted from the magnetic region on switching of a free region in the memory cell may be reduced or eliminated. Also disclosed are semiconductor device structures, spin torque transfer magnetic random access memory (STT-MRAM) systems, and methods of fabrication.
US09054027B2 III-nitride device and method having a gate isolating structure
A semiconductor device containing a GaN FET has an isolating gate structure outside the channel area which is operable to block current in the two-dimensional electron gas between two regions of the semiconductor device. The isolating gate structure is formed concurrently with the gate of the GaN FET, and has a same structure as the gate.
US09054013B2 Method of making 3D integration microelectronic assembly for integrated circuit devices
A microelectronic assembly for packaging/encapsulating IC devices, which includes a crystalline substrate handler having opposing first and second surfaces and a cavity formed into the first surface, a first IC device disposed in the cavity and a second IC device mounted to the second surface, and a plurality of interconnects formed through the crystalline substrate handler. Each of the interconnects includes a hole formed through the crystalline substrate handler from the first surface to the second surface, a compliant dielectric material disposed along the hole's sidewall, and a conductive material disposed along the compliant dielectric material and extending between the first and second surfaces. The compliant dielectric material insulates the conductive material from the sidewall. The second IC device, which can be an image sensor, is electrically coupled to the conductive materials of the plurality of interconnects. The first IC can be a processor for processing the signals from the image sensor.
US09054012B2 Radiation detection apparatus and method of manufacturing the same
A method of manufacturing a radiation detection apparatus is provided. On a sensor substrate on which a pixel array is formed, a scintillator layer that covers the pixel array, a sealing layer that covers a side face of the scintillator layer, and a protection layer that covers an upper face of the scintillator layer and an upper face of the sealing layer are formed. The sensor substrate, the sealing layer, and the protection layer along a side of the pixel array are cut such that a cut surface of the sensor substrate, a cut surface of the sealing layer, and a cut surface of the protection layer are arranged on the same plane.
US09054004B2 Pixel isolation structures in backside illuminated image sensors
Systems and methods are provided for fabricating a backside illuminated image sensor including an array of pixels. An example image sensor includes a first pixel, a second pixel, and an isolation structure. The first pixel is disposed in a front side of a substrate and is configured to generate charged carriers in response to light incident upon a backside of the substrate. The second pixel is disposed in the front side of the substrate and is configured to generate charged carriers in response to light incident upon the backside of the substrate. The isolation structure is disposed to separate the second pixel from the first pixel, and extends from the backside of the substrate toward the front side of the substrate. The isolation structure includes a sidewall substantially vertically to the front side of the substrate.
US09053991B2 Semiconductor device
Disclosed is a semiconductor device suppressed in decrease of reliability. The semiconductor device comprises an electrode pad portion (2) formed on the upper surface of a semiconductor substrate (1), a passivation layer (3) so formed on the upper surface of the semiconductor substrate (1) as to overlap a part of the electrode pad portion (2) and having a first opening portion (3a) where the upper surface of the electrode pad portion (2) is exposed, a barrier metal layer (5) formed on the electrode pad portion (2), and a solder bump (6) formed on the barrier metal layer (5). The barrier metal layer (5) is formed such that an outer peripheral end (5b) lies within the first opening portion (3a) of the passivation layer (3) when viewed in plan.
US09053983B2 Semiconductor device and method for manufacturing the same
Provided is a bottom-gate transistor including an oxide semiconductor, in which electric-field concentration which might occur in the vicinity of an end portion of a drain electrode layer (and the vicinity of an end portion of a source electrode layer) when a high gate voltage is applied to a gate electrode layer is reduced and degradation of switching characteristics is suppressed, so that the reliability is improved. The cross-sectional shape of an insulating layer which overlaps over a channel formation region is a tapered shape. The thickness of the insulating layer which overlaps over the channel formation region is 0.3 μm or less, preferably 5 nm or more and 0.1 μm or less. The taper angle θ of a lower end portion of the cross-sectional shape of the insulating layer which overlaps over the channel formation region is 60° or smaller, preferably 45° or smaller, further preferably 30° or smaller.
US09053982B2 Local tailoring of fingers in multi-finger fin field effect transistors
A cluster of semiconductor fins is formed on an insulator layer. A masking material layer is formed over the array of semiconductor fins such that spaces between adjacent semiconductor fins are filled with the masking material layer. A photoresist layer is applied over the masking material layer, and is lithographically patterned. The masking material layer is etched to physically expose a sidewall surface of a portion of an outermost semiconductor fin in regions not covered by the photoresist layer. A recessed region is formed in the insulator layer such that an edge of the recessed region is formed within an area from which a portion of the semiconductor fin is removed. The photoresist layer and the masking material layer are removed. Within the cluster, a region is provided that has a lesser number of semiconductor fins than another region in which semiconductor fins are not etched.
US09053981B2 Hybrid CMOS nanowire mesh device and PDSOI device
A semiconductor hybrid structure on an SOI substrate. A first portion of the SOI substrate contains a nanowire mesh device and a second portion of the SOI substrate contains a partially depleted semiconductor on insulator (PDSOI) device. The nanowire mesh device includes stacked and spaced apart semiconductor nanowires located on the SOI substrate with each semiconductor nanowire having two end segments in which one of the end segments is connected to a source region and the other end segment is connected to a drain region. The nanowire mesh device further includes a gate region over at least a portion of the stacked and spaced apart semiconductor nanowires. The PDSOI device includes a partially depleted semiconductor layer on the substrate, and a gate region over at least a portion of the partially depleted semiconductor layer.
US09053980B2 Monolithic integration of photonics and electronics in CMOS processes
Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on two CMOS wafers with different silicon layer thicknesses for the photonic and electronic devices with at least a portion of each of the wafers bonded together, where a first of the CMOS wafers includes the photonic devices and a second of the CMOS wafers includes the electronic devices. The electrical devices may be coupled to optical devices utilizing through-silicon vias. The different thicknesses may be fabricated utilizing a selective area growth process. Cladding layers may be fabricated utilizing oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafers. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions.
US09053978B2 Erase system and method of nonvolatile memory device
An erase system and method of a nonvolatile memory device includes supplying an erase voltage to a plurality of memory cells of a nonvolatile memory, performing a read operation with a read voltage to word lines of the plurality of memory cells, and performing an erase verification operation with an erase verification voltage to at least one of the word lines of the plurality of memory cells, the erase verification voltage lower than the read voltage.
US09053972B1 Pillar bump formed using spot-laser
A pillar bump, such as a copper pillar bump, is formed on an integrated circuit chip by applying a metallic powder over a conductive pad on a surface of the chip. The metallic powder is selectively spot-lasered to form the pillar bump. Any remaining unsolidified metallic powder may be removed from the surface of the chip. This process may be repeated to increase the bump height. Further, a solder cap may be formed on an outer surface of the pillar bump.
US09053968B2 Semiconductor package structure and manufacturing method thereof
A method of manufacturing a semiconductor package structure is provided. A supporting plate and multiple padding patterns on an upper surface of the supporting plate define a containing cavity. Multiple leads electrically insulated from one another are formed on the padding patterns, extend from top surfaces of the padding patterns along side surfaces to the upper surface and are located inside the containing cavity. A chip is mounted inside the containing cavity, electrically connected to the leads. A molding compound is formed to encapsulate at least the chip, a portion of the leads and a portion of the supporting plate, fill the containing cavity and gaps among the padding patterns, and exposes a portion of the leads on the top surface. The supporting plate is removed to expose a back surface of each padding pattern, a bottom surface of the molding compound and a lower surface of each lead.
US09053957B2 Structure and method for creating a reusable template for detachable thin film substrates
A structure and method operable to create a reusable template for detachable thin semiconductor substrates is provided. The reusable template has a three-dimensional (3-D) surface topography comprising a plurality of raised areas comprising a rounded top and separated by a plurality of depressed areas.
US09053953B1 Integrated circuit packaging system with underfill and method of manufacture thereof
An integrated circuit packaging system, and a method of manufacture thereof, including: a device formed as a die having a conductor with ends exposed on opposite sides of the die; a first surface depression on the device, the first surface depression surrounding one of the ends of the conductor exposed at a stack side of the die; a first component over and connected to the conductor, the first component surrounded by the first surface depression; and a first underfill between and in direct contact with the first component and the device, the first underfill substantially filled to a side of an inner edge and within a perimeter of the first surface depression isolated from the conductor.
US09053939B2 Heterojunction bipolar transistor with epitaxial emitter stack to improve vertical scaling
A heterojunction bipolar transistor (HBT) may include an n-type doped crystalline collector formed in an upper portion of a crystalline silicon substrate layer; a p-type doped crystalline p+Si1-xGex layer, formed above the n-type doped collector, that forms a p-type doped internal base of the HBT; a crystalline silicon cap formed on the p-type doped crystalline p+Si1-xGex layer, in which the crystalline silicon cap includes an n-type impurity and forms an n-type doped emitter of the HBT; and an n-type doped crystalline silicon emitter stack formed within an opening through an insulating layer to an upper surface of the crystalline silicon cap.
US09053924B2 Cleaning agent for silicon wafer
A cleaning agent for a silicon wafer (a first cleaning agent) contains at least a water-based cleaning liquid and a water-repellent cleaning liquid for providing at least a recessed portion of an uneven pattern with water repellency during a cleaning process. The water-based cleaning liquid is a liquid in which a water-repellent compound having a reactive moiety chemically bondable to Si element in the silicon wafer and a hydrophobic group, and an organic solvent including at least an alcoholic solvent are mixed and contained. With this cleaning agent, the cleaning process which tends to induce a pattern collapse can be improved.
US09053922B2 Method of manufacturing an electrode for a gas discharge lamp
The invention describes a method of manufacturing an electrode (1) for a gas-discharge lamp, which method comprises forming an electrode shaft (10); forming a coil (2) over a winding length (L W); arranging the coil (2) on the electrode shaft (10); and melting material of the coil (2) such that, when the melted coil material has re-solidified, the solidified material (30,31) comprises a one-piece shell (3), which one-piece shell (3) comprises a fused portion (30) over a fraction (L T) of the winding length (L W) and a mantle portion (31) over a remainder (L B) of the winding length (L W). The invention further describes an electrode (1) for a gas-discharge lamp, which electrode (1) comprises an electrode shaft (10); a coil (2) arranged on the electrode shaft (10) over a winding length (L W); and a one-piece shell (2) comprising re-solidified material of the coil (2), which one-piece shell (3) comprises a fused portion (30) over a fraction (L T) of the winding length (L W) and a mantle portion (31) over a remainder (L B) of the winding length (L W). The invention also describes a gas-discharge lamp (6) comprising a burner (4) enclosing a discharge vessel (40), a first electrode (1) and a second electrode (1), wherein the electrodes (1) are arranged to protrude into the dis-charge vessel (40) from opposite sides of the discharge vessel (40), wherein at least one of the electrodes (1) comprises an electrode (1) according to the invention.
US09053919B2 Miniature toroidal radio frequency ion trap mass analyzer
A scaled down version of a toroidal radio frequency (RF) ion trap mass analyzer operating with RF trapping voltages on the order of 1 kVp-p yet despite the reduced dimensions, retains roughly the same ion trapping volume as conventional 3D quadrupole ion traps, wherein the curved geometry enables construction of a compact mass analyzer and easy interface with conventional electron multipliers.
US09053912B2 Fine particle measurement system
A fine particle measurement system including a primary-side power supply circuit connected to a primary side of an isolation transformer, a control circuit configured to control the primary-side power supply circuit, a first current measurement circuit configured to transmit to the control circuit a first signal indicating a first current that flows from a trapping unit toward a secondary-side reference potential line, and a second current measurement circuit configured to transmit to the control circuit a second signal indicating a second current corresponding to the amount of ions that are not trapped by the trapping unit. The control circuit adjusts the electrical power supplied to the ion generating unit based on the first current and measures the amount of the fine particles in the gas based on the second current. Further, the first current measurement circuit includes an isolation amplifier and amplifies the first signal via the isolation amplifier and transmits the first signal to the control circuit.
US09053911B2 Method of processing mass spectral data
A method of processing mass spectral data is disclosed comprising digitizing a first signal output from an ion detector to produce a first digitized signal. A first set of peaks in the first digitized signal is detected and the arrival time To and peak area So of one or more peaks in the first set of peaks are determined thereby forming a first list of data pairs, each data pair comprising an arrival time value and a peak area value. One or more data pairs from the first list are then filtered out thereby forming a second reduced list, wherein a data pair is filtered out, attenuated or otherwise rejected from the first list if the peak area value of a data pair in the first list is determined to be less than a threshold peak area.
US09053908B2 Method and apparatus for controlling substrate DC-bias and ion energy and angular distribution during substrate etching
A variable capacitor is provided within a radiofrequency (RF) power transmission path to a bias electrode, in addition to an impedance matching circuit provided within the RF power transmission path to the bias electrode. An RF power supply is operated in a pulsed mode to transmit pulses of RF power through the RF power transmission path to the bias electrode. A capacitance of the variable capacitor is set to control a rate at which a DC bias voltage builds up on a substrate present above the bias electrode during each pulse of RF power. The rate at which the DC bias voltage builds up on the substrate controls an ion energy distribution and an ion angular distribution within a plasma exposed to an electromagnetic field emanating from the substrate.
US09053899B2 Method for imaging a sample in a charged particle apparatus
The invention relates to a dual beam apparatus equipped with an ion beam column and an electron beam column having an electrostatic immersion lens. When tilting the sample, the electrostatic immersion field is distorted and the symmetry round the electron optical axis is lost. As a consequence tilting introduces detrimental effects such as traverse chromatic aberration and beam displacement. Also in-column detectors, detecting either secondary electrons or backscattered electrons in the non-tilted position of the sample, will, due to the loss of the symmetry of the immersion field, show a mix of these electrons when tilting the sample.The invention shows how, by biasing the stage with respect to the grounded electrodes closest to the sample, these disadvantages are eliminated, or at least reduced.
US09053895B2 System for attachment of an electrode into a plasma source
An inductively coupled plasma charged particle source for focused ion beam systems includes a plasma reaction chamber with a removably attached source electrode. A fastening mechanism connects the source electrode with the plasma reaction chamber and allows for a heat-conductive, vacuum seal to form. With a removable source electrode, improved serviceability and reuse of the plasma source tube are now possible.
US09053894B2 Apparatus and method for removal of surface oxides via fluxless technique involving electron attachment
Described herein is a method and apparatus for removing metal oxides on a surface of a component via electron attachment. In one embodiment, there is provided a field emission apparatus, wherein the electrons attach to at least a portion of the reducing gas to form a negatively charged atomic ions which removes metal oxides comprising: a cathode comprising an electrically conductive and comprising at least one or more protrusions having an angled edge or high curvature surface, wherein the cathode is surrounded by a dielectric material which is then surrounded by an electrically conductive anode wherein the cathode and anode are each connected to an electrical voltage source, and the dielectric material between the cathode and anode is polarized, intensifying the electrical field strength and accumulating electrons at the apex of the cathode to promote field emission of electrons from the cathode.
US09053890B2 Nanostructure field emission cathode structure and method for making
Various embodiments are described herein for nanostructure field emission cathode structures and methods of making these structures. These structures generally comprise an electrode field emitter comprising a resistive layer having a first surface, a connection pad having a first surface disposed adjacent to the first surface of the resistive layer, and a nanostructure element for emitting electrons in use, the nanostructure element being disposed adjacent to a second surface of the connection pad that is opposite the first surface of the connection pad. Some embodiments also include a coaxial gate electrode that is disposed about the nanostructure element.
US09053873B2 Switches for use in microelectromechanical and other systems, and processes for making same
Embodiments of switches (10) include electrically-conductive housings (30, 60), and electrical conductors (34, 64) suspended within and electrically isolated from the housings (30, 60). Another electrical conductor (52) is configured to move between a first position at which the electrical conductor (52) is electrically isolated from the electrical conductors (34, 64) within the housings (30, 60), and a second position at which the electrical conductor (52) is in electrical contact with the electrical conductors (34, 64) within the housings (30, 60). The switches (10) further include an actuator (70, 72, 74, 76) comprising an electrically-conductive base (80) and an electrically-conductive arm (82a, 82b) having a first end restrained by the base (80). The electrical conductor (52) is supported by the arm (82a, 82b), and the arm (82a, 82b) is operative to deflect and thereby move the electrical conductor (52) between its first and second positions.
US09053871B2 High surface area and low structure carbon blacks for energy storage applications
The present invention, in part, relates to a carbon black having a) a nitrogen BET surface area (BET) of from about 600 m2/g to about 2100 m2/g, b) a CDBP value in mL/100 g of from about (−2.8+(b*BET)) to about (108+(b*BET)), where b is 0.087 and BET is expressed in m2/g, and c) an apparent density (p, g/cm3) of at least about 0.820+q*BET, where q=−2.5×10−4, as determined at a compressive force (P) of 200 kgf/cm2 on dry carbon black powder. Energy storage devices, such as electrochemical double layer capacitors (EDLC's), containing the carbon black are also disclosed. Methods for making the carbon blacks and EDLC's made with them are also provided.
US09053864B2 Multilayer capacitor and method for manufacturing the same
In a multilayer capacitor, a first dielectric layered product including a first body principal face is formed to be thicker than a second dielectric layered product including a second body principal face in a stacking direction thereof. A first external electrode and a second external electrode extend only to the first body principal face from a first body end face and a second body end face. Alternatively, the first external electrode and the second external electrode extend at least to the first body principal face from the first body end face and the second body end face and extend also to at least one of the second body principal face, a first body lateral face, and a second body lateral face.
US09053862B2 Variable capacitance device with a plurality of electrodes laminated via dielectric layers
A variable capacitance device including: a device body having a plurality of dielectric layers formed by a dielectric material changing in capacitance according to a control signal applied externally and laminated in a predetermined direction and an internal electrode section including at least one internal electrode formed in each of both surfaces of each dielectric layer, three or more capacitors being formed by the plurality of dielectric layers and the internal electrode section, and the three or more capacitors being connected in series with each other; and at least three control terminals supplied with the control signal, and respectively arranged for at least three internal electrodes forming at least two capacitors of the three or more capacitors.
US09053857B2 Nickel nanoparticle, method of preparing the same, and multilayer ceramic capacitor using the same
There is provided a method of preparing a nickel nanoparticle, the method including: forming an aqueous solution by mixing water and a solution containing a hydroxyl group; forming a mixed liquid by adding carboxylic acid to the aqueous solution at a ratio of 10 to 20 wt % with regard to the solution containing a hydroxyl group; and adding a nickel salt to the mixed liquid and stirring the mixed liquid.
US09053851B2 Crystal and laminate
The present invention relates to a laminate that includes: a foundation layer (12) that is a crystal having a wurtzite structure; and a MgXM1-XO film (14) having a hexagonal film formed on the foundation layer, where M is a 3d transition metal element, and 0
US09053849B2 Magnetic and luminescent silicon nanoparticles, supermolecules and fabrication methods
A magnetic nanosilicon material comprising silicon nanoparticles impregnated with magnetic atoms. This magnetic nanosilicon material has both luminescent and magnetic properties. In certain embodiments of the invention, magnetic nanosilicon material is encapsulated in a polymer or silica sphere to provide a supermolecule. Supermolecules can be used in applications such as but not limited to detection and imaging.
US09053848B2 Impulse solenoid valve
An impulse solenoid valve with at least one solenoid coil, a magnetically soft magnetic circuit which comprises a stationary yoke and a movable solenoid core, and with a permanent magnet which is accommodated in the magnetic circuit such that it sectionally interrupts the magnetic circuit, is characterized in that a first portion and a second portion of the magnetic circuit each directly contact the same on opposite sides of the permanent magnet, preferably over the full surface.
US09053842B2 Stray voltage insulating device
A device is provided having a body. The body being made from a flexible material that has an electrical insulating property of at least 1000 volts. A first fastener disposed on a first surface adjacent a first side. A second fastener is disposed on a second surface adjacent a second side, the second surface being opposite the first surface and the second side being opposite the first side. A plurality of straps is coupled to the body.
US09053835B2 Flexible cable and medium processing device
A flexible cable may include a data signal layer; a first disconnection detecting signal layer covering a front face of the data signal layer and formed with a disconnection detecting signal pattern; and a second disconnection detecting signal layer covering a rear face of the data signal layer and formed with a disconnection detecting signal pattern. The flexible cable may be formed in a multilayer structure. A shield pattern may be formed in the first and/or second disconnection detecting signal layer and avoiding the disconnection detecting signal pattern. The data signal pattern may be formed so as to be covered by the disconnection detecting signal pattern. At least a part of the signal pattern may be formed so as to avoid the disconnection detecting signal pattern.
US09053834B2 Silicon carbide single crystal and manufacturing method of the same
A silicon carbide single crystal includes nitrogen as a dopant and aluminum as a dopant. A nitrogen concentration is 2×1019 cm−3 or higher and a ratio of an aluminum concentration to the nitrogen concentration is within a range of 5% to 40%.
US09053820B2 Internal data load for non-volatile storage
Techniques are disclosed herein for performing an Internal Data Load (IDL) to sense non-volatile storage elements. Read pass voltages that are applied to the two neighbor word lines to a selected word line may be adjusted to result in a more accurate IDL. The read pass voltage for one neighbor may be increased by some delta voltage, whereas the read pass voltage for the other neighbor may be decreased by the same delta voltage. In one aspect, programming of an upper page of data into a word line that neighbors a target word line is halted to allow lower page data in the target memory cells to be read using an IDL and preserved in data latches while programming the upper page in the neighbor word completes. Preservation of the lower page data provides for a cleaner lower page when later programming the upper page into the target memory cells.
US09053813B2 Method and apparatus for refreshing and data scrubbing memory device
At least one refresh without scrubbing is performed on a corresponding portion of the memory device with a first frequency. In addition, at least one refresh with scrubbing is performed on a corresponding portion of the memory device with a second frequency less than the first frequency. Accordingly, refresh operations with data scrubbing are performed to prevent data error accumulation. Furthermore, refresh operations without data scrubbing are also performed to reduce undue power consumption from the data scrubbing.
US09053809B2 Data protection from write failures in nonvolatile memory
A method includes calculating redundancy information over a set of data items, and sending the data items for storage in a memory. The redundancy information is retained only until the data items are written successfully in the memory, and then discarded. The data items are recovered using the redundancy information upon a failure in writing the data items to the memory.
US09053797B2 Inhibiting pillars in 3D memory devices
Methods and controllers for programming a memory are provided. In one such method, a potential for pillars of the memory that are to be inhibited is lowered, and programming cells of the memory is accomplished while the pillars of the memory that are to be inhibited have the lower potential.
US09053790B1 Counter for write operations at a data storage device
A data storage device includes a resistive random access memory (ReRAM) having a three-dimensional (3D) memory configuration that is monolithically formed in one or more physical levels of arrays of memory cells having an active area disposed above a silicon substrate. The data storage device further includes circuitry associated with operation of the memory cells. A method includes performing a first number of write operations to the ReRAM. The method further includes incrementing a value of a counter a second number of times in response to performing at least one of the write operations. The second number is less than the first number.
US09053787B2 Crosspoint nonvolatile memory device and method of driving the same
The nonvolatile memory device includes a control circuit that controls a sense amplification circuit and a writing circuit. The control circuit changes a value of at least one of (a) a load current and (b) a forming pulse current or a forming pulse voltage, according to a total number of sneak current paths formed by memory cells each including a variable resistance element in a second resistance state having a low resistance value except a selected memory cell in a memory cell array.
US09053785B2 Phase-change memory cell
A phase-change memory cell includes a phase change material; a reference electrical terminal disposed on first side of the phase change material; first and second electrical terminals disposed on a second side of the phase change material; the phase-change material configured to be reversibly transformable between an amorphous phase and a crystalline phase, in response to a phase-altering electrical signal applied to the phase-change material via the reference electrical terminal and one or more of the first and second electrical terminals; a resistance measurement unit configured to measure a respective electrical resistance between each of the first and electrical terminals and the reference electrical terminal; and a mathematical operation unit configured to determine a mathematical relation between the respective electrical resistances measured between each of the electrical terminals and the reference electrical terminal.
US09053781B2 Structure and method for a forming free resistive random access memory with multi-level cell
A method for operating a multi-level resistive random access memory (RRAM) cell having a current-controlling device and a RRAM device connected together. The method is free of a “forming” step and includes setting the RRAM device to one of resistance levels by controlling the current-controlling device to one of current levels. The setting the RRAM device includes applying a first voltage to a top electrode of the RRAM device and applying a second voltage to a bottom electrode of the RRAM device. The second voltage is higher than the first voltage.
US09053778B2 Memory controller that enforces strobe-to-strobe timing offset
A memory controller outputs a clock signal to first and second DRAMs disposed on a memory module, the clock signal requiring respective first and second time intervals to propagate to the first and second DRAMs. The memory controller outputs a write command to be sampled by the first and second DRAMs at times indicated by the first clock signal and outputs, in association with the write command, first and second write data to the first and second DRAMs, respectively. The memory controller further outputs first and second strobe signals respectively to the first and second DRAMs, the first strobe signal to time reception of the first and second write data therein. The memory controller adjusts respective transmission times of the first and second strobe signals to be offset from one another by a time interval that corresponds to a difference between the first and second time intervals.
US09053775B2 Semiconductor device having CAL latency function
A method for accessing a semiconductor device having a memory array, the method includes receiving a mode register command to set a command latency value in a mode register, receiving a chip select signal, activating a command receiver in response to the chip select signal, receiving, with the command receiver, an access command with a first latency from the chip select signal equal to the command latency value, accessing the memory array in response to the access command, and deactivating the command receiver with a second latency from the chip select signal equal to a deactivation latency value.
US09053774B2 Duty cycle corrector and systems including the same
A duty cycle corrector includes a sensing unit, a pad unit, a fuse unit, and a driver unit. The sensing unit generates at least one sensing signal based on the sensed duty cycle ratio of an output signal. The pad unit outputs at least one decision signal based on the at least one sensing signal. The fuse unit generates a duty cycle control signal based on at least one received fuse control signal. The driver unit adjusts a duty cycle ratio of an input signal to generate the output signal based on the duty cycle control signal. The driver unit adjusts the duty cycle ratio of the input signal by adjusting a pull-up strength or a pull-down strength of the input signal based on the duty cycle control signal.
US09053772B2 Method for conducting reference voltage training
A method for conducting reference voltage training includes setting levels of a reference voltage in response to code signals and receiving and storing data for the respective levels of the reference voltage, and simultaneously outputting the stored data.
US09053770B1 Dynamic cascode-managed high-voltage word-line driver circuit
A method of operation of a high-voltage word-line driver circuit for a memory device prevents any single transistor of the driver from having the full power supply voltage from which the word-line output signal is generated, from being applied across any single transistor of the word-line driver circuit. A pair of cascode devices are connected in series with the pull-down device of the input stage and a pull-up device of the input stage, and biased using reference voltages to control the maximum voltage drop across the pull-down device when the pull-down device is off and the pull-up device is active, and to control the maximum voltage drop across the pull-up device when the pull-down device is active. The output stage also includes cascode devices that protect the output pull-down and pull-up devices, and the reference voltages that bias the input and output cascode pairs may be the same reference voltages.
US09053769B2 Semiconductor device capable of increasing data input/output rate
A semiconductor device includes a memory array including memory cells, page buffers suitable for reading data from the memory cells, cache latch circuits suitable for latching read data from the page buffers, and transmitting latched data to data lines in response to a column selection signal, a column selector suitable for outputting the column selection signal to the cache latch circuits through column selection lines in response to a column address, and sense amplifiers suitable for outputting transmitted data of the data lines by sensing voltages of the data lines, in which the cache latch circuits are connected to the column selector and the sense amplifiers through the column selection lines and the data lines, respectively, and have inverse relationship between the column selection lines and the data lines in length.
US09053765B2 Nonvolatile semiconductor memory device
A nonvolatile semiconductor memory device includes a memory cell array having multiple blocks each with a plurality of memory strings. Each memory string has multiple memory cells connected in series between first and second selection transistors. The device further includes a row decoder, a block decoder, first and second signal line groups, and a switch circuit. The row decoder has transfer transistors through which voltages are supplied to the selection transistors. The block decoder supplies a selection signal that indicates whether the first group or the second group has been selected. The first and second signal line groups are connected to the selection transistors of the memory strings that are in the respective first and second memory blocks of the first and second groups. The switch circuit connects the first and second signal line groups to the respective first and second memory blocks of the selected group.
US09053750B2 Speaker association with a visual representation of spoken content
Speaker content generated in an audio conference is visually represented in accordance with a method. Speaker content from a plurality of audio conference participants is monitored using a computer with a tangible non-transitory processor and memory. The speaker content from each of the plurality of audio conference participants is monitored. A visual representation of speaker content for each of the plurality of audio conference participants is generated based on the analysis of the speaker content from each of the plurality of audio conference participant. The visual representation of speaker content is displayed.
US09053748B2 Reconstructive error recovery procedure (ERP) using reserved buffer
According to one embodiment, a method for reading data from a medium includes reading a data set from a medium repeatedly using different settings until either: a reconstructed data set is sent to a host and/or stored, or a maximum number of rereads has been reached, after each reading of the data set, storing each row to the reserved data buffer that has no errors or errors in the row are correctable using C1-Error Correction Code (ECC) unless a matching row already exists in the reserved data buffer that has fewer corrected errors therein, assembling the data set from the rows stored in the reserved data buffer to form an assembled data set, correcting any remaining errors in the assembled data set using C2-ECC to form the reconstructed data set, and sending the reconstructed data set to the host and/or storing the reconstructed data set.
US09053738B1 Inventory management for automated data storage libraries
In one embodiment, of inventory management for automated data storage libraries, a first subset of data storage cartridges is scanned and extracted from a multi-cartridge deep slot cell and transported to and filled into another multi-cartridge deep slot cell while maintaining tier order of the first subset. A second subset of data storage cartridges is scanned and extracted from the multi-cartridge deep slot cell and returned to its original multi-cartridge deep slot cell while maintaining tier order of the second subset. Other aspects are described herein.
US09053732B2 Method of fabricating a perpendicular magnetic recording medium
A method of forming a perpendicular magnetic recording medium. The perpendicular magnetic recording medium comprises a substrate, an underlayer on the substrate, an intermediate layer on the underlayer and a recording layer on the intermediate layer. The underlayer comprises a first soft underlayer, an antiferromagnetically coupled Ru layer on the first soft underlayer, a second soft underlayer on the antiferromagnetically coupled Ru layer, and an orientation control layer on the second soft underlayer, the method comprises applying a negative bias voltage to the substrate during formation of the underlayer.
US09053731B2 Extended cavity VCSEL mounted to substrate with electrical and thermal contact to substrate and optical power directed toward substrate
A system according to one embodiment includes a slider adapted for use in a hard disk drive; and a laser coupled to a slider, wherein electrical contacts of the laser are positioned towards or face the slider, wherein light from the laser is emitted towards the slider, wherein the slider acts as a heat sink for the laser.
US09053729B1 Nonlinearity-based contact prediction
Various embodiments of a method of detecting a contact event between a head and a storage medium, and a storage device that utilizes such method are disclosed. In one or more embodiments, the method includes applying an input signal to an actuator of a head of a storage device; identifying a frequency of the input signal; detecting an output signal in response to the input signal; and detecting a contact event between the head and a storage medium of the storage device if the output signal includes an even harmonic frequency and an odd harmonic frequency of the frequency of the input signal.
US09053718B1 Method for manufacturing a magnetic tape head using an ink mask formed by printing
A method for forming a protective overcoat onto a tape bearing surface of a tape head used for magnetic tape recording. In order to ensure optimal surface tension and liftoff properties of the ink mask, the tape bearing surface is treated with a first application of ethanol, followed by an application of polydimethylsiloxane, followed by a second application of ethanol. After this treatment an ink mask can be printed onto the tape bearing surface so as to form a mask having an opening over the location of the magnetic transducer. An etching can then be performed followed by the deposition of a protective coating such as alumina.
US09053713B2 High coercivity magnetic film for use as a hot seed in a magnetic write head and method to grow it
A sub-structure, suitable for use as a hot seed on which to form a perpendicular magnetic main write pole, is described. It is made up of a buffer layer of atomic layer deposited alumina on which there are one or more seed layers having a body-centered cubic (bcc) crystal structure. Finally, the high coercivity magnetic film lies on the seed layer(s). It is critical that the high coercivity magnetic film be deposited at a very low deposition rate (around 1 Angstrom per second).
US09053712B1 Data storage device reading servo sector while writing data sector
A data storage device is disclosed comprising a disk surface comprising a plurality of tracks, wherein each track comprises a plurality of data sectors and a plurality of servo sectors. The data storage device further comprises a head actuated over the disk surface, the head comprising at least one read element and at least one write element. Control circuitry is configured to use the head to write to a first data sector on the disk surface while simultaneously reading from a first servo sector on the disk surface.
US09053709B2 Control device, control method, and program
The present invention relates to a control device, a control method, and a program capable of improving operability with a simpler configuration.A reproducing apparatus 11 which reproduces sound such as music includes earphones 21 which are worn by a user on the ears and a body 22. A sound pickup unit 31 collects sounds around the reproducing apparatus 11, and a determination unit 34 extracts future amounts from the collected sound and determines whether the sound corresponds to an operation sound generated when the sound pickup unit 31 is directly tapped by the user. A controller 35 executes a process in accordance with a result of the determination performed by the determination unit 34. For example, when a sound pickup unit 31-1 is tapped once within a predetermined period of time, the controller 35 instructs a reproduction controller 39 to stop reproduction of music. In the reproducing apparatus 11, various function control processes may be performed by a simple operation of tapping the sound pickup unit 31 and buttons are not required. The present invention is applicable to a music player.
US09053698B2 Jitter buffer enhanced joint source channel decoding
Methods, systems, and apparatuses are provided for performing jitter buffer enhanced joint source channel decoding. Jitter buffer enhanced joint source channel decoding may be performed in a manner that exploits parameter domain correlation. A jitter buffer stores hard bits of properly channel decoded packets, and a secondary jitter buffer is implemented to store soft bits associated with packets that are improperly channel decoded. Joint source channel decoding may be delayed to perform channel decoding of a frame in the penultimate position of the jitter buffer. The soft bits stored in the secondary jitter buffer as well as hard bits stored in the jitter buffer, which may include future frames, are utilized to perform channel decoding. The delayed jitter buffer enhanced joint source channel decoding may also be extended to iteratively perform channel decoding for giving frames at each position in the jitter buffer as they traverse the jitter buffer.
US09053693B1 Digital cymbal displacement control device for electronic cymbal
Embodiments of a digital cymbal displacement control device for an electronic hi-hat are provided. A digital cymbal displacement detection unit in accordance with the present disclosure is configured to be directly mounted on the tube above the stand of an electronic hi-hat, as with any conventional hi-hat, without any need of changing the way how the electronic hi-hat is operated. The digital cymbal displacement detection unit includes at least one displacement detection unit and a plurality of sliding elastic elements that slide along a contact surface of the at least one displacement detection unit. Variation in an electrical parameter of each of the at least one displacement detection unit is utilized to determine the displacement of an electronic cymbal set of the electronic hi-hat.
US09053690B2 String instrument, system and method of using same
A string instrument is provided having: a body with a sound hole; a neck extending from the body; a plurality of strings strung over the neck and sound hole; a plurality of frets positioned under the strings along the neck, a plurality of sensors positioned on the neck; and electronic circuitry associated with the sensors; characterized, in that each of the frets comprises separate individual fret sections each mounted over a corresponding sensor, thereby forming separate individual dynamic fret-activated sensors, each individual dynamic fret-activated sensor being positioned correspondingly under one of the plurality of strings. When a chord is played by applying finger pressure on the strings, pressure is applied on the corresponding individual frets activating the individual dynamic fret-activated sensors, which transmit the pressure data representing the played chord, via the electronic circuitry to a processor to produce an audio output comprising the played chord.
US09053686B2 Music box
A music box includes a plurality of star wheels, a frame, a casing, a vibration plate, and a moving mechanism. Each of the plurality of star wheels being configured to rotate about a first axis. The frame is configured to rotatably support the first axis. The vibration plate comprises a plurality of vibration valves corresponding to the plurality of star wheels. Each of the plurality of vibration valves is extending in a first direction. The plurality of vibration valves is arrayed along a second direction parallel to the first axis. The vibration plate is fixed to the casing. The moving mechanism is configured to move the frame to the vibration plate in the first direction.
US09053684B2 Guitar neck adjustment
A truss rod adjustment device includes a truss rod gear assembly, an adjustment gear assembly and a base. The truss rod gear assembly includes an end shaped to fit in and engage a truss rod wrench socket attached to a neck of a guitar. The adjustment gear assembly includes an adjustment socket shaped to receive and engage a wrench. The base attaches to the neck of the guitar and holds the truss rod gear assembly in position to engage the truss rod wrench socket. The base also holds the adjustment gear assembly in position both to engage the truss rod assembly gear assembly and to position the adjustment socket to be accessible through a hole in a back of the guitar.
US09053683B1 String instrument's extension for activating keyboard's keys
An accessory device removably mounted to the headstock of a string instrument including an arm assembly for, actuating the keys of a keyboard instrument. The distal end of the arm assembly includes at least one tip cooperatively shaped to actuate the keys of a keyboard instrument. The arm assembly having an elongated arm member that is slidably and lockingly mounted to a clamp assembly that is removably mounted to the stock.
US09053678B2 Shift register unit circuit, shift register, array substrate and liquid crystal display
Embodiments of the disclosed technical solution provides a shift register unit circuit which operates based on two clock signals and comprises input terminals, a pre-charging circuit, a first level pulling-down circuit, a second level pulling-down circuit and a scan signal output terminal. Embodiments of the disclosed technical solution also provides a shift register having at least two shift register unit circuits connected in cascade, and further provides a liquid crystal display array substrate and a liquid crystal display. Embodiments of the disclosed technical solution settles problems that a threshold voltage of the pulling-down TFT would drift under a direct current bias voltage and a output is unstable due to a clock hopping, increases a reliability of the circuit and reduces power consumption.
US09053672B2 Stereoscopic image display device
A light source portion includes a plurality of back lights provided corresponding to respective regions obtained by virtually dividing a liquid crystal panel screen into a plurality of parts, the back lights have a light emission intensity controlled based on a light emission intensity value and have ON and OFF operations controlled in response to a light emission driving signal, and the light emission driving signal is constituted to sequentially turn ON the plurality of back lights synchronously with a stereoscopic image signal and to turn ON the plurality of back lights at the same time in a predetermined timing, and is constituted to individually control a light emission period for the plurality of back lights based on image information about the stereoscopic image signal.
US09053669B2 Apparatus for scan driving including scan driving units
A scan driving apparatus, includes a first scan driving unit coupled to a second scan driving unit, the first scan driving unit receives a first start signal, a first clock signal, a second clock signal, and sequentially outputs the first clock signal as a first scan, and outputs the first boost clock signal as a first boost signal, and the second scan driving receives the first clock signal, the second clock signal, a second boost clock signal, and the first scan signal as a second start signal, to sequentially output the second clock signal as a second scan signal, and sequentially outputs the second boost clock signal as a second boost signal.
US09053662B2 Method for adjusting uniformity of a display panel and associated display controller
A method for adjusting a uniformity of a panel is provided. The panel includes a plurality of blocks. The method includes: comparing whether a color display component of each of the blocks in response to a first input value matches a target component, comparing whether a color characteristic value of each of the blocks in response to a second input value matches a target characteristic value, and providing a corresponding modified second input component and a modified third input component for each of the blocks. The target component is determined according to a plurality of main display components of a plurality of display values corresponding to the blocks, and the target characteristic value is determined according to the plurality of color characteristic values corresponding to the blocks.
US09053651B2 Flexible display device
Provided is a flexible display device including a display body having flexibility; an actuator for changing and driving the display body; and an initial shape forming substrate for maintaining an initial state of the display body before the display body is changed and driven. The flexible display device allows a user to exactly control a change state of the flexible display device by driving the actuator and to decrease power consumption for changing and driving the flexible display device. Thus, by using the flexible display device, user convenience can be improved and the flexible display device can be driven with low power consumption.
US09053637B2 Emergency vehicle alert system and method
A broadcast notification system for providing alert notifications to vehicle drivers. The system recognizes the vehicle type that it has been installed. The system receives vehicle inputs and selects from memory an alert notification associated with a predetermined set of vehicle inputs. Alert messages correspond to vehicle collisions, roadside conditions, dispatch of emergency vehicles and the presence of other stopped roadside vehicles, such as tow trucks, maintenance and repair work vehicles and buses.
US09053634B2 Conflict detection and resolution using predicted aircraft trajectories
A method of detecting conflicts between aircraft passing through managed airspace, and resolving the detected conflicts strategically. The method may include obtaining intended trajectories of aircraft through the airspace, detecting conflicts in the intended trajectories, forming a set of the conflicted aircraft, calculating one or more revised trajectories for the conflicted aircraft such that the conflicts are resolved, and advising the conflicted aircraft subject to revised trajectories of the revised trajectories.
US09053632B2 Real-time traffic prediction and/or estimation using GPS data with low sampling rates
The present disclosure relates generally to real-time traffic prediction and/or estimation using GPS data with low sampling rates. In various examples, real-time traffic prediction and/or estimation using GPS data with low sampling rates may be implemented in the form of systems, methods and/or algorithms.
US09053630B2 Methods and systems for depicting a data driven minimum safe altitude
A method for providing a minimum safe altitude indication on an aircraft display is described. The method includes utilizing current aircraft heading and position data to generate a location and orientation for an own-ship depiction with respect to an aircraft display, utilizing the current position data, along with terrain data, to generate minimum safe altitude data for an area surrounding the aircraft, and displaying on the aircraft display, about the location for own-ship depiction, the minimum safe altitudes surrounding the aircraft.
US09053628B2 System and method for collecting data using a wireless communication channel
A first apparatus receives, from a second apparatus, a signal including information on first time-periods each associated with an occupancy rate, using a wireless channel. The first time-periods each indicate a time-period during which data are scheduled to be collected by the second apparatus, and the occupancy rate indicates a ratio of a duration-time during which data are actually collected by the second apparatus using the wireless channel, to the each first time-period. The first apparatus, based on the occupancy rate and the received power of the first signal, calculates interference values each indicating a degree of interference caused by a radio wave from the second apparatus during the each first time-period, and acquires, based on the calculated interference values, second time-periods during which data are scheduled to be collected by the first apparatus, and collects data from a node apparatus during the third time-periods using the wireless channel.
US09053625B2 System and method for group tracking
The present invention relates generally to a system and method for group tracking wherein at least one individual within a tracked group is provided with an article of footwear equipped with a wireless tracking device. The wireless tracking device is configured for bi-directional communications with a monitoring center, wherein the wireless tracking device is adapted to determine and store absolute location information of the individual wearing the wireless tracking device and the location information of at least one other individual within the tracked group. Each individual's tracking device has a unique identifier for identifying the individual with a monitoring center at a remote location and/or portable monitoring unit.
US09053619B2 LED strobes with fixed pulse width
An LED strobe notification device and method for operating an LED strobe notification device is provided. The LED strobe notification device is configured to generate an output at two or more candela settings and is configured to generate the output at the two or more candela settings having a human-perceived pulse duration with a fixed width. The LED strobe device includes: an LED strobe element; and an LED controller in communication with the LED strobe element with the LED controller configured to: receive a candela selection for the LED strobe element, the candela selection selected from the two or more candela settings; receive a command to activate the LED strobe element of the LED strobe notification device; and in response to receiving the command, control the LED strobe element in order to generate the output from the LED strobe element having the human-perceived pulse duration with the fixed width.
US09053616B2 Computing systems and methods for electronically indicating the acceptability of a product
Computing systems and methods for electronically indicating the acceptability of a product. An image capture and communication device may analyze a product label that includes one or more monitors, authentication elements, and identification elements. The image capture and communication device may determine the type and features of the monitors, authentication elements, and identification elements and, based on the type of the monitors, authentication elements, and identification elements. The image capture and communication device may transmit data based on the type and features to a host server, which may transmit data associated with the host product to the image capture and communication device in, inter alia, the form of an acceptability report.
US09053607B2 Emulator for production software outcome validation
A test tool provides a flexible resource for control an of electronic gaming machine (EGM) via a data network. The test tool provides both interactive and automated access to the EGM when the EGM is operated using a special diagnostic BIOS that supports both communication with the test tool over the data network and the ability to set operational variables including random numbers. The test tool can use structured data test scripts, such as XML files, to automate repetitive testing of one or more gaming machines by automating breakpoint setting, variable settings, and comparison of expected results based on game type, paytables, currency, etc.
US09053603B2 Cloud based virtual environment authentication
Techniques for providing deployment and management services for wager-based virtual machines deployed in a cloud-based on-demand service environment. In some implementations, a master deployment set is stored in one or more data sources under a repository of master deployment sets. The master deployment set includes one or more virtual machines configured to be deployed to one or more component servers to provide a component service to a client terminal in one or more jurisdictions. The repository of master deployment sets is configured to include one or more master deployment sets having regulatory approval in the one or more jurisdictions. The master deployment set may be deployed to the one or more component servers. The repository of master deployment sets, the master deployment set, and the deployment may be managed by an authorized user.
US09053598B2 Banknote processing device
A banknote processing device that stacks banknotes in a banknote storage section even when a jam occurs. The device has an insertion aperture, a verification section, the storage section and a controller. The aperture separates and feeds inserted banknotes. The verification section verifies the banknotes fed from the aperture. The banknotes are stacked in the storage section. The controller controls conveyance of the banknotes conveyed from the aperture to the verification section such that, depending on verification results, the banknotes are conveyed directly to the storage section. When a jam occurs during conveyance of the banknotes, the controller stops the separation and feeding of the banknotes from the aperture, and controls conveyance such that banknotes for which the storage section has been set as a conveyance destination by the verification section are conveyed directly to the storage section and banknotes for which no conveyance destination has been set are ejected.
US09053595B2 Coin identification system and method using image processing
A coin identification system and method is disclosed for determining the identity of a source coin by way of image processing. The system comprises a source coin image capture means, an image processing means, and an output that relays information to the user or sorts the coin according to its match results. The processing means compares at least one image of the source coin to a plurality of reference coin images, whereby the image of the source coin is manipulated and overlaid onto the reference coin images to determine if a match is available with a given probability. An embodiment of the system employs a coin collection and sorting device. Another embodiment contemplates a handheld electronic device that captures and processes the source coin. Both embodiments may connect to a remote server housing the reference coin information or store the information locally.
US09053592B2 Key management box
A key management box includes a card reader configured to read ID for personal authentication, a data writing unit to write information on at least the ID read by the card reader in an electronic key, a data erasing unit configured to communication with the electronic key and disable the electronic key when the electronic key is determined to be a key on-lending, and a control substrate configured to determine that a lending mode is established when the card reader reads the ID and cause an electronic lock to permit opening/closing of a door and then activate the data writing unit, or configured to cause the electronic lock to permit opening/closing of the door when the data erasing unit determines that the electronic key is a key on-lending through communication with the electronic key while the card reader does not read ID.
US09053587B2 Remotely actuated door lock
A remotely actuated door lock is provided. The remotely actuated lock includes a transceiver for establishing telephone communication with a remote telephone and for receiving a transmitted identification code therefrom. The door lock includes a microprocessor, a programmable logic controller or the like for comparing the transmitted identification code with a stored identification code stored in memory associated with the processor or controller. The door lock further includes a lock bolt actuator in communication with a lock bolt for changing a state of the door lock. The lock bolt actuator is selectively actuated if the transmitted identification code matches the stored identification code. However, if the transmitted identification code does not match the stored identification code, then the transceiver transmits a first alert message to a user, alerting the user to possible unauthorized access.
US09053582B2 Streaming light propagation
A method is provided for streaming light propagation with particular application for feature films and other demanding content creation using scenes of high complexity requiring art directed global illumination. By attaching a data recording shader or equivalent functionality to any tracing based renderer that can provide multi-pass global illumination, the complete set of light bounce propagation records and the set of emissive samples for a particular rendering can be recorded to memory or disk. A user may edit the emissive samples to adjust the lighting environment, including modifying light source color and intensity and even moving and adding new emissive samples. To relight the scene, the edited emissive samples are processed through the propagation records using a streaming multiply-and-add operation amenable to high levels of parallelization, avoiding a costly re-rendering of the scene and providing a final quality result in interactive time.
US09053571B2 Generating computer models of 3D objects
Generating computer models of 3D objects is described. In one example, depth images of an object captured by a substantially static depth camera are used to generate the model, which is stored in a memory device in a three-dimensional volume. Portions of the depth image determined to relate to the background are removed to leave a foreground depth image. The position and orientation of the object in the foreground depth image is tracked by comparison to a preceding depth image, and the foreground depth image is integrated into the volume by using the position and orientation to determine where to add data derived from the foreground depth image into the volume. In examples, the object is hand-rotated by a user before the depth camera. Hands that occlude the object are integrated out of the model as they do not move in sync with the object due to re-gripping.
US09053567B2 Stereoscopic image processing device and stereoscopic image processing method
In a stereoscopic image processing device capable of displaying and/or recording stereoscopic animated images and stereoscopic still images, stereoscopic still image data representing any stereoscopic still image are extracted from predetermined stereoscopic animated image data, and the parallax amount of the stereoscopic still image represented by the extracted stereoscopic still image data is acquired. The parallax amount of the stereoscopic still image data is converted so as to be larger than the acquired parallax amount.
US09053562B1 Two dimensional to three dimensional moving image converter
The inventive method involves receiving as input a representation of an ordered set of two dimensional images. The ordered set of two dimensional images is analyzed to determine at least one first view of an object in at least two dimensions and at least one motion vector. The next step is analyzing the combination of the first view of the object in at least two dimensions, the motion vector, and the ordered set of two dimensional images to determine at least a second view of the object; generating a three dimensional representation of the ordered set of two dimensional images on the basis of at least the first view of the object and the second view of the object. Finally, the method involves providing as output an indicia of the three dimensional representation.
US09053560B2 Edge management unit for 2-dimension vector graphics, graphic processing apparatus and method thereof
Disclosed is an edge management unit of accessing a memory including a first memory area and a second memory area. The edge management unit comprises an edge write controller writing bucket information corresponding to input edge data in the first memory area and the edge data at a location of the second memory area appointed by the bucket information; and an edge read controller responding to a scan line signal to read the bucket information from the first memory area and the edge data from a location of the second memory area appointed by the read bucket information.
US09053551B2 Vessel identification using shape and motion mapping for coronary angiogram sequences
Embodiments of the invention relate to a method, system, and computer program product to automate image classification with respect to coronary vessels in an angiography sequence. Two primary elements are employed, including training and recognition. Training pertains to the pre-processing images and extracting salient features that characterize the appearance of coronary arteries under different viewpoints. Recognition pertains to extraction of features from a new image sequence and determining a classification boundary for the new image from previously classified and labeled image sequences.
US09053546B2 Information processing apparatus, control method therefor, and computer-readable storage medium
An information processing apparatus for estimating a position and orientation of a target object in a three-dimensional space, inputs a plurality of captured images obtained by imaging the target object from a plurality of viewpoints, clips, for each of the input captured images, a partial image corresponding to a region occupied by a predetermined partial space in the three-dimensional space, from the captured image, extracts, from a plurality of partial images clipped from the plurality of captured images, feature information indicating a feature of the plurality of partial images, stores dictionary information indicating a position and orientation of an object in association with feature information of the object corresponding to the position and orientation, and estimates the position and orientation of the target object by comparing the feature information of the extracted target object and the feature information indicated in the dictionary information.
US09053541B2 Image registration
Certain embodiments provide a computer system operable to determine a registration mapping between a first medical image and a second medical image, the computer system comprising: a storage device for storing data representing the first medical image and the second medical image; and a processor unit operable to execute machine readable instructions to: (a) identify a plurality of elements in the first medical image; (b) determine a spatial mapping from each element in the first medical image to a corresponding element in the second medical image to provide a plurality of spatial mappings subject to a consistency constraint; and (c) determine a registration mapping between the first medical image and the second medical image based on the plurality of spatial mappings from the respective elements of the first medical image to the corresponding elements of the second medical image.
US09053539B2 Image processing apparatus
An image processing apparatus having an input unit for inputting an image signal and an image corrector for correcting the input image signal is disclosed. The image corrector is arranged to extract from the input image signal a specular reflection component and a diffuse reflection component and generate a corrected image signal based on a computation result with respect to these specular and diffuse reflection components thus extracted. This image corrector is adaptable for use in various types of image processors, including projectors, display devices and imaging devices.
US09053535B2 Adaptive roadmapping
An adaptive roadmapping device and method for examination of an object include providing pre-navigation image data representing part of the object being a vascular structure including an element of interest and having a tree-like structure with a plurality of sub-trees; generating a vessel representation based on the pre-navigation image data; acquiring live image data of the object; determining spatial relation of the pre-navigation image data and the live image data; analyzing the live image data by identifying and localizing the element in the live image data; determining a sub-tree in which the element is positioned, where the determining is based on the localization of the element and on the spatial relation; selecting a portion of the vascular structure based on the determined sub-tree; generating a combination of the live image data and an image of the selected portion of the vascular structure; and displaying the combination as a tailored roadmap.
US09053534B2 Voxel-based approach for disease detection and evolution
A voxel-based technique is provided for performing quantitative imaging and analysis of tissue image data. Serial image data is collected for tissue of interest at different states of the issue. The collected image data may be normalized, after which the registered image data is analyzed on a voxel-by-voxel basis, thereby retaining spatial information for the analysis. Various thresholds are applied to the registered tissue data to predict or determine the evolution of a disease state, such as brain cancer, for example.
US09053514B2 System supporting promotion browsing and searching
An online sales/automatic rebate and coupon redemption system provides online customers automatic retrieval and redemption of all applicable rebates and coupons during purchase. Purchase orders from customers are selectively fulfilled and products are shipped to the customers either by the system for online sales with automatic rebate and coupon redemption or by other merchant or manufacturer environments. The system purchases from merchants using applicable coupons and rebates and then sells the products to the customers, passing the savings to them. The system makes it possible to automatically retrieve coupons and rebates for items in a shopping cart during the activity of an online purchase at an electronic mall or an online merchant site. The system provides coupons to potential customers via email, based on customer profile, geographical information, etc. Manufacturers and merchants can update coupon value and content based on ongoing sales and volume of customer activity.
US09053505B2 Online marketplace for pre-installed software and online services
The subject disclosure relates to pre-installed software and services, such as online services, and markets for pre-installed software and online services. In one aspect, the disclosed subject matter facilitates contracting between software vendors and device manufacturers or redistributors for placement and/or conversion of software applications or services in devices. As further advantages, embodiments of the disclosed subject matter can provide transparency into markets for device placement and can facilitate detailed contract performance tracking. Further non-limiting embodiments are provided that illustrate the advantages and flexibility of the disclosed subject matter.
US09053500B2 Internet-based education support system and method with multi-language capability
A system, method and medium for determining and displaying one or more locales on a web browser. The method can include the steps of providing in the web browser a plurality of display regions, associating a locale with a plurality of web pages, selecting by a user a user-specified locale, associating the locale with one or more particular display regions, and determining whether the locale is mandatory. If the locale is mandatory, content associated with the user-specified locale can be translated to content associated with the locale. Finally, content is displayed in the one or more particular frames in accordance with the locale.
US09053494B2 System for data management and on-demand rental and purchase of digital data products
A system for handling data and transactions involving data through the use of a virtual transaction zone, which virtual transaction zone removes the dependency of such transaction on the delivery medium of the product. The invention may reside and operate on a variety of electronic devices such as televisions, VCRs, DVDs, personal computers, WebTV, any other known electronic recorder/player, or as a stand alone unit. The transaction zone also provides a mechanism for combining mediums, data feeds, and manipulation of those feeds. The transaction zone also provides a mechanism for controlling the content, delivery, and timing of delivery of the end consumer's product.
US09053488B2 Answering terminal, answering method and answer counting system
Provided herein are an answering terminal, an answer counting system and a question-and-answer session method, which do not force answerers to perform complicated operations of an answering terminal when one questioner and a multiplicity of answerers have a question-and-answer session. The answer counting system comprises a receiving part; a grouping part; a result storing part; an answering action differentiating part; a differentiation result counting and analyzing part; and a displaying part.
US09053481B2 Methods and systems for providing a payment account with adaptive interchange
Pursuant to some embodiments, systems, methods, apparatus, and means for conducting payment transactions using mobile devices are provided in which a mobile device is presented at a point of sale for use in a payment transaction. A selection of a primary account is received from a user of the mobile device, and the mobile device automatically identifies a product type of the primary payment account. The mobile device selects and transmits a proxy payment account identifier having a product type equivalent to the product type of the primary payment account to the point of sale for use in the payment transaction. The point of sale causes a first payment authorization request message to be routed to an issuer of the proxy payment account.
US09053478B2 Mobile commerce system
A mobile commerce system including a multiplicity of Mobile Device-Point of Sale Communication (MPC)-equipped mobile devices, a plurality of MPC-enabled Point-of-Sale (POS) devices, at least one POS configuration server for configuring the plurality of MPC-enabled POS devices, at least one MPC-equipped mobile device configuration server for configuring the plurality of MPC-equipped mobile devices and at least one mobile marketing platform server operative to introduce Transaction Value Certificate (TVC)-related functions and to communicate both with the at least one POS configuration server and the at least one MPC-equipped mobile device configuration server to coordinate operation thereof so that the MPC-enabled POS devices will be “tap-ready” for carrying out the TVC-related functions.
US09053477B2 Mobile communication device and data verification system comprising smart card having double chips
A mobile communication device is disclosed. The disclosed mobile communication device performs corresponding identity (ID) and data verification processing on a server through a smart chip and comprises a wireless communication unit, a smart chip, and a processing unit. The smart chip is configured to store ID verification information. The processing unit is electrically connected to the smart chip and the wireless communication unit. When the processing unit runs a transaction procedure, the processing unit accesses the ID verification information from the smart chip. The processing unit also drives the wireless communication unit to send the ID verification information to the server and requests the server to perform an ID verification procedure, so as to determine whether the transaction procedure is valid. Additionally, when the transaction procedure is invalid, the processing unit cancels the transaction procedure.
US09053472B2 Offering additional license terms during conversion of standard software licenses for use in cloud computing environments
A “Bring Your Own License” (BYOL) service can convert users' “off-the-shelf” (OTS) software licenses for use in public clouds according to rules provided by independent software vendors (ISVs). The BYOL service can offer additional license terms to the users during conversion of the OTS software license on behalf of the ISVs. The additional license terms can be an expansion of the use of the software, an expansion of the technical support offer by the new cloud license, and expansion of the duration of use.
US09053469B1 System and method for providing usage based vehicle insurance
Methods and systems for providing usage based insurance for one or more vehicles for an insured individual or party. In an example, fuel transaction data is received for a party, the fuel transaction data includes a fuel cost; insurance policy data is received for an insurance policy; a premium is determined for the insurance policy using a computing device and the premium is added to the fuel cost. In an example, a geographic location for a vehicle is determined and a premium is determined using at the least the geographic location. In an example, a number of miles driven in a time period is determined and a premium is determined using at the least the number of miles driven. In an example, a premium is determined for an insurance policy using at least a portion of the fuel transaction data. In an example, at least one vehicle related parameter is predicted from the fuel transaction data and a premium is determined using the vehicle related parameter.
US09053467B2 Calendaring system for managing follow-up appointments
A method, apparatus, and computer program product for managing follow-up appointments in a calendaring system. In one illustrative embodiment, a follow-up appointment is created to an original appointment using a processor and responsive to receiving a user input. Information is set for the follow-up appointment created in response to receiving the user input. The follow-up appointment is associated with the original appointment in a data structure stored in a computer readable storage device to form an associated follow-up appointment. The associated follow-up appointment is then stored in the calendaring system.
US09053464B2 Information security method and appparatus
A method and apparatus for ensuring that important confidential or proprietary information is not inadvertently released through email and similar transmissions. When file security firewall resident on a file security server or another network node receives an email intended for transmission, it determines whether the file revision history should be removed from any attachments. If so, the email is buffered and the attachments are extracted for file revision history by a file revision history remover associated with the firewall or an available proprietary file revision history remover. Once the file revision history removal is attempted, successfully or unsuccessfully, a reformed email is created, including either the original attachments or, in their place, a version of the attachment from which file revision history has been removed.
US09053461B2 Instant messaging interoperability between disparate service providers
An apparatus for facilitating instant messaging communications between clients of different instant messaging service provider networks is provided. The apparatus includes translation logic for translating received communications related to an instant messaging service, the received communications associated with an external instant messaging service provider network and formatted according to a secondary protocol. The translation logic translates the received communication from the secondary protocol to a primary protocol, the primary protocol native to a receiving service provider network. The communication may then be routed to a client of the primary network according to the native, primary protocol.
US09053456B2 Techniques for conference system location awareness and provisioning
Techniques for conference system location awareness and provisioning are described. An apparatus may comprise a room detection component operative to determine a room identifier of a room which a conference system is in, a database component operative to determine one or more room properties of the detected room by querying a database of room properties using the room identifier, and a conference configuration component operative to configure one or more conference elements using the room properties. Other embodiments are described and claimed.
US09053444B2 Deploying applications in a smart thin client server
A method for deploying an enterprise application to enterprise users is provided. First, a defined sequence identifying a series of preverified functions is received, wherein the defined sequence constitutes the enterprise application. Then, the defined sequence is stored in a database, wherein the database additionally includes enterprise data created by use of the enterprise application. The enterprise application is then synchronized to the enterprise users in the same manner that the enterprise data is synchronized to the enterprise users.
US09053435B2 Generating application models based on discovery based machine learning
Embodiments are directed towards generating application models based on discovery based machine learning. A mobile application may be uploaded to a computer that may be part of a testing platform. A reference mobile computer may be selected and the mobile application maybe installed onto the reference mobile computer. Also, the testing platform may generate an initial application model based on the mobile application. The current active window of the mobile application may be determined and the application model may be updated accordingly. Screenshots may be generated that correspond to each current active window of the mobile application. Also, each user-interface control in the active window may be activated. The results of activating each control may be observed and added to the model. If the activation causes navigation, another active window may be determined. The application model may be used for testing other mobile computers.
US09053434B2 Determining an obverse weight
A technique for determining an obverse weight. A set of cases can be divided into bins. An obverse weight for a bin can be determined based on an importance weight of the bin and a variance of an error estimate of the bin.
US09053431B1 Intelligent control with hierarchical stacked neural networks
A system and method of detecting an aberrant message is provided. An ordered set of words within the message is detected. The set of words found within the message is linked to a corresponding set of expected words, the set of expected words having semantic attributes. A set of grammatical structures represented in the message is detected, based on the ordered set of words and the semantic attributes of the corresponding set of expected words. A cognitive noise vector comprising a quantitative measure of a deviation between grammatical structures represented in the message and an expected measure of grammatical structures for a message of the type is then determined. The cognitive noise vector may be processed by higher levels of the neural network and/or an external processor.
US09053425B2 Utilizing failures in question and answer system responses to enhance the accuracy of question and answer systems
A computerized device for enhancing the accuracy of a question-answer system. The computerized device comprises a question-answer system comprising software for performing a plurality of question answering processes. A receiver receives a question into the question-answer system. A processor that generates a plurality of candidate answers to the question is connected to the question-answer system. The processor determines a confidence score for each of the plurality of candidate answers. The processor evaluates sources of evidence used to generate the plurality of candidate answers. The processor identifies missing information from a corpus of data. The missing information comprises any information that improves a confidence score for a candidate answer. The processor generates at least one follow-on inquiry based on the missing information. A network interface outputs the at least one follow-on inquiry to external sources separate from the question-answer system.
US09053415B2 Meter for a device for dispensing a fluid or powder product
A dose counter having a base body (460), with a rotary counter element assembled in the base body (460) on a pin (461) forming the axis of rotation. The rotary counter element co-operating with an actuator member (1430) adapted to cause the rotary counter element to turn each time the actuator member (1430) is actuated. The actuator member (1430) including a fastener (14301) for fastening to the base body (460) and arranged on a first side of the pin (461), and a substantially rigid support portion (1436) arranged on a second side of the pin (461). The support portion (1436) supporting an actuator element (1435) so that the actuator element (1435) is moved in translation. The support portion (1436) extended towards the pin (461) by a substantially-rectilinear flexible branch (1431) that supports a lug (14310) adapted to co-operate with the counter element on each actuation.
US09053401B2 Laminating system, IC sheet, scroll of IC sheet, and method for manufacturing IC chip
Thin film integrated circuits are peeled from a substrate and the peeled thin film integrated circuits are sealed, efficiently in order to improve manufacturing yields. The present invention provides laminating system comprising transporting means for transporting a substrate provided with a plurality of thin film integrated circuits; first peeling means for bonding first surfaces of the thin film integrated circuits to a first sheet member to peel the thin film integrated circuits from the substrate; second peeling means for bonding second surfaces of the thin film integrated circuits to a second sheet member to peel the thin film integrated circuits from the first sheet member; and sealing means for interposing the thin film integrated circuits between the second sheet member and a third sheet member to seal the thin film integrated circuit with the second sheet member and the third sheet member.
US09053395B2 Image processor, image processing method, control program and recording medium
An image processor is provided, the image processor including a general-purpose classifier that detects a predetermined large classification target; and a dedicated classifier that detects a small classification target which is a subdivision of the large classification target; an image acquisition part that acquires an image photographed by a camera; an image extracting part that extracts a registered image including a user-assigned domain from the photographed image; a dedicated classifier performing part that causes the dedicated classifier to perform detection processing to the registered image extracted; a dedicated classifier selector that selects the dedicated classifier having a highest index indicating superiority or inferiority of a detection result; and a classifier generator that generates a registered image classifier to detect a target included in the registered image by replacing some weak classifiers included in the selected dedicated classifier with weak classifiers included in the general-purpose classifier.
US09053386B2 Method and apparatus of identifying similar images
A user may submit an image and request from a server one or more images that are similar to the submitted image. The server may generate an image signature based on the content of the submitted image. The server may conduct a Hash operation to the image signature to generate one or more Hash values. These Hash values may be used to identify one or more candidate images similar to the image in a Hash table. These candidate images may be sorted and outputted to the user based on similarity. The similarity between each of the candidate images and the image may be determined using at least one of Hamming distance or Euclidean distance.
US09053384B2 Feature extraction unit, feature extraction method, feature extraction program, and image processing device
Provided is a feature extraction device whereby it is possible, while using local binary patterns, to extract image features with which object detection which is robust against disparities in a photographic environment is possible. A feature extraction unit (440) comprises: a binary pattern generation unit (443) which generates, for each of all pixels or partial pixels in an image, local binary patterns which denote, by bit values, whether the difference in pixel values between the pixel and the surrounding adjacent pixels is greater than or equal to a threshold value; a weighting generation unit (444) which determines, for each generated local binary pattern, a weighting according to the pixel value difference; and a histogram generation unit (445) which applies the determined weightings to the corresponding local binary patterns and generates a histogram which denotes the distribution of the local binary patterns which are generated from the image.
US09053380B2 Removeable scanning module for mobile communication terminal
A decodable indicia reading system can comprise a mobile communication terminal and a removable scanning module. The mobile communication terminal can comprise a microprocessor and a memory. The mobile communication terminal can further comprise at least one wired communication interface including a first electromechanical connector mechanically attached to the terminal housing. The removable scanning module can comprise an encoded information reading (EIR) device and/or an illumination module at least partially disposed within the scanning module housing. Both the mobile communication terminal and the scanning module can be at least partially received by a common housing.
US09053360B2 Image inspection apparatus, image forming apparatus, image inspection method, and image inspection program
An image inspection method and apparatus for inspecting images output on sheets including a reference white plate disposed at a position of the transport route of sheet while facing a scan position for scanning a sheet; a contact glass disposed opposite the reference white plate; an image scanning device fixed facing the scan position to conduct a scanning operation through the contact glass, a noise detector to detect a first noise image in a blank area of the inspection sheet by scanning the blank area of the inspection sheet, and a second noise image in the reference white plate by scanning the reference white plate; and a stain source determination unit to determine a noise origin from the contact glass or the reference white plate.
US09053358B2 Learning device for generating a classifier for detection of a target
Disclosed is a learning device. A feature-quantity calculation unit extracts a feature quantity from each feature point of a learning image. An acquisition unit acquires a classifier already obtained by learning as a transfer classifier. A classifier generation unit substitutes feature quantities into weak classifiers constituting the transfer classifier, calculates error rates of the weak classifiers on the basis of classification results of the weak classifiers and a weight of the learning image, and iterates a process of selecting a weak classifier of which the error rate is minimized a plurality of times. In addition, the classifier generation unit generates a classifier for detecting a detection target by linearly coupling a plurality of selected weak classifiers.
US09053355B2 System and method for face tracking
Improved face tracking is provided during determination of an image by an imaging device using a low power face tracking unit. In one embodiment, image data associated with a frame and one or more face detection windows from a face detection unit may be received by the face tracking unit. The face detection windows are associated with the image data of the frame. A face list may be determined based on the face detection windows and one or more faces may be selected from the face list to generate an output face list. The output face list may then be provided to a processor of an imaging device for the detection of an image based on at least one of coordinate and scale values of the one or more faces on the output face list.
US09053346B2 Low-overhead cryptographic method and apparatus for providing memory confidentiality, integrity and replay protection
A method and system to provide a low-overhead cryptographic scheme that affords memory confidentiality, integrity and replay-protection by removing the critical read-after-write dependency between the various levels of the cryptographic tree. In one embodiment of the invention, the cryptographic processing of a child node can be pipelined with that of the parent nodes. This parallelization provided by the invention results in an efficient utilization of the cryptographic pipeline, enabling significantly lower performance overheads.
US09053344B2 Securing sensitive data for cloud computing
A method and associated system for securing sensitive data in a cloud computing environment. A system has proprietary data as a record stored in a database. The system associates a hashing directive with the record prior to sending the data out to a cloud for computing services. The hashing directive classifies each data field of the record into sensitive and transactional. The hashing directive controls a mode of hashing, either one-way hashing or two-way hashing for each sensitive data field associated with the hashing directive. A cloud receives the record secured according to the hashing directive and process the record to generate a result value for a cloud process result field of the record. The system reconstitutes the record the record according to the mode of hashing indicated in the hashing directive.
US09053340B2 Enterprise application store for an orchestration framework for connected devices
Aspects described herein allow multiple devices to function as a coherent whole, allowing each device to take on distinct functions that are complementary to one another. Aspects described herein also allow the devices function as a coherent whole when interconnected devices and their respective applications are configured to operate in various operation modes, when management policies are employed to control the operation of the interconnected devices and their respective applications, when transferring content between the interconnected devices and storing the content at those devices, when obtaining access credentials for the interconnected devices that enable the devices to access enterprise resources, when a policy agent applies management policies to control operation of and interaction between the interconnected devices, and when the interconnected devices are used to access an enterprise application store.
US09053338B2 Methods, apparatuses, and computer program products for exception handling
Methods, apparatuses, and computer program products are provided for exception handling. A method may include detecting attempted performance of a prohibited action involving protected data. The method may further include determining based at least in part on a role associated with a user associated with the prohibited action whether the user has elevated rights permitting performance of the prohibited action. The method may additionally include permitting an exception allowing performance of the prohibited action only in an instance in which it is determined that the user does have elevated rights permitting performance of the prohibited action. The method may also include prohibiting performance of the prohibited action in an instance in which it is determined that the user does not have elevated rights permitting performance of the prohibited action. Corresponding apparatuses and computer program products are also provided.
US09053336B2 Document display system, display device, controller and computer readable medium
A document display system includes: a plurality of display units that display an image of an electronic document including a plurality of pages for each page unit; a plurality of detecting units that detect a display operation performed by a user to each of the plurality of display units; and a control unit that controls the display unit related to the detecting unit that detects the display operation to display a page image in order of the pages corresponding to the order of detecting the display operations.
US09053326B2 Simulated phishing attack with sequential messages
Described herein are methods, network devices and machine-readable storage media for conducting simulated phishing attacks on an individual so as to educate the individual about the various ways in which phishing attacks may be disguised. Specifically described is a simulated phishing attack involving a sequence of messages. At least one of the messages has an associated target action that would ordinary, if the attack were an actual phishing attack, result in the individual's personal information and/or computing device becoming compromised. In the simulated phishing attack, no malicious action is actually performed. At least one of the other messages is designed to draw attention to the message with the target action.
US09053315B2 Trusted system network
A method, system, and computer-readable storage media for granting a device access to a managed group are disclosed. Identification information may be exchanged between a management device in the managed group and a managed device through a secure first channel. If the identification information is verified by the management device, the managed device may be granted access to the managed group through the secure first channel. If access is granted, the managed device may access the managed group through a secure communication session on a network. If the identification information is not verified, the management device may send a cryptographic key to the managed device through the secure first channel. The cryptographic key may be used to create an encrypted communication session between the managed device and management device over the network.
US09053312B2 Methods and systems for providing bidirectional authentication
Methods and systems for providing access to a secure computing device are disclosed. A security device is used to generate a one-time password, a sequence of symbologies, and location information. The security device transmits the password, sequence and location information to the secure computing device for storage and displays the password and sequence to a user. A user device provides a password to the secure computing device in order to obtain access. The secure computing device compares the password with the stored one-time password to verify the user of the user device and sends the sequence to the user device in response. The user or user device verifies the sequence of symbologies to confirm the secure access. The location information may be used to detect fraudulent accesses to the user account.
US09053311B2 Secure network system request support via a ping request
Methods and systems for secure network system request (sysrq) via Internet Control Message Protocol (ICMP) are described. A remote computing system sends a query over a network to a target computing system and determines whether the target computing system is non-responsive to the query. When the target computing system is non-responsive to the query, the remote computing system sends an ICMP request to the target computing system over the network. The ping request includes a command to be performed by the target computing system and a key to verify authorization to perform the command.
US09053307B1 Behavior based identity system
Disclosed are various embodiments for a behavior-based identity system that recognizes and/or authenticates users based at least in part on stored behavioral events which have been observed previously or have been preconfigured. Multiple behavioral events expressed by a client relative to multiple resources of a network site are observed. The behavioral events correspond to data that a user has elected to share, and the user may opt-in or opt-out of the behavior-based identity system. A comparison is performed between the observed behavioral events and multiple stored behavioral events associated with a user identity. An identity confidence level as to whether the user identity belongs to a user at the client is generated based at least in part on the comparison.
US09053290B2 Method and system of estimating the cross-sectional area of a molecule for use in the prediction of ion mobility
A method of estimating the cross-sectional area of a molecule for use in the prediction of ion mobility gives gas phase interaction radii determination and cross-sectional algorithm computation to provide separation and characterization of structurally related isomers. More specifically, the invention provides a method of correlating the differences in the molecular structures with differences in anti-cancer activity of pre-determined anti-cancer drugs by utilizing a new algorithm for estimating the cross-sectional area of the molecules of such drugs.
US09053285B2 Thermally aware pin assignment and device placement
Embodiments of the disclosure relate to methods for facilitating the design of an integrated circuit (IC) using thermally aware pin assignment and device placement. The method includes creating a layout for the IC, the layout including a plurality of macros each having devices and pin assignments and revising the layout for the IC by repositioning a macro or a device to meet a timing requirement of the IC. The method also includes creating a thermal map of the IC based on the layout for the IC and a workload model for the IC and identifying at least one thermally critical pin assignment based on the thermal map of the IC. The method includes revising the layout by repositioning a thermally critical pin assignment and a device.
US09053282B2 Mesh planes with alternating spaces for multi-layered ceramic packages
An improved multi-layered ceramic package includes a plurality of signal planes, each having one or more signal lines; a plurality of vias, each providing one of a voltage (Vdd) power connection or a ground (Gnd) connection; and at least one reference mesh plane adjacent to one or more signal planes. The reference mesh plane includes spaced mesh lines that are separated by spaces that alternate in a narrow-wide or wide-narrow pattern. A multi-layered ceramic package, using the mesh plane with alternating spaces, generates significantly lower far-end (FE) noise in the ceramic package than a conventional mesh plane with constant spaces. The noise is further reduced by placing shield lines on opposite sides of signal lines in the signal plane. A method, computer system, and program code that generate the design for the multi-layered ceramic package are also disclosed.
US09053280B2 Rule optimization in lithographic imaging based on correlation of functions representing mask and predefined optical conditions
Methods, computer program products and apparatuses for optimizing design rules for producing a mask are disclosed, while keeping the optical conditions (including but not limited to illumination shape, projection optics numerical aperture (NA) etc.) fixed. A cross-correlation function is created by multiplying the diffraction order functions of the mask patterns with the eigenfunctions from singular value decomposition (SVD) of a TCC matrix. The diffraction order functions are calculated for the original design rule set, i.e., using the unperturbed condition. ILS is calculated at an edge of a calculated image of a critical polygon using the cross-correlation results and using translation properties of a Fourier transform. Once an optimum separation is calculated, it is incorporated into the design rule to optimize the mask layout for improved ILS throughout the mask.
US09053279B2 Pattern modification with a preferred position function
A method for pattern modification for making an integrated circuit layout is disclosed. The method includes determining a feature within a pattern of the integrated circuit layout that can be rearranged; determining a range in which the feature can be repositioned; for the feature, determining a preferred position function that exhibits extreme values at preferable positions; and rearranging the position of the feature within the range to match an extreme value of the function.
US09053278B1 System and method for hybrid cloud computing for electronic design automation
Described herein are systems and methods for a partitioned extraction-simulation technique that efficiently combines a partitioned extraction technique and a partitioned simulation technique by removing and not performing particular steps of the techniques to provide a more efficient netlist extraction and circuit simulation process. In some embodiments, a plurality of circuit simulators directly receive and process a plurality of sub-region netlists that are based on a spatial partitioning of the IC layout. In further embodiments, an EDA hybrid cloud system is implemented using pipelining and serializing of memory data. In these embodiments, an overall EDA process is divided into a plurality of pipelined stages to accelerate the computational speed of the overall EDA process. In further embodiments, EDA data is transferred, over a network, from a memory of one computer system directly to a memory of another computer system by serializing the EDA data.
US09053269B1 System and methods for OPC model accuracy management and disposition
System and methods for OPC model accuracy and disposition using quad matrix are presented. A method includes obtaining wafer data from a calibration test pattern. The method also classifies the wafer data into four quadrants of a quad matrix. The method further utilizes at least one of the four quadrants to quantify OPC model accuracy.
US09053268B1 Analytic antenna design for a dipole antenna
The present invention relates to an analytic antenna design for a dipole antenna by eliminating or reducing antenna pattern nulls and impedance anti-resonances.In accordance with one aspect of the present invention, a method for designing a wide bandwidth includes the steps of defining a charge distribution in terms of at least one form factor related parameter where the Legendre polynomial expansion of the electrostatic potential is uniquely linked to each eigenmode of the wideband antenna, and modifying one or more eigenmodes of the wideband antenna by modifying the charge distribution and unique linked Legendre polynomial coefficient.
US09053259B1 Methods, systems, and articles of manufacture for implementing pattern-based design enabled manufacturing of electronic circuit designs
Some embodiments correlate various manufacturing or design information or data with patterns used to represent electronic designs and provide pertinent pattern-based information to metrology, fabrication, or testing tools to enhance their performances of their intended functions. Some embodiments further utilize cross-design or cross-process analytics to perform various pattern-based analysis on electronic designs. Some embodiments perform squish analysis with a squish pattern library on an electronic design to represent the electronic design with squish patterns by performing pattern matching, pattern decomposition, and pattern classification process.
US09053258B2 Automatic explode based on occlusion
Methods, systems, and apparatus, including computer program products feature providing a rendering of a three-dimensional assembly of components. An explosion sequence for separating first components of the assembly is determined. The explosion sequence comprises stages in which each stage represents a different spatial relationship between two or more of the first components. A first input is received from an interactive control. A first stage in the explosion sequence is selected based on the first input. The rendering of the assembly is updated, responsive to the first input, to show the first stage of the explosion sequence. A second input is received from the interactive control. A different second stage in the explosion sequence is selected based on the second input. The rendering of the assembly is updated, responsive to the second input, to show the second stage of the explosion sequence.
US09053255B2 Semiconductor structure and method of generating masks for making integrated circuit
A method of generating masks for making an integrated circuit includes determining if a coupling capacitance value of a conductive path of a first and second groups of conductive paths of the integrated circuit is greater than a predetermined threshold value. The determination is performed based on at least a resistance-capacitance extraction result of the conductive path and a predetermined level of mask misalignment. The layout patterns are modified to increase an overall vertical distance between the first group of conductive paths and the second group of conductive paths if the coupling capacitance value is greater than the predetermined threshold value.
US09053253B2 Safety arrangement
A monitoring system including a first and a second portion. The first portion includes a controller for receiving a code sequence. The first portion is configured to connect the system to a common data bus. The first portion is configured to provide a synchronization signal to the second portion when the two portions are in a predetermined position. The second portion includes a controller for providing the code sequence to the first portion and the first portion being further configured to output the code sequence for verification by a verification entity.
US09053251B2 Providing a sideband message interface for system on a chip (SoC)
According to one embodiment, a system on a chip includes multiple agents each corresponding to an intellectual property (IP) logic and a fabric to couple the agents. The fabric can include a primary message interface and a sideband message interface. The fabric further includes one or more routers to provide out-of-band communications between the agents via this sideband message interface. To effect such communication, the router can perform a subset of ordering rules of a personal computer (PC)-based specification for sideband messages. Other embodiments are described and claimed.
US09053250B2 Dual-mode tablet input system with primary computer wherein first mode is keyboard input with computer and second mode involves mirroring with computer
Examples of the present invention disclose a dual-mode tablet input system. According to one implementation, the system includes a portable electronic device configured to communicate with a primary computer. When a connection between the primary computer and portable electronic device is established, a mode change controller affiliated with portable electronic device is configured to switch the portable electronic device from a first operating mode to a second operating mode for facilitating user input on the primary computer and associated display.
US09053246B2 USB class protocol modules
A computer system includes USB class protocol-aware modules for USB devices as part of a xHCI host controller. The protocol-aware modules serve as accelerators by implementing critical portions of the device class protocols, which includes fetching higher level protocol data directly from client buffers for transmission and delivering decoded data to client buffers on receipt; and emulating a register-based interface for the benefit of system software on the host computer.
US09053244B2 Utilization-aware low-overhead link-width modulation for power reduction in interconnects
Methods and apparatus relating to low-overhead utilization-aware link-width modulation to reduce power consumption in interconnects are described. In one embodiment, a link width modulation logic adjusts the width of an interconnect link. More particularly, the link width modulation logic causes the interconnect link to transition from a first width to a second width based on comparison of a utilization value associated with the interconnect link against at least one of a plurality of utilization threshold values. Other embodiments are also disclosed and claimed.
US09053240B2 Computer program testing
To centrally manage execution of tests of software in an event oriented manner, a test execution engine reads a first test case from a test case component, where the test case represents tasks that have to be run to test a first procedure of a software program under evaluation. Further, the test execution engine identifies a participant node configured for sending events to an event queue and obtains events from the event queue. With those obtained events, the test execution engine evaluates whether the first procedure of the software program executed successfully and indicates whether the first procedure executed properly. The participant node has a node agent transmits events about the procedure and the first test case to the event queue.
US09053235B1 Program code interface for providing program code and corresponding results of evaluating the program code
A device may receive an indication to evaluate a first portion of program code and a second portion of program code provided in a first section of a user interface. The device may evaluate the first portion of program code and the second portion of program code. The device may generate a first result corresponding to the first portion of program code and may generate a second result corresponding to the second portion of program code based on evaluating the first portion of program code and the second portion of program code. The device may provide the first result and the second result in a second section of the user interface. The second section may be separate from the first section. The device may provide a correspondence indicator that indicates a correspondence between the first result and the first portion of program code.
US09053234B2 Collapsible stack trace
A tool for analyzing software is enhanced to provide multiple views of a stack trace, with each view having a different level of detail. Different views may be lightly simplified, moderately simplified, or heavily simplified. The display of a complete stack trace includes entries for all stack frames in the stack trace. The display of a simplified stack trace includes entries for fewer than all stack frames in the stack trace, thereby “hiding” or “collapsing” entries for some of the stack frames, relative to the complete stack trace display. After a user specifies a level of complexity with which to show a stack trace, the enhanced analysis tool GUI updates the stack trace display according to the specified level. A complexity level is associated with a set of heuristics that is used to create a view of a stack trace at that complexity level.
US09053227B2 Concurrent assertion
A concurrency assertions system disclosed herein provides for atomic evaluation of an assertion expression by locking an assertion lock upon initiating an assertion and thereby protecting the assertion evaluation from concurrent modifications to the variables in the assertion expressions. When a violation of an assertion is detected, the concurrency assertions system ensures that the exception statistics at the time of the assertion violation represents a program state where the assertion is violated, thus improving analysis of assertion violations. Furthermore, the concurrency assertions system continuously evaluates an expression for an assertion for a time period while other threads in the program are being executed.
US09053225B2 Data processing apparatus, data processing method, and storage medium
A data processing apparatus comprising: a determination unit to determine whether data input from input/output module is data to be processed by a plurality of processing modules in a setting order; and a switching unit to switch a first data and second data processing path, so that when the determination unit determines that the data input from the input/output module is not data to be processed by the processing modules in the setting order, the communication modules circulate data via the first data processing path used to transfer the data in an order in which the communication modules are connected, and otherwise, the communication modules circulate data via the second data processing path used to control the communication modules to transfer the data in the setting order.
US09053222B2 Patient safety processor
A processor-based system for analyzing physiologic data and medical care is provided wherein the patient data is analyzed to construct images that are representative of a patient's condition. The processor provides a self-modulating analysis, which is responsive to the occurrence of additional data items to increase the information contained in the images. Identifications of modes of physiologic failure by the analysis of the generated images provides for earlier recognition and intervention and improved protocolization of testing and treatment.
US09053221B2 Promotion of performance parameters in distributed data processing environment
A method of performance monitoring in a data processing environment is provided. The data processing environment includes multiple systems, each of which has resources. Each resource relates to a resource type, wherein at least one performance parameter is defined for each resource type. The method includes determining a value of the at least one performance parameter for at least one resource, aggregating performance parameter values and related resources of a resource type, creating for at least a part of the resources a next predefined aggregation level which includes all resources relating to the resource type and associating all performance parameter values to this aggregation level, and repeating the creating for at least a part of the resources a next predefined aggregation level until a predefined target aggregation level of the data processing environment has been reached.
US09053215B2 Page grouping for site traffic analysis reports
Website administrators can specify page groups and/or single pages as checkpoint nodes for site analysis reporting purposes, and can configure the system of the invention to provide information as to a particular visitation path through the checkpoints. Any group of pages can be designed as a single checkpoint node for website traffic analysis and reporting purposes. Page groups can be used in place of or in addition to individual web pages in any context where site traffic analysis is being presented or performed.
US09053213B2 Interactive optimization of scan databases for statistical testing
Generating a patient image collective (34) includes receiving a plurality of candidate images (20) and associated data. At least one inclusion/exclusion rule (44) is applied to the plurality of candidate images and associated data which results in subsets of candidate images (32). The candidate images are tested which result in at least one quality measure (40). The at least one quality measure (40) and associated candidate images are reviewed. The at least one inclusion/exclusion rule (44) is refined based on the reviewed at least one quality measure (40) by at least one of: adding a rule, modifying a rule, deleting a rule, removing a candidate image; and adding a candidate image. The steps of applying the at least one inclusion/exclusion rule through refining the at least one inclusion/exclusion rule are repeated until an optimized collective of images is generated based on a collective size and the at least one quality measure (40). The generated collective is outputted to a data store (34).
US09053212B2 Multi-dimensional metadata in research recordkeeping
A system and method for facilitating data organization, for example in the organization of data in management of intellectual property records, is disclosed herein. Further, the present invention particularly provides a contextualization of information objects so that a full value of research and development (R&D) efforts can be accumulated by an organization. The system as disclosed herein collects information (raw) objects from a plurality of sources. Then, based on inferred context and user input, the system classifies each object in multiple dimensions according to needs of the application; and finally creates a high value, layer rich database embodying a context as well as a result to add value to a research process.
US09053206B2 Method and system of extracting web page information
A method of extracting web page information includes analyzing a document object model (DOM) structure of a sample page to obtain a position of information to be extracted. A node corresponding to the position of the information to be extracted is rendered in the DOM structure as a target node. Starting from the target node, relative position information is traversed recursively until the root node is found to create candidate paths. The candidate paths are rendered as a path set. A DOM structure of a page to be extracted is analyzed, information is located in the DOM structure of the page starting from the root node in the path set, and an extracted node candidate set is obtained. A node having highest robustness from the extracted node candidate set is selected to be a final extracted node and extracted information is obtained using the extracted node.
US09053202B2 Apparatus and methods for user generated translation
Disclosed are methods and apparatus for enabling user communities around the world to engage in translation of web properties while using such web properties. In certain embodiments, a translation interface is provided with a served web property to allow users to submit translations for user interface (UI) strings from a particular property interface. While a user is engaging with the web property, the interface can also enable in-context editing and submission of translations. For example, translation submission can be presented as a replacement for the translated text within the page that is being rendered to the translator user. Certain interface embodiments also are configured to allow the user community to give feedback on the submitted translations.
US09053190B1 Electronic book building system and method
A method, system and computer program product for building a custom publication is provided. A user may access a library of electronic source publications having defined units of content within the source publications, the library storing source publication metadata for the defined units of content. The user may select units of content from source publications for inclusion in an unpublished custom publication. The unpublished custom publication may be published in an electronic or printed format, wherein publishing the unpublished custom publication comprises applying consistent styling to common structural elements in the set of custom publication units of content to create a published custom publication with consistent styling.
US09053186B2 Method and apparatus for detecting and explaining bursty stream events in targeted groups
A method and apparatus are provided for detecting and explaining bursty stream events in targeted groups. In one example, the method includes receiving validated bursty events, finding explanatory data sources having relevant bursty events that are relevant to the validated bursty events, wherein the explanatory sources explain the presence of the validated bursty events, correlating the validated bursty events to the relevant bursty events of the explanatory data sources to obtain burst results, and sending the burst results to a burst database that is accessible to an end user.
US09053182B2 System and method for making user generated audio content on the spoken web navigable by community tagging
Methods and arrangements for creating and building subcategories in a user-based voice application. User posts are appended to a category in a voice application and subdivision of the category is prompted upon satisfaction of a first condition. The category is designated as a parent category, and at least one subcategory nomination are solicited from users. User input is solicited on appending at least one nominated subcategory to the parent category, and a nominated subcategory is appended to the parent category upon satisfaction of a second condition. User input is solicited to reassign a user post from the parent category to at least one subcategory.
US09053179B2 Citation network viewer and method
A visualization-based interactive legal research tool that generates from a multi-dimensional citation network a semantics-constrained citation sub-network that focuses on one individual issue in which a user is interested, and puts the sub-network on an interactive user interface (“UT”), which allows the researcher to browse, navigate, and jump over to start new sub-networks on different issues that are relevant to original issues.
US09053170B2 Relationship discovery in business analytics
A subset of (k−1)-dimensional tables are received, wherein k is greater than 1. A set of k-dimensional tables is created by combining each of the (k−1)-dimensional tables with a non-included dimension corresponding to a 1-dimensional table. Significance of interaction and interaction effect size is computed for the created set of k-dimensional tables to determine dimension and measure interactions.
US09053167B1 Storage device selection for database partition replicas
A system that implements a data storage service may store data in multiple replicated partitions on respective storage nodes. The selection of the storage nodes (or storage devices thereof) on which to store the partition replicas may be performed by administrative components that are responsible for partition management and resource allocation for respective groups of storage nodes (e.g., based on a global view of resource capacity or usage), or the selection of particular storage devices of a storage node may be determined by the storage node itself (e.g., based on a local view of resource capacity or usage). Placement policies applied at the administrative layer or storage layer may be based on the percentage or amount of provisioned, reserved, or available storage or IOPS capacity on each storage device, and particular placements (or subsequent operations to move partition replicas) may result in an overall resource utilization that is well balanced.
US09053160B2 Distributed, real-time online analytical processing (OLAP)
Source data of an event stream is parsed and supplemented with additional data from reference data sources, producing an enriched event stream from the parsed event stream data. The data records of the enriched event stream are partitioned into data fields designated as a dimension partition and a metric partition, which are partitioned into sub-dimension projections mapped to a plurality of storage keys, such that each of the storage keys includes one or more placeholder wildcard values and each of the storage keys is stored into a database of the computer system by the computer processor. The stored storage keys are then aggregated onto a two-dimensional coordinate vector such that, if the computer processor identifies a permuted storage key having metric values for which a corresponding storage key already exists in the database, then the computer processor aggregates the metric values of the identified storage key with the metric values of the corresponding storage key, and if the computer processor does not identify the permuted storage key as having a corresponding storage key that already exists in the database, then the computer processor writes the metric values of the permuted storage key into the database, comprising initial values for the key combination of dimension values.
US09053146B1 Apparatuses, methods and systems for a web access manager
The APPARATUSES, METHODS AND SYSTEMS FOR A WEB ACCESS MANAGER implement efficient and scalable monitoring, regulation, and allocation of communications resources within an enterprise. In one embodiment, a web access management processor-implemented method is disclosed, comprising: obtaining a request for network resource access; extracting from the network resource access request a request attribute; querying a database using the extracted request attribute; obtaining a network access rule to apply to the network resource access request, based on querying the database; applying the network access rule to the network resource access request; and determining via a processor whether the network resource access is permitted based on applying the network access rule to the network resource access request; determining that the network resource access is permitted, based on applying the network access rule to the network resource access request; and forwarding the request for processing the network resource access request.
US09053141B2 Serialization of access to data in multi-mainframe computing environments
A multi-mainframe operating system serialization method can include receiving, in a first computing system, a request to access a data set on behalf of a first peer application, sending, in the first computing system, a notification to a second peer application to obtain a normal enqueue, in response to the second peer application obtaining the normal enqueue, obtaining, in the first computing system, a first rider enqueue for the data set and sending, in the first computing system, a communication to peer instances to obtain additional rider enqueues for the data set, the additional rider enqueues corresponding to the first rider enqueue.
US09053139B2 Forming configuration information about components of systems which include components for which acquisition of configuration information is restricted
A mechanism is provided for managing configuration information about components of a management target system. Identification is made of the existence of a first component from configuration information about one or more other components except the first component. Pattern data is stored for analogizing configuration information about a component for which acquisition of the configuration information is restricted, the pattern data being associated with a set of one or more conditions and attribute values. Pattern data is retrieved whose configuration information about a component related to the first component, among the one or more other components, satisfies the set of conditions. Analogized configuration information is formed about the first component using attribute values associated with the retrieved pattern data.
US09053138B2 Merging compressed data arrays
Compressed data sets can be merged without unraveling the compressed data sets. Concatenations of vectors of a first compressed data set that extend beyond a second compressed data set with no data vectors are represented in a third compressed data set. The no data vectors represent lack of data to be contributed from the second compressed data set. The third compressed data set represents a merger of the first and the second compressed data sets. Counterpart vectors of the first and second compressed data sets are determined using compression information for the vectors. Concatenations of the counterpart vectors are represented in the third compressed data set, as well as compression information that accounts for the determined counterpart vectors.
US09053127B2 System and method for storing a dataset of image tiles
System and method for storing a dataset of image tiles. Method includes determining a number of zoom levels, accessing a cluster file that includes a subset of the zoom levels, and accessing the image tiles. For each of the image tiles, a cluster name is computed. For each of the image tiles, if the cluster file has a name that matches the computed cluster name, an image tile pointer is stored in a fixed length index, and the image tile associated with the computed cluster name is stored. For each of the image tiles, if the cluster file name does not match the computed cluster name, another subset of the zoom levels is computed, a new cluster file is created, an image tile pointer is created and stored, and the image tile is stored associated with the computed cluster name in the new cluster file according to the image tile pointer.
US09053123B2 Mirroring file data
High availability and disaster recovery can be achieved within a database management system by detecting which parts of a file have changed and sending the changed parts to secondary servers, without sending the entire file that has experienced the changes. A log cracker reads data from a transaction log that stores records from a database and a separately maintained file system. The log cracker sends mirror commands with some of the transaction log data to the file system to initiate mirroring of the data from the file system to secondary servers. The log data is then subsequently sent to the secondary servers as well, to enable identification of changed data without having to transfer the entire file that has been changed.
US09053118B1 Image artifact prevention
Systems and methods are provided for processing images (or other such instances of content) to detect which of the images exhibit artifacts when modified, such as by applying standard transformation algorithms to modify the images. Such techniques enable transformation algorithms to be applied to the detected images to minimize or prevent artifacts. In some embodiments, the headers of the detected images can be tagged with transformative instructions that indicate which transformation algorithms to apply. Responsive to a request from a web client to modify and render one of the detected images, embodiments obtain the requested image, read the transformative instructions in the header, apply the transformation algorithm specified in the header to modify the image so as to minimize or prevent artifacts, and render the modified image.
US09053113B2 Autonomic generation of document structure in a content management system
A content management system (CMS) autonomically generates structure for a document when a synchronization rule references structure that does not exist in the document. A dynamic structure policy specifies at least one criterion that determines if and how the structure is autonomically generated. By autonomically generating structure in a document, a CMS administrator or CMS user (such as the author) is relieved of the manual task of generating the structure before the synchronization rule can be successfully processed. Once dynamically generated, the added structure may be auto-populated with dummy data or with default data specified in the autonomic structure policy.
US09053110B2 Interaction-based management of contact entries
Embodiments of the invention relate to interaction-based management of contact entries. In one embodiment, at least one contact in a set of contacts is determined to be associated with an archiving indicator. The archiving indicator indicates that one or more archiving operations are to be performed on the at least one contact. The set of contacts is associated with a user. At least one archiving threshold associated with the at least one contact is identified based on the determination. A determination is made as to whether the at least one archiving threshold has been satisfied. The at least one contact is archived based on the at least one archiving threshold having been satisfied.
US09053105B2 Information search method, information search server, and information search system for providing content based on current progress status of content
In an information search server 600, a database includes a table storing a progress status of content, and information related to the content at the progress status, and a table storing user information with respect to a content playback apparatus, an identifier of the content playback apparatus, and an identifier of a terminal apparatus that differs from the content playback apparatus. A connecting user management unit manages user information with respect to the content playback apparatus connected to the information search server. A related information acquisition unit acquires a current progress status of content being played back on the content playback apparatus, and acquires information related to the content at the current progress status. A connecting user management unit identifies a terminal apparatus that differs from the content playback apparatus, and the related information acquisition unit transmits the related information to the terminal apparatus.
US09053092B2 System authorizing direct data transfers between memories of several components of that system
The invention relates in particular to a computer system including peripheral devices (600) and at least one switch (605) connected to each device. A first device includes a means for initiating a control of direct access to memory areas, each one of which is associated with a separate element of the system. The switch includes a means for transmitting at least a portion of the control to each element. At least one element comprises a second device including a means for receiving at least one control of direct access to a memory area of said second device, said control being received from said first device via said switch, and a means for transmitting said received control to a component of said second device. Said system allows said first device to perform a direct data transfer to or from a memory of said first peripheral device from or to each element.
US09053090B2 Translating texts between languages
Methods and computer systems for translating sentences between languages from an intermediate language-independent semantic representation are provided. Based on a comprehensive understanding about languages and semantics, exhaustive linguistic descriptions are used to analyze sentences, build syntactic structures and language independent semantic structures and representations, and synthesize one or more sentences in a natural or artificial language. A computer system is also provided to analyze and synthesize various linguistic structures and perform translation of a wide spectrum of various sentence types. As result, a generalized data structure, such as a semantic structure, is generated from a sentence of an input language and can be transformed into a natural sentence expressing its meaning correctly in an output language. The methods and systems can be applied to automated abstracting, machine translation, natural language processing, control systems, Internet information retrieval, etc.
US09053082B2 Spreadsheet data processing method and system
A method carried out in a computer system having thereon a spreadsheet file with lines and columns, the columns representing fields and each line representing a record, the sheet also having a header portion with a designation line with a field designation for each column, wherein the method identifies a single reference field, allocates a field type to fields other than the reference field, defines a link for each field with a field type and thereby link with another linked field, builds a hierarchical model representing the links, and generates a graphical hierarchical multilevel representation of the sheet content, with graphical views showing one or more hierarchical levels and displaying this representation on a display.
US09053081B2 Creating, updating, saving, and propagating customized views of table and grid information
Systems, methods, and computer products that create, update, save, and propagate customized views of table and grid information, including spreadsheets. The embodiment of the invention comprises associating at least one column as a first view of the table, associating at least one column as a second view of the table; and combining the first view with the second view, thereby efficiently creating a third view. Further, the combining includes dragging the second view; and dropping the dragged second view into the first view. The combining also includes creating a thumbnail image representing the first view or the second view. It also comprises updating columns that are shared between views. Additionally, the views may be stored, and new views may be propagated from the stored views.
US09053080B2 Method and apparatus for providing access to and working with architectural drawings on a personal digital assistant
A method, apparatus, and article of manufacture provide access to architectural documents in a network based on-line web based system. Servers that are accessible from the Internet maintain persistent multiple architectural documents of different media types. An online user is provided, from the servers via the Internet, a set of basic virtual design tools that have persistent properties and may be copied. The virtual design tools may also be utilized to work with the architectural documents. A workspace is also provided for viewing, accessing, and modifying the architectural documents.
US09053062B2 Memory chip for converting data received from controller controlling reading and writing of data
According to one embodiment, a memory chip, which is connected to a controller that controls reading and writing of data in response to a request from an external device, includes: a memory including a special area that is a predetermined data storage area; a key storage unit that stores therein a second key that corresponds to a first key used by the external device to convert the data; a converting unit that receives, from the controller, data to be written into the special area and generates converted data by converting the data to be written using the second key; and a writing unit that writes the converted data into the special area.
US09053059B2 Roots-of-trust for measurement of virtual machines
Embodiments of techniques and systems associated with roots-of-trust (RTMs) for measurement of virtual machines (VMs) are disclosed. In some embodiments, a computing platform may provide a virtual machine RTM (vRTM) in a first secure enclave of the computing platform. The computing platform may be configured to perform an integrity measurement of the first secure enclave. The computing platform may provide a virtual machine trusted platform module (vTPM), for a guest VM, outside the first secure enclave of the computing platform. The computing platform may initiate a chain of integrity measurements between the vRTM and a resource of the guest VM. Other embodiments may be described and/or claimed.
US09053050B2 Determining a desirable number of segments for a multi-segment single error correcting coding scheme
A desirable number of segments for a multi-segment single error correcting (SEC) coding scheme is determined based on scrambling information for a memory. The desirable number of segments can be the minimum number of segments required to satisfy a masked write segmentation requirement and a multi-bit upset size requirement. In one aspect, the memory scrambling information can specify the different scrambling techniques employed by the memory (e.g., Input-Output (IO) cell scrambling, column scrambling, column twisting, strap distribution, etc.). Based on the scrambling information, a mapping between the logical structure and physical layout for the memory can be derived. The mapping can be used to determine the least number of segments needed to satisfy the masked write requirement and the multi-bit upset size requirement.
US09053049B2 Translation management instructions for updating address translation data structures in remote processing nodes
Translation management instructions are used in a multi-node data processing system to facilitate remote management of address translation data structures distributed throughout such a system. Thus, in multi-node data processing systems where multiple processing nodes collectively handle a workload, the address translation data structures for such nodes may be collectively managed to minimize translation misses and the performance penalties typically associated therewith.
US09053046B2 Edge devices settings via external source
A method for externally configuring a device, wherein the device is devised for configuring, comprising positioning in a sufficient proximity external to the device a portable object provided with a representation of a configuration data for the device, wherein the representation is according to a standard non-custom industrial practice, further obtaining by the device the representation from the portable object, deciphering the representation into the configuration data by the device, and responsively configuring the device according to the configuration data by the device, and an apparatus for performing the same.
US09053040B2 Filtering mechanism for render target line modification
Modification messages may be filtered to reduce the load on a message channel between a render cache and a frame buffer compression. A group of cache lines may be checked to see whether both a subspan request hits an unlit bit and a modify message was already sent. If so, the modification message may be filtered.
US09053039B2 Installation cache
Data caching methods and systems are provided. The data cache method loads data into an installation cache and a cache (simultaneously or serially) and returns data from the installation cache when the data has not completely loaded into the cache. The data cache system includes a processor, a memory coupled to the processor, a cache coupled to the processor and the memory and an installation cache coupled to the processor and the memory. The system is configured to load data from the memory into the installation cache and the cache (simultaneously or serially) and return data from the installation cache to the processor when the data has not completely loaded into the cache.
US09053027B1 Techniques for maintaining and restoring dirty caches across CPU resets
Described are techniques for performing caching. Write operations of a single transactions are received. Write data of the write operations is cached in one or more cache pages of a first cache of a first storage processor. State information is set for the one or more cache pages of the first cache from an invalid state to a prepared state. The write data of the write operations is also stored in a second cache of a second storage processor. A transaction commit state for the single transaction is set indicating that transaction commitment processing for the first cache has commenced and is pending. State information of the one or more cache pages of the first cache is set from the prepared state to a dirty state. The transaction commit state for the single transaction is updated to indicate that the transaction commitment processing for the first cache is completed.
US09053026B2 Intelligently responding to hardware failures so as to optimize system performance
A method, system and computer program product for intelligently responding to hardware failures so as to optimize system performance. An administrative server monitors the utilization of the hardware as well as the software components running on the hardware to assess a context of the software components running on the hardware. Upon detecting a hardware failure, the administrative server analyzes the hardware failure to determine the type of hardware failure and analyzes the properties of the workload running on the failed hardware. The administrative server then responds to the detected hardware failure based on various factors, including the type of the hardware failure, the properties of the workload running on the failed hardware and the context of the software running on the failed hardware. In this manner, by taking into consideration such factors in responding to the detected hardware failure, a more intelligent response is provided that optimizes system performance.
US09053009B2 High throughput flash memory system
There is disclosed a memory system and method. The memory system may include a plurality of memory planes including two or more data memory areas, and a memory controller adapted to controlling reading, writing, and erasing of the plurality of memory planes. When any one of the data memory areas is occupied with one of a write operation and an erase operation, the controller may reconstruct data stored in the one occupied data memory area by reading parity information and data stored in the plurality of memory areas other than the one occupied data memory area.
US09053003B2 Memory compaction mechanism for main memory databases
The present invention extends to methods, systems, and computer program products for performing memory compaction in a main memory database. The main memory database stores records within pages which are organized in doubly linked lists within partition heaps. The memory compaction process uses quasi-updates to move records from a page to the emptied to an active page in a partition heap. The quasi-updates create a new version of the record in the active page, the new version having the same data contents as the old version of the record. The creation of the new version can be performed using a transaction that employs wait for dependencies to allow the old version of the record to be read while the transaction is creating the new version thereby minimizing the effect of the memory compaction process on other transactions in the main memory database.
US09053001B2 Method and apparatus for enhanced design of multi-tier systems
A system and method for performing enhanced modeling of multi-tiered architectures is presented. The system and method enable selection of a preferred design for a multi-tiered architecture of components based on a set of established criteria, and may employ certain vectors and functions in component attributes, and such attributes may include scalability and scope of fault attributes.
US09052990B2 Techniques for managing pinned memory
A technique for managing pinned memory in a data processing system includes determining whether a first loadable module is completely utilizing pinned memory assigned to the first loadable module. In response to determining the first loadable module is not completely utilizing the pinned memory assigned to the first loadable module, the pinned memory that is not being utilized by the first loadable module is converted to kernel lock memory. In response to a second loadable module requesting pinned memory and non-kernel lock memory not being available to meet the request, one or more pages of the kernel lock memory are assigned to the second loadable module. In response to the second loadable module requesting the pinned memory and the non-kernel lock memory being available to meet the request, one or more pages of the non-kernel lock memory are assigned to the second loadable module.
US09052966B1 Migrating code from a source format to a target format
Source code is automatically migrated from a source format to a target format. In particular, the execution of the source code is dynamically analyzed for incompatibilities using runtime information. Solutions for the incompatibilities are additionally determined. Based on the identified incompatibilities and solutions, the source code is converted from the source format to the target format.
US09052957B2 Method and system for conducting intensive multitask and multiflow calculation in real-time
The system for conducting intensive multitask and multistream calculation in real time comprises a central processor core (SPP) for supporting the system software and comprising a control unit (ESCU) for assigning threads of an application, the non-critical threads being run by the central processor core (SPP), whereas the intensive or specialized threads are assigned to an auxiliary processing part (APP) comprising a set of N auxiliary calculation units (APU0, . . . , APUN-1) that are optimized for fast processing of certain operations, a memory space (SMS) shared by the auxiliary calculation units (APU0, . . . , APUN-1) via an internal network and a unit (ACU) for controlling and assigning the auxiliary resources. The various elements of the system are arranged in such a manner that communication between the various auxiliary calculation units (APU0, . . . , APUN-1) or between those auxiliary calculation units (APU0, . . . , APUN-1) and the central processor core (SPP) is effected via the shared memory space (SMS) and the internal network.
US09052954B2 Predicting resource requirements for a computer application
A resource consumption model is created for a software application, making it possible to predict the resource requirements of the application in different states. The model has a structure corresponding to that of the application itself, and is interpreted to some degree in parallel with the application, but each part of the model is interpreted in less time than it takes to complete the corresponding part of the application, so that resource requirement predictions are available in advance. The model may be interpreted in a look-ahead mode, wherein different possible branches of the model are interpreted so as to obtain resource requirement predictions for the application after completion of the present step. The model may be derived automatically from the application at design or compilation, and populated by measuring the requirements of the application in response to test scenarios in a controlled environment.
US09052953B2 Autonomous computer session capacity estimation
Systems and methods are disclosed for estimating and updating the capacity associated with resources in a virtualized computing environment. A capacity estimation value may be stored in computer memory. The capacity estimation value may estimate how many concurrent sessions a resource in the virtualized computing environment has workload capacity to desirably handle. The system may monitor one or more resource consumption metrics of the resource on an ongoing basis. The capacity estimation value may be updated based on, inter alia, the monitoring. The capacity estimation value may be used when a request is received to create a new session in the resource.
US09052947B2 Unified optimistic and pessimistic concurrency control for a software transactional memory (STM) system
A method and apparatus for unified concurrency control in a Software Transactional Memory (STM) is herein described. A transaction record associated with a memory address referenced by a transactional memory access operation includes optimistic and pessimistic concurrency control fields. Access barriers and other transactional operations/functions are utilized to maintain both fields of the transaction record, appropriately. Consequently, concurrent execution of optimistic and pessimistic transactions is enabled.
US09052934B2 Remote command interpreter
A host instrument is disclosed that is capable of supporting non-native command sets. The host instrument uses interpretation rules to translate a non-native command into one or more actions. The host instrument also uses the interpretation rules to determine the appropriate responses to be transmitted, if any. The actions and responses of the host instrument emulate those of an alternate instrument that supports the command set.
US09052933B2 Multitenant hosted virtual machine infrastructure
A multi-tenant virtual machine infrastructure (MTVMI) allows multiple tenants to independently access and use a plurality of virtual computing resources via the Internet. Within the MTVMI, different tenants may define unique configurations of virtual computing resources and unique rules to govern the use of the virtual computing resources. The MTVMI may be configured to provide valuable services for tenants and users associated with the tenants.
US09052929B2 Electronic device, application determination method, and application determination program
The cellular telephone device includes a control unit that executes any one of a plurality of applications, and a storage unit that stores an execution count of an application executed by the execution unit. The control unit determines an application to be executed after terminating or suspending a predetermined application, based on the execution count stored in the storage unit.
US09052925B2 Device, method, and graphical user interface for managing concurrently open software applications
A method includes displaying a first application view. A first input is detected, and an application view selection mode is entered for selecting one of concurrently open applications for display in a corresponding application view. An initial group of open application icons in a first predefined area and at least a portion of the first application view adjacent to the first predefined area are concurrently displayed. The initial group of open application icons corresponds to at least some of the concurrently open applications. A gesture is detected on a respective open application icon in the first predefined area, and a respective application view for a corresponding application is displayed without concurrently displaying an application view for any other application in the concurrently open applications. The open application icons in the first predefined area cease to be displayed, and the application view selection mode is exited.
US09052919B2 Specialized network fileserver
A method and apparatus of a portable storage device that provides a specialized network fileserver is described. In an exemplary method, the portable storage device retrieves a list of applications on the portable storage device, where each of the applications has a private filesystem. For each of the applications, the portable storage device determines if that application will share the corresponding private filesystem and adds that private filesystem to a shared filesystem of the portable storage device is that is shareable. The portable storage device further advertises the shared filesystem to a host that is coupled to the portable storage device.
US09052917B2 Data storage for remote environment
A method can include receiving operating system environment settings via a network; storing the received operating system environment settings to a storage device; establishing an operating system environment according to the stored operating system environment settings; receiving information via the network; instructing the established operating system environment according to the received information; and, in response to the instructing, transmitting via the network information generated at least in part by the established operating system environment. Various other apparatuses, systems, methods, etc., are also disclosed.
US09052915B2 Booting a machine using thermal credits to adjust operating speed of a component
Booting a computing machine including increasing an operating speed of at least one component of the computing machine during a boot process in response to the computing machine including a sufficient amount of thermal credits and decreasing the operating speed of at least one of the components in response to the computing machine completing the boot process.
US09052910B2 Efficiency of short loop instruction fetch
A design structure provides instruction fetching within a processor instruction unit, utilizing a loop buffer, one or more virtual loop buffers, and/or an instruction buffer. During instruction fetch, modified instruction buffers coupled to an instruction cache (I-cache) temporarily store instructions from a single branch, backwards short loop. The modified instruction buffers may be a loop buffer, one or more virtual loop buffers, and/or an instruction buffer. Instructions are stored in the modified instruction buffers for the length of the loop cycle. The instruction fetch within the instruction unit of a processor retrieves the instructions for the short loop from the modified buffers during the loop cycle, rather than from the instruction cache.
US09052896B2 Adjusting mobile device state based on user intentions and/or identity
In one embodiment, when a computing system is in a first state, a first set of inputs from one or more first sensors is detected. A first sensor value array is generated, and the first value array is fed as input to a first function generated by a first neural network. One or more first output values are calculated based on the first function, and a determination is made based on these first output values if a first action has occurred. If a first action has occurred, a second sensor value array is generated from a second set of inputs from one or more second sensors. The second sensor value array is fed as input to a second function generated by a second neural network. One or more second output values are calculated based on the second function, and the first state is exited based on these second output values.
US09052890B2 Execute at commit state update instructions, apparatus, methods, and systems
An apparatus including an execution logic that includes circuitry to execute instructions, and an instruction execution scheduler logic coupled with the execution logic. The instruction execution scheduler logic is to receive an execute at commit state update instruction. The instruction execution scheduler logic includes at commit state update logic that is to wait to schedule the execute at commit state update instruction for execution until the execute at commit state update instruction is a next instruction to commit. Other apparatus, methods, and systems are also disclosed.
US09052889B2 Load pair disjoint facility and instruction therefor
A Load/Store Disjoint instruction, when executed by a CPU, accesses operands from two disjoint memory locations and sets condition code indicators to indicate whether or not the two operands appeared to be accessed atomically by means of block-concurrent interlocked fetch with no intervening stores to the operands from other CPUs. In a Load Pair Disjoint form of the instruction, the accesses are loads and the disjoint data is stored in general registers.
US09052888B2 Vectorization in an optimizing compiler
An optimizing compiler includes a vectorization mechanism that optimizes a computer program by substituting code that includes one or more vector instructions (vectorized code) for one or more scalar instructions. The cost of the vectorized code is compared to the cost of the code with only scalar instructions. When the cost of the vectorized code is less than the cost of the code with only scalar instructions, the vectorization mechanism determines whether the vectorized code will likely result in processor stalls. If not, the vectorization mechanism substitutes the vectorized code for the code with only scalar instructions. When the vectorized code will likely result in processor stalls, the vectorization mechanism does not substitute the vectorized code, and the code with only scalar instructions remains in the computer program.
US09052886B2 High voltage dedicated charging port
Circuitry in an adapter, such as a power supply, can provide power at a desired voltage level to a portable device. The circuitry may assert one of several electrical configurations on the cabling that electrically connects the portable device to the external device to indicate to the external device a desired voltage level.
US09052882B2 Blower control device, blower control method, and computer-readable recording medium
A blower control device changes a PQ characteristic in a second table so that an operating point (QN, PN) on the PQ characteristic in the second table agrees with an operating point (Q0, P0) on a PQ characteristic in a first table. At this time, the blower control device changes the PQ characteristic in the second table at a rate based on QN and Q0. Furthermore, the blower control device changes a load noise characteristic in the second table at a rate based on QN and Q0. Then, the blower control device calculates load noise corresponding to the operating point (Q0, P0) with respect to each rotation frequency ratio from the changed load noise characteristic. And then, the blower control device determines a rotation frequency ratio corresponding to the lowest load noise as a rotation frequency ratio at which a plurality of fans is rotated.
US09052879B2 Mapping assurance method and apparatus for integrating systems
A method and apparatus is provided to assure transformations between applications in an integration project. This assurance of transformations between applications includes mapping one or more related fields from a set of fields between the one or more source applications and the one or more target applications according to a set of integration objectives, checking a type compatibility for each of the one or more related fields mapped between the one or more source applications and the one or more target applications and indicating a mapping status according to the type compatibility between the source applications and the target applications.
US09052860B2 Image forming apparatus, computer-readable storage medium for computer program, and control method thereof
An image forming apparatus that prints and edits a document includes a user identification portion, a print management portion that records print management information indicating a user who performs abort operation of printing, an edit management portion that records edit management information, a determination portion that determines, based on the print management information, whether or not the user is a print suspended operator who has performed the abort operation previously, a page extraction portion that, when the print suspended operator performs reprinting operation for giving instructions to print the document that has been updated, extracts pages of the document which were printed successfully when printing of the document was suspended and have been updated thereafter, and a print controller that controls the image forming apparatus such that the image forming apparatus prints at least unprinted pages of the document and the pages extracted by the page extraction portion.
US09052857B2 Processing instruction device, processing apparatus, and non-transitory computer readable medium
A processing instruction device includes a memory, a display instruction data acquisition unit, a changing unit, a display controller, an operation data acquisition unit, and a processing instruction unit. The memory stores management data and first display instruction data. The display instruction data acquisition unit acquires second display instruction data from an external device. The changing unit specifies second processing identification data corresponding to display position identification data, specifies first processing identification data corresponding to the specified second processing identification data, and changes the first processing identification data corresponding to the display position identification data to the specified first processing identification data. The display controller causes a display device to display an image in accordance with the first or second display instruction data. The operation data acquisition unit acquires operation data. The processing instruction unit gives an instruction to perform processing in accordance with processing instruction data.
US09052852B2 Print control method and apparatus
Upon designating bookbinding print, preview images are displayed in a layout after bookbinding. When “store” of intermediate data is designated in a print process, a spooler (302) stores intermediate data and an output job setup file in a spool file (303). When the stored job is selected, a previewer (306) displays a list of jobs, and displays a print preview image. In this case, upon setting bookbinding print, pages are displayed in a spread state and order after bookbinding. Also, the open direction (right or left open), and the bookbinding unit are also expressed on preview images.
US09052851B1 Simulation of preprinted forms
In one embodiment, a method for the simulation of preprinted forms is disclosed. The method includes receiving a first image as a back drop of a form, the image including a plurality of printable features corresponding to positions of the image. A second image is received as data to be filled in to the form, the second image including a second plurality of printable features corresponding to positions of the image, wherein the second plurality of printable features each have an assigned ink transparency. A feature of the first image is blended with a corresponding feature of the second image based on the assigned ink transparencies to form a blended feature. The blended features are combined to form a blended image that blends the first and the second images and is suitable for printing.
US09052850B2 Printer driver, storage medium, and information processing apparatus
A printer driver includes a plurality of modules, an interface unit that accepts the addition of plug-in including one or more additional modules for realizing a predetermined function, and a storage unit that stores setting information that defines information related to a partial process for realizing the predetermined function of the plug-in. The plurality of modules performs a process that is the partial process for realizing the predetermined function and cannot be realized in the additional modules included in the plug-in in accordance with the setting information.
US09052848B2 Web printing a print request via a list of job tasks
One embodiment is a method that analyzes a print request that is transmitted over an internet and received at a cloud print system. The method then executes with priorities a list of job tasks to print the print request at a web-enabled printer.
US09052837B2 Processing communication data in a ships passing condition
Articles of manufacture, apparatuses, and methods for processing communications between a control unit and a channel subsystem in an input/output processing system are disclosed. Embodiments of the invention include an article of manufacture including at least one computer usable medium having computer readable program code logic to processing communications between a control unit and a channel subsystem in an input/output processing system. The computer readable program code logic performs a method including: sending a message in a first mode from the control unit to the channel subsystem; receiving a command in a second mode from the channel subsystem at the control unit; determining whether the command is responsive to the message; and responsive to the command being not responsive to the message, determining whether to perform one of i) executing the command and ii) terminating the command.
US09052836B2 Memory system in which extension function can easily be set
According to one embodiment, a non-transitory medium, a controller, a memory, an extension function section, and an extension register. The controller controls the non-transitory medium. The memory which is serving as a work area is connected to the controller. The extension function section is controlled by the controller. The extension register which is provided on the memory is provided with a certain block length capable of defining an extension function of the extension function section. The controller processes a first command to write header data of a command to operate the extension function section to the extension function section through the extension register, and a second command to read header data of a response from the extension function section through the extension register.
US09052832B2 System and method for providing long-term storage for data
A system for storing files comprises a processor and a memory. The processor is configured to break a file into one or more segments; store the one or more segments in a first storage unit; and add metadata to the first storage unit so that the file can be accessed independent of a second storage unit, wherein a single namespace enables access for files stored in the first storage unit and the second storage unit. The memory is coupled to the processor and configured to provide the processor with instructions.
US09052825B2 System software interfaces for space-optimized block devices
Interfaces to storage devices that employ storage space optimization technologies, such as thin provisioning, are configured to enable the benefits gained from such technologies to be sustained. Such an interface may be provided in a hypervisor of a virtualized computer system to enable the hypervisor to discover features of a logical unit number (LUN), such as whether or not the LUN is thinly provisioned, and also in a virtual machine (VM) of the virtualized computer system to enable the VM to discover features of a virtual disk, such as whether or not the virtual disk is thinly provisioned. The discovery of these features enables the hypervisor or the VM to instruct the underlying storage device to carry out certain operations such as an operation to deallocate blocks previously allocated to a logical block device, so that the storage device can continue to benefit from storage space optimization technologies implemented therein.
US09052820B2 Multi-application environment
This document describes techniques and apparatuses enabling a multi-application environment. In some embodiments, these techniques and apparatuses enable multi-application environments having combinations of immersive interfaces, windows-based interfaces, and a desktop treated as an immersive interface.
US09052819B2 Intelligent gesture-based user's instantaneous interaction and task requirements recognition system and method
Methods and apparatus for determining an intended gesture-based input command from an incomplete gesture-based input command that is supplied to a gesture-based touch screen display that includes at least a touch sensitive region includes receiving an incomplete gesture-based input command on the touch sensitive region of the gesture-based touch screen device, the incomplete gesture-based input command including a gesture profile and a gesture direction. Gesture signals that include data representative of the gesture profile and the gesture direction are generated in response to the input command. The gesture signals are processed in a processor to predict the intended gesture-based input command. The intended gesture-based command is retrieved, with the processor, from an electronically stored standard gesture library.
US09052812B1 System for exportable graphical designs with interactive linked comments between design and playback environments
Various methods and systems for collaborating on the specification of an interactive graphical design are provided. An exemplary system comprises a graphical design environment. The system also comprises a note interface in the graphical design environment that displays a note field for accepting a text string from the user. The system also comprises a design player that renders the design. The system also comprises a discussion interface that: (i) is displayed in the design player consistently with the design; (ii) displays the text string from the user as a note; and (iii) accepts a comment from a second user regarding the note. The system also comprises a data store accessible to the graphical design environment and the design player. The comment is displayed in the graphical design environment after being accepted in the discussion interface.
US09052801B2 Flick move gesture in user interface
The disclosed method and device are directed to navigation, by a dual display communication device, through display objects.
US09052797B2 Navigation system for a 3D virtual scene
A navigation system for navigating a three-dimensional (3D) scene that includes a model or object with which a user can interact. The system accommodates and helps both novice and advanced users. To do this, the system provides a set of mini navigation wheels for experienced users that include all of the function of the larger wheels in pie shaped wedges and that acts as a cursor.
US09052792B2 Inserting a search box into a mobile terminal dialog messaging protocol
A method, system, and computer program product for inserting a search box into a mobile terminal messaging dialog. Upon receiving a dialog message (e.g., an email message) from a first user device, the method determines the format (e.g., IMAP) of the dialog message in order to insert a similarly-formatted search box. Then, the method modifies the dialog message by inserting the selected search box into the dialog message. The method receives a request from a second user (at a mobile terminal) and the method transmits the outbound dialog message with the inserted search box to the second user's mobile terminal. The second user's mobile terminal supports a web browser, and some dialog messages include pre-populated text in the search box, the pre-populated text based on the dialog message from the first user device. The second user browses using the inserted search box without having to explicitly launch a browser.
US09052791B2 Touch panel and electronic device
An electronic device includes a touch panel. The touch panel includes a first sensor panel including at least one receiving electrode; a second sensor panel including at least one transmission electrode, and overlaid on the first sensor panel; and a third sensor panel including a predetermined electrode at least a part of which overlaps the one transmission electrode, and overlaid on the second sensor panel. When a predetermined condition is detected in a state that a transmission signal identical to that for the one transmission electrode is applied on the predetermined electrode, application of the transmission signal identical to that for the one transmission electrode onto the predetermined electrode is stopped.
US09052788B2 Touch detection for capacitive touch screen
A touch-screen device includes a transparent dielectric layer. A plurality of first electrodes is located over the transparent dielectric layer. A plurality of second electrodes is located under the transparent dielectric layer so that the first electrodes overlap the second electrodes to form an array of capacitors. A controller provides electrical signals to the first and second electrodes to energize and measure the baseline capacitance and repeatedly energize and measure the present capacitance of each capacitor. The controller calculates a ratio function between the present capacitance and the corresponding stored baseline capacitance for each capacitor and provides a touch signal when the ratio function exceeds a predetermined threshold value.
US09052787B2 Method of manufacturing touch sensing apparatus
A method for manufacturing a touch sensing apparatus includes repeatedly forming a plurality of electrode patterns on a first sub-substrate unwound from a first roller; repeatedly forming a plurality of interconnection patterns on a second sub-substrate unwound by a second roller; forming an array of touch sensing substrates by adhering the first sub-substrate to the second sub-substrate; forming a plurality of via holes through which the plurality of electrode patterns are electrically connected to the plurality of interconnection patterns; and cutting the array of touch sensing substrates into a plurality of touch sensing substrates, each touch sensing substrate including one of the electrode patterns and one of the interconnection patterns.
US09052775B1 Optical based tactile shear and normal load sensor
Various technologies described herein pertain to a tactile sensor that senses normal load and/or shear load. The tactile sensor includes a first layer and an optically transparent layer bonded together. At least a portion of the first layer is made of optically reflective material. The optically transparent layer is made of resilient material (e.g., clear silicone rubber). The tactile sensor includes light emitter/light detector pair(s), which respectively detect either normal load or shear load. Light emitter(s) emit light that traverses through the optically transparent layer and reflects off optically reflective material of the first layer, and light detector(s) detect and measure intensity of reflected light. When a normal load is applied, the optically transparent layer compresses, causing a change in reflected light intensity. When shear load is applied, a boundary between optically reflective material and optically absorptive material is laterally displaced, causing a change in reflected light intensity.
US09052754B2 Computer mouse oriented to disabled people or with movement disorders
The preferred embodiment of the invention describes a pointing device comprising a cabinet divided in two housings screwed together. Below the upper housing, a flexible, hard-use film contains all button symbols printed thereon and aligned with the housing upper side holes and tact switch actuators.A high-relief surface defines the visible surface of depressed buttons surrounded by restraining circular walls which arise from said high-relief surface.All buttons are placed in a bas-relief surface to avoid undesired or unintended pressings. Moreover, the fact that they are in a depressed surface help people with limb movement disorders to avoid the involuntary movement of their fingers beyond the limits of the depressed buttons, which act as restraining areas, thus avoiding to click, press or hold an undesired button.
US09052753B2 Mobile terminal for performing screen unlock based on motion and method thereof
A mobile terminal and a method perform screen unlock based on a motion. The mobile terminal includes a motion measure unit, a motion pattern storage, and a controller. The motion measure unit measures a first motion pattern of the mobile terminal. The motion pattern storage stores a second motion pattern set for the mobile terminal. When the first motion pattern of the mobile terminal measured by the motion measure unit coincides with the second motion pattern stored in the motion pattern storage, the controller executes a screen unlock of the mobile terminal.
US09052742B2 Image processing apparatus and image processing method
An image processing apparatus includes at least one processor. An input unit is configured to input image data. A correction unit performs a correction for the image data based on a result of analysis of the data. A storage unit stores the corrected image data. A processing unit performs a correction for the corrected image data using a correction parameter in accordance with a user instruction. The processing unit corrects the corrected image data stored by the storage unit using a changed correction parameter, when the correction parameter has been changed according to a user instruction. When a correction instruction based on an image analysis is input after correction of the image data by at least one of the correction unit and the processing unit, the correction unit makes a correction for the input image data input based on a result of analyzing the image data.
US09052733B2 Maximum power point tracker
A method is provided for determining a value for an electrical output of a converter of renewable energy. The method comprises obtaining a signal representing the electrical output of the converter wherein that electrical output has an initial value. The method further comprises applying a pulse signal to the signal representing the electrical output, wherein the pulse signal comprises a positive portion and a negative portion. The method further comprises obtaining a measurement of electrical power produced by the converter during application of the pulse signal, removing the pulse signal and then obtaining a measurement of electrical power produced by the converter in the absence of the pulse signal. An error value is determined from the obtained electrical power measurements and that error value is applied to the initial value to obtain a target value for the electrical output of the converter.
US09052710B1 Manipulation control based upon mimic of human gestures
A human gesture tracking system includes a sensor device with at least one sensor unit, where the sensor unit is configured to measure at least one of position in three dimensions of a portion of an operator's limb and orientation in three dimensions of the portion of the operator's limb, a processor configured to receive information from the sensor device so as to determine orientation and position displacement in six degrees of freedom of the operator's limb, and an activator that is coupled to communicate with the processor and is further actuated by the operator to designate a start time and an end time in which position and orientation displacements of the portion of the operator's limb are determined by the processor. During system operation, the processor determines position and orientation displacements of the portion of the operator's limb in tracking sessions, each tracking session is defined as a time period between the start time and the end time as designated by the activator. The processor further determines an initial position and orientation of the portion of the operator's limb at the start time of each tracking session and determines position and orientation displacements of the portion of the operator's limb during each tracking session in relation to the initial position and orientation for the tracking session.
US09052705B2 Scaling and parameterizing a controller
Controller scaling and parameterization are described. Techniques that can be improved by employing the scaling and parameterization include, but are not limited to, controller design, tuning and optimization. The scaling and parameterization methods described here apply to transfer function based controllers, including PID controllers. The parameterization methods also applies to state feedback and state observer based controllers, as well as linear active disturbance rejection controllers. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the application. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
US09052695B1 Alarm wristwatch
An alarm wristwatch including a watch, a strap having an extent, a mechanism for increasing and decreasing the extent of the strap, and a circuitry for controlling the mechanism to intermittently increase and decrease the extent of the strap, thereby increasing and decreasing a pressure of the strap on a user's wrist, resulting in attracting the user's attention, while not attracting other persons' attention.
US09052692B2 Mechanism for advancing a karussel cage or tourbillon cage by periodic jumps
A mechanism for advancing, by periodic jumps, a pivoting cage for an escapement mechanism, including: a retaining mechanism authorizing or preventing the pivoting of the cage, depending on its movement; and a stopping mechanism authorizing or preventing the pivoting of the retaining mechanism, depending on its angular position. A constant force device causes periodic cooperation of the retaining mechanism, which includes a flirt arranged to perform complete revolutions and is connected to an input thereof, with the stopping mechanism, which includes a star wheel and is connected to an output thereof, whose trajectories interfere with each other, to pivot the cage when the stopping mechanism allows the pivoting of the retaining mechanism and to stop the cage when the stopping mechanism locks the retaining mechanism.
US09052682B2 Image forming apparatus
When an opening and closing member is being closed, urging force which a first engaged portion of the opening and closing member receives in a direction opposite to a direction to close the opening and closing member is larger than urging force which a second engaged portion of the opening and closing member receives, and a distance in which the first engaged portion moves until the first engaged portion engages with a first engaging portion is shorter than a distance in which the second engaged portion moves until the second engaged portion engages with a second engaging portion while the first engaged portion and the second engaged portion are caused to engage with the first engaging portion and the second engaging portion, respectively, by closing the opening and closing member from an opened state of the opening and closing member.
US09052674B2 Image forming apparatus with metal and resin frame components
An image forming apparatus includes a main body including an image forming unit including an image carrying member, a drive force transmission mechanism configured to transmit a drive force to the image carrying member, and a main body configured to support the image forming unit. The main body includes a first frame disposed on a first side of the image carrying member in an axial direction of the image carrying member, a second frame disposed on a second side of the image carrying member opposite to the first side thereof, a first connecting member extending in the axial direction of the image carrying member and connecting the first frame and the second frame, and a second connecting member spaced apart from the first connecting member and connecting the first frame and the second frame. The first frame is made of metal and the second frame is made of resin.
US09052670B2 Color image forming apparatus
In a color image forming apparatus, the amount of light of an exposure unit for a weak exposure is changed according to a remaining service life of a photosensitive drum when the weak exposure is performed for the background area of a corresponding photosensitive drum by using the exposure unit.
US09052666B2 Image forming apparatus and method for color registration correction
A color registration method includes determining whether color registration is needed or not, if color registration is needed, setting an optimal amount of light of the registration sensor in a feedback manner, forming a predetermined mark for color registration correction on an image forming medium, and performing color registration correction with respect to the formed mark using the set optimal amount of light.
US09052656B2 Cleaning device and fixing device
A cleaning device includes a cleaning unit which includes a web; a first roller, a second roller for winding the web up, a driving mechanism for second roller, a third roller urging the web to the rotatable member, an urging portion urging the third roller toward the rotatable member, and a supporter supporting the third roller while permitting movement relative to the first and second rollers; a moving mechanism for relative movement between the cleaning unit and the rotatable member, between a first position in which the web is spaced from the rotatable member and a second position in which they contact; and a controller. When the mechanism causes the relative movement from the first position to the second position, the controller operates the mechanism for a predetermined duration to substantially eliminate the slackness of the web resulting from the relative movement.
US09052655B2 Heating member including a base polymer and fusing apparatus including the same
A heating member includes: a resistive heating layer which generates heat when supplied with electrical energy; a release layer as an outermost layer of the heating member and including a polymer; an intermediate layer disposed between the resistive heating layer and the release layer. The resistive heating layer includes a base polymer, and an electroconductive filler dispersed in the base polymer. The intermediate layer includes a polymer material being a same type as the base polymer of the resistive heating layer or the polymer of the release layer.
US09052652B2 Fixing device including a friction reducer and an image forming apparatus including the fixing device
A fixing device includes a nip formation pad disposed opposite an inner circumferential surface of an endless belt and pressing the endless belt against a pressing rotary body to form a fixing nip between the endless belt and the pressing rotary body. A recording medium is conveyed through the fixing nip. The endless belt slides over a friction reducer sandwiched between the endless belt and the nip formation pad. The friction reducer includes a body and at least one tab projecting from the body in a direction opposite a recording medium conveyance direction. A friction reducer fastener is attached to the tab of the friction reducer and placed inside the nip formation pad to mount the friction reducer on the nip formation pad.
US09052632B2 High-voltage power supply for image forming apparatus
A high-voltage power supply for an image forming apparatus compares a detected output voltage generated by dividing a high-voltage output by a voltage dividing circuit with a control value to feedback control the high-voltage output and outputs a voltage that is to be applied to a member involved in image formation. The high-voltage power supply includes a printed circuit board on which a resistor connected to a high-voltage output side of the voltage dividing circuit is mounted. A slit including a first portion and a second portion is formed in the printed circuit board. The first portion extends across a straight line connecting terminals of the resistor. The second portion continues from the first portion and extends in a direction receding from one of the terminals of the resistor.
US09052631B2 Image forming apparatus, process cartridge, and image forming method
An image forming apparatus, including: an image bearing member; a charging unit; an exposure unit; a developing unit; a transfer unit; a fixing unit; and a cleaning unit including a cleaning blade, wherein the charging unit includes a charging roller that is brought into contact with the image bearing member for charging, the charging roller abutting the image bearing member at a pressing force of 10 mN/cm to 1,000 mN/cm, wherein the cleaning blade includes an elastic member that abuts the surface of the image bearing member to remove a residue attached to the surface of the image bearing member, and wherein an abutment part of the elastic member, which abuts the surface of the image bearing member, includes a cured product of an ultraviolet curable composition containing a (meth)acrylate compound having an alicyclic structure having 6 or more carbon atoms in a molecule.
US09052630B2 Electrostatic charger and image forming apparatus
An electrostatic charger includes a discharge electrode which has a long shape and a housing. The housing has a U-shaped cross section in a direction perpendicular to a longitudinal direction of the discharge electrode, receives the discharge electrode and supports the discharge electrode in a direction such that a tip portion thereof is disposed on an open face side. The housing includes a first member and a second member separated from each other at a border that includes an electrode-supporting section supporting the discharge electrode, and the first member and the second member are attachable to and detachable from each other.
US09052626B2 Toner for electrostatic latent-image development and method for producing the same
In a toner for electrostatic latent-image development that includes toner core particles including at least a binder resin, and shell layers with which the entire surfaces of the toner core particles are coated, an ethylene-unsaturated carboxylic acid copolymer is present at the interface between the toner core particle and the shell layer.
US09052622B2 Electrostatic image developing toner, electrostatic image developer, toner cartridge, process cartridge, image forming apparatus and image forming method
An electrostatic image developing toner including: a toner particle containing a coloring agent and a binder resin; and an external additive on the toner particle, wherein the external additive contains a silica particle, a primary particle of the silica particle has an average particle diameter of from 70 nm to 400 nm, a particle size distribution index of the primary particle of from 1.0 to 1.9, and an average circularity of from 0.5 to 0.9.
US09052620B2 Toner, developer, toner cartridge, process cartridge, image forming apparatus, and image forming method
An electrostatic charge image developing toner includes toner particles containing a binder resin and pigment particles and an external additive containing fluorine resin particles, wherein the electrostatic charge image developing toner satisfies the following expression: 2≦A/B≦100, wherein A represents reflectance at an acceptance angle of +30° which is measured when a solid image is formed using the electrostatic charge image developing toner and the solid image is irradiated with incident light at an incidence angle of −45° by the use of a variable-angle photometer, and B represents reflectance at an acceptance angle of −30° which is measured when the solid image is irradiated with incident light at an incidence angle of −45° by the use of the variable-angle photometer.
US09052618B2 Overcoat composition for electrophotography, electrophotographic image forming method and electrophotographic image forming apparatus
An overcoat composition for electrophotography includes at least one of compounds having the following formulae (1) to (3): wherein R1 represents a hydrogen atom or a methyl group; wherein R1 represents a hydrogen atom or a methyl group; and n represents an integer of from 4 to 6; and wherein R1 represents a hydrogen atom or a methyl group; and a and b independently represent an integer of from 1 to 5 on the condition that a+b is from 4 to 6.
US09052601B2 Reflective mask blank for EUV lithography and process for its production, as well as substrate with reflective layer for such mask blank and process for its production
Process for producing a substrate with reflective layer for EUVL, which comprises forming a reflective layer for reflecting EUV light on a substrate, wherein the reflective layer is a multilayer reflective film having a low refractive index layer and a high refractive index layer alternately stacked plural times by a sputtering method, and depending upon the in-plane distribution of the peak reflectivity of light in the EUV wavelength region in a radial direction from the center of the substrate at the surface of the multilayer reflective film, at least one layer among the respective layers constituting the multilayer reflective film is made to be a reflectivity distribution correction layer having a thickness distribution provided in a radial direction from the center of the substrate, to suppress the in-plane distribution of the peak reflectivity of light in the EUV wavelength region in a radial direction from the center of the substrate.
US09052600B2 Method for forming resist pattern and composition for forming protective film
A method for forming a resist pattern includes providing a resist film. A protective film is provided on the resist film using a composition for forming the protective film. The composition includes a polymer and an organic solvent. The resist film on which the protective film is provided is exposed to irradiation with EUV light or an electron beam. The exposed resist film is developed.
US09052597B2 Methods and fabrication tools for fabricating optical devices
An embodiment of the present invention relates to a method of fabricating an optical device, the method comprising the steps of: depositing a photoresist layer on a carrier, said photoresist layer containing at least one optical component, determining the position of the at least one optical component inside the photoresist layer before exposing the photoresist layer to a first radiation, said first radiation being capable of transforming the photoresist layer from an unmodified state to a modified state, elaborating a device pattern based on the position of the at least one optical component, and fabricating the elaborated device pattern by locally exposing the photoresist layer to the first radiation and locally transforming the photoresist layer from the unmodified state to the modified state.
US09052589B2 Polymer comprising end groups containing photoacid generator, photoresist comprising the polymer, and method of making a device
A polymer comprises the polymerized product of unsaturated monomers comprising an acid-deprotectable monomer, a base-soluble monomer, a lactone-containing monomer, a photoacid-generating monomer, or a combination comprising at least one of the foregoing monomers, with a chain transfer agent of Formula (I); wherein in Formula (I), Z is a y valent C1-20 organic group, L is a heteroatom or a single bond, A1 and A2 are each independently ester containing or non-ester containing and are fluorinated or non-fluorinated, and are independently C1-40 alkylene, C3-40 cycloalkylene, C6-40 arylene, or C7-40 aralkylene, and A1 contains a nitrile, ester, or aryl substituent group alpha to the point of attachment with sulfur, X1 is a single bond, —O—, —S—, —C(═O)—O—, —O—C(═O)—, —O—C(═O)—O—, —C(═O)—NR—, —NR—C(═O)—, —NR—C(═O)—NR—, —S(═O)2—O—, —O—S(═O)2—O—, —NR—S(═O)2—, or —S(═O)2—NR, wherein R is H, C1-10 alkyl, C3-10 cycloalkyl or C6-10 aryl, Y− is an anionic group, G+ is a metallic or non-metallic cation, and y is an integer of 1 to 6. A photoresist composition comprising the polymer, a coated substrate, comprising a layer of the photoresist composition, and a method of forming an electronic device from the photoresist, are also disclosed.
US09052581B2 Light source device and projector
A light source device including an arc tube having a light emission portion containing electrodes, a cooling channel having a downstream part branched into first and second channels to guide air toward the light emission portion via one of the channels, a rotational member disposed within the cooling channel and rotatable around a rotation shaft by gravity, and configured to switch cooling to the first or second channel depending on a position of the light source device, and a duct that forms apart of the cooling channel. The width of the rotational member decreases from a remote end toward the rotation shaft. The rotation shaft is disposed on one end of the rotational member corresponding to a side opposite a light emission side of the duct. The duct is shaped such that the cooling channel width decreases toward the side opposite the light emission side.
US09052578B2 Laser projection device
A laser projection device includes three laser chips, a spectroscope arranged on light paths of laser beams emitted from the three laser chips, and a lens mounted between the laser chips and the spectroscope. The lens includes a main body and a bending part bent from the main body. The main body is on the light paths of two of the laser chips. The bending part is on the light path of another laser chip. The laser beams emitted from the corresponding two laser chips are refracted by the main part of the lens. The laser beams emitted from the corresponding another laser chip are refracted by the bending part. The laser beams emitted from the laser chips are converged by the lens to reach the spectroscope and then reflected by the spectroscope to be mixed together.
US09052572B2 Conversion adaptor apparatus and interchangeable lens system
A conversion adapter apparatus is provided that connects a camera body and an interchangeable lens. The conversion adapter apparatus includes a camera body side installation portion to receive a camera body, a lens side installation portion to receive an interchangeable lens, and a first communication contact group provided on the camera body side installation portion and connected to a communication contact group. The conversion adapter apparatus additionally includes a second communication contact group provided on the lens side installation portion and connected to the communication contact group and a conductive member that electrically connects the first communication contact group and the second communication contact group. A position of the first communication contact group around a camera optical axis and a position of the second communication contact group around the camera optical axis are different from each other.
US09052564B2 Electrophoretic dispersion
The present invention is directed to an electrophoretic dispersion, in particular, an electrophoretic dispersion comprising uncharged or lightly charged additive particles for improving bistability of an electrophoretic display. The average diameter of the additive particles is about 1% to about 25% of the average hydrodynamic diameter of the charged pigment particles.
US09052560B2 Nanoprojector panel formed of an array of liquid crystal cells
A nanoprojector panel formed of an array of cells, each cell including a liquid crystal layer between upper and lower transparent electrodes, a MOS control transistor being arranged above the upper electrode, each transistor being covered with at least three metallization levels. The transistor of each cell extends in a corner of the cell so that the transistors of an assembly of four adjacent cells are arranged in a central region of the assembly. The upper metallization level extends above the transistors of each the assembly of four adjacent cells. The panel includes, for each assembly of four adjacent cells, a first conductive ring surrounding the transistors, the first ring extending from the lower metallization level to the upper electrode of each cell, with an interposed insulating material.
US09052559B2 Display device
The present invention is intended to control the color temperature of white exhibited by a liquid crystal display device. White is produced when light waves emitted through pixels associated with three colors of red, green, and blue have maximum intensities. The amounts of light emitted through the respective pixels are controlled by differentiating the shapes of the pixel electrodes disposed at the respective pixels from one another. Thus, the color temperature of white is controlled. Otherwise, the shapes of interceptive films disposed at the respective pixels are differentiated from one another in order to control light waves emitted through the respective pixels. Thus, the color temperature of white is controlled. The interceptive film may be shaped like the pixel electrode. Otherwise, the interceptive film may be realized with an interceptive pattern other than that of the pixel electrode or one of openings bored in a black matrix.
US09052557B2 Pixel array, pixel structure, and driving method of a pixel structure
A pixel array, a pixel structure, and a driving method of a pixel structure are provided. The pixel structure includes a first scan line, a second scan line, a first common electrode line, a data line, a first active device, a second device, a first pixel electrode, and a second pixel electrode. The data line is intersected with the first scan line and the second scan line. The first active device is driven by the first scan line and connected to the data line. The second active device is driven by the second scan line and connected to the first common electrode line. The first pixel electrode is electrically connected to the data line through the first active device. The second pixel electrode is electrically connected to the data line through the first active device and electrically connected to the first common electrode line through the second active device.
US09052550B2 Thin film transistor liquid crystal display
A thin film transistor liquid crystal display (TFT LCD), including a TFT array substrate, a color filter substrate and a post spacer disposed between the TFT array substrate and the color filter substrate. The TFT array substrate includes a gate line, a data line, and a TFT disposed in a pixel area defined by the gate line and the data line crossing with each other, and the TFT comprises a source/drain electrode. The post spacer is located in a region at least partially surrounded by the source/drain electrode, the data line and the gate line.
US09052548B2 Photo-curable composition, optical anistropic film and its preparation method
The present invention relates to a photo-curable composition that can provide a film, etc. showing excellent optical anisotropy even without need for separately forming a liquid crystal layer and an alignment layer, an optical anisotropic film using the same, and its preparation method. The photo-curable composition comprises a photo-alignable polymer, a noncrosslinkable liquid crystal compound and a photo-curable binder.
US09052542B2 Light source package and backlight unit including the light source package
A light source package includes a first light source configured to emit first light, an imaginary central axis of the first light extending in a first direction. The light source package may further include a second light source configured to emit second light, an imaginary central axis of the second light extending in a second direction that is different from the first direction. The light source package may further include a first optical part including a first surface that is configured to reflect at least a first portion of the first light. The light source package may further include a second optical part configured to spread the second light. The light source package may advantageously enable illuminating a desirably large display area with a minimum number of light sources and/or optical parts.
US09052534B2 Optical analog-to-digital converter, method of constructing the same, optical signal demodulator, and optical modulator-demodulator
An optical A/D converter according to the present invention includes an optical splitter that splits an analog input signal light into plurals, a plurality of Mach-Zehnder interferometers to which each of the signal lights split by the optical splitter is input, and plurality of optical/electrical conversion unit that convert each signal lights output from each Mach-Zehnder interferometer into a digital electrical signal, in which each Mach-Zehnder interferometer includes optical intensity-to-phase conversion unit that optically convert intensity of the input signal light into an amount of phase shift and the amount of phase shift differs for each Mach-Zehnder interferometer. Then, it is possible to provide a high speed and low power consuming optical demodulation circuit.
US09052532B2 Eyeglass frame
An eyeglass frame includes an outer frame, an inner frame provided with a pair of eyeglass lenses, and temples connected to the outer frame. The inner frame is attached to the outer frame. The outer frame includes opening portions corresponding to the eyeglass lenses attached to the inner frame.
US09052522B2 System and method for mounting a specimen on a slide
A system and method for mounting a specimen on a slide, the system having an immersion chamber, a stage, a transducer, and a pump. The immersion chamber is configured to hold a liquid and includes at least one wall, a closed bottom, and an open top. The stage is configured to support the slide, and the stage is arranged within the immersion chamber such that the specimen may be supported substantially above the stage by the liquid. The transducer is configured to induce a wave in the liquid in the immersion chamber such that the wave alters the motion of the specimen. The pump is configured to draw the liquid from the immersion chamber such that the level of liquid in the immersion chamber decreases and the specimen is dispensed onto the slide.
US09052515B2 Lens panel, method for manufacturing the same and 3D display device
According to embodiments of the present invention, there are provided a lens panel, a method for manufacturing the same and a 3D display device. The lens panel comprises: a first transparent substrate; a second transparent substrate, disposed opposite to the first transparent substrate; positive electrodes and negative electrodes, which are in a strip shape, and disposed on a side of the first transparent substrate opposed to the second transparent substrate parallel to each other and alternately; a second transparent liquid and a first transparent liquid filled between the first transparent substrate and the second transparent substrate in this order from the second transparent substrate to the first transparent substrate, the first transparent liquid and the second transparent liquid being immiscible, and reflectance of the first transparent liquid being larger than reflectance of the second transparent liquid.
US09052513B2 Laser scan unit for an imaging device
A system and method for reducing scan line jitter caused by facet cut variation in scan systems employing a plurality of laser sources and a sensor for generating the timing for the laser sources. The system includes a controller for determining a unique time delay for each facet of the rotating mirror, and controlling the laser sources so that video provided by each laser source is delayed in a scan line by the unique time delay corresponding to the facet of the rotating mirror used in creating the scan line.
US09052509B2 Microscope system including detachable stage and detachable transmitted illumination optical system
A microscope system includes a stage on which a specimen is placed; an objective lens configured to condense at least observation light from the specimen on the stage; a transmitted illumination optical system configured to irradiate the specimen with transmitted illumination light ejected from a light source, which is illumination light transmitting the specimen; and a microscope body part including a base unit holding the transmitted illumination optical system, a supporting column standing upright from the base unit, and an incident-light illumination optical system provided on the end of a side different from the base unit side of the supporting column and irradiating the specimen with incident-light illumination light which is illumination light ejected from a light source to be reflected on the specimen, wherein the stage and the transmitted illumination optical system are attachable to/detachable from the microscope body part.