Document	Document Title
US09385953B1	Mesh network addressing In embodiments of mesh network addressing, a router device receives provisioning domains that include an address prefix and an associated preference value for the address prefix. The router determines a route, based on one of the address prefixes, to use to forward a data packet to a destination. The router uses the preference values to prioritize the routing of the data packet. In other aspects, the preference values can be set based on one or more factors, and the router can use the preference values in addition to mesh network routing costs to determine a route for a data packet.
US09385951B2	Apparatus and method for controlling packet transfer based on registered destination information An apparatus includes a plurality of receiving ports and a plurality of transmitting ports. The apparatus stores, in a memory thereof, transfer control information for transferring a packet to a node that is able to transfer the received packet, and monitors packets received via the plurality of receiving ports. Upon receiving a first packet conforming to a predetermined communication protocol and containing a frame including destination information being registered in the transfer control information, the apparatus rewrites a header of the first packet, based on the transfer control information, and transmits the first packet whose header has been rewritten via corresponding one of the plurality of transmitting ports indicated by the transfer control information.
US09385949B2	Routing controlled by subnet managers A method for communication in a packet data network that includes at least first and second subnets interconnected by multiple routers and having respective first and second subnet managers. The method includes assigning respective local identifiers to ports for addressing of data link traffic within each subnet, such that the first subnet manager assigns the local identifiers in the first subnet, and the second subnet manager assigns the local identifiers in the second subnet. The routers are configured by transmitting and receiving control traffic between the subnet managers and the routers. Data packets are transmitted between network nodes in the first and second subnets via one or more of the configured routers under control of the subnet managers.
US09385944B2	Communication system, path switching method and communication device When a communication path between a user site and a dual-homed data center is made redundant, a communication between the user site and a server within a data center can be continued. An edge node DCE-1 of a data center 40-1 and edge nodes TPE-1, TPE-2 of a transport network are connected to each other by a link TPE-1-1 and a link TPE-2-1, respectively. The edge nodes TPE-3 and TPE-1, TPE-2 that hold a node AE51 of a user site 50 are set with an LSP 110 of an active system, and an LSP 120 of a backup system, respectively. One of the links is active, and the other link is backup, and the LSP of the TPE node having the active link in the LSP 100 and the LSP 120 is made active. The respective links are prioritized, and the links are switched to an active state in order from the links higher in the order of priority when a link failure or an LSP failure occurs.
US09385938B2	Information distribution in a wireless communication system Methods, devices, and systems for information distribution in a wireless communication system is provided. In one embodiment, a method of information distribution in a wireless communication system comprises receiving an information advertisement signal by a propagator node, wherein said information advertisement signal identifies information available from a distributor node; storing said information advertisement signal by said propagator node in a distributor routing table; and forwarding said information advertisement signal by said propagator node to another propagator node, a selector node, or both.
US09385936B2	Forwarding groups of multicast flows A routing element and method for forwarding multicast traffic in a network includes grouping a collection of path-related multicast information flows from a source and associating each information flow of the collection with a multicast address from a set of multicast addresses. Forwarding information is placed in routers within the network between the sources and destinations wherein the forwarding information includes a single entry in a forwarding table using an identifier, e.g., a representative address, for the collection.
US09385933B2	Remote probing for remote quality of service monitoring In one embodiment, a targeted node in a computer network receives a probe generation request (PGR), and in response, generates a link-local multicast PGR (PGR-Local) carrying instructions for generating probes based on the PGR. The targeted node then transmits the PGR-Local to neighbors of the targeted node to cause one or more of the neighbors to generate and transmit probes to a collection device in the computer network according to the PGR-Local instructions. In another embodiment, a particular node in a computer network receives a link-local multicast probe generation request (PGR-Local) from a targeted node in the computer network, the targeted node having received the PGR-Local from a remote device, and determines how to generate probes based on instructions carried within the PGR-Local before sending one or more probes to a collection device in the computer network according to the PGR-Local instructions.
US09385931B1	Determining a reordering timer In systems and method of determining a reordering timer in a wireless communication network, it is determined that a packet reordering of a plurality of data packets meets a reordering threshold, and the plurality of data packets is examined to determine a reordering severity of the plurality of data packets. Based on the determined reordering severity and an application requirement associated with the plurality of data packets, a reordering timer is determined.
US09385925B1	Anycast route detection Systems and methods are described to detect routes utilized by client computing devices to access anycast points of presence. Multiple anycast points of presence may be associated with an anycast destination address. A client computing device may therefore connect to any of the multiple anycast points of presence, selected based on routing protocols. In some instances, client computing devices may connect to an undesirable point of presence. In order to detect an diagnose undesirable anycast connections, individual point of presence are configured to transmit anycast probes to client computing devices and/or nodes connecting the point of presence and a client computing device. Responses to each probe may be transmitted to the anycast destination address, which may be routed to an originating point of presence or to an alternative point of presence. Resulting data may be used to automatically generate warnings indicating undesirable anycast connections.
US09385913B2	Method and system for sharing digital media content Methods and systems for generating and sharing media clips are described. Consistent with some embodiments, while a selection of digital media content (e.g., a movie, television program, audio track, and so on) is being presented at a media player, a user creates one or more sets of waypoints (e.g., time markers) that define the boundaries (e.g., beginning and end) of one or more media clips. These waypoints are communicated from one media player device to another, enabling the receiving media player device to retrieve and play back the media clips from a source other than the media player device where the waypoints were generated.
US09385910B2	Method for transmitting location based service-reference signal in wireless communication system and apparatus therefor A method for allowing a mobile station to detect a Location Based Service-Reference Signal (LBS-RS) in a wireless communication system is disclosed. The method includes receiving LBS-RS setup information of at least one target cell participating in location measurement from a serving cell, acquiring a frequency offset value of the target cell using the LBS-RS setup information, and detecting the LBS-RS transmitted from the target cell using the LBS-RS setup information and the frequency offset value. In addition, the method further includes measuring a reception delay time of the detected LBS-RS, and transmitting a reception delay time to the serving cell.
US09385908B2	Communication apparatus and communication method A communication apparatus comprises an inserter that inserts an element having a value of 0 or nearly 0 into a predetermined position of a modulated signal to generate inserted data; an operator that adds a pilot signal comprising a data series of which the elements at the positions corresponding to the predetermined positions in the modulated signal are multiplied by a first amplitude coefficient and the elements other than the elements multiplied by the first amplitude coefficient are multiplied by a second amplitude coefficient to the inserted data to generate a post-operation data; an IFFT unit that performs IFFT on the post-operation data; and a transmitter that generates a baseband signal based on the post-operation data on which the IFFT is performed and transmits a transmission signal generated from the baseband signal.
US09385892B2	Communication system, transmitting device, receiving device, and communication method There is provided a communication system capable of achieving a high usage efficiency of frequencies without the need for cooperation of multiplexed users. A communication system communicates over frequency channels set by dividing a frequency bandwidth assigned to the system allows interference between channels by overlapping the adjacent frequency channels with each other in the frequency domain, or a transmitting and receiving device, which transmits and receives a signal by allowing the interference between symbols at a waveform level for each channel to decrease the occupied bandwidth, is provided with ICI removal and ISI compensation filter 111 serving as either an ICI removal filter for removing the interference between channels or an ISI compensation filter for compensating the interference between symbols.
US09385882B2	Method and apparatus for phone communication using home network A method of providing a home network telephony service, in which a first mobile communication terminal having a phone call connection with a second mobile communication terminal provides a phone communication service by using a first electronic device connected to a home network of the first mobile communication terminal is provided. The method includes transmitting a call initiation request message, including an address of the first electronic device, and making a request for a phone call connection using the first electronic device in response to the phone call to the second mobile communication terminal; receiving a response message in response to the call initiation request message from the second mobile communication terminal; and transmitting a call initiation request message including the address of the second electronic device and making a request to the first electronic device to originate a call to the second electronic device.
US09385881B2	Media access control protocol data unit aggregation in a time division multiple access media access control layer A method and apparatus are described for creating a multi-media stream (e.g., video, voice, audio, etc. . . . ) Super-MAC frame in a physical protocol data unit, including inserting a physical layer header into a channel time allocation and generating the multi-media stream SuperMAC frame further including, appending a media access control header after the physical layer header, calculating a header correction code, appending the header correction code after the media access control header, appending a media access control multi-media stream payload from a transmit queue, calculating a frame check sequence, appending the frame check sequence after the media access control multi-media stream payload and repeating the above acts, after inserting the physical layer header, until one of the channel time allocation is full or all transmit queues are empty.
US09385874B2	Scalable transport with client-consensus rendezvous Embodiments disclosed herein provide advantageous methods and systems that use multicast communications via unreliable datagrams sent on a protected traffic class. These methods and systems provide effectively reliable multicast delivery while avoiding the overhead associated with point-to-point protocols. Rather than an exponential scaling of point-to-point connections (with expensive setup and teardown of the connections), the traffic from one server is bounded by linear scaling of multicast groups. In addition, the multicast rendezvous disclosed herein creates an edge-managed flow control that accounts for the dynamic state of the storage servers in the cluster, without needing centralized control, management or maintenance of state. This traffic shaping avoids the loss of data due to congestion during sustained oversubscription. Other embodiments, aspects and features are also disclosed.
US09385870B2	Secure method for remote grant of operating rights In the method and system of establishing a trusted relationship, first a virtual private network is established between a key device and at least one locking device. Thereafter, in order to establish a trusted relationship the key device sends a message encrypted with its private cryptographic key to at least one locking device. The message comprises the certificate of the trusted key device and the certificate of some other device, with which the locking device that received the message shall establish a new trusted relationship. By using the established trusted relationship either a trusted relationship between the locking device and a new key device or a trusted relationship between two or more locking devices is established, whereby a virtual private network can be established between the locking devices.
US09385867B2	Cryptographic processing system, key generation device, encryption device, decryption device, key delegation device, cryptographic processing method, and cryptographic processing program Hierarchical predicate encryption (HPE) for inner products with enhanced efficiency of operations. A cryptographic processing system includes a key generation device, an encryption device, and a decryption device. The key generation device generates, as a decryption key skL, a vector in which predicate information v{right arrow over ( )}t is embedded in a basis vector of a basis B*t for each integer t of t=1, . . . , L. The encryption device generates, as a ciphertext ct, a vector in which attribute information x{right arrow over ( )}t is embedded in a basis vector of a basis Bt for at least some integer t of t=1, . . . , L. The decryption device performs a pairing operation on the decryption key skL generated by the key generation device and the ciphertext ct generated by the encryption device, and decrypts the ciphertext ct.
US09385861B2	Wireless device and method for controlling wireless device A wireless device including an oscillator circuit, a detector circuit, and a controller circuit. The oscillator circuit generate a clock signal. The detector circuit detect respective phase differences of received wireless signals of a plurality of frequency bands from respective reference phases. The controller circuit control, for each of the plurality of frequency bands, at least one of a receiving process and a transmitting process on the wireless signal on the basis of the clock signal such that the phase difference is compensated.
US09385856B2	Method and apparatus for transmitting and receiving frame configuration information in TDD wireless communication system A method and apparatus for transmitting Time Division Duplexing (TDD) configuration information by an evolved Node B (eNB) in a TDD wireless communication system are provided. The method includes determining a changed TDD configuration indicating a transmission direction of a plurality of sub-frames constituting a frame; generating a system information element including dynamic TDD configuration information indicating the changed TDD configuration; transmitting a system information block including the dynamic TDD configuration information; and sending a Media Access Control (MAC) message including information indicating whether a change in TDD configuration is activated.
US09385853B2	Method and apparatus for coordinated multi-node transmission Embodiments of the present invention provide a method and an apparatus for coordinated multi-node transmission The method includes: acquiring, by a user equipment, channel state indicator information of each coordinating node; feeding back, by the user equipment, all information or a part of information in the acquired channel state indicator information to a base station, so that each coordinating node performs, according to the channel state indicator information that has been fed back, scheduling on the user equipment and/or one or more other user equipments served by each coordinating node; and if the user equipment is scheduled, receiving, by the user equipment, scheduling result notification information sent by the base station, and receiving, by the user equipment according to the scheduling result notification information, data transmitted by a base station that corresponds to a coordinating node serving the user equipment. The present invention is applicable to a radio communications system.
US09385850B2	Method for transmitting control information of transceiving point and said transceiving point, method for receiving control information for terminal and said terminal Provided are a control information transmission method of a transmission/reception point for a User Equipment that receives downlink control information through a downlink control channel introduced to a data area, a control information reception method of a User Equipment, and apparatuses thereto. Also, a resource mapping method and apparatus for an enhanced Control Channel Element (ECCE) of an EPDCCH is provided.
US09385848B2	Short-range nodes with adaptive preambles for coexistence Wireless protocols in the unlicensed spectrum are developed for different requirements in terms of transmit range and power, which makes it difficult for multiple nodes having disparate transmit ranges to coexist in the same unlicensed spectrum. A short-range wireless node uses adaptive preambles to signal presence to long-range wireless nodes outside of its transmit range. In addition, a long-range wireless node detects an adapter preamble and backs-off transmissions for reservation period dedicated to short-range nodes.
US09385839B2	Network retransmission protocols using a proxy node One embodiment relates to a device. The device includes reception circuitry adapted to receive a data unit from a first node of a network and a confirmation message signal from a second node of the network. Analysis circuitry is adapted to determine a failure to correctly receive the data unit. Transmission circuitry is adapted to transmit a negative acknowledgement signal to the first node in case the analysis circuitry determines the data unit has not been correctly received and the confirmation message signal from the second node is received. Other methods and devices are also disclosed.
US09385838B2	Encoding method and encoding apparatus in a wireless communications system Provided are an encoding method and an encoding apparatus in a wireless communications system. The encoding apparatus generates an error detection code for a first UCI (uplink control information), and adds the error detection code to a second UCI. The encoding apparatus encodes the first UCI, and then the second UCI added with the error detection code.
US09385833B2	Device and method for controlling interference Embodiments herein relate to a method in a transceiver (400) for enabling control of interference cancelling in the transceiver (400). The transceiver (400) is in a first decoding mode. The transceiver (400) stores a received signal comprising a data block. The transceiver (400) decodes the received signal using the first decoding mode, thereby obtaining the data block. When an event is triggered, the transceiver (400) retrieves the stored signal. The transceiver (400) decodes the retrieved signal using a second decoding mode, thereby obtaining the data block. The transceiver (400) controls the interference cancelling in the transceiver (400), based on the data block decoded using the first decoding mode and the data block decoded using the second decoding mode.
US09385831B2	Circuits and method to enable efficient generation of direct digital synthesizer based waveforms of arbitrary bandwidth Embodiments of a system and method for providing efficient wideband inverse channelization for direct digital synthesizer based jamming techniques are generally described herein. In some embodiments, metadata associated with a technique for generating a waveform, such as frequency, phase and amplitude parameters, is received. Data select signals and data input are generated based on the received metadata. In-phase and quadrature signals are produced at an output of a first de-multiplexer and a second de-multiplexer, respectively, based on the data select signals and the data input. Frequency modulated signals generated by direct digital synthesizers may be combined in a channel using a separate, distinct channel combiner.
US09385829B2	Optical transceiver having optics with rotated optical path An optical communications module includes first and second opto-electronic devices and an optics device, in which a common beam path axis is oriented in a rotated direction about the axis at which a fiber is coupleable to the optics device barrel. The optics device includes a TIR lens aligned with the barrel axis. The TIR lens reflects optical signals between the barrel axis and a common beam path axis oriented in a direction having X-axis and Y-axis components offset by non-zero amounts from the barrel axis. The common beam path axis intersects first and second reflective interfaces of the device. The first opto-electronic device is aligned along a first beam path axis that intersects the first reflective interface and the common beam path axis. The second opto-electronic device is aligned along a second beam path axis that intersects the second reflective interface and the common beam path.
US09385822B2	Wideband calibration method and wideband calibration apparatus for calibrating mismatch between first signal path and second signal path of transmitter/receiver A method for calibrating mismatches of an in-phase signal path and a quadrature signal path of a transmitter, including: utilizing the receiver to receive at least a test signal via the first signal path and the second signal path, wherein each test signal possesses a specific frequency within a specific frequency band; calculating at least a calibration coefficient for each test signal respectively, so as to calibrate mismatch between the first signal path and the second signal path of the receiver with respect to the specific frequency corresponding to each test signal; deriving a tap coefficient of a calibration filter of a calibration filter unit according to the at least a calibration coefficient of each test signal; and utilizing the calibration filter unit to calibrate a received signal.
US09385821B2	System and method for calibrating bluetooth low energy signal strengths Disclosed is a system and method for calibrating BLE signal strengths to high-accuracy/precise distances. The present disclosure involves auto-calibrating BLE-based tracking systems, such as, for example, those used indoors using acoustic signals. The present disclosure enables BLE-based distance estimation to be accurate to decimeters and centimeters. The disclosed systems and methods utilize signals communicated to and from roaming devices in order to determine the distance(s) between the roaming device and installed BLE units. A signal-strength to distance map can then be constructed for reuse on any device with a Bluetooth component.
US09385816B2	Methods and arrangements for frequency shift communications by undersampling Embodiments may provide a way of communicating via an electromagnetic radiator, or light source, that can be amplitude modulated such as light emitting diode (LED) lighting and receivers or detectors that can determine data from light received from the amplitude modulated electromagnetic radiator. Some embodiments may provide a method of transmitting/encoding data via modulated LED lighting and other embodiments may provide receiving/decoding data from the modulated LED lighting by means of a device with a low sampling frequency such as a relatively inexpensive camera (as might be found in a smart phone). Some embodiments are intended for indoor navigation via photogrammetry (i.e., image processing) using self-identifying LED light anchors. In many embodiments, the data signal may be communicated via the light source at amplitude modulating frequencies such that the resulting flicker is not perceivable to the human eye.
US09385815B2	Bandwidth efficient dual carrier In some examples, a transmit assembly is described that may include a first optical transmitter, a second optical transmitter, and a polarizing beam combiner. The first optical transmitter may be configured to emit a first optical data signal centered at a first frequency. The second optical transmitter may be configured to emit a second optical data signal centered at a second frequency offset from the first frequency by a nominal offset n. The polarizing beam combiner may be configured to generate a dual carrier optical data signal by polarization interleaving the first optical data signal with the second optical data signal. An output of the polarizing beam combiner may be configured to be communicatively coupled via an optical transmission medium to a polarization-insensitive receive assembly.
US09385814B2	Wavelength tunable array for data communications Systems and apparatus for data communications comprising a plurality of wavelength tunable submodules in an array is provided. Each submodule has a wavelength tunable laser, and each submodule comprises, as an individual unit, a self-contained wavelength locker having optical and/or optoelectronic functions. The system may be a transponder array comprising a plurality of WDM or DWDM modules. In some embodiments, the individual submodules may comprise photonic integrated wavelength tunable lasers with other optical, electrical and optoelectronic components. Each wavelength tunable submodule incorporated into the module or array can have the same or different optical wavelength and other parameters including but not limited to modulation format. By utilizing the wavelength tunable laser submodules to build a module or array, the need for individual modules dedicated to wavelength sub-bands in the array is eliminated. The same tunable module can be used to fill all the wavelengths on a transmission fiber.
US09385812B2	Optical communication interface utilizing N-dimensional double square quadrature amplitude modulation The present invention is directed to data communication system and methods. More specifically, various embodiments of the present invention provide a communication interface that is configured to transfer data at high bandwidth using nDSQ format(s) over optical communication networks. In certain embodiments, the communication interface is used by various devices, such as spine switches and leaf switches, within a spine-leaf network architecture, which allows large amount of data to be shared among servers.
US09385809B2	Optical interface module for coherent reception, optical memory module, and optical memory system comprising same An optical memory module comprises one or more memory devices configured to store data, and one or more optical interface modules configured to perform optical communication between the memory devices and an external device. Each of the optical interface modules comprises an input-output light distribution unit configured to divide received light to produce transmission light and reception light, an electrical-to-optical conversion unit configured to perform optical modulation based on the transmission light and an electrical transmission signal to generate an optical transmission signal, and a coherent optical-to-electrical conversion unit configured to perform a coherent reception based on the reception light and an optical reception signal to generate an electrical reception signal.
US09385795B1	Four-by-four downlink (4×4 DL) multiple-input-multiple output (MIMO) with existing antenna structures Antenna structures and methods of operating the same of an electronic device are described. One apparatus includes an antenna structure comprising four antenna elements, a RF circuit, and a MIMO RF circuit coupled between the antenna structure and the RF circuit. The MIMO RF circuit may include a pair of diplexers; and a pair of switches. The RF circuit is operable to cause a first antenna element of the four antenna elements to radiate and receive electromagnetic energy in a first frequency range via the MIMO RF circuit and the RF circuit is operable to cause a remaining three antenna elements of the four antenna elements to receive electromagnetic energy in the first frequency range via the MIMO RF circuit to support 4×4 DL MIMO.
US09385786B2	Method and apparatus for charging a battery in a mobile device through a near field communication (NFC) antenna A near field communication (NFC) antenna in a mobile device is used to wirelessly charge a battery in the mobile device by placing the mobile device on, or in very close proximity to, a charging station that emits an electromagnetic field. An induced current from the NFC antenna is detected that is above a predetermined threshold for longer than a predetermined duration. The induced current is used to charge the battery in the mobile device.
US09385777B2	Asymmetrical forward/reverse transmission bandwidth A wireless communications system employs code-division multiple access information transmission techniques where the uplink and downlink transmission bandwidths are unequal. The higher bandwidth is an integer multiple of the lower bandwidth. The present system requires a base station and a subscriber unit to have two pseudo-random code generators which can be clocked separately. Alignment of the uplink and downlink pseudo-random spreading codes is achieved by truncating the code sequence for the lower speed link at the conclusion of a complete code sequence for the higher speed link.
US09385776B1	Data channel noise estimation using pilot channel A method includes receiving a Code Division Multiple Access (CDMA) carrier carrying at least a pilot channel. Differences are computed between selected soft pilot symbols received on the pilot channel. Based on the computed differences between the selected soft pilot symbols received on the pilot channel, a level of noise is estimated for a data channel that is to be transmitted on the CDMA carrier.
US09385771B2	Release mechanism for a smart card A smart card receiving assembly for a handheld communication device includes a housing, a release arm, and a smart card receiver. The housing forms an access compartment for receiving a battery and a smart card. The release arm is slidingly coupled to the housing and includes an extension extending downward. The smart card receiver is adapted to receive a smart card and includes a channel adapted to receive the extension. The smart card receiver can be made of metal to provide rigidity to the handheld communication device. When the release arm is moved from a first position to a second position, the extension can force the smart card from a seated position to an unseated position with the smart card sliding at least partially out of the smart card receiver and into the access compartment.
US09385770B2	Arrayed antenna for coherent detection of millimeterwave and terahertz radiation We disclose an arrayed antenna for reception of electromagnetic radiation from a millimeter-wave or terahertz range. In an example embodiment, individual antenna cells in the arrayed antenna are configured for coherent detection of the received electromagnetic radiation and are electrically connected with one another in a manner that causes each of the antenna cells to positively contribute to the overall gain of the arrayed antenna. In some embodiments, the arrayed antenna may have a network of electrical conductors that is configured to (i) collect and deliver the electrical output signals generated by the individual antenna cells to an output terminal of the arrayed antenna, (ii) deliver an electrical local-oscillator signal from a common local-oscillator source to the individual antenna cells, and (iii) deliver electrical DC power from a common power supply to electrical circuits in the individual antenna cells.
US09385767B2	Apparatus for correcting multipath errors in carrier phase measurements of a navigation receiver A correction phase locked loop (CPLL), including a signal processing unit that receives a digitized input signal from a satellite, the signal processing unit comprising (a) a primary correlator and primary discriminator, connected in series and generating a main error signal Z1 from the digitized input signal; (b) a correction correlator and a correction discriminator connected in series and generating a correction signal Z2; and (c) an adder for adding the main error signal Z1 and the correction signal Z2 to produce a common error signal Z. A loop filter filters the common error signal Z to produce a corrected error signal that is used for frequency-phase control of a Numerical Control Oscillator (NCO). The NCO generates two mutually orthogonal output reference signals whose phase is substantially free of multipath errors.
US09385760B2	Wireless signal receiving device and method The present invention discloses a wireless signal receiving device and method capable of receiving three or more signals of different central frequencies. An embodiment of said device comprises: a receiving circuit operable to generate a reception signal according to a wireless signal including a first, second, and third wireless signals of different central frequencies; a mixer operable to generate a mixing signal by processing the reception signal according to an oscillation clock in which the mixing signal includes a first, second and third intermediate-frequency (IF) signals and the central frequency of the third IF signal is higher than the other two; and a digital signal generating circuit operable to generate a first, second and third digital signals by processing the first, second and third IF signals according to a sampling frequency in which the sampling frequency is lower than two times the maximum frequency of the third IF signal.
US09385756B2	Data processing system with retained sector reprocessing A data processing system includes a data input configured to receive input blocks of data, a memory configured to store the input blocks of data, a data processor configured to process the input blocks of data and to yield corresponding processed output blocks of data and a scheduler configured to cause the data processor to output the output blocks of data after a processing criterion has been met in the data processor. The memory is configured to retain the input blocks of data for reprocessing after the corresponding processed output blocks of data have been output from the data processor. The scheduler includes a control input configured to receive reprocessing requests for the retained input blocks of data. The scheduler is configured to initiate a reprocessing operation in the data processor for the retained blocks of data when the reprocessing requests are received on the control input.
US09385755B2	Parallel bit interleaver A bit interleaving method involves applying a bit permutation process to a QC-LDPC codeword made up of N cyclic blocks each including Q bits, and dividing the codeword after the permutation process into a plurality of constellation words each including M bits, the codeword being divided into F×N/M folding sections, each of the constellation words being associated with one of the F×N/M folding sections, and the bit permutation process being applied such that each of the constellation words includes F bits from each of M/F different cyclic blocks in a given folding section associated with a given constellation word.
US09385742B1	Wideband multi-mode current switch for digital to analog converter A current switching cell for a digital to analog converter. The switching cell includes three stages, a first control stage, a data stage, and a second control stage. The first control stage is configured to either disconnect the outputs of the digital to analog converter, or to connect them to the outputs of the data stage. The data stage is configured to operate in one of two states, depending on a data signal received, and the second control stage is configured to selectively invert the output of the digital to analog converter. The two control stages may be driven with several combinations of control waveforms to implement a non return to zero mode, a return to zero mode, inverse non return to zero mode, and inverse return to zero mode.
US09385738B2	Digital readout method and apparatus Autonomously operating analog to digital converters are formed into a two dimensional array. The array may incorporate digital signal processing functionality. Such an array is particularly well-suited for operation as a readout integrated circuit and, in combination with a sensor array, forms a digital focal plane array.
US09385735B2	Analog-to-digital converter for image pixels One or more analog-to-digital converters and methods for analog-to-digital conversion are provided. The analog-to-digital converter comprises a ramp generator and a direct current (DC) generator respectively configured to apply a ramp voltage waveform and a DC voltage waveform to a comparator. During a pixel signal level conversion, a first portion of the ramp voltage waveform is applied to the comparator. A control circuit then makes a determination regarding an output of the comparator. If the output corresponds to a first output, or first logic state, the ramp voltage generator applies a second portion of the ramp voltage waveform to the comparator. If the output corresponds to a second output, or second logic state, the DC generator adjusts the DC voltage waveform applied to the comparator.
US09385729B1	System and method for controlling a phase lock loop A system includes: a phase frequency detector (PFD) having an output switchably connectable and disconnectable to a first signal path via a first switch, and switchably connectable and disconnectable to a second signal path via a second switch; a first filter disposed in the first signal path; a second filter disposed in the second signal path; and, a voltage controlled oscillator (VCO) operatively coupled to the first signal path downstream of the first filter, and operatively coupled to the second signal path downstream of the second filter. The VCO includes: a capacitive device or a current controlling device operatively coupled to the first signal path; and, a bulk terminal operatively coupled to the second signal path.
US09385727B2	Automated load tracking and system tuning mechanism for wireless charging A system includes at least one active energy transfer coil and a first passive energy transfer coil. The active energy transfer coil is configured to couple with a power supply. The at least one active energy transfer coil has an active coupling range. The first passive energy transfer coil is magnetically coupled to the active energy transfer coil and is located within the active coupling range. The first passive energy transfer coil has a passive coupling range. The first passive energy transfer coil is configured to provide energy to a first device located within the passive coupling range and based on energy received from the at least one active energy transfer coil.
US09385726B2	Chip and method for manufacturing a chip According to one embodiment, a chip is described comprising a plurality of supply lines delimiting a plurality of cell areas and a gate comprising a first transistor and a second transistor, wherein the first transistor is located in a first cell area of the plurality of cell areas and the second transistor is located in a second cell area of the plurality of cell areas such that a supply line of the plurality of supply lines lies between the first cell area and the second cell area.
US09385724B1	Methods for operating configurable storage and processing blocks at double and single data rates Integrated circuits such as application specific circuits or programmable logic devices may include specialized blocks such as configurable storage blocks and configurable processing blocks. Such specialized blocks may be controlled by clock signals and operated at single data rate or at double data rate. For instance, configurable storage blocks may be configured to use a double data rate communications scheme or a single data rate communication scheme to communicate data with other blocks. Configurable processing blocks may be configured to process data at a double data rate or a single data rate. Furthermore, configurable processing blocks that include accumulator circuitry may be configured to perform one accumulation at a single data rate or at a double data rate. Such configurable processing blocks may also be configured to perform two accumulations at a single data rate.
US09385721B1	Bulk driven low swing driver A circuit is presented to reduce power while transmitting high speed signals across a long length of wire on an integrated circuit. A PMOS is used as a low swing driver, where the PMOS is connected between the driver's output and ground. The gate of the PMOS is also set to ground, while the input signal is connected to the bulk. The output is then transmitted over the signal path to an analog receiver, where both single ended and differential embodiments are presented. For a single ended version, a reference voltage for the receiver can be provided by a second, similarly connected PMOS whose bulk has an input signal at an intermediate level of input swing at the transmitter PMOS.
US09385716B2	Semiconductor device A semiconductor device includes a first block coupled between a first latch node and a second latch node, a second block suitable for generating common-mode noise between the first latch node and the second latch node, wherein the second block includes a first MOS transistor having a gate coupled with the first latch node, and one between a source and a drain of the first MOS transistor is coupled with the second latch node while the other between the source and the drain is floating.
US09385711B2	Switch device A switch device includes a housing, a substrate, a single operation knob including an operation plate having operation indications provided thereon and moving in a direction toward and away from the substrate, a push switch fixed to the substrate, a plurality of touch electrodes to mounted on the substrate for sensing proximity of a finger and outputting a proximity signal, and a control circuit configured to output a command signal to an electrical circuit based on proximity signals from the respective touch electrodes when a press signal is input thereto. The sensing portions of the touch electrodes are disposed so as to form a space between the sensing portions and the operation plate when the operation knob is not depressed by a finger, and to come close to the operation plate when the operation knob is depressed by a finger.
US09385710B2	Touch screen, electronic device comprising same and method for manufacturing same Embodiments of the present invention provide a touch screen, an electronic device comprising the same and a method for manufacturing the same. The touch screen comprises driving electrode layers, a transparent organic polymer layer and metal bridges conductively communicated with two adjacent driving electrode layers, and protective layers covering the metal bridges to prevent the oxidation of the metal bridges are disposed between the driving electrode layers and the metal bridges. In the touch screen provided by the embodiment of the present invention, as the metal bridges are respectively covered by the protective layers, the metal bridges will not undergo oxidation reaction due to the contact of transparent organic polymers, and thus the electric conductivity of the metal bridges can be effectively guaranteed; the increase of the impedance of oxide layers can be avoided; and the product yield of the touch screen can be improved.
US09385701B2	Method and device for generating PWM pulses for multi-level inverter A method and a device for generating PWM pulses for an inverter are provided. The three-phase inverter's characteristic of including high frequency complementary switches is used. Only three PWM peripheral units of a DSP control unit are used to output PWM high frequency signals, and a detection control unit determine for each phase two currently high frequency complementary switches according to the states of detected level signals outputted by a preset number of GPIO interfaces. The PWM high frequency signals are distributed for each phase to one of the two switches, and the PWM high frequency signals are inversed and then sent to the other one of the two switches. In addition, the states of other switches are maintained unchanged according to a preset correspondence between states of switches of a multi-level inverter and outputted level signals in different switching periods.
US09385696B1	Generating a pulse clock signal based on a first clock signal and a second clock signal Various aspects provide for generating a clock signal for a hold latch. A latch pulse generator generates a pulse clock signal based on a first clock signal associated with a first flip-flop component and a second clock signal associated with a second flip-flop component. A hold latch component receives the pulse clock signal generated by the latch pulse generator and generates a data signal that is transmitted to the second flip-flop component.
US09385692B2	Low power oscillator with charge subtraction scheme An ultra-low power oscillator is designed for wake-up timers that can be used in compact wireless sensors, for example. A constant charge subtraction scheme removes continuous comparator delay from the oscillation period, which is the source of temperature dependence in conventional RC relaxation oscillators. This relaxes comparator design constraints, enabling low power operation. In 0.18 μm CMOS, the oscillator consumes 5.8 nW at room temperature with temperature stability of 45 ppm/° C. (−10° C. to 90° C.) and 1%/V line sensitivity.
US09385684B2	Acoustic resonator having guard ring A bulk acoustic wave (BAW) resonator structure comprises a first electrode disposed over a substrate, a piezoelectric layer disposed over the first electrode, a second electrode disposed over the first piezoelectric layer, and a guard ring structure formed around a perimeter of an active region corresponding to an overlap of the first electrode, the first piezoelectric layer, and the second electrode.
US09385680B2	Crest factor reduction applied to shaping table to increase power amplifier efficiency of envelope tracking amplifier There is disclosed a method of controlling an input to an envelope modulated power supply of an envelope tracking amplification stage, comprising: generating an envelope signal representing the envelope of a signal to be amplified; applying a shaping function to the envelope signal to generate a shaped envelope signal, including: clipping the shaped envelope signal at high input envelope values; and providing the shaped envelope signal as an input signal to the envelope modulated power supply.
US09385669B2	Class-E outphasing power amplifier with efficiency and output power enhancement circuits and method An outphasing amplifier includes a first class-E power amplifier (16-1) having an output coupled to a first conductor (31-1) and an input receiving a first RF drive signal (S1(t)). A first reactive element (CA-1) is coupled between the first conductor and a second conductor (30-1). A second reactive element (LA-1) is coupled between the second conductor and a third conductor (32-1). A second class-E power amplifier (17-1) includes an output coupled to a fourth conductor (31-2) and an input coupled to a second RF drive signal (S2(t)), a third reactive element (CA-3) coupled between the second and fourth conductors. Outputs of the first and second power amplifiers are combined by the first, second and third reactive elements to produce an output current in a load (R). An efficiency enhancement circuit (LEEC-1) is coupled between the first and fourth conductors to improve power efficiency at back-off power levels. Power enhancement circuits (20-1,2) are coupled to the first and fourth conductors, respectively.
US09385661B1	Amplifier with deterministic noise cancellation and method thereof In one embodiment, a circuit comprising a passive input network of an input impedance configured to couple an input voltage to a first circuit node; an adaptive current source configured to output an adaptive bias current to the first circuit node; a cascode device controlled by a control voltage and configured to receive a sum current from the first circuit node and output an output current to a second circuit node; and a load network of a load impedance configured to provide termination to the second circuit node, wherein the adaptive bias current is dynamically adapted to track a deterministic noise component in the input voltage.
US09385659B2	Device and method for controlling power amplifier A control device provides a supply voltage to an output transistor of a power amplifier. The control device includes a detector encoder, a switch sequencer and a power switch. The detector encoder receives a detection signal indicating a negative peak voltage level of an output signal of the power amplifier, receives a reference signal indicating a critical voltage of the detection signal at which the negative peak voltage level of the output transistor is deemed to be out of voltage with reference to saturation voltage of the output transistor, compares the detection and reference signals, and outputs Boost Request and Recovery Request signals in response. The switch sequencer translates the Boost Request and Recovery Request signals into multiple control bits. The power switch coordinates switching among a no boost voltage and multiple boost voltages based on the control bits, and outputs one of these voltages as the supply voltage.
US09385652B2	Cross-coupled oscillator, integrated circuit and electronic device A cross-coupled oscillator arrangement has a first resistance-capacitance oscillator core including at least two inverting stages; and a second resistance-capacitance oscillator core substantially identical to the first resistance-capacitance oscillator core. The first oscillator core and second oscillator core are cross coupled in anti-phase using coupling capacitors. The first oscillator core and second oscillator core are also connected in series such that the first oscillator core is supplied with a supply between a first potential and a second potential and the second oscillator core is supplied with a supply between the second potential and a third potential.
US09385648B2	Electric power steering apparatus Motor control command output means outputs, as a motor control command, a second command value, which is calculated by second command value calculating means on the basis of a first command value generated by first command value calculating means and a current value obtained by causing motor driving system current adding means to add together currents of respective motor driving systems, to the motor driving systems of two systems constituted by a motor and drive circuits for driving the motor. The second command value calculating means may calculate the second command value by performing a d/q coordinate system current feedback calculation using the current value.
US09385644B2	Sensorless DC fan speed controller A method of maintaining a calibrated DC fan motor is provided in which normal operation of the motor is periodically and temporarily suspended in order to calibrate the motor. During normal operation, the motor controller selects an appropriate PWM control signal to achieve the desired motor speed. This PWM control signal is later modified during the calibration process on the basis of the difference between the desired motor speed and the actual motor speed, where the actual motor speed is determined by temporarily interrupting power to the motor, measuring the back EMF of the motor, and calculating the actual motor speed based on the back EMF. When normal operation is resumed, the motor controller uses the modified PWM control signal.
US09385641B2	System and method for inducing rotation of a rotor in a sensorless motor System and method for initiating rotation of a rotor in a motor. The motor may include the rotor and a plurality of pairs of electromagnets. A rotation period may be determined. One or more pairs of electromagnets of the plurality of pairs of electromagnets may be excited at a first excitation level. The excited one or more pairs of electromagnets may be determined based on the rotation period. The excitation level may be decreased, over a first period of time, to a second excitation level. The second excitation level may be a lower excitation level than the first excitation level. The excitation level may be increased, over a second period of time, to a third excitation level. The third excitation level may be a higher excitation level than the second excitation level. The rotation period may be decreased over the first and second periods of time.
US09385639B2	Switching controller for electric motors and related method of controlling electric motors A switching controller of a poly-phase electric motor may generate, in a fully digital manner, a replica of the phase current and/or of the phase (star) voltage of one or more windings of the motor. The switching controller may use digital signals already available for driving the motor to reconstruct a replica of the phase current or the phase voltage, and thereby avoid the need for dedicated analog components for phase current or phase voltage determination.
US09385630B2	Power conversion control device, power conversion control method, electric motor, and vehicle driving system A power conversion control device includes a modulation-wave generating unit generating a modulation wave based on output voltage phase angle command and modulation factor, a carrier-wave generating unit that, in a case of non-overmodulation state, generates a triangular wave or saw-tooth wave as the carrier wave, and, in a case of overmodulation state, generates, as the carrier wave, a signal fixed to −1 in a first section that is a predetermined range centering on timing corresponding to a peak position of the modulation wave, generates, as the carrier wave, a signal fixed to +1 in a second section obtained by shifting the first section by a half cycle of the modulation wave, and generates, as the carrier wave, a triangular wave or saw-tooth wave in remaining third section, and a comparing unit that compares the carrier wave and the modulation wave and generates a switching signal.
US09385627B2	Universal power conversion devices for alternating current electric apparatus The present disclosure is directed to universal power conversion devices for alternating current electric apparatus. One example power conversion device includes a plurality of transformers and a plurality of terminal blocks. The plurality of terminal blocks comprise at least an AC input terminal block for receiving an input alternating current signal and a primary coil terminal block. The primary coil terminal block has a plurality of output terminals respectively connected to a plurality of taps of a plurality of primary coils of the plurality of transformers. A plurality of jumpers respectively providing electrical connection between respective output terminals of the AC input terminal block and input terminals of the primary coil terminal block are selectively reconfigurable for reconfiguring a power conversion applied to the input alternating current signal by the power conversion device.
US09385617B2	Overcurrent protection circuit for a switching power supply apparatus In a switching power supply apparatus, when it is detected at time t1 that a voltage Vis has exceeded a first threshold Vth1, a timer counting a period of time T1 is started, and the number times the input voltage Vis does not exceed Vth1 is started to be counted. When the timer expires before the count reaches a predetermined number, a first overcurrent protection operation is performed. When it is detected at time t2 that Vis has exceeded a second threshold Vth2, a second overcurrent protection operation is immediately performed. As a result, appropriate overcurrent protection is performed in accordance with the operating state of a load.
US09385606B2	Automatic buck/boost mode selection system for DC-DC converter A reconfigurable DC-DC converter including a controller is disclosed which automatically adjusts the mode of operation (buck mode or boost mode) depending on the system requirements and is able to achieve the maximum efficiency and the lowest inductance current. The method of switching between buck and boost mode allows the converter to operate to 100% duty cycle for buck mode and 0% duty cycle for boost mode. This maximizes efficiency since the buck-boost mode of operation is eliminated and improves the stability and reliability of the system. A converter output voltage is processed and compared to a control voltage to generate buck and boost comparator output signals. The buck and boost comparator output signals are provided to control logic, which generates switch control signals, which are provided to the DC-DC converter to establish buck mode, boost mode, or pass-through mode.
US09385603B2	Control method and control circuit for switching power supply In one embodiment, a method of controlling a switching power supply can include: (i) generating an ideal on time signal according to an input voltage and an output voltage of the switching power supply; (ii) generating a ripple voltage signal having a predetermined constant value when a power switch of the switching power supply is on, and a linearly decreasing value when the power switch is off; (iii) generating a regulating voltage signal according to an output voltage sense signal and the ripple voltage signal; (iv) generating a regulating control signal by comparing the regulating voltage signal against a first reference signal; (v) generating an on time control signal according to the regulating control signal and the ideal on time signal; and (vi) generating a driving signal according to the on time control signal for driving the power switch.
US09385602B2	Switching power supply device A switching power supply device wherein an input voltage is stepped-up by first and second switching elements that are driven on and off in a complementary way, thus obtaining a stabilized output voltage. The switching power supply device includes a comparator that detects fluctuation in an operating reference potential of the second switching element accompanying fluctuation in the input voltage, and a drive signal generator circuit that carries out a logical operation on an output control signal, a dead time signal, and the output signal of the comparator, thus generating first and second drive signals that determine the on-state time of the first and second switching elements.
US09385596B1	Charge pump circuit capable of reducing reverse currents A charge pump unit capable of reducing reverse current includes a first NMOS transistor, a first PMOS transistor, a second NMOS transistor, and a second PMOS transistor. The first NMOS transistor and the first PMOS transistor are coupled in series and are controlled by a first clock signal. The second NMOS transistor and the second PMOS transistor are coupled in series and are controlled by a second clock signal. The first NMOS transistor is for receiving a first input voltage and the second NMOS transistor is for receiving a second input voltage. The first clock signal and the second clock signal transit at different time points. A rising edge of the first clock signal leads a respective falling edge of the second clock signal.
US09385593B2	Suspend mode in charge pump A device may be associated with a power source. The device may include a charge pump configured to output a pulse-width modulated voltage based upon an input voltage from the power source, with the pulse-width modulated voltage varying between a first voltage and a second voltage. The device may also include a low-pass filter comprising an output capacitor, with the output capacitor being configured to average the pulsed-width modulated voltage and to output a filtered voltage having a value different than that of the input voltage. The device may further include a controller configured to selectively decouple the charge pump from the power source when a load imposed on the low-pass filter is below a threshold load.
US09385590B2	Arrangement and method for a vehicle inverter drive A method and arrangement are disclosed for a vehicle inverter drive having a voltage distribution block and two or more inverters, intermediate circuits of which are connected in parallel to the voltage distribution block for supplying voltage to the intermediate circuits, in which the intermediate circuits of the inverters are interconnected with a coaxial cable to minimize inductance in the parallel connection.
US09385589B2	Management of common mode noise frequencies in portable electronic devices The disclosed embodiments provide a system that facilitates the use of a portable electronic device. During operation, the system detects a coupling of a power supply to the portable electronic device through a set of wires. Next, the system uses the set of wires to identify a type of the power supply. The system then periodically determines a switching frequency of the power supply based on the type of the power supply and a current drawn from the power supply. Finally, the system uses the switching frequency to facilitate the operation of a touch control in the portable electronic device. For example, if the switching frequency corresponds to a sensing frequency of the touch control, the system may change the sensing frequency to an alternative sensing frequency.
US09385586B2	Snubber circuit A snubber circuit of a switching power supply device includes a transistor and a capacitor which are connected in series between a cathode and an anode of a diode, and a secondary winding of a transformer. A vibration voltage is generated in the secondary winding when a surge voltage is generated in the diode. The snubber circuit further includes a differentiating circuit which differentiates a voltage between terminals of the secondary winding, and a peak charging circuit which generates a control voltage of a waveform connecting a plurality of peaks of an output voltage of the differentiating circuit and applies the control voltage to a gate of the transistor to cause the transistor conduct.
US09385583B2	Circuit and method for operating a circuit In certain embodiments, a circuit comprises a first voltage source configured to provide a supply voltage at an output of the first voltage source for a subcircuit. The circuit further comprises at least one second voltage source configured to provide output voltage to supply the subcircuit when the first voltage source is deactivated. The circuit further comprises an evaluation circuit connectable to an output of the at least one second voltage source, to a control input of the at least one second voltage source, and to the output of the first voltage source. The evaluation circuit is configured to adjust, based on the supply voltage at the output of the first voltage source, an output voltage of the at least one second voltage source.
US09385580B2	Electromagnetic actuator for a surgical instrument The invention relates to an electromagnetic actuator for a surgical or medical instrument, the actuator having a stator (19) and a displaceable element (10), which at least partially comprises a paramagnetic or ferromagnetic material and can be displaced from a first position into a second position by applying an electromagnetic field.The invention is characterized in that the displaceable element (10) is or will be held in the first or in the second position by a permanent magnet.
US09385579B2	Inertial drive actuator An inertial drive actuator includes a displacement unit, a vibration substrate, a movable body, a first magnetic field generator which generates a magnetic field so that, a magnetic attractive force or a magnetic repulsive force acts in a direction opposite to the movable body, a first yoke, and which induces a magnetic flux generated by the first magnetic field generator such that, the flux generated by the first magnetic field generator is concentrated on a surface of the movable body, opposite to the vibration substrate, and second yokes and on a side of the vibration substrate, opposite to a direction facing the movable body, and the second yokes and control a frictional force acting between the movable body and the vibration substrate by controlling the magnetic field generated by the first magnetic field generator.
US09385577B2	Axial gap-type power generator An axial gap-type power generator has: a rotor fixed to a crankshaft of an engine; a stator fixed to a crankcase of the engine and opposing the rotor across a spacing in an axial direction; and a housing to house the rotor and the stator and to fix the stator. The stator is configured by arraying, in a peripheral direction, a plurality of coils C each configured through winding of a winding about a stator core. The housing is formed of a resin-based material. Winding ends of the coils are wired using connector fittings each of which is formed of a metal plate, is held on the housing, and has a clamp into which the winding end is inserted and clamped.
US09385570B2	Stator magnet wire end coil retention system The invention includes a retention system and method for stator magnet wires. In embodiments, the retention system includes a packing ring that can swell to a larger size following installation. In embodiments, the lubricant used in the motor causes the packing ring to swell. When the packing ring swells, it exerts pressure against the end turns of the stator magnet wires, and can contour to the shape of the wires so that there are no pressure points on the wires. A rigid support ring can be positioned concentric with the packing ring so that the packing ring does not swell toward the axis of the motor housing.
US09385569B2	Plastic-package motor A plastic-package motor, including: a rotating shaft, a rotor assembly, a plastic-package stator, a front end cover, a rear end cover, an injection-molding end plate, and a conducting strip. The rotating shaft and the rotor assembly are installed and connected together. The plastic-package stator is sleeved outside the rotor assembly. The front end cover is injection-molded on the injection-molding end plate at the bottom of the plastic-package stator. The injection-molding end plate is covered outside the front end cover. The rear end cover is installed at the other end of the plastic-package stator, and two ends of the rotating shaft are supported on a bearing of the front end cover and a bearing of the rear end cover, respectively. One end of the conducting strip is electrically connected with the front end cover.
US09385564B2	Stator of drive motor for electrically operated valve The invention intends to improve a stator which is detachably installed to an outer peripheral portion of a can accommodating a rotor. The stator is integrally formed with a resin mold by arranging a stator assembly (110) within metal molds (300, 310) and injecting a molten resin (P1) from a gate (G1) at one position. An annular plate (160) is mounted to an upper portion of the stator assembly (110) so as to prevent the molten resin from intruding into magnetic pole teeth (120a, 122a), and prevent a weld line from being generated in an outer peripheral surface of the resin mold.
US09385561B2	Charging coil system for a drop-in target device such as a toothbrush A system for efficiently charging a target device such as a power toothbrush, when placed in a charging receptacle such as a cup connected to a source of electrical power. A plurality of steering coils are arranged around the primary charging coil in the charging receptacle. A control circuit changes the magnetic field phase pattern of the steering coils relative to the phase of magnetic field of the primary coil until the maximum power transfer between the charging receptacle and the target device is determined. Charging of the target device occurs at the maximum power transfer rate.
US09385557B2	Methods, systems, and products for charging of devices Methods, systems, and products charge a battery in a mobile device. A calendric pattern describes habitual usage of the mobile device. The battery may thus be charged based on the calendric pattern.
US09385552B2	Method of detecting charger type and estimating remaining recharging time for mobile devices with USB recharging Method, apparatus, and computer program product embodiments are disclosed for estimating the remaining charging time of a rechargeable battery. An example embodiment of the invention comprises a method comprising the steps of detecting an availability of a charging device to a battery in an apparatus; determining a type of the charging device by measuring its charging characteristics for charging the battery in the apparatus and comparing its measured charging characteristics with stored charging characteristics of a plurality of chargers, adapters, or charger-adapter combinations; measuring charging current of the battery; and calculating a time remaining to charge the battery based on a comparison of the measured charging current with the stored charging characteristics.
US09385547B2	Wireless charging apparatus and electronic apparatus including the same There are provided a wireless charging apparatus and an electronic apparatus including the same, and more particularly, a wireless charging apparatus in which a wireless charging coil is integrally formed with a case and an electronic apparatus including the same, the wireless charging apparatus including a case forming an exterior of a product and containing a magnetic powder, and a coil pattern formed on an outer surface of the case.
US09385545B2	Electric storage device protection apparatus, electric storage apparatus, starter battery, and method of protecting electric storage device An electric storage device protection apparatus includes switches arranged between an electric device and an electric storage device and connected in parallel to each other, a rectifier component connected in series to one of the switches between a pair of common connection points of the switches, and a controller. The controller is configured to make the switch connected to the rectifier component to be in the open state when determining that a voltage of the electric storage device is within a reference range, and make the switch that is connected to the rectifier component to be in the closed state and make another one of the switches to be in the open state when determining that a voltage of the electric storage device becomes outside the reference range due to a current flowing in a reverse direction of the rectifier component.
US09385542B2	Serial multi-battery charger with independent simultaneous charge and discharge A serial battery charger has a battery matrix with switches that are configured by a microcontroller that reads voltages between batteries to determine if each battery is fully-charged, charging, or absent. A switch configuration allows charging and discharging currents to flow simultaneously, and allows discharging current but blocks charging current from fully-charged batteries to prevent over-charging. The charging current flows through all charging batteries in series while the discharging current flows from all fully-charged and charging batteries in series. Blocking and bypass switches route the charging current to all charging batteries in series, but bypass all fully-charged and absent batteries. The blocking and bypass switches route the discharging current serially through all fully-charged and charging batteries in the battery matrix while avoiding absent batteries. The switches are controlled by the switch configuration from the microcontroller. Larger battery matrixes have row and column lines that are connected by connecting switches.
US09385532B2	Energy management system An energy management system includes an energy management apparatus configured to mange energy supplied to equipment devices of a plurality of buildings, and a control apparatus configured to control the equipment devices in the buildings. The energy management apparatus is located superordinate to the buildings. The control apparatus is connected to the energy management apparatus. The control apparatus includes an operating status perceiving unit configured to perceive operating status of the equipment devices, and a reducing capability presentation unit configured to present a plurality of energy reducing capabilities for at least one condition to the energy management apparatus. The energy reducing capabilities are amounts of energy that can be reduced for the equipment devices based on the operating status perceived.
US09385531B2	System and method for optimizing returns of power feedstock producers A system and method for optimizing the returns of power feedstock producers includes automated selection between selling raw feedstock or generating power and storing it in a storage device for subsequent sale under more favorable market conditions. The system may comprise grid-scale electric power storage devices which enable a feedstock supplier—e.g., a natural gas producer—to utilize real-time market data to allocate a feedstock between its sale “as is”—i.e., as fuel or chemical feedstock—and use of the feedstock to produce electric power which may be stored for later sale when the market price for peaking electric power is favorable. In certain embodiments, the system may be entirely automated and the collection of market data, the allocation of feedstock and the generation and subsequent supplying of electric power to a grid may be entirely performed by the system without operator intervention.
US09385529B2	Power supply branching control apparatus and method for supplying power to electric loads Power supply current is supplied to a plurality of electric loads, the power supply current being generated by a DC power supply, flowing in and branching from a shared power supply switching device and then flowing in reverse connection protection devices that are a field-effect transistor and connected in series to the electric loads, respectively. The reverse connection protection devices are connected in a polarity such that the power supply current flows in the forward direction of parasitic diodes generated between the source terminal S and the drain terminal D of the field-effect transistor. When the current in the field-effect transistor is less than a predetermined value, a gate control circuit interrupts the gate voltage of the reverse connection protection device to cause the reverse connection protection device to open.
US09385500B2	Electrical connector including fins An electrical connector can be configured to mate with at least one complementary electrical connector. The electrical connector includes a dielectric connector housing including a housing body that defines a mounting interface configured to be mounted onto a substrate and a mating interface configured to receive at least one complementary electrical connector along a mating direction. A plurality of electrical contacts are supported by the connector housing and spaced apart from each other along a lateral direction that is substantially perpendicular to the mating direction. The electrical contacts include 1) a mating portion that is configured to mate with a complementary electrical contact of the complementary electrical connector, and 2) a mounting portion configured to electrically connect to the substrate. The electrical connector can further include at least one electrically insulative fin supported by the housing body.
US09385490B2	Switch-equipped connector A switch-equipped connector that can reduce the occurrence of intermodulation distortion includes a first terminal, a second movable terminal, and a magnet provided at a position distant from the first and second terminals. At least one of the first and the second terminal has a magnetic metal and the second terminal is configured to come into and out of contact with the first terminal.
US09385484B2	Electrical connector having waterproof function An electrical connector includes an insulating housing, a plurality of conductive terminals installed in the insulating housing and a metallic shell shielding around the insulating housing. The insulating housing has a mating portion extending forwardly thereof. The metallic shell surrounds to form a mating cavity into which the mating portion extending and a joint communicating with the mating cavity. The conductive terminals are exposed to one face of the mating portion. The joint is filled with soldering material to form a soldering segment. The electrical connector has good waterproof function with the soldering segment in the joint.
US09385474B2	Contact and connector including contact A contact increased in contact reliability by accommodating misalignment from a mating contact. A female-side contact includes a contact body including a contact portion that is brought into contact with a mating contact portion of a male-side contact, and a supporting member formed separate from the contact body, for receiving therein the mating contact portion and movably supporting the contact portion. The supporting member includes a supporting member body for receiving therein the mating contact portion and the contact portion, and first and second spring portions provided on the supporting member body, for bringing the mating contact portion inserted in the supporting member body and the contact portion into contact with each other. The contact portion includes a contact portion body having a flat plate shape and contact point portions protruding from the contact portion body into the inside of the supporting member body.
US09385464B2	Cable connector assembly having several plug connectors A cable connector assembly (100, 100′) includes a first cable end (1, 1′), a second cable end (2, 2′), and a cable (3, 3′) connecting between the first cable end and the second cable end. The first cable end has a first insulative body (11, 11′) and a first connecting tongue (12, 12′) extending beyond the first insulative body. The second cable end has a second insulative body (211, 211′), a third insulative body (212, 212′) extending from the second insulative body, a second connecting tongue (23, 23′) extending beyond the second insulative body, and a third connecting tongue (24, 24′) extending beyond the third insulative body. The cable connector assembly has a cover (25, 25′) covering the second cable end along a first direction. The cover is moveable with respect to the second cable end in a second, perpendicular direction to cover one of the two connecting tongues.
US09385461B2	Contact terminal having a plunger pin A contact terminal having a main body case and a plunger pin received in an elongate hole formed in the main body case is provided. The plunger pin is a round bar provided with a step and includes a small diameter portion including the protrusion end portion and a large diameter portion that slides on a surface of the hole to freely move in a longitudinal direction thereof. A cut space is formed to extend from an end of the large diameter portion so as to leave at least a part of a side surface portion of the large diameter portion and the cut space receives an insulation ball including at least an insulation surface. A coil spring is arranged between the hole and the insulation ball to press the protrusion end portion of the plunger pin such that the protrusion end portion protrudes from the main body case.
US09385448B2	Electrical connection via fastener hole The systems, apparatus, and methods disclosed herein provide access to systems located within a closed structure, such that the systems are traditionally difficult for humans to access. Exemplary structures include an engine compartment, airplane wing, or fuselage. This access allows a system located within the structure to be electrically coupled with an electrical I/O device located outside the structure. Access to a system located within the closed structure is provided by way of a hole.
US09385435B2	Surface scattering antenna improvements Surface scattering antennas provide adjustable radiation fields by adjustably coupling scattering elements along a wave-propagating structure. In some approaches, the scattering elements are patch elements. In some approaches, the scattering elements are made adjustable by disposing an electrically adjustable material, such as a liquid crystal, in proximity to the scattering elements. Methods and systems provide control and adjustment of surface scattering antennas for various applications.
US09385411B2	Directional coupler A directional coupler includes a main line and a subline. The main line connects an input port and an output port. The subline connects a coupling port and a terminal port. The subline includes a first coupling line section connected to the terminal port, a second coupling line section connected to the coupling port, and a low-pass filter. The low-pass filter includes an inductor provided between the first and second coupling line sections, a first capacitor having an end connected to the connection point between the inductor and the second coupling line section, a resistor connecting the other end of the first capacitor to the ground, and a second capacitor connecting the connection point between the inductor and the first coupling line section to the ground.
US09385404B2	Battery module of excellent heat dissipation property and heat exchange member Disclosed herein is a battery module including two or more plate-shaped battery cells sequentially stacked, wherein each of the plate-shaped battery cells is constructed in a structure in which an electrode assembly of a cathode/separator/anode structure is mounted in a battery case formed of a laminate sheet including a resin layer and a metal layer, and a heat exchange member, including a plurality of heat exchange plates and a frame to which the heat exchange plates are connected, is mounted at one side of a stack of the battery cells for removing heat generated from the battery cells during the charge and discharge of the battery cells.
US09385396B2	Battery cell of curved shape and battery pack employed with the same Disclosed herein is a battery cell configured such that an electrode assembly of a cathode/separator/anode stack structure is mounted in a changeable cell case in a state in which the electrode assembly is impregnated with an electrolyte, wherein the electrode assembly and the cell case are curved in the same direction on axial vertical sections thereof in a state in which opposite ends of the electrode assembly and opposite ends of the cell case are directed in the same direction about a middle part of the electrode assembly and a middle part of the cell case.
US09385395B2	Continuous prismatic cell stacking system and method A continuous prismatic cell stacking system and method is disclosed. The system comprises: (a) devices on the system to supply a separator layer, a cathode layer, and an anode layer; and (b) one cutter on the frame for cathode layer and anode layer; and (c) conveyer system to convey the stacked cell. The conveyer system comprises a rotary disc and a transfer belt. The said rotary disc is round shape, or multi-equilateral shape, or track & field shape.
US09385391B2	Fuel cells A redox fuel cell comprising an anode and a cathode separated by an ion selective polymer electrolyte membrane; means for supplying a fuel to the anode region of the cell; means for supplying an oxidant to the cathode region of the cell; means for providing an electrical circuit between respective anodes and cathodes of the cell; a catholyte solution comprising at least one catholyte component, the catholyte solution comprising a redox mediator couple; and a regeneration zone comprising a catholyte channel and a porous member having an active surface, the catholyte channel being arranged to direct a flow of catholyte adjacent to or towards the active surface, the means for supplying an oxidant to the cell being adapted to supply the oxidant to the porous member.
US09385383B2	Method for generating injected current of fuel cell stack Disclosed herein is a method for generating an injected current of fuel cell stack, including: generating a synthesized frequency current in a form in which a first frequency current is synthesized with a second frequency current; and applying the synthesized frequency current to the fuel cell stack, wherein the first frequency current and the second frequency current are each used to calculate at least one of total harmonic distortion and impedance. According to the embodiment of the present invention, a hardware configuration may be reduced by applying the synthesized frequency current of the AC current for calculating the total harmonic distortion (THD) and the AC current for calculating the impedance to the fuel cell stack, without generating the AC current for calculating the total harmonic distortion (THD) and the AC current for calculating the impedance, respectively, thereby reducing a price and a size of the fuel cell stack.
US09385381B2	Fuel cell stack A fuel cell stack has a first block having a first number of cells, a first fuel supply channel for supplying fuel gas to the first block, a collecting channel for collecting fuel gas which has passed through the first block, a second block having a second number of cells, the second number being smaller than the first number, a second fuel supply channel for supplying the second block with fuel gas which has been collected into the collecting channel, and a discharge channel for discharging fuel gas which has passed through the second block. A throttling section smaller in channel diameter than first and second fuel gas trunk channels, first and second branch channels, the collecting channel, and the discharge channel is provided downstream of the collecting channel and upstream of the second fuel supply channel.
US09385379B2	Removal of non-conductive hydrophilic coatings from lands of fuel cell bipolar plates A bipolar plate for a fuel cell is provided including a plate having an active surface with a plurality of flow channels formed therein. The plurality of flow channels have a hydrophilic coating deposited thereon and define a plurality of lands disposed therebetween. The plurality of lands is substantially free of the hydrophilic coating. Furthermore, a thickness of the hydrophilic coating is substantially constant along a length of the active surface and an edge of the hydrophilic coating adjacent the plurality of lands is substantially continuous. A method for preparing the bipolar plate is also provided.
US09385374B2	Electrode binder composition for lithium ion electrical storage devices An electrode binder of a lithium ion battery comprising: (a) a polyvinylidene binder dispersed in an organic diluent with (b) a (meth)acrylic polymer dispersant. The binder can be used in the assembly of electrodes of lithium ion batteries.
US09385361B2	Rechargeable battery A rechargeable battery is disclosed. In one aspect, the battery includes an electrode assembly having an uncoated region, a case accommodating the electrode assembly therein and an insulation plate disposed on the uncoated region of the electrode assembly. The battery also includes a gasket formed on the insulation plate, wherein the gasket comprises a support supported by and contacting an upper surface of the insulation plate, wherein the support comprises an inner side surface and an outer side surface, and wherein at least one of the inner and outer side surfaces forms an obtuse angle with respect to the upper surface of the insulation plate. The battery further includes a cap assembly contacting the gasket and connected to the uncoated region of the electrode assembly through a lead tab.
US09385348B2	Organic electronic devices with multiple solution-processed layers A method for fabricating an organic light emitting device stack involves depositing a first conductive electrode layer over a substrate; depositing a first set of one or more organic layers, wherein at least one of the first set of organic layers is a first emissive layer and one of the first set of organic layers is deposited by a solution-based process that utilizes a first solvent; depositing a first conductive interlayer by a dry deposition process; and depositing a second set of one or more organic layers, wherein at least one of the second set of organic layers is a second emissive layer and one of the second set of organic layers is deposited by a solution-based process that utilizes a second solvent, wherein all layers that precede the layer deposited using the second solvent are insoluble in the second solvent.
US09385342B2	Local seal for encapsulation of electro-optical element on a flexible substrate An electroluminescent display or lighting product incorporates a panel comprising a collection of distinct light-emitting elements formed on a substrate. A plurality of distinct local seals are formed over respective individual light-emitting elements or groups of light-emitting elements. Each local seal is formed by depositing a low melting temperature glass powder suspension or paste, and fusing the glass powder. Fusing may be performed using selective heating by microwave or laser irradiation. Energy absorption may be enhanced by incorporating absorbing particles in the glass powder paste or suspension. The local seal may be used in conjunction with a continuous thin film encapsulation structure. Optical functions can be provided by each local seal, including refraction, filtering, color shifting, and scattering.
US09385341B2	Organic LED element, translucent substrate, and method for manufacturing organic LED element The present invention provides an organic LED element having the significantly larger light emission area than conventional ones. The invention relates to an organic LED element, comprising: a transparent substrate; a light scattering layer; a transparent first electrode; an organic light-emitting layer; and a second electrode formed in this order, wherein the light scattering layer has a base material comprising a glass, and a plurality of scattering materials dispersed in the base material; the light scattering layer has side surfaces, and each of the side surfaces has a surface tilted at an angle larger than right angle from an upper surface on the first electrode side toward a bottom surface on the transparent substrate side; and the first electrode is placed so as to continuously cover the side surfaces.
US09385336B2	Organic light-emitting device using a mixture of electron transporting compounds Provided is an organic light-emitting device including a first electrode, a second electrode disposed opposite to the first electrode, an emission layer disposed between the first electrode and the second electrode, and an electron-transporting layer disposed between the emission layer and the second electrode. The electron-transporting layer includes a first electron-transporting material and a second electron-transporting material. The lowest unoccupied molecular orbital (LUMO) energy level of the first electron-transporting material (EL1) and the lowest unoccupied molecular orbital (LUMO) energy level of the second electron-transporting material (EL2) satisfy the equation 0.1 eV≦\|EL1−EL2\|≦0.3 eV.
US09385330B2	Substrate for organic electronic device, organic electronic system and lighting each with particle-containing layer having light-scattering particles and second particles different from the light-scattering particles The present application relates to a substrate for an organic electronic diode (OED), an organic electronic system, and a lighting. In the present application, the substrate capable of forming an OED or the organic electronic system can ensure performance including light extracting efficiency and reliability is provided.
US09385329B2	Platinum complexes and devices Platinum compounds of Formulas I and II useful in a variety of devices, such as, for example organic-light emitting diodes (OLEDs).
US09385325B2	Heterocyclic compound and organic light emitting device including the same Provided is a heterocyclic compound represented by Formula 1 below and an organic light-emitting device including the compound of Formula 1: wherein substituents in Formula 1 above are defined as in the specification.
US09385322B2	Method and apparatus for depositing LED organic film In one embodiment the disclosure relates to an apparatus for depositing an organic material on a substrate, including a source heater for heating organic particles to form suspended organic particles; a transport stream for delivering the suspended organic particles to a discharge nozzle, the discharge nozzle having a plurality of micro-pores, the micro-pores providing a conduit for passage of the suspended organic particles; and a nozzle heater for pulsatingly heating the micro-pores nozzle to discharge the suspended organic particles from the discharge nozzle.
US09385317B2	Memory cells and methods of forming memory cells Some embodiments include a memory cell having a first electrode, and an intermediate material over and directly against the first electrode. The intermediate material includes stabilizing species corresponding to one or both of carbon and boron. The memory cell also has a switching material over and directly against the intermediate material, an ion reservoir material over the switching material, and a second electrode over the ion reservoir material. Some embodiments include methods of forming memory cells.
US09385313B2	Resistive memory cell having a reduced conductive path area A method of forming a resistive memory cell, e.g., a CBRAM or ReRAM, may include forming a bottom electrode layer, forming an oxide region of an exposed area of the bottom electrode, removing a region of the bottom electrode layer proximate the oxide region to form a bottom electrode having a pointed tip or edge region, and forming first and second electrolyte regions and first and second top electrodes over the bottom electrode to define distinct first and second memory elements. The first memory element defines a first conductive filament/vacancy chain path from the first portion of the bottom electrode pointed tip region to the first top electrode via the first electrolyte region, and second memory element defines a second conductive filament/vacancy chain path from the second portion of the bottom electrode pointed tip region to the second top electrode via the second electrolyte region.
US09385309B2	Smooth seed layers with uniform crystalline texture for high perpendicular magnetic anisotropy materials A method for fabricating a perpendicular magnetic tunnel junction (pMTJ) device includes growing a seed layer on a first electrode of the pMTJ device. The seed layer has a uniform predetermined crystal orientation along a growth axis. The method also includes planarizing the seed layer while maintaining the uniform predetermined crystal orientation of the seed layer.
US09385308B2	Perpendicular magnetic tunnel junction structure In a particular illustrative embodiment, a method of fabricating a semiconductor device is disclosed that includes forming a metal layer over a device substrate, forming a via in contact with the metal layer, and adding a dielectric layer above the via. The method further includes etching a portion of the dielectric layer to form a trench area, and depositing a perpendicular magnetic tunnel junction (MTJ) structure within the trench area.
US09385299B2	Liquid ejecting head, liquid ejecting apparatus, and piezoelectric element Provided is a piezoelectric element comprising a first electrode; a piezoelectric body layer provided on the first electrode, the piezoelectric body layer including 50 mol % or more of at least bismuth and iron, and the piezoelectric body layer having a current density-time curve obtained by applying a voltage to the first electrode and the second electrode including a plurality of inflection points; and a second electrode provided on the piezoelectric body layer.
US09385288B2	Light-emitting device A light-emitting device includes a lead frame, a white resist, a light-emitting element, and a wire. The white resist is provided on the lead frame to be in contact with the lead frame. The white resist has an opening to expose the lead frame. The light-emitting element is disposed on the white resist and includes a transparent substrate and a semiconductor layer. The transparent substrate is bonded to the white resist via a bonding member. The semiconductor layer is provided on the transparent substrate. The wire connects the light-emitting element and the lead frame at the opening.
US09385286B2	Optoelectronic component An optoelectronic component comprises: at least one semiconductor chip suitable for generating electromagnetic radiation, a beam shaping element (1), through which at least part of the electromagnetic radiation emitted by the semiconductor chip during operation passes and which has an optical axis (2), and which has an outer contour (5) with respect to a coordinate system (3, 4) perpendicular to the optical axis (2), wherein the contour (5) constitutes a curve (n) that is mirror-symmetrical with respect to both central axes (a1, a2) of an ellipse (e) inscribed by the contour, wherein the following succeed one another in each of the four identical sections between the respective central axes (a1, a2): an ellipse segment (b1), a linear part (c1) a second ellipse segment (d), a further linear part (c2) and a third ellipse segment (b2).
US09385281B2	Graphene sheet, transparent electrode, active layer including the same, display, electronic device, optoelectronic device, battery, solar cell, and dye-sensitized solar cell including the electrode or active layer The present invention relates to a graphene sheet and a transparent electrode, and an active layer including the same, and a display device, an electronic device, an optoelectronic device, a battery, a solar cell, and a dye-sensitized solar cell including these. The graphene sheet includes a lower sheet including 1 to 20 graphene layers, and a ridge formed on the lower sheet and including more graphene layers. The ridge has a metal grain boundary shape.
US09385274B2	Patterned opto-electrical substrate and method for manufacturing the same The present invention relates to a patterned opto-electrical substrate, comprising a substrate, the substrate has a first patterned structure, a spacer region and a second patterned structure, wherein the second patterned structure is formed on one or both of the first patterned structure and the spacer region, and the first patterned structure is a micron-scale protruding structure or a micron-scale recessing structure, while the second patterned structure is a submicron-scale recessing structure. The present invention also relates to a method for manufacturing the aforementioned patterned opto-electrical substrate and light emitting diodes having the aforementioned patterned opto-electrical substrate.
US09385271B2	Device with transparent and higher conductive regions in lateral cross section of semiconductor layer A device including one or more layers with lateral regions configured to facilitate the transmission of radiation through the layer and lateral regions configured to facilitate current flow through the layer is provided. The layer can comprise a short period superlattice, which includes barriers alternating with wells. In this case, the barriers can include both transparent regions, which are configured to reduce an amount of radiation that is absorbed in the layer, and higher conductive regions, which are configured to keep the voltage drop across the layer within a desired range.
US09385270B2	Light-emitting device and light-emitting device package A light-emitting device, according to one embodiment of the present invention, comprises: a first conductive semiconductor layer; an active layer on the first conductive semiconductor layer; a blocking layer on the active layer; and a second conductive semiconductor layer on the blocking layer, wherein the active layer comprises a plurality of quantum well layers and quantum barrier layers, and the quantum well layer is formed from InxGaYNInxGayN (0.11≦x≦0.14, 0
US09385256B2	Solar cell panel A solar cell panel is discussed, which includes a plurality of solar cells, each solar cell including a substrate having a first surface and a second surface opposite the first surface, and a plurality of first electrodes extending in a first direction; an interconnector that is positioned in a second direction crossing the plurality of first electrodes and electrically connects adjacent ones of the plurality of solar cells to one another; and a conductive adhesive film including a resin and a plurality of conductive particles dispersed in the resin, the conductive adhesive film being positioned between the plurality of first electrodes and the interconnector in the second direction crossing the plurality of first electrodes to electrically connect the plurality of first electrodes to the interconnector.
US09385244B2	Wide bandgap semiconductor device A wide bandgap semiconductor device includes a wide bandgap semiconductor layer and a Schottky electrode. The wide bandgap semiconductor layer includes a first impurity region which is in contact with the Schottky electrode, is in contact with a second main surface, and has a first conductivity type, and a second impurity region which is in contact with the Schottky electrode, is in contact with the first impurity region, and has a second conductivity type. The second impurity region has a first region which is in contact with the Schottky electrode, and a second region which is connected with the first region and provided on a side of the first region closer to the second main surface. A maximum value of a width of the second region is larger than a width of a boundary portion between the first region and the Schottky electrode.
US09385242B2	Semiconductor diode assembly TSV devices with p-n junctions that are planar have superior performance in breakdown and current handling. Junction diode assembly formed in enclosed trenches occupies less chip area compared with junction-isolation diode assembly in the known art. Diode assembly fabricated with trenches formed after the junction formation reduces fabrication cost and masking steps increase process flexibility and enable asymmetrical TSV and uni-directional TSV functions.
US09385234B2	FinFETs with strained well regions A device includes a substrate, insulation regions extending into the substrate, a first semiconductor region between the insulation regions and having a first valence band, and a second semiconductor region over and adjoining the first semiconductor region. The second semiconductor region has a compressive strain and a second valence band higher than the first valence band. The second semiconductor region includes an upper portion higher than top surfaces of the insulation regions to form a semiconductor fin, and a lower portion lower than the top surfaces of the insulation regions. The upper portion and the lower portion are intrinsic. A semiconductor cap adjoins a top surface and sidewalls of the semiconductor fin. The semiconductor cap has a third valence band lower than the second valence band.
US09385231B2	Device structure with increased contact area and reduced gate capacitance A FET structure including epitaxial source and drain regions includes large contact areas and exhibits both low resistivity and low parasitic gate to source/drain capacitance. The source and drain regions are laterally etched to provide recesses for accommodating low-k dielectric material without compromising the contact area between the source/drain regions and their associated contacts. A high-k dielectric layer is provided between the raised source/drain regions and a gate conductor as well as between the gate conductor and a substrate, such as an ETSOI or PDSOI substrate. The structure is usable in electronic devices such as MOSFET devices.
US09385226B2	Semiconductor heterojunction device A heterojunction semiconductor device (200) comprising a substrate (202) and a multilayer structure disposed on the substrate. The multilayer structure comprising a first layer (204), which comprises a first semiconductor disposed on top of the substrate, and a second layer (206), which comprises a second semiconductor disposed on top of the first layer to define an interface between the first layer and the second layer. The second semiconductor is different from the first semiconductor such that a Two-Dimensional Electron Gas (220) forms adjacent to the interface. The multilayer structure also comprising a passivation layer, which comprises a semiconductor passivation layer (208) disposed on top of the second layer. The heterojunction semiconductor device also includes a first terminal (210) electrically coupled to a first area of the heterojunction semiconductor device; and a second terminal (212) electrically coupled to a second area of the heterojunction semiconductor device. The second terminal (212) is electrically coupled to the semiconductor passivation layer such that electric charge can flow into the second terminal (212) from the semiconductor passivation layer (208).
US09385215B2	V-shaped SiGe recess volume trim for improved device performance and layout dependence Some embodiments of the present disclosure relates to a method and a device to achieve a strained channel. A volume of a source or drain recess is controlled by a performing an etch of a substrate to produce a recess. An anisotropic etch stop layer is then formed by doping a bottom surface of the recess with a boron-containing dopant, which distorts the crystalline structure of the bottom surface. An anisotropic etch of the recess is then performed. The anisotropic etch stop layer resists anisotropic etching such that the recess comprises a substantially flat bottom surface after the anisotropic etch. The source or drain recess is then filled with a stress-inducing material to produce a strained channel.
US09385213B2	Integrated circuits and manufacturing methods thereof A method of forming an integrated circuit including forming a first diffusion area and a second diffusion area on a substrate, wherein the first diffusion area is configured for a first type transistor, the second diffusion area is configured for a second type transistor. The method further includes forming first source and drain regions in the first diffusion area. The method further includes forming second source and drain regions in the second diffusion area. The method further includes forming a gate electrode extending across the first diffusion area and the second diffusion area. The method further includes forming a first metallic layer, a second metallic layer, and a third metallic layer. The first metallic layer is electrically coupled with the first source region. The second metallic layer is electrically coupled with the first and second drain regions. The third metallic layer is electrically coupled with the second source region.
US09385211B2	Manufacturing method for semiconductor device A p+ collector layer is provided in a rear surface of a semiconductor substrate which will be an n− drift layer and an n+ field stop layer is provided in a region which is deeper than the p+ collector layer formed on the rear surface side. A front surface element structure is formed on the front surface of the semiconductor substrate and then protons are radiated to the rear surface of the semiconductor substrate at an acceleration voltage corresponding to the depth at which the n+ field stop layer is formed. A first annealing process is performed at an annealing temperature corresponding to the proton irradiation to change the protons into donors, thereby forming a field stop layer. Then, annealing is performed using annealing conditions suitable for the conditions of a plurality of proton irradiation processes to recover each crystal defect formed by each proton irradiation process.
US09385208B2	Semiconductor device having high-K gate dielectric layer A semiconductor device includes a substrate and a gate structure over the substrate. The gate structure includes a dielectric portion and an electrode portion that is disposed over the dielectric portion. The dielectric portion includes a carbon-doped high dielectric constant (high-k) dielectric layer over the substrate and a carbon-free high-k dielectric layer adjacent to the electrode portion.
US09385203B1	Active device and high voltage-semiconductor device with the same A high voltage (HV) semiconductor device is provided, comprising a substrate, a first well having a first conductive type and extending down from a surface of the substrate; a plurality of active devices respectively formed on the substrate, and the adjacent active devices electrically separated from each other by an insulation. One of the active devices comprises a diffusion region doped with impurity of the first conductive type and extending down from a surface of the first well, a ring gate formed in the diffusion region, and a light doping region having a second conductive type and extending down from a surface of the diffusion region. The light doping region is offset from an edge of the insulation.
US09385197B2	Semiconductor structure with contact over source/drain structure and method for forming the same A semiconductor structure and a method for forming the same are provided. The method includes forming a source/drain structure in a substrate and forming a metal layer over the source/drain structure. The method for manufacturing a semiconductor structure further includes performing an annealing process such that a portion of the metal layer reacts with the source/drain structure to form a metallic layer on the source/drain structure. The method for manufacturing a semiconductor structure further includes performing an etching process to remove an unreacted portion of the metal layer on the metallic layer and forming a contact over the metallic layer. In addition, the etching process includes using an etching solvent, and the etching solvent includes (a) a first component, including H2SO4, HCl, HF, H3PO4, or NH4OH and (b) a second component, including propylene carbonate, ethylene carbonate, diethyl carbonate, acetonitrile, or a combination thereof.
US09385195B1	Vertical gate-all-around TFET A vertical tunneling FET (TFET) provides low-power, high-speed switching performance for transistors having critical dimensions below 7 nm. The vertical TFET uses a gate-all-around (GAA) device architecture having a cylindrical structure that extends above the surface of a doped well formed in a silicon substrate. The cylindrical structure includes a lower drain region, a channel, and an upper source region, which are grown epitaxially from the doped well. The channel is made of intrinsic silicon, while the source and drain regions are doped in-situ. An annular gate surrounds the channel, capacitively controlling current flow through the channel from all sides. The source is electrically accessible via a front side contact, while the drain is accessed via a backside contact that provides low contact resistance and also serves as a heat sink. Reliability of vertical TFET integrated circuits is enhanced by coupling the vertical TFETs to electrostatic discharge (ESD) diodes.
US09385193B2	FINFET transistor structure and method for making the same A FINFET transistor structure includes a substrate including a fin structure. Two combined recesses embedded within the substrate, wherein each of the combined recesses includes a first recess extending in a vertical direction and a second recess extending in a lateral direction, the second recess has a protruding side extending to and under the fin structure. Two filling layers respectively fill in the combined recesses. A gate structure crosses the fin structure.
US09385192B2	Shallow trench isolation integration methods and devices formed thereby Aspects of the present invention generally relate to approaches for forming a semiconductor device such as a TSV device having a “buffer zone” or gap layer between the TSV and transistor(s). The gap layer is typically filled with a low stress thin film fill material that controls stresses and crack formation on the devices. Further, the gap layer ensures a certain spatial distance between TSVs and transistors to reduce the adverse effects of temperature excursion.
US09385191B2	FINFET structure A FINFET structure is provided. The FINFET structure includes a substrate, a PMOS element, a NMOS element, a STI structure, and a bump structure. The substrate includes a first area and a second area adjacent to the first area. The PMOS element is disposed in the first area of the substrate, and includes at least one first fin structure. The NMOS element is disposed in the second area of the substrate and includes at least one second fin structure. The STI structure is disposed between the first fin structure and the second fin structure. The bump structure is disposed on the STI structure and has a carbon-containing dielectric material.
US09385188B2	Semiconductor device with termination region having floating electrodes in an insulating layer A semiconductor device which can suppress the influence of the external electric charge and can be efficiently manufactured is provided. The semiconductor device is provided with an active region in which a semiconductor element is disposed and a termination region between the active region and an edge surface of the semiconductor substrate. An insulating layer is disposed on at least a part of an upper surface of the termination region. A plurality of floating electrodes is disposed at an interval in the insulating layer in a direction from the active region toward the edge surface of the semiconductor substrate, and a width of the plurality of floating electrodes in a thickness direction of the semiconductor substrate is greater than a width of the plurality of floating electrodes in the direction from the active region toward the edge surface of the semiconductor substrate.
US09385187B2	High breakdown N-type buried layer A semiconductor device has an n-type buried layer formed by implanting antimony and/or arsenic into the p-type first epitaxial layer at a high dose and low energy, and implanting phosphorus at a low dose and high energy. A thermal drive process diffuses and activates both the heavy dopants and the phosphorus. The antimony and arsenic do not diffuse significantly, maintaining a narrow profile for a main layer of the buried layer. The phosphorus diffuses to provide a lightly-doped layer several microns thick below the main layer. An epitaxial p-type layer is grown over the buried layer.
US09385185B2	Semiconductor devices including a guard ring and related semiconductor systems Semiconductor devices are provided. The semiconductor devices may include a substrate and a transistor on the substrate. The semiconductor devices may include a first guard ring of first conductivity type in the substrate adjacent the transistor. The semiconductor devices may include a second guard ring of second conductivity type opposite the first conductivity type in the substrate adjacent the first guard ring. Related semiconductor systems are also provided.
US09385183B2	Semiconductor device The termination region includes a ring region (LNFLR). A plurality of ring-shaped P-type ring layers are regularly arranged in the ring region (LNFLR). The ring region (LNFLR) is divided into a plurality of units which include the plurality of P-type ring layers respectively. A width of each unit is constant. A total number of P-type impurities in the ring region (LNFLR) is N, the target withstand voltage is BV [V], a width of each unit is SandL [μm], and the number of the plurality of units is num, following relationships are satisfied. N≧(M×BV)γ, M=104 to 105, γ=0.55 to 1.95, SandL×num×Ecri≧2×α×BV, Ecri=2.0 to 3.0×105 [V/cm], α=100 to 101. Widths of the P-type ring layers of the plurality of units linearly decrease toward an outside of the termination region.
US09385181B2	Semiconductor diode and method of manufacturing a semiconductor diode A semiconductor diode includes a semiconductor body having opposite first and second sides. A first and a second semiconductor region are consecutively arranged along a lateral direction at the second side. The first and second semiconductor regions are of opposite first and second conductivity types and are electrically coupled to an electrode at the second side. The semiconductor diode further includes a third semiconductor region of the second conductivity type buried in the semiconductor body at a distance from the second side. The second and third semiconductor regions are separated from each other.
US09385180B2	Semiconductor device structures and methods of forming semiconductor structures A method of patterning a semiconductor film is described. According to an embodiment of the present invention, a hard mask material is formed on a silicon film having a global crystal orientation wherein the semiconductor film has a first crystal plane and second crystal plane, wherein the first crystal plane is denser than the second crystal plane and wherein the hard mask is formed on the second crystal plane. Next, the hard mask and semiconductor film are patterned into a hard mask covered semiconductor structure. The hard mask covered semiconductor structured is then exposed to a wet etch process which has sufficient chemical strength to etch the second crystal plane but insufficient chemical strength to etch the first crystal plane.
US09385178B2	High voltage resistor with PIN diode isolation Provided is a high voltage semiconductor device that includes a PIN diode structure formed in a substrate. The PIN diode includes an intrinsic region located between a first doped well and a second doped well. The first and second doped wells have opposite doping polarities and greater doping concentration levels than the intrinsic region. The semiconductor device includes an insulating structure formed over a portion of the first doped well. The semiconductor device includes an elongate resistor device formed over the insulating structure. The resistor device has first and second portions disposed at opposite ends of the resistor device, respectively. The semiconductor device includes an interconnect structure formed over the resistor device. The interconnect structure includes: a first contact that is electrically coupled to the first doped well and a second contact that is electrically coupled to a third portion of the resistor located between the first and second portions.
US09385176B2	OLED display panel and manufacturing method thereof An OLED display panel is provided which can control the problem of shedding even in high definition panels. Metal wiring 5 which conducts with an earth line of a flexible printed substrate 15 is provided on a substrate 1. A display area 2 comprised from a plurality of OLED elements is provided at the center of the substrate 1 and four low resistance metal films 3 are provided along each of four edges of the display area 2 on a surface of insulation films 8, 10 at the periphery of the display area 2. Among these, one low resistance metal film 3 conducts with the metal wiring 5 via a contact 3a.
US09385173B2	Display unit A display unit with which lowering of long-term reliability of a transistor is decreased is provided. The display unit includes a display section having a plurality of organic EL devices with light emitting color different from each other and a plurality of pixel circuits that are singly provided for every said organic EL device for every pixel. The pixel circuit has a first transistor for writing a video signal, a second transistor for driving the organic EL device based on the video signal written by the first transistor, and a retentive capacity, and out of the first transistor and the second transistor, a third transistor provided correspondingly to a second organic EL device adjacent to a first organic EL device is arranged farther from the first organic EL device than a first retentive capacity provided correspondingly to the second organic EL device out of the retentive capacity.
US09385170B2	Thin film transistor array panel and organic light emitting diode display including the same A thin film transistor array panel according to an exemplary embodiment includes: a substrate; a thin film transistor positioned on the substrate; a first electrode connected to the thin film transistor; and a diffractive layer positioned between the substrate and the thin film transistor. The diffractive layer is positioned within a boundary line of semiconductors of the thin film transistor.
US09385168B2	High resolution low power consumption OLED display with extended lifetime Arrangements of pixel components that allow for full-color devices, while using emissive devices that emit at not more than two colors, and/or a limited number of color altering layers, are provided. Devices disclosed herein also may be achieved using simplified fabrication techniques compared to conventional side-by-side arrangements, because fewer masking steps may be required.
US09385167B2	OLED display architecture A device that may be used as a multi-color pixel is provided. The device has a first organic light emitting device, a second organic light emitting device, a third organic light emitting device, and a fourth organic light emitting device. The device may be a pixel of a display having four sub-pixels. The first device may emit red light, the second device may emit green light, the third device may emit light blue light and the fourth device may emit deep blue light.
US09385160B2	Semiconductor storage device A memory includes a semiconductor substrate. Magnetic tunnel junction elements are provided above the semiconductor substrate. Each of the magnetic tunnel junction elements stores data by a change in a resistance state, and the data is rewritable by a current. Cell transistors are provided on the semiconductor substrate. Each of the cell transistors is in a conductive state when the current is applied to the corresponding magnetic tunnel junction element. Gate electrodes are included in the respective cell transistors. Each of the gate electrodes controls the conductive state of the corresponding cell transistor. In active areas, the cell transistors are provided, and the active areas extend in an extending direction of intersecting the gate electrodes at an angle of (90−atan(⅓)) degrees.
US09385155B2	Photodiode array A light receiving region includes a plurality of light detecting sections 10. The light detecting sections 10 has a second contact electrode 4A. The second contact electrode 4A is arranged at a position overlapping a first contact electrode 3A, so as to contact the first contact electrode. Further, a resistive layer 4B is continued to the second contact electrode 4A.
US09385153B2	Image sensor device with flexible interconnect layer and related methods An image sensor device may include an interconnect layer having an opening extending therethrough, an image sensor IC within the opening and having an image sensing surface, and an IR filter aligned with the image sensing surface. The image sensor device may include an encapsulation material laterally surrounding the image sensor IC and filling the opening, and a flexible interconnect layer coupled to the interconnect layer opposite the image sensing surface.
US09385150B2	Image sensor device An image sensor and image sensor device include: a lighting portion extending in a main scanning direction and emitting light to the object-to-be-read; a rod lens array for imaging light from the object-to-be-read; and a light receiving portion for converting the light imaged by the rod lens array to an electric signal. The lighting portion emits a normally directed light from the normal direction of the object-to-be-read to irradiate a first irradiation region of the object-to-be-read, and an inclined light inclined by a predetermined angle from the normal direction of the object-to-be-read to irradiate a second irradiation region being apart from the first irradiation region in a sub-scanning direction.
US09385148B2	Solid-state imaging device and electronic camera A solid-state imaging device includes a second image sensor having an organic photoelectric conversion film transmitting a specific light, and a first image sensor which is stacked in layers on a same semiconductor substrate as that of the second image sensor and which receives the specific light having transmitted the second image sensor, in which a pixel for focus detection is provided in the second image sensor or the first image sensor. Therefore, an AF method can be realized independently of a pixel for imaging.
US09385142B2	Liquid crystal display and manufacturing method thereof A liquid crystal display includes: an insulation substrate, a gate line disposed on the insulation substrate, a first field generating electrode disposed on the insulation substrate, a gate insulating layer disposed on the gate line and the first field generating electrode, a semiconductor disposed on the gate insulating layer and a data line disposed on the gate insulating layer. A value [N—H]/[Si—H] of the gate insulating layer is in a range of about 13 to about 25. Here, the value [N—H]/[Si—H] means a ratio of a bonding number [N—H] of nitrogen and hydrogen to a bonding number [Si—H] of silicon and hydrogen according to an analysis of an FT-IR spectrometer.
US09385139B2	Three dimensional semiconductor memory devices and methods of fabricating the same A 3D semiconductor device includes an electrode structure has electrodes stacked on a substrate, semiconductor patterns penetrating the electrode structure, charge storing patterns interposed between the semiconductor patterns and the electrode structure, and blocking insulating patterns interposed between the charge storing patterns and the electrode structure. Each of the blocking insulating patterns surrounds the semiconductor patterns, and the charge storing patterns are horizontally spaced from each other and configured in such a way as to each be disposed around a respective one of the semiconductor patterns. Also, each of the charge storing patterns includes a plurality of horizontal segments, each interposed between vertically adjacent ones of the electrodes.
US09385122B2	Method of manufacturing a semiconductor device using source/drain epitaxial overgrowth for forming self-aligned contacts without spacer loss and a semiconductor device formed by same A method for manufacturing a semiconductor device comprises growing a source/drain epitaxy region over a plurality of gates on a substrate, wherein a top surface of the source/drain epitaxy region is at a height above a top surface of each of the plurality of gates, forming at least one opening in the source/drain epitaxy region over a top surface of at least one gate, forming a silicide layer on the source/drain epitaxy region, wherein the silicide layer lines lateral sides of the at least one opening, depositing a dielectric layer on the silicide layer, wherein the dielectric layer is deposited in the at least one opening between the silicide layer on lateral sides of the at least one opening, etching the dielectric layer to form a contact area, and depositing a conductor in the contact area.
US09385120B2	Semiconductor device and method of fabricating the same A method of fabricating a semiconductor device is provided. A sacrificial gate, a hard mask, a spacer and a first interlayer insulating film are formed on a substrate. The hard mask, a part of the spacer, and a part of the first interlayer insulating film are removed to expose an upper portion of the sacrificial gate. A sacrificial insulating layer covers the exposed upper portion of the sacrificial gate. A second interlayer insulating film covers the sacrificial insulating layer, the spacer and the first interlayer insulating film. The sacrificial insulating layer and the second interlayer insulating film are partially removed to expose a top surface of the sacrificial gate. The sacrificial gate and the sacrificial insulating layer are removed to form a trench. A gate structure is formed in the trench.
US09385118B2	Capacitor array having capacitor cell structures A capacitor array includes a plurality of capacitor cell structures. The capacitor cell structures of the plurality of cell structures each includes a first capacitor electrode, a second capacitor electrode over the first capacitor electrode, a third capacitor electrode adjacent to first sidewalls of the first and second capacitor electrodes, a fourth capacitor electrode adjacent to second sidewalls of the first and second capacitor electrodes, and a fifth capacitor electrode adjacent to the fourth capacitor electrode.
US09385106B1	Method for providing charge protection to one or more dies during formation of a stacked silicon device A method for providing charge protection to a die during formation of an integrated circuit, includes bonding the die to an interposer to form an unprotected stacked silicon component; encapsulating the unprotected stacked silicon component with a mold compound to cover at least a top surface of the die; grinding the mold compound to reduce a thickness of the mold compound; bonding a carrier wafer to the mold compound; removing the carrier wafer from the mold compound; and removing the mold compound from the top surface of the die after the carrier wafer is removed from the mold compound, to expose the top surface of the die.
US09385101B2	Semiconductor device and method of forming bump-on-lead interconnection A semiconductor device has a semiconductor die with a plurality of composite bumps formed over a surface of the semiconductor die. The composite bumps have a fusible portion and non-fusible portion, such as a conductive pillar and bump formed over the conductive pillar. The composite bumps can also be tapered. Conductive traces are formed over a substrate with interconnect sites having edges parallel to the conductive trace from a plan view for increasing escape routing density. The interconnect site can have a width less than 1.2 times a width of the conductive trace. The composite bumps are wider than the interconnect sites. The fusible portion of the composite bumps is bonded to the interconnect sites so that the fusible portion covers a top surface and side surface of the interconnect sites. An encapsulant is deposited around the composite bumps between the semiconductor die and substrate.
US09385098B2	Variable-size solder bump structures for integrated circuit packaging An integrated circuit package is described including a substrate, an integrated circuit die, a first plurality of solder bump structures, and a first plurality of variable-size solder bump structures. The first plurality of solder bump structures electrically couple the integrated circuit die to the substrate. The first plurality of variable-size solder bump structures are disposed on a bottom surface of the substrate. The first plurality of variable-size solder bump structures are sized to be substantially coplanar with a seating plane of the integrated circuit package.
US09385090B2	Semiconductor device and method of manufacturing semiconductor device A semiconductor device includes a conductive shield layer that has a first portion covering a surface of a sealing resin layer and a second portion covering side surfaces of the sealing resin layer and side surfaces of the substrate. Portions of wiring layers, including a grounding wire, on or in the substrate have cut planes which are exposed to the side surfaces of the substrate and spread out in a thickness direction of the substrate. A cut plane of the grounding wire is electrically connected to the shield layer. An area of the cut plane of the grounding wire is larger than an area of a cross section of the grounding wire parallel to, and inward of the substrate from, the cut plane of the grounding wire.
US09385089B2	Alignment mark recovery with reduced topography When opaque films are deposited on semi-conductor wafers, underlying alignment marks may be concealed. The re-exposure of such alignment marks is one source of resulting surface topography. In accordance with one implementation, alignment marks embedded in a wafer may be exposed by removing material from one or more layers and by replacing such material with a transparent material. In accordance with another implementation, the amount of material removed in an alignment mark recovery process may be mitigated by selectively ashing or etching above a stop layer.
US09385081B2	Semiconductor device with advanced pad structure resistant to plasma damage and method for forming the same A connective structure for bonding semiconductor devices and methods for forming the same are provided. The bonding structure includes an alpad structure, i.e., a thick aluminum-containing connective pad, and a substructure beneath the aluminum-containing pad that includes at least a pre-metal layer and a barrier layer. The pre-metal layer is a dense material layer and includes a density greater than the barrier layer and is a low surface roughness film. The high density pre-metal layer prevents plasma damage from producing charges in underlying dielectric materials or destroying subjacent semiconductor devices.
US09385078B1	Self aligned via in integrated circuit A method for forming a via in an integrated circuit comprises patterning a first opening in a first hardmask, the first hardmask disposed on a first organic self-planarizing polymer (OPL) layer, removing an exposed portion of the first OPL layer to define a cavity, removing an exposed portion of a second hardmask in the cavity, removing an exposed portion of a first dielectric layer disposed under the second hardmask to further define the cavity, removing an exposed portion of a first cap layer in the cavity, removing an exposed portion of a second dielectric layer to further define the cavity, removing an exposed portion of a second cap layer to further define the cavity, removing an exposed portion of a liner layer over a second conductive material in the cavity, and depositing a conductive material in the cavity.
US09385074B2	Semiconductor package with embedded die A semiconductor package having an embedded die and solid vertical interconnections, such as stud bump interconnections, for increased integration in the direction of the z-axis (i.e., in a direction normal to the circuit side of the die). The semiconductor package can include a die mounted in a face-up configuration (similar to a wire bond package) or in a face-down or flip chip configuration.
US09385073B2	Packages having integrated devices and methods of forming same An embodiment device package includes a discrete device, a first connector on a bottom surface of the discrete device, and a second connector on a top surface of the discrete device. The first connector bonds the discrete device to a first package component, and the second connector bonds the discrete device to a second package component.
US09385069B2	Gate contact structure for FinFET An embodiment includes a substrate, wherein a portion of the substrate extends upwards forming a fin, a gate dielectric over a top surface and at least portions of sidewalls of the fin, a gate electrode over the gate dielectric, and a contact over and extending into the gate electrode, wherein the contact has a first width above the gate electrode and a second width within the gate electrode, the first width being smaller than the second width.
US09385067B2	Semiconductor device with through silicon via and alignment mark A semiconductor device with a semiconductor substrate having a first surface and an opposite-facing second surface, a through electrode electrically connected to the semiconductor element and penetrating the semiconductor substrate from the first surface to the second surface, and a conductor, not electrically connected to the semiconductor element, penetrating the semiconductor substrate from the first surface to the second surface, where the through electrode and the conductor have different shapes in plan view.
US09385066B1	Integrated circuit packaging system with molded laser via interposer and method of manufacture thereof A method of manufacture of an integrated packaging system includes: providing a substrate; mounting an integrated circuit on the substrate; mounting an interposer substrate having an interposer pad on the integrated circuit; covering an encapsulant over the integrated circuit and the interposer substrate; forming a hole through the encapsulant aligned over the interposer pad; and placing a conductive connector on and in direct contact with the interposer pad.
US09385062B1	Integrated circuit barrierless microfluidic channel A structure and method for fabricating a continuous cooling channel in the back end of line wiring levels of an integrated circuit (IC) chip is provided. This continuous cooling channel may provide a path for a cooling source such as a fluid pumped from an external fluidic-cooling circulation driver to make physical contact locally with and cool the back end levels within the IC chip that may generate heat as a byproduct of the IC device's routine operations. Such a cooling structure is achieved by removing a horizontal portion of a barrier layer from an intermediate region of an interlevel interconnect structure, selective to a vertical portion of the barrier layer located on a sidewall of the interlevel interconnect structure, using gas cluster ion beam etching as well as removing the bulk conductor by additional means.
US09385058B1	Semiconductor device and structure An Integrated Circuit device, including: a base wafer including first electronic circuits and a plurality of first single crystal transistors; at least one metal layer; and a second layer including second electronic circuits and a plurality of second single crystal transistors, the second layer overlying the at least one metal layer; the second layer includes a through layer via with a diameter of less than 150 nm; a portion of the first electronic circuits is circumscribed by a first dice lane, and there are no conductive connections to the portion of the first electronic circuits that cross the first dice lane; wherein a portion of the second electronic circuits is circumscribed by a second dice lane, and there are no conductive connections to the portion of the second electronic circuits that cross the second dice lane, and the second dice lane is overlaying and aligned to the first dice lane.
US09385052B2	Semiconductor device and method of forming build-up interconnect structures over carrier for testing at interim stages A semiconductor device has a first interconnect structure formed over the carrier. A semiconductor die is disposed over the first interconnect structure after testing the first interconnect structure to be known good. The semiconductor die in a known good die. A vertical interconnect structure, such as a bump or stud bump, is formed over the first interconnect structure. A discrete semiconductor device is disposed over the first interconnect structure or the second interconnect structure. An encapsulant is deposited over the semiconductor die, first interconnect structure, and vertical interconnect structure. A portion of the encapsulant is removed to expose the vertical interconnect structure. A second interconnect structure is formed over the encapsulant and electrically connected to the vertical interconnect structure. The first interconnect structure or the second interconnect structure includes an insulating layer with an embedded glass cloth, glass cross, filler, or fiber.
US09385048B2	Method of forming Fin-FET The present invention provides a method of forming Fin-FET. A substrate with an active region and a dummy region are defined thereon. A plurality of first fins and second fins are formed in the active region, and a plurality of dummy fins are formed in the dummy region and the active region. A first active region is provided in the active region. A revised first active region is formed by extending the first active region to cover at least one adjacent dummy fin. Next, a first dummy region is provided in the dummy region. A first mask layout is formed by combining the revised first active region and the first dummy region. A first patterned mask layer is formed by using the first mask layout. A first epitaxial process is performed for the first fins and the dummy fins exposed by the first patterned mask layer.
US09385047B2	Integrated circuits having a plurality of high-K metal gate FETs with various combinations of channel foundation structure and gate stack structure and methods of making same Semiconductor manufacturing processes include forming conventional channel field effect transistors (FETs) and deeply depleted channel (DDC) FETs on the same substrate and selectively forming a plurality of gate stack types where those different gate stack types are assigned to and formed in connection with one or more of a conventional channel NFET, a conventional channel PFET, a DDC-NFET, and a DDC-PFET in accordance a with a predetermined pattern.
US09385043B2	Spacer enabled poly gate A spacer etching process produces ultra-narrow polysilicon and gate oxides for insulated gates used with insulated gate transistors. Narrow channels are formed using dielectric and spacer film deposition techniques. The spacer film is removed from the dielectric wherein narrow channels are formed therein. Insulating gate oxides are grown on portions of the semiconductor substrate exposed at the bottoms of these narrow channels. Then the narrow channels are filled with polysilicon. The dielectric is removed from the face of the semiconductor substrate, leaving only the very narrow gate oxides and the polysilicon. The very narrow gate oxides and the polysilicon are separated into insulated gates for the insulated gate transistors.
US09385041B2	Method for insulating singulated electronic die In one embodiment, a method of forming an electronic device includes providing a wafer having plurality of die separated by spaces. The method includes plasma singulating the wafer through the spaces to form singulation lines that expose side surfaces of the plurality of die. The method includes forming an insulating layer on the exposed side surfaces. In one embodiment, the steps of singulating and forming the insulating layer are carried out with the wafer mounted to a carrier substrate that supports the wafer and singulated die during both steps.
US09385035B2	Current ramping and current pulsing entry of substrates for electroplating In some method and apparatus disclosed herein, the profile of current delivered to the substrate provides a relatively uniform current density on the substrate surface during immersion. These methods include controlling the current density applied across a substrate's surface during immersion by dynamically controlling the current to account for the changing substrate surface area in contact with electrolyte during immersion. In some cases, current density pulses and/or steps are used during immersion, as well.
US09385022B2	Silicon waveguide on bulk silicon substrate and methods of forming Various methods include: forming an optical waveguide in a bulk silicon layer, the optical waveguide including a set of shallow trench isolation (STI) regions overlying a silicon substrate region; ion implanting the silicon substrate to amorphize a portion of the silicon substrate; forming a set of trenches through the STI regions and into the underlying silicon substrate region; undercut etching the silicon substrate region under the STI regions through the set of trenches to form a set of cavities, wherein the at least partially amorphized portion of the silicon substrate etches at a rate less than an etch rate of the silicon substrate; and sealing the set of cavities.
US09385017B2	Apparatus and methods for handling workpieces of different sizes Apparatus and methods for plasma processing workpieces of different diameters. The apparatus includes a lift plate having an outer perimeter, an opening inside of the outer perimeter, and a gap extending between the opening and the outer perimeter. The lift plate includes annular rims of different inner diameters and that are configured to respectively support the first and second workpieces.
US09385012B2	Substrate processing method and substrate processing apparatus Scan step (S3) for moving a nozzle with etching liquid discharged therefrom is carried out such that etching liquid application position toward the rotating substrate moves from the edge portion toward the center portion of the principal face of the substrate. Thereafter, center discharging step (S4) for continuing the supply of the etching liquid toward the principal face of the substrate under the condition that the application position is positioned at the center portion of the principal face of the substrate W is conducted. Moving velocity of the liquid application position in the scan step (S3) is determined in accordance with supply condition of the etching liquid toward the substrate under the condition that the liquid application position is positioned at the center portion of the principal face of the substrate.
US09385002B2	Semiconductor devices and fabricating methods thereof Fabricating methods of a semiconductor device are provided. The fabricating methods may include forming a mold layer, forming a catalyst pattern including noble metal on the mold layer and etching the mold layer using the catalyst pattern as a catalyst. Etching the mold layer may include performing a wet etching process.
US09384997B2	Dry-etch selectivity A method of etching exposed patterned heterogeneous structures is described and includes a remote plasma etch formed from a reactive precursor. The plasma power is pulsed rather than left on continuously. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents selectively remove one material faster than another. The etch selectivity results from the pulsing of the plasma power to the remote plasma region, which has been found to suppress the number of ionically-charged species that reach the substrate. The etch selectivity may also result from the presence of an ion suppression element positioned between a portion of the remote plasma and the substrate processing region.
US09384992B2	Plasma processing method A plasma processing method is provided for etching a multilayer film having a first film and a second film with differing dielectric constants alternatingly stacked on a substrate, and forming a hole with a predetermined shape in the multilayer film. The plasma processing method includes a first step of etching the multilayer film to a first depth using a gas mixture containing a CF based gas at a first flow rate and a bromine-containing gas, a chloride-containing gas, and/or an iodine-containing gas; a second step of etching the multilayer film to a second depth after the first step using a gas mixture containing the CF based gas at a second flow rate and the bromine-containing gas, the chloride-containing gas, and/or the iodine-containing gas; and a third step for over etching the multilayer film after the second step until the hole reaches a base layer.
US09384990B2	Titanium nitride electrode The present invention relates to a method for decreasing the impedance of a titanium nitride element for use in an electrode component. The method comprises obtaining a titanium nitride element and hydrothermally treating the titanium nitride element by immersing the titanium nitride element in a liquid comprising water while heating said liquid.
US09384989B2	Sonos device and method for fabricating the same An improved semiconductor device is provided whereby the semiconductor device is defined by a layered structure comprising a first dielectric layer, a data storage material disposed on the first dielectric layer, and a second dielectric layer disposed on the data storage material, the layered structured substantially forming the outer layer of the semiconductor device. For example, the semiconductor device may be a SONOS structure having an oxide-nitride-oxide (ONO) film that substantially surrounds the SONOS structure. The invention also provides methods for fabricating the semiconductor device and the SONOS structure of the invention.
US09384983B2	Method of manufacturing a vertical semiconductor device A method for producing a vertical semiconductor device includes providing a semiconductor substrate having a first surface and comprising an n-doped first semiconductor layer, forming a hard mask on the first surface, the hard mask comprising openings defining first zones in the n-doped first semiconductor layer, implanting acceptor ions of a first maximum energy through the hard mask into the first zones, replacing the hard mask by an inverted mask comprising openings that are substantially complementary to the openings of the hard mask; implanting acceptor ions of a second maximum energy different to the first maximum energy through the inverted mask into second zones of the n-doped first semiconductor layer, and carrying out at least one temperature step to activate the acceptor ions in the first zones and the second zones.
US09384981B2	Method of manufacturing silicon carbide semiconductor device A method of manufacturing a silicon carbide semiconductor device includes the steps of preparing a silicon carbide substrate, forming a first electrode on the silicon carbide substrate, establishing ohmic contact between the silicon carbide substrate and the first electrode by irradiating the first electrode with laser beams, and forming a second electrode on the first electrode. In the step of establishing ohmic contact, a surface of the first electrode is irradiated with laser beams such that arithmetic mean roughness of a surface of the second electrode is not greater than 0.2 μm.
US09384979B2	Apparatus for the deposition of a conformal film on a substrate and methods therefor A method for depositing a conformal film on a substrate in a plasma processing chamber of a plasma processing system, the substrate being disposed on a chuck, the chuck being coupled to a cooling apparatus, is disclosed. The method includes flowing a first gas mixture into the plasma processing chamber at a first pressure, wherein the first gas mixture includes at least carbon, and wherein the first gas mixture has a condensation temperature. The method also includes cooling the chuck below the condensation temperature using the cooling apparatus thereby allowing at least some of the first gas mixture to condense on a surface of the substrate. The method further includes venting the first gas mixture from the processing chamber; flowing a second gas mixture into the plasma processing chamber, the second gas mixture being different in composition from the first gas mixture; and striking a plasma to form the conformal film.
US09384974B2	Trench filling method and processing apparatus The present disclosure provides a method for filling a trench formed on an insulating film of a workpiece. The method includes forming a first impurity-containing amorphous silicon film on a wall surface which defines the trench, forming a second amorphous silicon film on the first amorphous silicon film, and annealing the workpiece after the second amorphous silicon film is formed.
US09384972B2	Method of manufacturing semiconductor device by forming a film on a substrate Provided is a technique of forming a film on a substrate by performing a cycle a predetermined number of times. The cycle includes: forming a first layer by supplying a gas containing a first element to the substrate, wherein the first layer is a discontinuous layer, a continuous layer, or a layer in which at least one of the discontinuous layer or the continuous layer is overlapped; forming a second layer by supplying a gas containing a second element to the substrate to modify the first layer under a condition where a modifying reaction of the first layer by the gas containing the second element is not saturated; and forming a third layer by supplying a gas containing a third element to the substrate to modify the second layer under a condition where a modifying reaction of the second layer by the gas containing the third element is not saturated.
US09384971B2	Method of manufacturing semiconductor device by forming a film on a substrate Provided is a technique including forming a film by performing a cycle a predetermined number of times. The cycle includes: forming a first layer by supplying a gas containing a first element under a condition where chemical adsorption of a molecule constituting the gas containing the first element is not saturated; forming a second layer including the first layer and a layer including a second element stacked on the first layer by supplying a gas containing the second element under a condition where chemical adsorption of a molecule constituting the gas containing the second element is not saturated; and forming a third layer by supplying a gas containing a third element to modify the second layer under a condition where a modifying reaction of the second layer by the gas containing the third element is not saturated.
US09384963B2	Preparation of cerium-containing precursor and deposition of cerium-containing films Methods and compositions for depositing rare earth metal-containing layers are described herein. In general, the disclosed methods deposit the precursor compounds comprising rare earth-containing compounds using deposition methods such as chemical vapor deposition or atomic layer deposition. The disclosed precursor compounds include a cyclopentadienyl ligand having at least one aliphatic group as a substituent and an amidine ligand.
US09384961B2	Method for manufacturing semiconductor device, method for processing substrate, substrate processing apparatus and recording medium A method for manufacturing a semiconductor device includes forming a thin film containing a specific element and having a prescribed composition on a substrate by alternately performing the following steps prescribed number of times: forming a first layer containing the specific element, nitrogen, and carbon on the substrate by alternately performing prescribed number of times: supplying a first source gas containing the specific element and a halogen-group to the substrate, and supplying a second source gas containing the specific element and an amino-group to the substrate, and forming a second layer by modifying the first layer by supplying a reactive gas different from each of the source gases, to the substrate.
US09384959B2	Purging of porogen from UV cure chamber A purge ring for providing a gas to a wafer processing chamber includes an inlet ring wall defining a ring hole space. An outer perimeter of the inlet ring wall is elliptical. An outer perimeter of the ring hole space is circular. The inlet ring wall is a continuous structure surrounding the ring hole space. An inlet baffle formed within the inlet ring wall surrounds at least 180 degrees of the outer perimeter of the ring hole space. An inlet plenum arranged in a first end of the inlet ring wall provides the gas to the ring hole space through the inlet baffle. An exhaust channel is formed within the inlet ring wall in a second end of the inlet ring wall. An exhaust outlet hole arranged in the second end of the inlet ring wall exhausts the gas out of the ring hole space via the exhaust channel.
US09384949B2	Gas-flow control method for plasma apparatus A gas-flow control method for a plasma apparatus is provided. The gas-flow control method includes mounting a first adjusting mechanism on a gas-distribution plate. The gas-distribution plate includes a number of exhaust openings, and the exhaust openings in a first area of the gas-distribution plate are masked by the first adjusting mechanism. The gas-flow control method also includes exhausting a gas from the exhaust openings in a first unmasked area of the gas-distribution plate, and the gas passing through the first adjusting mechanism into a plasma chamber. The gas-flow control method further includes generating an electric field to excite the gas in the plasma chamber into plasma.
US09384946B2	Plasma processing apparatus In a plasma processing apparatus having a processing chamber, a sample stage, a sample, a dielectric-composed insulating film and an electrode, the sample stage can be divided into an upper member and a lower member, the upper member including the insulating film and an electrode, the apparatus includes a socket which is deployed inside a through hole of the upper member, and which is electrically connected to the electrode, a pin which is brought into contact with the socket by being inserted into the socket, and a seal member which is attached onto the socket in order to implement a hermetic sealing between the upper-member side and the lower-member side inside the through hole, the upper-member side being continuously linked to the decompressed processing chamber, the lower-member side being continuously linked to the substantially-atmospheric-pressure side which is the outside of the processing chamber.
US09384945B2	Automatic matching unit and plasma processing apparatus In an automatic matching unit, a controller includes a first and a second matching algorithm. The operating point Zp is moved stepwise toward the matching point Zs with a relatively large pitch by using the first matching algorithm. Further, when the operating point Zp is within the outer proximity range, the operating point Zp is moved stepwise toward the matching point Zs with a relatively small pitch by using the second matching algorithm. In the second matching algorithm, the operating point Zp is moved close to the third reference line TC1S or TC2S perpendicular to the first or second reference line C1S or C2S along, e.g., the route Zp(7)→Zp(8)→Zp(9) on the impedance coordinates. The coordinates of the operating point Zp(9) reaches an available quasi-matching point ZB extremely close to the origin O (the matching point Zs).
US09384941B2	Charged particle beam apparatus and sample observation method A charged particle beam apparatus includes an electron beam column and an FIB column, in which an irradiation axis of the electron beam column and an irradiation axis of the FIB column are disposed to be perpendicular or substantially perpendicular to each other on a sample without interference. In addition, the first sample stage and a second sample stage are independently provided and moved to be tilted centering on an axial direction. The sample is moved by the first sample stage and a sample piece which is cut off from the sample is moved to be fixed to a tip end of a probe which is rotatable centering on the axial direction, thereby manufacturing the sample piece which reduces the influence of a curtaining effect.
US09384936B2	Energy filter for charged particle beam apparatus This invention provides two methods for improving performance of an energy-discrimination detection device with an energy filter of reflective type for a charged particle beam. The first method employs a beam-adjusting means to improve the energy-discrimination power, and the second method uses an electron-multiplication means to enhance the image signal without noise raise. A LVSEM with such an improved energy-discrimination detection device can provide variant high-contrast images of interested features on a specimen surface for multiple application purposes.
US09384929B2	Fuse unit A fuse unit includes a feeding terminal, an energizing terminal and a fusion portion. The feeding terminal is fixed to a battery post to receive power from a battery. The fusion portion electrically connects the feeding terminal and the energizing terminal, and is arranged over the battery post. The feeding terminal is positioned between the energizing terminal and the fusion portion.
US09384927B2	Electric vehicle relay An electric vehicle relay includes: a pair of fixed electrodes; a movable electrode movable to contact or to be separated from the fixed electrode; a driving shaft which performs a vertical motion as an upper end thereof is coupled to the movable electrode; a fixed core fitted into a central part of the driving shaft with a gap; a movable core coupled to a lower end of the driving shaft and sucked by a magnetic force of the fixed core; and a cylinder configured to insertion-support the fixed core and the movable core, wherein locking protrusions are formed on an outer circumferential surface of the movable core, wherein inclined grooves for inserting the locking protrusions are formed on an inner circumferential surface of the cylinder, and wherein the movable electrode is rotated as the locking protrusions are moved along the inclined grooves when the movable core performs an up-down motion.
US09384924B2	Gas circuit breaker Provided are: a hermetically-enclosed tank that is filled with insulating gas; a blocking unit that is provided within the hermetically-enclosed tank and is configured with a movable arc contact and a fixed arc contact opposing each other; a plurality of energizing units, within the hermetically-enclosed tank, that are provided around the blocking unit about its axial line as a center and located away from each other; and a fixed-side auxiliary conductor that is provided between a gas space which stores the energizing units and a gas space on the side of the fixed arc contact. A communication hole is formed on the fixed-side auxiliary conductor so as to communicate the gas space provided between the energizing units with the gas space.
US09384922B2	Commutating circuit breaker A commutating circuit breaker that progressively inserts increasing resistance into a circuit via physical motion of a shuttle that is linked into the circuit by at least one set of sliding electrical contacts on the shuttle that connect the power through the moving shuttle to a sequence of different resistive paths with increasing resistance; the motion of the shuttle can be either linear or rotary. At no point are the sliding stator electrodes separated from the matching stationary stator electrodes so as to generate a powerful arc, which minimizes damage to the sliding stator electrodes. Instead, the current is commutated from one resistive path to the next with small enough changes in resistance at each step that arcing is suppressed. The variable resistance can either be within the moving shuttle, or the shuttle can comprise a commutating shuttle that moves the current over a series of stationary resistors.
US09384915B2	Electronic switch assembly A switch assembly, for instance adapted to wall-side installations, for supply arrangements of a load via multiple activation points (for example in the form of “double switching”), comprises a pair of traveler contacts alternatively connectable to a power supply, as well as a switch having an output contact, alternatively connectable to one or the other of the traveler contacts, respectively, on the basis of the current position of switch. Switch is an electronic switch which is connected, for example through an electronic circuit which optionally also performs a driving function on switch, to a respective power line. Powering elements are provided, for example in the form of a pair of diodes, controlled electronic switches or diode bridges, which connect said respective power line to the one of traveler contacts which is currently connected to power supply, therefore ensuring a steady supply irrespective of the switch position.
US09384913B2	Locking mechanism for a switch-on button of a circuit breaker In order to form a locking mechanism for a switch-on button of a circuit breaker which has a simple and inexpensive configuration, the locking mechanism has a locking element which is mounted rotatably on the switch-on button. The locking element, held directly in a first position by a first spring, enables actuation of the switch-on button and, directly in the switched-on state of the circuit breaker by a second spring, can be moved into a second position. The switch-on button of the circuit breaker is locked to prevent actuation in the second position.
US09384912B2	Circuit breaker A circuit breaker is shown which includes a plurality of fixed contacts and a plurality of corresponding movable contacts. An actuating shaft is operatively connected to and actuates the plurality of movable contacts to couple with/separate from the corresponding fixed contacts. A supporting device for the actuating shaft can be movably connected to a wall of the circuit breaker, and the actuating shaft can be operatively coupled to the supporting device to rotate around a rotation axis relative to the wall of the circuit breaker and the supporting device itself. The circuit breaker can include an adjustment device for adjusting at least the position of the actuating shaft relative to the wall.
US09384910B1	Electrical switching apparatus and trip assembly therefor A trip assembly is for an electrical switching apparatus. The electrical switching apparatus includes a housing, a reset assembly, an electrical communication assembly, separable contacts, and an operating mechanism for opening and closing the separable contacts. The operating mechanism includes a trip bar and a crossbar. The trip assembly includes: a mounting assembly coupled to the housing; an actuating element coupled to the mounting assembly, the actuating element being electrically connected to the electrical communication assembly; a trip cam coupled to the mounting assembly, the trip cam cooperating with the reset assembly in order to reset the actuating element; and an indication assembly coupled to the mounting assembly. The actuating element is structured to drive the trip cam into the trip bar in order to trip open the separable contacts. The actuating element cooperates with the indication assembly to electrically communicate a circuit status to the electrical communication assembly.
US09384908B2	Circuit-breaker comprising optimized housing stabilisation by means of fixed contacts with an interlocking action A circuit breaker includes a sliding contact, in which a movable contact that is mounted on a spring is located, the contact lying opposite a fixed contact. In an embodiment, the fixed contact has a horn-shaped contour that engages in mating contours of the switching chamber walls of the circuit breaker.
US09384905B2	High performance transition metal carbide and nitride and boride based asymmetric supercapacitors In accordance with an embodiment of the disclosure, an asymmetric supercapacitor includes a first active material with a high hydrogen over-potential and a second active material with a high oxygen over-potential. The first active material is based on a nitride, an oxynitride, a carbide, an oxycarbide, a boride, or an oxyboride of a metal selected from Groups III, IV, V, VI, and VII of the Periodic Table.
US09384904B2	Negative electrode for power storage device, method for forming the same, and power storage device An object is to suppress electrochemical decomposition of an electrolyte solution and the like at a negative electrode in a lithium ion battery or a lithium ion capacitor; thus, irreversible capacity is reduced, cycle performance is improved, or operating temperature range is extended. A negative electrode for a power storage device including a negative electrode current collector, a negative electrode active material layer which is over the negative electrode current collector and includes a plurality of particles of a negative electrode active material, and a film covering part of the negative electrode active material. The film has an insulating property and lithium ion conductivity.
US09384901B2	Wet electrolytic capacitor for use at high temperatures A wet electrolytic capacitor that contains an anode formed from an anodically oxidized sintered porous body and a fluidic working electrolyte is provided. The casing contains a metal substrate coated an electrochemically-active material. Through a unique and controlled combination of features relating to the capacitor configuration and sealing assembly, the present inventor has discovered that good electrical properties (e.g., ESR stability) can be achieved at relatively high temperatures. One unique feature of the wet electrolytic capacitor that can help achieve such good ESR stability is the presence of a dielectric layer on the metal substrate of the cathode within a controlled thickness range. In other embodiments, a sealing assembly may be employed that contains a hermetic seal (e.g., glass-to-metal seal) and an elastomeric barrier seal formed from a high-temperature elastomeric material.
US09384898B2	Multilayer ceramic capacitor and method of manufacturing the same There is provided a multilayer ceramic capacitor including a ceramic body having first and second side surfaces opposing each other and third and fourth end surfaces connecting the first and second side surfaces, first and second internal electrodes formed in the ceramic body and having one ends exposed to the first and second side surfaces and the third end surface or exposed to the first and second side surfaces and the fourth end surface, first and second external electrodes formed on an outer side of the ceramic body and electrically connected to the first and second internal electrodes, and a plating layer partially formed on certain regions of the first and second external electrodes, wherein a polymer layer is additionally formed on the ceramic body on regions of upper portions of the first and second external electrodes on which the plating layer is not formed.
US09384892B2	Multilayer ceramic capacitor and board having the same mounted thereon A multilayer ceramic capacitor may include: a ceramic body including dielectric layers and having first and second main surfaces opposing each other, first and second side surfaces opposing each other, and first and second end surfaces opposing each other; an active layer configured to form capacitance by including first and second internal electrodes disposed to face each other with the dielectric layer interposed therebetween and alternately exposed to the first or second side surface; and a first external electrode disposed on the first side surface and electrically connected to the first internal electrodes and a second external electrode disposed on the second side surface and electrically connected to the second internal electrodes. When length of the ceramic body is L and length of the first and second external electrodes in the length direction of the ceramic body is L1, 0.2≦L1/L≦0.96 is satisfied.
US09384883B2	Nested through glass via transformer A 3D nested transformer includes a substrate having a set of through substrate vias daisy chained together with a set of traces. At least some of the through substrate vias have first and second conductive regions. The set of traces also includes a first set of traces coupling together at least some of the first conductive regions of the through substrate vias, and a second set of traces coupling together at least some of the second conductive regions of the through substrate vias.
US09384882B2	Noise reducing solenoid apparatus for shift lever A solenoid apparatus for a shift lever is provided that includes a bobbin having an aperture therein and a coil wound therearound. A core is mounted on the exterior of the bobbin, surrounds an end portion of the aperture, and is magnetized by a current applied to the coil. A plunger moves along the inside of the aperture and is magnetized by the current. A shaft is inserted into, and penetrates through, the plunger and a buffer member is disposed at an end of the shaft exposed from the plunger. An elastic member is disposed between the buffer member and an end of the aperture. The plunger moves toward the core due to combined forces obtained by combining forces applied in a direction of the movement of the plunger by a magnetic field generated by the current and attractive forces generated vertically between the plunger and the core.
US09384871B2	Polymer composition comprising carbon nanotubes A composition can include polystyrene, modified-polystyrene, or a mixture thereof. The polystyrene, modified-polystyrene, or mixture thereof can include carbon nanotubes. The composition can also include a polyolefin. The composition can include at most 1.90% by weight of carbon nanotubes, based on a total weight of the composition. The composition can be made by melt blending the polystyrene, modified-polystyrene, or a mixture thereof with carbon nanotubes, and with the polyolefin. An article can be made from the composition.
US09384869B2	Anisotropic conductive film, composition for the same, and apparatus including the same An anisotropic conductive film includes a binder part, a curing part, an initiator, and conductive particles, wherein the binder part includes at least one of a nitrile butadiene rubber (NBR) resin and a urethane resin, wherein the anisotropic conductive film has an electrical conductivity of more than 0 μS/cm to about 100 μS/cm.
US09384864B2	High resolution imaging system for digital dentistry The invention provides methods and apparatus for detecting radiation including x-ray photon (including gamma ray photon) and particle radiation for dental x-ray imaging, radiation monitoring, and related industrial and scientific applications. Flat or shaped small (and small hybrid) area storage phosphor plates, available in multiple sizes, are encased in SP-carriers and used as detectors for intraoral dental x-ray imaging as a replacement for analog x-ray film and digital x-ray cameras, offering good detection efficiency, high spatial and contrast resolution, and a wide dynamic range. After removal of the SP-carrier, a small area storage phosphor plate is loaded into a dental storage phosphor scanner for readout. Intermediate and large area storage phosphor plates (including hybrid versions) are suitable for non-intraoral dental x-ray imaging. Suitable storage phosphors may be used in radiation monitoring, replacing current detectors employed in a film badge format. Simple external readers or electronic SP-carriers can provide data readout and thus enable dosimetry.
US09384859B2	Repair circuit and semiconductor memory device including the same A repair circuit includes a normal decoder suitable for decoding partial input addresses of input addresses in response to a first control signal, a comparison unit suitable for comparing the partial input addresses and partial repair addresses of repair addresses in response to a second control signal, and generating a column repair signal when the partial input addresses and the partial repair addresses correspond to each other, and a redundancy decoder suitable for decoding the repair addresses in response to the column repair signal.
US09384828B2	Electronic device and method for operating the same An electronic device including a semiconductor memory. The semiconductor memory includes a plurality of variable resistance elements; a plurality of read voltage application terminals configured to supply different levels of read voltages to respective one ends of the plurality of variable resistance elements; and an analog-to-digital conversion unit configured to generate multi-bit digital data corresponding to a total current which is acquired by summing currents flowing through the plurality of variable resistance elements.
US09384822B2	Systems and methods involving data bus inversion memory circuitry, configuration and/or operation including data signals grouped into 10 bits and/or other features Systems, methods and fabrication processes relating to dynamic random access memory (DRAM) devices involving data signals grouped into 10 bits are disclosed. According to one illustrative implementation a DRAM device may comprise a memory core, circuitry that receives a data bus inversion (DBI) bit associated with a data signal as input directly, without transmission through DBI logic associated with an input buffer, circuitry that stores the DBI bit into the memory core, reads the DBI bit from the memory core, and provides the DBI bit as output. In further implementations, DRAM devices herein may store and process the DBI bit on an internal data bus as a regular data bit.
US09384818B2	Memory power management A memory system is described, where a plurality of memory modules is connected to a memory controller. The power status of each of the memory modules is controlled, depending on the functions being performed by the memory module. When no read or write operation is being performed on a particular memory module, at least a portion of the circuitry may be operated in a lower power mode. A memory circuit associated with the memory module may be placed in a low power mode by disabling a clock. The memory circuit data integrity may be secured by issuing refresh commands while when the memory circuit is in the lower power mode, by enabling the clock, issuing the refresh command, and disabling the clock after completion of the refresh operation.
US09384817B1	Refresh signal generation circuit and semiconductor device using the same This technology includes: a refresh signal generation unit configured to generate a first preliminary refresh signal with a cycle varying according to temperature changes; a magnification adjustment unit configured to generate a second preliminary refresh signal and a third preliminary refresh signal, which have a cycle variation slope equal to the first preliminary refresh signal and have cycle magnifications different from the first preliminary refresh signal according to the first preliminary refresh signal; and a selection unit configured to output one of the first preliminary refresh signal, the second preliminary refresh signal, and the third preliminary refresh signal as a refresh signal according to a control signal.
US09384810B2	Monolithic multi-channel adaptable STT-MRAM A monolithic multi-channel resistive memory includes at least one first bank associated with a first channel and tuned according to first device attributes and/or first circuit attributes. The memory also includes at least one second bank associated with a second channel and tuned according to second device attributes and/or second circuit attributes.
US09384808B2	Address input circuit of semiconductor apparatus An address input circuit of a semiconductor device includes: an address latch unit configured to generate latch addresses, by latching addresses sequentially provided by an external, according to a command decoding signal, wherein latch timings of each of the addresses are adjusted differently from one another; and a command decoder configured to decode a command provided from the external and generate the command decoding signal.
US09384807B1	Parameter setting circuit and semiconductor apparatus using the same A parameter setting circuit includes a first parameter setting unit configured to set a first parameter using first code signals generated by adjusting a value of parameter information to conform to a gear-down mode; a second parameter setting unit configured to generate pre-code signals by adjusting a value of the first code signals to conform to a specification of a second parameter, and set the second parameter using second code signals generated by adjusting a value of the pre-code signals according to a control signal; and a control section configured to generate the control signal according to whether it is the gear-down mode and whether the value of the first code signals is an odd number.
US09384804B1	Semiconductor device and semiconductor system A semiconductor system is provided, which includes a controller configured to output an active command and test mode signals; and a semiconductor device configured to sense and amplify a pair of bit lines by generating a first power control signal of which a pulse width is adjusted in accordance with a combination of the test mode signals during an enable period of an enable signal generated by the active command, receiving a supply of a first power according to the first power control signal, and receiving a supply of a second power according to a second power control signal.
US09384803B2	Storage device and latch management method thereof A latch management method of a storage device includes permitting the storage device to enter a reduced power mode in which the storage device operates with a reduced power. The method includes reading initial latch data stored in the at least one nonvolatile memory device in response to the entering operation. The method includes setting latches associated with the at least one nonvolatile memory device based on the read initial latch data.
US09384802B2	Bit line sensing methods of memory devices Bit line sensing methods may be provided. The methods may include pre-charging a first bit line and a second bit line with a bit line pre-charge voltage. The first bit line may be connected to a first input terminal of a first inverter, and the second bit line may be connected to a second input terminal of a second inverter. The method may also include adjusting voltages of the first bit line and the second bit line corresponding to either threshold voltages of first and second pull-down circuits included in the first and second inverters respectively or threshold voltages of first and second pull-up circuits included in the first and second inverters respectively. The method may further include sharing charges of one of the first bit line and the second bit line with charges of a corresponding memory cell and amplifying a voltage difference between the first bit line and the second bit line.
US09384800B2	Semiconductor device and semiconductor system having the same A semiconductor device includes a column command generation unit suitable for generating a column command delayed by a first delay time from a source command, in response to a first control signal and the source command, a bank address generation unit suitable for generating a bank address delayed by the first delay time from a bank source address, in response to the first control signal and the bank source address, a precharge command generation unit suitable for generating a precharge command delayed by a second delay time from the column command, in response to a second control signal and the column command, and a precharge bank address generation unit suitable for generating a precharge bank address delayed by the second delay time from the bank address, in response to the second control signal and the bank address.
US09384798B2	Semiconductor memory device A semiconductor memory device includes: a burst start signal generation unit configured to generate a first burst start signal by delaying a write pulse by a first period, generate a second burst start signal by delaying the write pulse by a second period, and selectively transmit the first or second burst start signal as a select burst start signal in response to a test signal; an input control signal generation unit configured to generate an input control signal in response to the first burst start signal; and a write command generation unit configured to generate a write driver enable signal in response to the select burst start signal.
US09384796B2	Semiconductor memory device and memory system including the same A semiconductor memory device includes a core region for storing data and a peripheral region for controlling the core region. The semiconductor memory device includes a digital noise measurement circuit and an output selection circuit. The digital noise measurement circuit selects a first operation voltage among a plurality of operation voltages based on a voltage selection signal, generates first noise data by digitizing first noise in the first operation voltage based on a plurality of reference voltages, and outputs the first noise data. The plurality of operation voltages are supplied to the core region and the peripheral region. The output selection circuit outputs one of first data and the first noise data based on an output selection signal. The first data is provided from the core region.
US09384789B2	Power management in an electronic system through reducing energy usage of a battery and/or controlling an output power of an amplifier thereof A method includes configuring a battery and a voltage regulator configured to regulate an output voltage of the battery to supply power to a memory of an electronic circuit also comprising non-memory circuitry. The method also includes switching the supply of power between the battery and the voltage regulator such that: the memory is powered from the battery when the non-memory circuitry is inactive, the memory is powered from a combination of voltage from the battery and the voltage regulator when the memory is about to communicate with the non-memory circuitry during a transition of the non-memory circuitry into an active state thereof, and the memory and the non-memory circuitry are powered from the voltage regulator during the active state of the non-memory circuitry. Thus, minimal current is drawn from the battery while a state of the memory of the electronic circuit is preserved.
US09384786B2	Power management in an electronic system through reducing energy usage of a battery and/or controlling an output power of an amplifier thereof A method includes automatically charging a capacitor coupled to a battery configured to power a memory through a charge switch that is closed whenever a voltage of the battery exceeds a recovery trip voltage or exceeds a shutdown trip voltage but is less than the recovery trip voltage and opened whenever the voltage of the battery drops below the shutdown trip voltage such that a minimum voltage of the shutdown trip voltage is maintained on the battery, thereby enabling the memory to retain information therein. The method also includes rendering a stored energy of the capacitor available to all circuitry coupled to the battery following the charging thereof through coupling the capacitor in parallel with the battery based on closure of a discharge switch following the charging of the capacitor.
US09384782B2	Record file editing method and system The present invention is applicable to the field of multimedia technologies and provides a record file editing method and system, where the method includes: performing fragmentation on an audio file to acquire multiple audio fragments; performing fragment cutting on the multiple acquired audio fragments; storing a fragment time period, a quantity of audio fragments, a fragment cutting time point, and an audio fragment number in a preset record file of the fragment cutting time point; reading each fragment cutting time point from the record file of the fragment cutting time point, performing time mapping on the fragment cutting time point, and storing, in an array, a new fragment cutting time point that is obtained after the mapping; and reading a prestored interaction mapping file between a document and audio, and performing an adjustment on a time point in the interaction mapping file between a document and audio according to the new fragment cutting time point. According to the present invention, a problem that inconsecutive edited document files and audio are not synchronized during playback can be effectively resolved.
US09384771B2	Lubricants providing magnetic head wear reduction and magnetic spacing improvement A lubricant according to one embodiment includes a cyclophosphazene according to chemical formula 1,
US09384767B2	Generating position error signal based on data tracks for rotating magnetic data storage A system including an inter-track interference detection module and a position error signal generation module. The inter-track interference detection module determines a first inter-track interference value based on a first signal from a first sensor positioned over a first track of a rotating storage medium. The first inter-track interference value indicates energy contributed by tracks adjacent to the first track compared to energy contributed by the first track. The inter-track interference detection module determines a second inter-track interference value based on a second signal from a second sensor positioned over a second track of the rotating storage medium. The second inter-track interference value indicates energy contributed by tracks adjacent to the second track compared to energy contributed by the second track. The position error signal generation module generates a position error signal based on the first inter-track interference value and the second inter-track interference value.
US09384757B2	Signal processing method, signal processing apparatus, and signal processing program A desired signal is extracted with a higher accuracy from a mixed signal wherein a plurality of signals are mixed. At the time of extracting a first signal from a first mixed signal and a second mixed signal, said first mixed signal and second mixed signal having the first signal and second signal mixed therein, an estimate value of the first signal in the past is obtained as a first estimate value, and an estimate value of the second signal in the past is obtained as a second estimate value. Then, a first isolation signal is generated by subtracting the second estimate value from the first mixed signal, and a second isolation signal is generated by subtracting the first estimate value from the second mixed signal. Then, the signal generated using the first isolation signal and the second isolation signal is outputted as the first signal.
US09384747B2	Handheld device wireless music streaming for gameplay Systems and methods for streaming of audio data of separate streams in at least two different formats. According to aspects of the invention handheld game devices are in wireless communication and a first of the handheld game devices streams audio data during game play to a second of the handheld game devices. The audio data includes audio data from a plurality of streams of audio data. The streams of audio data include streams of audio data in different formats, generally different compressed formats, some of which may be selected based on whether a device includes circuitry specifically configured to decompress audio data in a specific data format.
US09384738B2	Dynamic threshold for speaker verification Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for a dynamic threshold for speaker verification are disclosed. In one aspect, a method includes the actions of receiving, for each of multiple utterances of a hotword, a data set including at least a speaker verification confidence score, and environmental context data. The actions further include selecting from among the data sets, a subset of the data sets that are associated with a particular environmental context. The actions further include selecting a particular data set from among the subset of data sets based on one or more selection criteria. The actions further include selecting, as a speaker verification threshold for the particular environmental context, the speaker verification confidence score. The actions further include providing the speaker verification threshold for use in performing speaker verification of utterances that are associated with the particular environmental context.
US09384734B1	Real-time audio recognition using multiple recognizers An audio recognition service recognizes an audio sample across multiple content types. At least a partial set of results generated by the service are returned to a client while the audio sample is still being recorded and/or transmitted. The client additionally displays the results in real-time or near real-time to the user. The audio sample can be sent over a first HTTP connection and the results can be returned over a second HTTP connection. The audio recognition service further processes check-in selections received from the client for content items indicated by the results. Responsive to receiving the check-in selections, the service determines whether a user is eligible for a reward. If the user is eligible, the service provides the reward.
US09384733B2	Call registration device for elevator A call registration device for an elevator includes a voice input section which receives input of a user's voice, a voice recognition section which stores beforehand a predetermined call registration command representing a destination floor and a predetermined start command used for starting voice recognition of a call registration and which differs from the call registration command, the voice recognition section also performing voice recognition by judging whether the inputted voice is the call registration command or the start command, a call registration control section which, if the inputted voice was the call registration command, outputs a call registration request to the destination floor of the relevant call registration command, and a start command changing part which changes a start command which becomes effective by a predetermined condition. If the inputted voice is a start command made effective, the voice recognition section starts voice recognition of a call registration.
US09384732B2	Voice command definitions used in launching application with a command A voice command definition file (VCDF) declaratively defines voice commands for an application. For example, the VCDF may include definitions for: voice commands; one or more phrases/utterances that may be said to execute each of the commands; a navigation location to navigate to within the application (e.g. a page); phrase lists containing items that may be used as a parameter in a voice command; examples; feedback; and the like. A user may say a single utterance to launch the application, navigate to the associated location of the command and execute the command. The VCDF may define multiple ways to listen for a particular command. The VCDF may be edited/defined by a user and may include a user friendly name for an application. A speech engine loads the VCDF for use such that it may recognize the commands associated with an application. The definitions may be updated during runtime.
US09384730B2	Pronunciation accuracy in speech recognition A reading accuracy-improving system includes: a reading conversion unit for retrieving a plurality of candidate word strings from speech recognition results to determine the reading of each candidate word string; a reading score calculating unit for determining the speech recognition score for each of one or more candidate word strings with the same reading to determine a reading score; and a candidate word string selection unit for selecting a candidate to output from the plurality of candidate word strings on the basis of the reading score and speech recognition score corresponding to each candidate word string.
US09384722B2	Method and device for rechargeable, retrofittable battery pack A power system on an electric guitar may include a cover plate covering a standard cavity in the electric guitar. A rechargeable power source may be contained within the standard cavity and may not extend beyond an external surface of the cover plate. Other instruments or configurations may be used.
US09384713B1	System and method for masking transistions between graphics processing units in a hybrid graphics system Typical hybrid graphics systems operate in either a “high-performance mode” or in an “energy saver mode.” While operating in the high-performance mode, a discrete graphics processing unit (dGPU) performs high-performance graphics processing operations and also receives and satisfies access requests targeting a configuration space within the dGPU. While operating in the energy saver mode, an integrated graphics processing unit (iGPU) performs graphics processing operations and the dGPU is powered down. In this scenario, a system management unit (SMU) intercepts and satisfies access requests targeting the dGPU. Since access requests targeting the dGPU are satisfied while the dGPU is powered down, the dGPU continues to be enumerated in the system using the same system resources as originally granted, and can therefore be switched to for implementing high-performance mode more quickly than if it was removed, and required a complete plug-and-play re-enumeration and re-allocation of system resources.
US09384709B2	Techniques, apparatus, system and method for improved display calibration Embodiments of a device, system, method and other techniques are described for improved display calibration. An apparatus for display calibration may comprise, for example an optical waveguide comprising an entrance portion and an exit portion at different locations on a base portion of the apparatus, the optical waveguide to guide light output from a display of the apparatus arranged in a lid portion of the apparatus to a camera arranged in the lid portion of the apparatus and calibration logic at least a portion of which is in hardware, the calibration logic to measure one or more color attributes of the light output from the display and to calibrate one or more parameters of the display based on the measured color attributes. Other embodiments are described.
US09384701B2	Backlight driver with luminance control and liquid crystal display including the same A backlight driver and a liquid crystal display (LCD) including the same, in which the backlight driver includes an interface unit enabled in response to a first carry signal, receiving serially provided optical data, and outputting a second carry signal; and a plurality of control units controlling one or more light-emitting devices in response to the serially provided optical data.
US09384697B2	Electro-optical device and electronic apparatus An electro-optical device includes a display portion, a data line driving circuit, a first retention capacitor that retains the potential of the data line, a driving control circuit, and a display control circuit that supplies brightness information to the driving control circuit and also supplies an image signal to the data line driving circuit. The data line driving circuit includes a potential control line to which a potential control signal is supplied, a third retention capacitor one end of which is connected with the data line and the other one of which is supplied with a potential based on the image signal, and a first transistor that is electrically connected between the other end of the third retention capacitor and the potential control line. The driving control circuit controls the potential of the potential control signal based on the brightness information.
US09384685B2	Method for deployment of a display system A method for deployment of a display system includes providing a first collection container for receiving a first display arrangement, and a second collection container for receiving a second display arrangement. The method further includes positioning the first collection container and the second collection container in close proximity to one another. The method further includes selectably engaging the first display arrangement to the second display arrangement and simultaneously deploying the first and second display arrangements.
US09384681B2	Model newborn human eye and face manikin A model newborn human eye which includes a hemispherical-shaped, integrally molded top assembly comprising a visually transparent cornea portion surrounding a visually opaque sclera portion in combination with a hemispherical-shaped bottom assembly comprising a bowl-shaped substrate disposed therein. The model newborn human eye further comprises a retinal layer comprising a two dimensional image of retinal vasculature disposed on said substrate, where the model newborn human eye is dimensioned for diagnosing Retinopathy of Prematurity (“ROP”) in premature infants.
US09384672B1	Handheld electronic book reader device having asymmetrical shape A handheld electronic book device having asymmetrical shape is described herein. The device includes a display screen and an asymmetrical housing containing the display screen. The non-symmetrical housing has a wedge-shaped configuration, in which one side is comparatively thinker than an opposing side.
US09384670B1	Situational awareness display for unplanned landing zones A method for an airborne vehicle includes visually displaying a representation of an environment below the vehicle and a landing zone in the environment, computing a range of approach gates that enable the vehicle to reach the landing zone at a desired glide slope while satisfying minimum obstacle clearance, and visually displaying the range in the representation.
US09384668B2	Transportation using network of unmanned aerial vehicles Embodiments described herein include a delivery system having unmanned aerial delivery vehicles and a logistics network for control and monitoring. In certain embodiments, a ground station provides a location for interfacing between the delivery vehicles, packages carried by the vehicles and users. In certain embodiments, the delivery vehicles autonomously navigate from one ground station to another. In certain embodiments, the ground stations provide navigational aids that help the delivery vehicles locate the position of the ground station with increased accuracy.
US09384654B1	Geolocation awareness item tracking Locations of animate and inanimate items are tracked over time. Tracking policies concerning the items are enforced, based on detected spatiotemporal events. Multiple routers each maintain a captive network to which mobile computing devices automatically connect. Users register mobile computing devices, which are associated with items to be tracked. A backend server maintains records concerning registered mobile computing devices. Records contain identifiers of registered mobile computing devices and their associated items, as well as categorization information and tracking policies concerning the items. Over time, registered mobile computing devices are moved around, causing them to connect to and disconnect from different captive networks. These connection events are reported to the backend, which uses this data to track locations of items over time. Based on this tracking, the backend determines when specific tracking policies of specific items dictate that alerts are to be sent, and transmits alerts to target users accordingly.
US09384645B1	System and method for impact prediction and proximity warning A system for predicting and warning of impacts includes a sensor located remote from a user and configured to acquire user data regarding motion of the user and object data regarding motion of the object; and a processing circuit configured to predict a potential impact between the user and the object based on the user data and the object data; and control operation of a user-wearable warning device to provide a warning output to the user in advance of a predicted time of the potential impact.
US09384641B2	Glass breakage detection system and method A method for detecting a glass breakage event, the method including, responsive to receiving a plurality of acoustic event indications associated with an acoustic event, ascertaining whether the plurality of acoustic event indications together indicate a random nature of at least part of the acoustic event, thereby ascertaining that the acoustic event corresponds to a glass breakage event.
US09384639B2	Rigid fixture for coupling one or more transducers to the upper back of the human body One embodiment of a rigid fixture for coupling one or more transducers to the center upper back of the human body. The left contact area (10) and right contact area (11) are curved surfaces designed to ergonomically fit against the trapezius muscle groups. The contact areas (10) and (11) may optionally be covered with a cushioning pads (31). Between the contact areas (10) and (11) is a center section spaced away from the spine (12) that is not in contact with the human body. One or more transducers (30) are attached or incorporated into the center section (12), which may be facilitated by transducer attach points (21). The entire fixture can be fastened to straps, belts, harnesses, backpacks, clothing, or seats by the attach points (20).
US09384637B2	Picker for use with an automated banking machine In an example embodiment, there is disclosed herein a picker that is operable to separate an individual sheet from a stack of sheets. The picker has a first rotatable picker member that includes a first high friction peripheral arcuate segment, where the first picker member is rotatable about an axis, a second rotatable member that includes a second high friction peripheral arcuate segment, wherein the second picker member is rotatable about the axis, and a drive in operative connection with the first and second rotatable picker members. The stack includes a bounding sheet having a sheet face bounding a side of the stack. The first and second arcuate segments are operable to concurrently engage the sheet face. The first and second picker members are operable to be separately rotationally movable about the axis responsive to operation of the drive.
US09384630B2	Personalizable hybrid games Methods and systems for personalizable hybrid games including a gambling game and an entertainment game are provided. A hybrid game includes a real world engine configured to provide a randomly generated payout for a gambling game and a game world engine configured to manage an entertainment software engine to provide outcomes based upon a player's skillful execution of an entertainment game. Parameter data indicative of player performance when playing the entertainment game at a first difficulty setting is collected and a difficulty setting is selected for the entertainment game based upon the collected parameter data. An amount of real world credit to be wagered in the gambling game may be determined based on the selected difficulty setting for the entertainment game, where real world credit is credit used in the gambling game.
US09384623B2	Resource management gambling hybrid gaming system Systems and methods for a gambling hybrid game having a resource management entertainment game are disclosed. In a resource management entertainment game, a player acquires and consumes resources to achieve a goal. An entertainment system engine of the gambling hybrid game provides the resource management entertainment game and determines when an interaction with a game element occurs in the game. A game world engine of the gambling hybrid game determines when a gambling event in a gambling game is to be provided based upon the interaction with game element in the resource management entertainment game. The game world engine then requests that a real world engine of the gambling hybrid game resolve the gambling event in the gambling game. The real world engine resolves the gambling event and associated wagers on the outcome of the gambling event.
US09384619B2	Searching media content for objects specified using identifiers Techniques for automatically comparing one or more objects determined from digital media content (e.g., an image, audio information, video information) to one or more objects specified by a machine readable identifier to determine if an object determined from the media content matches an object specified by the machine readable identifier. One or more actions may be initiated upon determining that an object determined from the media content matches an object specified by the machine readable identifier. Information identifying the action to be initiated may also be encapsulated by the machine readable identifier.
US09384607B1	Access control system Systems (100) and methods (300, 400) for controlling access to a restricted area. The methods involve: determining whether a person desires to enter or exit the restricted area based on (1) Received Signal Strength Indicator (“RSSI”) measurement data specifying a power present in a signal received from a Wearable Access Sensor (“WAS”) worn by the person or (2) rate of change data specifying a rate of change of a charging voltage of an energy storage device disposed within the WAS; and causing actuation of a mechanical actuator to enable the person's entrance into or exit from the restricted area when a determination is made that the person desires to enter or exit the restricted area.
US09384602B2	Diagnostic device for vehicle A diagnostic device for vehicle includes a housing having a display and a control panel, a control unit connected to the housing, a number of input sensors connected to the control unit for sending input signals to the control unit, and for displaying the input signals on the display, and a number of actuators connected to the control unit for being controlled and actuated by the control unit. The control unit includes an input interface circuit for connecting to the input sensors. The control unit includes an output operation circuit for connecting to the actuators.
US09384591B2	3D design and modeling system and methods A computer-aided design (CAD) system provides for designing, modeling and simulating objects in 3D. Both 2D and 3D objects can be provided in a 3D space and associated to one another by one or more constraints. Modification to the objects is calculated to satisfy the constraints as well as the geometric and functional properties of the objects. The objects can then be updated according to the calculated modification, thereby satisfying various requirements of the design.
US09384587B2	Virtual event viewing A method may include receiving a number of video feeds for a live event from video capture devices located at an event venue. A three-dimensional model of the event may be generated based on received video feeds. A request to view a virtual event corresponding to the live event may be received from a user device. The 3D model may be forwarded to the user device. A virtual representation of the event may be output based on the 3D model. A request may be received to manipulate a view within the virtual representation. A modified virtual representation of the event may be output based on the request.
US09384586B1	Enhanced flight vision system and method with radar sensing and pilot monitoring display An image processing system for enhanced flight vision includes a processor and memory coupled to the processor. The memory contains program instructions that, when executed, cause the processor to receive radar returns data for a runway structure, generate a three-dimensional model representative of the runway structure based on the radar returns data, generate a two-dimensional image of the runway structure from the three-dimensional model, and generate an aircraft situation display image representative of the position of the runway structure with respect to an aircraft based on the two-dimensional image.
US09384585B2	3-dimensional shape reconstruction device using depth image and color image and the method A 3-dimensional (3D) whole shape reconstruction apparatus using a depth image and a color image and a 3D whole shape reconstruction method are provided. The 3D whole shape reconstruction apparatus may include an information generation unit to generate shape information of 3D portions using a depth image and a color image, and a shape reconstruction unit to reconstruct a 3D whole shape of a user by matching the shape information of 3D portions.
US09384583B2	Network distributed physics computations An application executing on a rendering computer invokes a physics function request, e.g., to model the movement and interaction of objects to be rendered. The physics function request specifies a physics function to be performed on input data. Physics function request data is formatted for transmission over a network. The physics computer receives the physics function request data and performs an associated physics function using a physics GPU to generate physics computation result data. The physics computation result data is transmitted to the rendering computer over the network. A rendering GPU renders an image using the physics computation result data.
US09384582B2	Methods and computer program products for quantitative three-dimensional image correction and clinical parameter computation in optical coherence tomography Methods and computer program products for quantitative three-dimensional (“3D”) image correction in optical coherence tomography. Using the methods and computer program products, index interface (refracting) surfaces from the raw optical coherence tomography (“OCT”) dataset from an OCT system can be segmented. Normal vectors or partial derivatives of the curvature at a refracting surface can be calculated to obtain a refracted image voxel. A new position of each desired refracted image voxel can be iteratively computed. New refracted corrected voxel positions to an even sampling grid can be interpolated to provide corrected image data. In some embodiments, clinical outputs from the corrected image data can be computed.
US09384580B2	Multiple image generation from a single patient scan Methods and systems for generating images. One system includes a processor. The processor is configured to receive image generation settings, receive projection data generated by a CT scan of an object, and automatically generate a first three-dimensional data set based on the projection data, wherein the first three-dimensional data set has a first field-of-view of the object. The processor is also configured to automatically generate a second three-dimensional data set based on the projection data and the image generation settings. The second three-dimensional data set has a second field-of-view of the object smaller than the first field-of-view in at least one dimension. In one embodiment, the second three-dimensional data set is transmitted to a service provider over at least one network.
US09384567B2	Computed tomography imaging process and system A computed tomography imaging process, including: acquiring projection images of an object by detecting radiation that has passed through the object for respective different relative orientations of the object and the radiation; and processing the projection images to generate a tomogram of the object; wherein the radiation passes through the object in the form of a diverging beam, and the different relative orientations of the object and the beam of radiation define two or more complete trajectories of the beam along the object, the complete trajectories being mutually offset to reduce the degradation of spatial resolution in portions of the generated tomogram due to the divergence of the beam through the object.
US09384563B2	Image processing device, method, and computer program product In an embodiment, an image processing device includes: a first calculating unit; a selecting unit; an extracting unit; a second calculating unit; a determining unit; and a generating unit. The first calculating unit calculates posture information of a subject from a first image including the subject. The selecting unit selects a second image associated with the posture information from a plurality of second images including clothing. The extracting unit extracts a first feature of the subject from a first contour in the first image and extracts a second feature from a second contour in the second image. The second calculating unit calculates a first difference between the first feature and the second feature. The determining unit determines a transparency that is higher as the first difference is larger. The generating unit generates a composite image combining the first image and the second image with the determined transparency.
US09384561B2	Method of selecting a region of interest A method of selecting at least one region of interest within an image includes the selection of a preliminary region having a preliminary border. The selection uses one or more characteristics of the image. An inner probability distribution of color components is determined within the preliminary region and an outer probability distribution of color components outside the preliminary region. The preliminary border is adjusted in dependence on the probability distributions, the adjusted border defining the at least one region of interest.
US09384560B2	Contamination level estimation method for high voltage insulators The contamination level estimation method for high voltage insulators collects samples of naturally contaminated insulators and builds an image data set for the collected insulators. Flashover voltages of several insulators samples are measured. ESDD levels of the collected insulators are estimated. Images are input to image processing algorithms to extract representative features. The images are segmented. Transforming the image from RGB color space into grayscale model excludes the background from the image. Subsequently, the segmented images are transferred back to RGB color space model using matrix manipulation. Since contaminants on the insulator surface affect the color of the insulator, the segmented image is transformed from RGB to HSV color space which is used for extracting statistical and linear algebraic features from the hue image. A trained artificial neural network correlates the extracted features to the contamination levels enabling testing of other contaminated insulators.
US09384559B2	Image processing apparatus, image processing method, and medium that determine whether a candidate region of a specific region in divided images forms the specific image, based on shape information An image processing apparatus includes an acquisition unit to acquire a plurality of divided images from one image. The divided images that neighbor one another do not have an overlapping region. An extraction unit extracts a candidate region of a specific region in the divided image. In a case when candidate regions extracted by the extraction unit neighbor one another at the boundary between the divided images that neighbor one another, a combining unit combines shape information of the candidate regions that neighbor one another. A determination unit determines whether the candidate regions form the specific region by using the shape information combined by the combining unit.
US09384552B2	Image registration methods for still image stabilization Systems, methods, and computer readable media to improve image stabilization operations are described. A novel approach to pixel-based registration of non-reference images to a reference frame in a set of commonly captured images is disclosed which makes use of pyramid decomposition to more efficiently detect corners. The disclosed pixel-based registration operation may also be combined with motion sensor data-based registration approaches to register non-reference images with respect to the reference frame. When the registered non-reference images are combined with the pre-selected reference image, the resulting image is a quality stabilized image.
US09384551B2	Automatic rectification of stereo imaging cameras An electronic device can have two or more pairs of cameras capable of performing three-dimensional imaging. In order to provide accurate disparity information, these cameras should be sufficiently rectified. Automatic rectification can be performed by periodically capturing images with the cameras of interest, and locating matching feature points in corresponding images captured by those cameras. Small misalignment errors can be treated as linear translations, such that a set of linear equations can be used to solve for the misalignments. Another process can process a set of homographies for the cameras until a cost function converges. Various other approaches can be used as well, such as to directly solve for yaw, pitch, and roll errors. Once this information is obtained, the misalignment values (or related values) can be stored for use in correcting images subsequently captured by those cameras.
US09384541B2	Bead filler inspection apparatus, bead filler inspection program and bead filler inspection method An imaging device that captures an image of a specific region containing a boundary between an outer edge of the bead filler and a support body; an image processing device that detects an edge corresponding to the boundary between the outer edge of the bead filler and the support body based on an image captured by the imaging device, and that computes distances between a reference model line, that runs along the rotation direction of the support body and is determined based on a detected edge, and each respective point on the edge present in a region containing a join portion; and a control device that performs good/no-good determination on the join portion based on the distances between the reference model line and each of the points on the edge.
US09384534B2	Method and system for establishing model based on virtual algorithm The present disclosure provides an image processing method based on a virtual algorithm, comprising: a) simulating a single subpixel; b) simulating a subpixel array of a single color; c) overlaying subpixel arrays of different colors; and d) deriving a virtual signal.
US09384529B2	Flight data display The invention pertains to a display method, a computer program for performing steps of the display method and a display system. The display system (1) comprising: display means (2) comprising: a physical display unit (13) operable to display flight data, a display processing device (11), a graphics driver and a graphics processing device, fault detection means arranged to detect at least one fault condition associated to the display means (2). The display processing device is arranged to process a first task set associated to a normal operation mode and in parallel process a second task set associated to an emergency operation mode, wherein said display processing device is arranged to transmit information provided from the second task set to the graphics processing device in response to the detected at least one fault condition.
US09384528B2	Image annotation using a haptic plane During an analysis technique, a three-dimensional (3D) image of a portion of an individual is transformed to facilitate accurate determination of detailed annotation of an anatomical structure (such as: specifying the size of the anatomical structure based on annotation markers, an orientation of the anatomical structure, a direction of the anatomical structure and/or a location of the anatomical structure). In particular, in response to receiving information specifying a two-dimensional (2D) plane having an angular position in the 3D image, the 3D image is translated and rotated from an initial position and orientation so that the 2D plane is presented in an orientation parallel to a reference 2D plane of a display. Then, after information specifying the detailed annotation in the 2D plane is received, the 3D image is translated and rotated back to the initial position and orientation.
US09384525B2	Systems and methods for providing pre-operating system and post-operating system remote management of information handling system A method may include during a pre-operating system environment writing user graphics data to a discrete graphics controller and an embedded graphics controller of a service processor integral to the information handling system and storing user graphics data written to the embedded graphics controller in a frame buffer such that a remote management information handling system remotely coupled to the information handling system via the service processor may receive user graphics data from the frame buffer. The method may also include during a post-operating system environment establishing a remote management connection between the service processor and a host processor of the information handling system via an internal network, communicating datagrams from the host processor to the embedded processor, wherein the datagrams comprise a payload including post-operating system user graphics data, and communicating the post-operating system user graphics data from the service processor to the remote management information handling system.
US09384522B2	Reordering of command streams for graphical processing units (GPUs) In general, techniques are described for analyzing a command stream that configures a graphics processing unit (GPU) to render one or more render targets. A device comprising a processor may perform the techniques. The processor may be configured to analyze the command stream to determine a representation of the one or more render targets defined by the command stream. The processor may also be configured to, based on the representation of the render targets, and identify one or more rendering inefficiencies that will occur upon execution of the command stream by the GPU. The processor may also be configured to re-order one or more commands in the command stream so as to reduce the identified rendering inefficiencies that will occur upon execution of the command stream by the GPU.
US09384510B2	Systems and methods for providing a roof guide Methods and apparatus are disclosed for providing a roof guide, the method including: receiving, via an application on the mobile device of a user, a query related to one or more of a type of a roof and a type of damage to the roof; providing the query to a central server; retrieving, from the central server, at least one first roof image responsive to the query; receiving, via the application on the mobile device of the user, user input of a second roof image of a portion of the roof; and displaying, via the application on the mobile device of the user, the at least one first roof image and the second roof image.
US09384502B2	Techniques for organizing and presenting deal content Techniques for organizing and presenting deals/commercial offers received by users in emails are provided. Emails directed to a user that contain commercial offers for the user are determined. The determined emails are stored in a deal folder for the user. A deal newsletter is generated that at least summarizes commercial offers contained in at least a portion of the emails stored in the deal folder. The deal folder may be displayed to show the user the received deal emails. Furthermore, the deal newsletter may be displayed to the user to summarize the received deals for the user.
US09384486B2	Secure financial payment To improve security for processing of financial transactions on a customer's account, particularly for users of mobile devices, the examples authenticate the customer or user in an effective manner and/or transfer funds upon successful authentication, using intelligence of the customers' mobile devices. The present approach uses an identifier of the mobile device or user at the mobile device. The user is authenticated for a particular desired transaction based on some number of authentication factors, one or more of which is a biometric input. The user authentication technique, e.g. factors used and/or precision of matching of received user authentication factors to reference factors, can be varied based on a variety of parameters, such as transaction amount, time, device location, history of prior transactions or history of other aspects of device usage. The processing avoids storage of sensitive customer data, e.g. account number at a merchant and/or at the customer's mobile device.
US09384483B2	Method and system for globally sharing and transacting digital contents A method and system for globally sharing and transacting service including a digital content is provided. The method includes registering a digital content with a global multi-service platform (MSP), storing metadata or an electronic catalog for the digital content generated in a universal language or a local language, sharing the registered digital content and global metadata between a local MSP and the global MSP, implementing, if necessary, a distribution agreement or a supply agreement on a selected portion of the digital content between a local MSP and the global MSP, and sending the selected portion of the digital content from the global MSP and/or the local MSP storing the digital content to a customer terminal.
US09384470B2	Slide show navigation A slide show, integrated into an email application, displays images such as those included as an attachment to an email message. The user can view the slide show without exiting the email application. Slide show navigation controls are provided. An index sheet mode can be activated wherein a number of thumbnails are displayed, allowing easy navigation to any image within the slide show. Transition animations can be provided for clarifying operations such as activating and dismissing the index sheet.
US09384462B2	System and method for control of bailment inventory A method and system for control of bailment inventory is disclosed. The method includes receiving a customer identifier from a customer, receiving from the customer at least one customer item for bailment, associating the customer identifier with the at least one customer item, storing the at least one customer item, and returning the at least one customer item to the customer.
US09384456B2	System and method for generating commodity flow information This invention provides a global strategic picture of commodity movements generated by tracking ships from satellite and other sources and then combining ship location and movement information with at least one other data set, such as vessel, port, cargo, weather, or market data. Ship positions are integrated with other data, such as vessel, port, cargo, weather, and market information, to create a global strategic picture of commodity flows. A global strategic picture may then be generated by combining (i) ship movements gathered by satellite and other sources, with (ii) vessel, port, cargo, weather, market, and other data from existing sources, and (iii) a time history of these data sets.
US09384451B1	Incremental model training for advertisement targeting using streaming data Incremental model training for advertisement targeting is performed using streaming data. A model for targeting advertisements of an advertising campaign is initialized. A data stream including data corresponding to converters and data corresponding to non-converters is received. The model is then applied to the data corresponding to the converter and data corresponding to the non-converter (or other ratio of converter to non-converters) to obtain a predicted score for each. The predicted score is compared to the observed score (e.g., an observed score of 1 for a converter, and 0 for a non-converter). The difference between the predicted and observed scores is computed, and the model is incrementally updated based on this difference. Models can optionally be built separately on multiple modeling servers that are geographically dispersed in order to support bidding on advertising opportunities in a real-time bidding environment.
US09384443B2	Robotic training apparatus and methods Apparatus and methods for training of robotic devices. Robotic devices may be trained by a user guiding the robot along target trajectory using an input signal. A robotic device may comprise an adaptive controller configured to generate control commands based on one or more of the user guidance, sensory input, and/or performance measure. Training may comprise a plurality of trials. During first trial, the user input may be sufficient to cause the robot to complete the trajectory. During subsequent trials, the user and the robot's controller may collaborate so that user input may be reduced while the robot control may be increased. Individual contributions from the user and the robot controller during training may be may be inadequate (when used exclusively) to complete the task. Upon learning, user's knowledge may be transferred to the robot's controller to enable task execution in absence of subsequent inputs from the user.
US09384440B2	Reader and transponder for obscuring the applications supported by a reader and/or a transponder and method thereof Transponder (104), comprising a storage unit (106) having stored a number of different applications, a processing unit (108) which, on request of a reader (102), is adapted to generate a response interpretable using an encryption scheme known by both the transponder (104) and the reader (102) so that the reader (102) is capable of determining whether an application is supported by the transponder (104) by analyzing the response using the encryption scheme, and a transmission unit (110) adapted to send the response to said reader (102).
US09384434B2	Image forming apparatus capable of making user aware of security policy violation, method of controlling the image forming apparatus, and storage medium An image forming apparatus which is capable of making a user aware of a violation of an information security policy. A network communication unit receives data having a user ID attached thereto from an external apparatus. A printing unit prints an image based on the data. A control unit executes user authentication using the user ID attached to the data and determines, when the user authentication is successful, whether or not a password expiration date of the user has passed. When it is determined that the password expiration date has passed, the control unit restricts printing of the image to be printed based on the data having the user ID attached thereto.
US09384426B2	Image forming apparatus and image formation method that reflects setup information either of mobile terminal or operation panel Provided is an image forming apparatus that reflects setup information according to an intention of a user. The image forming apparatus is operational from each of a mobile terminal and an operation panel. Accordingly, the image forming apparatus has an operation determination processing part. The operation determination part, when the start key in the operation panel is pressed, determines to reflect either of setup information of the mobile terminal or setup information of an operation panel.
US09384425B2	Image processing method and image processing system An information processor includes a first input unit configured to accept designation of an enlargement/reduction rate, an extraction unit configured to extract a first output setting for printout at the designated enlargement/reduction rate and a second output setting different from the first output setting for printout at the designated enlargement/reduction rate, a calculation unit configured to calculate a first fee for the first output setting and a second fee for the second output setting, a display configured to display the first output setting and the first fee in association with each other, and the second output setting and the second fee in association with each other, a second input unit configured to receive a selection of one of the first output setting and the second output setting, and a controller configured to cause the execution of image formation onto a medium with the selected output setting.
US09384422B2	Image evaluation A machine may be configured to perform image evaluation of images depicting items for sale and to provide recommendations for improving the images depicting the items to increase the sales of the items depicted in the images. For example, the machine accesses a result of a user behavior analysis. The machine receives an image of an item from a user device. The machine performs an image evaluation of the received image based on an analysis of the received image and the result of the user behavior analysis. The performing of the image evaluation may include determining a likelihood of a user engaging in a desired user behavior in relation to the received image. Then, the machine generates, based on the evaluation of the received image, an output that references the received image and indicates the likelihood of a user engaging in the desired behavior.
US09384421B2	Method for detecting the drowsiness of the driver in a vehicle In a method for detecting the drowsiness of a driver in a vehicle, a course of a circadian curve is modified as a function of the environmental brightness.
US09384420B2	Classifying user activities using eye fixation clustering, fixation features, and regions of interest A computing device classifies user activities. The device receives eye tracking data for a person viewing a page having multiple contiguous regions. The eye tracking data comprises a temporal sequence of fixations, where each fixation has a duration and a location. The device partitions the fixations into clusters, where each cluster has a consecutive sub-sequence of the fixations. The device assigns a provisional user activity label to each fixation based on a set of characteristics of the fixation. The device also groups together consecutive fixations that have the same label to partition the fixations into groups. For each group that matches a respective cluster, the device retains the provisional label assignment as a final user activity label assigned to each of the fixations in the respective group. The device also reconciles non-matching groups with non-matching clusters, using the regions, to form a set of non-overlapping modified groups.
US09384417B1	System and method for object dimension estimation A method for estimating a size of an object present on two images representing the same scene from different points of view, the method comprising: determining an AAM image model; matching the AAM image model to the images to find a set of parameters describing the shape of the model (pc) and the appearance of the model (λc) for which minimal matching errors for both images occur; and estimating the size of the object based on the differences in locations of points of the AAM image model in the images. The image model is matched to both images mutually, i.e. by using information from both images.
US09384413B2	Method and device for automatic or semi-automatic segmentation of a 3D image data set In a method and apparatus for automatic or semi-automatic segmentation of a 3D image data set, acquired by a medical imaging apparatus, of an examination region that includes an organ, the 3D image data set is provided to a computer/processor, which is also provided with information with designating the type of organ imaged in the examination region. The 3D image data set is automatically segmented in the computer/processor using a model-based segmentation algorithm, wherein the designated type of organ is used as a basis of the model. The 3D data set is also automatically or semi-automatically segmented using a greyscale value-based segmentation algorithm. At least one of the segmentation results is displayed.
US09384411B2	Image processor with edge-preserving noise suppression functionality An image processing system comprises an image processor configured to identify edges in an image, to apply a first type of filtering operation to portions of the image associated with the edges, and to apply a second type of filtering operation to one or more other portions of the image. By way of example only, in a given embodiment a clustering operation is applied to the image to identify a plurality of clusters, a first set of edges comprising edges of the clusters is identified, an edge detection operation is applied to the image to identify a second set of edges, a third set of edges is identified based on the first and second sets of edges, and the first type of filtering operation is applied to portions of the image associated with one or more edges of the third set of edges.
US09384399B2	Method and system for processing image data obtained from scanning a network infrastructure The invention relates to a method and system for processing image data obtained from scanning a network infrastructure for the detection and analysis of specific objects of interest, such as powerlines and other overhead conductors, or similar structures. The image data comprises a plurality of co-ordinate points in three-dimensional space, and in order to identify conductors in the network infrastructure, the method involves analyzing the co-ordinate points to identify sets of co-ordinate points indicative of a set of substantially parallel lines, and analyzing the co ordinate points on the basis of said identified substantially parallel lines thereby to allow identification and mapping of hanging catenaries representing said conductors.
US09384398B2	Method and apparatus for roof type classification and reconstruction based on two dimensional aerial images A method, apparatus and computer program product are provided for roof type classification and reconstruction based on two dimensional aerial images. In the context of a method, the method includes receiving a roof image, determining a segmentation of the roof image based on cutting lines associated with roof features and classifying roof segments based on roof features within the segment. The classifying roof segments is based on the roof features correlation to a roof type pattern.
US09384396B2	System and method for detecting settle down time using computer vision techniques A method for detecting settle-down time in a space includes acquiring a sequence of frames capturing a select space from a first camera. The method includes determining an initial time for computing a duration it takes for an associated occupant to settle into a seat in the select space. The method includes determining one or more candidate frames from the sequence of frames where one or both of a sitting behavior and seat occupancy is observed at the seat. The method includes determining a final frame and a final time associated with the final frame from the one or more candidate frames. The method includes computing the settle-down time using the initial and the final times.
US09384395B2	Method for providing augmented reality, and user terminal and access point using the same Provided are a method for providing augmented reality (AR) services, and a user terminal and an access point using the same. The user terminal according to an embodiment of the present invention includes a reception unit that receives AR-related information broadcast by at least one access point (AP), a photographing unit that photographs an image of an object to obtain the photographed image, and a comparison unit that compares the obtained image of the object with the AR-related information received from the at least one AP to identify the object.
US09384388B2	Object recognition device and vehicle controller An object recognition device includes a sensor (2) that detects a preceding vehicle (V) and a stationary object (O) on a road, a first locus calculating unit (11) that calculates a relative movement locus (Tv) of the preceding vehicle (V) to a vehicle (1) on the basis of a history of a detected position of the preceding vehicle (V), a second locus calculating unit (12) that calculates a relative movement locus (To) of the stationary object (O) to the vehicle (1) on the basis of a history of a detected position of the stationary object (O), and an object recognizing unit (14) that recognizes the stationary object (O) as an object not serving as an obstacle in traveling when the movement loci (Tv, To) intersect each other.
US09384373B2	Adaptive signal scaling in NFC transceivers Exemplary embodiments are directed to adaptive signal scaling in NFC transceivers. A transceiver may include a programmable load modulation element configured for load modulation in a tag mode. Further, the transceiver may include a sensing element for measuring an amount of power harvested by the transceiver in the tag mode. The transceiver may also include a controller configured for adjusting a depth of load modulation of the programmable load modulation element depending on the amount of power harvested.
US09384369B2	Information processing method and electronic device An information processing method and electronic device are provided. The electronic device includes a biometric feature acquisition unit and a display unit. The method includes: determining whether an unlock operation is received in when the electronic device is in a lock-screen state, to obtain a first determination result; obtaining first biometric feature information of a user with the biometric feature acquisition unit during a process for performing the unlock operation when the first determination result indicates that the unlock operation is received; determining whether the first biometric feature information matches preset feature information to obtain a second determination result; generating a first backup instruction for backing-up first data in the electronic device when the second determination result indicates that the first biometric feature information does not match the preset feature information; and executing the first backup instruction to backup the first data into a second electronic device.
US09384368B2	Instruction and logic for mid-level caching of random numbers distributed to multiple units A system including a memory to store a plurality of digital random numbers generated by a digital random number generator, a plurality of cores coupled to the memory, the plurality of cores accessing the memory to retrieve digital random numbers.
US09384366B2	System for encoding customer data A system for encoding customer data includes a memory, a decision engine, a rules engine and an interface engine. The memory stores customer data associated with service levels and rules. The decision engine receives a request for customer data from a third party, determines that the third party is associated with a first service level, and retrieves the customer data associated with the first service level. The rules engine transforms customer data into first and second code segments by applying the rules. The rules engine combines at least the first code segment and the second code segment to form a customer profile code. An interface engine communicates the customer profile code to the third party.
US09384365B2	Remote data viewer A medical image and data application service provider system provides a way of remotely viewing and manipulating medical images and data for diagnostic and visualization purposes by users unconstrained by geography. Medical images and data are stored on one or more servers running application service provider software along with meta-data such as access control information, origin of information and references to related data. A set of medical data consisting of related information is sent as an encrypted stream to a viewing station running client software in a secure execution environment that is logically independent of the viewing station's operating system.
US09384363B2	Deploying policies and allowing off-line policy evaluations In an information management system, policies are deployed to targets and targets can evaluate the policies whether they are connected or disconnected to the system. The policies may be transferred to the target, which may be a device or user. Relevant policies may be transferred while not relevant policies are not. The policies may have policy abstractions.
US09384361B2	Distributed event system for relational models A distributed event system for a relational database is disclosed. An event data model operatively describes a target database. For a subject entity in the target database, the event data model declares and defines triggering events and respective corresponding operations. An event engine monitors database queries and events involving the subject entity and determines from the event data model corresponding operations. Execution of the determined corresponding operations is distributed to network-based agents. Agents may be filtered based on skills and/or credentials injected at runtime. Code binaries of the operations are downloaded to the agents for execution.
US09384359B2	Information firewall A data-firewall system blocks sensitive data from becoming available outside a protected space. During operation, the system can obtain an interest from a requesting entity. The requesting entity can include, for example, a software application running on a local computer, a computing device of an Enterprise environment, or a computing node of a computer cluster. Also, the interest can include a location-independent structured name associated one or more data items. When the system obtains the data associated with the location-independent structured name, the system proceeds to obtain a policy associated with the data, and to determine a context for the interest. Then, if the system determines that the requesting entity is within a protected space, as determined based on the policy and the context, the system forwards the data to the requesting entity.
US09384342B2	Methods and devices for providing warnings associated with credentials to be stored in a credential store Methods and devices for providing a warning associated with credentials to be stored in a credential store on a computing device are disclosed herein. In one broad aspect, the method comprises receiving a request to store, in the credential store, at least one credential for a specified service, determining whether a secure connection between the computing device and the specified service is available, associating the specified service with a level of security based on at least one of an availability of the secure connection or one or more properties of the secure connection, and providing a warning in response to determining that at least one credential stored in the credential store corresponds to the at least one credential for the specified service and is for a service that is associated with a level of security different from the level of security with which the specified service is associated.
US09384339B2	Authenticating cloud computing enabling secure services Authenticating cloud computing enabling secure services (ACCESS) offloads “client authentication” activity onto a third-party authenticating cloud computing enabling secure services (ACCESS) node. Instead of having a client device authenticate itself directly to a network server, the client device instead authenticates itself to a third-party authenticating cloud computing enabling secure services (ACCESS) node. The authenticating cloud computing enabling secure services (ACCESS) node then provides credentials that are used by the client device to communicate directly with the server (and utilize the service) without any further authentication being necessary.
US09384338B2	Architectures for privacy protection of biometric templates The present invention relates to a system and a method of verifying the identity of an individual by employing biometric data associated with the individual (603), wherein privacy of said biometric data (X, Y) is provided. A helper data scheme (HDS) is employed to provide privacy of the biometric data. The present invention is advantageous for number of reasons. First, processing of security sensitive information is performed in a secure, tamper-proof environment (601, 604, 606) which is trusted by the individual. This processing, combined with utilization of a helper data scheme, enables set up of a biometric system where the biometric template is available in electronic form only in the secure environment. Moreover, electronic copies of the biometric templates are not available in the secure environment permanently, but only when the individual offers her template to the sensor.
US09384337B1	Item sharing based on information boundary and access control list settings An item is shared based on an information boundary and access control settings. An application such as a document management application detects a selection of an information boundary to manage a sharing action associated with the item. The information boundary includes rules to define how the item is shared. A selection of an access control list is also detected to manage recipients who have an access to the item. The access control list allows a recipient in the list an ability to search and discover the item. In response to a detection of the sharing action to share the item, the information boundary and the access control list is applied to the item. The item is then shared based on the information boundary and the access control list through a link of the item transmitted to a recipient.
US09384330B2	Providing user attributes to complete an online transaction A first server device receives a request for attributes, of a user, from a second server device associated with a receiving entity. The first server device determines whether the receiving entity is entitled to receive the attributes, and authenticates an identity of the user. The first server device also identifies the attributes based on the identity when the receiving entity is entitled to receive the attributes, and transmits the identified attributes to the second server device.
US09384323B1	Pharmaco-genomic mutation labeling Electronic label processor compares bioinformatic values to determine pharmaco-genomic mutation associated with host. Label display indicates pharmaco-genomic mutation, which is network-accessible for modified medical message. Bioinformatic values are determined preferably at different times.
US09384315B2	Method, system and computer program product for electrical and thermal analysis at a substrate level A method for the automatic design of an electronic circuit includes operations for evaluation of the thermal effects in the electronic circuit. The method generates a layout of the electronic circuit. Abstract data at the substrate level associated to the layout of the electronic circuit is then generated. A grid of partitioning is generated with respect to a view regarding the aforesaid abstract into meshes and nodes. The grid is applied to the substrate. On the basis of the grid (TG), a list of nodes or netlist representing a thermal network that represents the thermal behavior of the substrate or of its portions or elements is extracted. The netlist is useful in simulation operations, in particular of a SPICE type, for making an evaluation of thermal effects in the electronic circuit.
US09384313B2	Systems and methods for increasing debugging visibility of prototyping systems User's register transfer level (RTL) design is analyzed and instrumented so that signals of interest are preserved and can be located in the netlist after synthesis. Then, the user's original flow of RTL synthesis and design partition is performed. The output is analyzed to locate the signals of interest. Latches are selectively inserted to the netlist to ensure that signal values can be accessed at runtime. After that, a place and route (P&R) process is performed, and the outputs are analyzed to correlate signal names to registers (flip-flops and latches) or memory blocks locations is field programmable gate array (FPGA) devices. A correlation database is built and kept for runtime use. During runtime, a software component may be provided on a workstation for the user to query signal values corresponding to RTL hierarchical signal names.
US09384312B2	Method and apparatus for implementing periphery devices on a programmable circuit using partial reconfiguration A programmable circuit includes a physical interface at an input output (IO) periphery of the programmable circuit. The programmable circuit also includes a partial reconfigurable (PR) module, at the IO periphery of the programmable circuit, to implement a sequencer unit operable to configure the physical interface during a first instance of the PR module, and a controller unit operable to translate commands to the physical interface during a second instance of the PR module.
US09384310B1	View data sharing for efficient multi-mode multi-corner timing analysis A system and method for performing multi-mode multi-corner (MMMC) analysis such that multiple views or conditions can be analyzed together to improve runtime by taking advantage of common steps of analysis in different corners. Views are clustered based on their similarity to one another to take advantage of calculations and other tasks that may be shared between views during timing analysis. Then, during timing analysis, each net in the design is analyzed for each view.
US09384305B2	Predicting the impact of change on events detected in application logic A search facility is used to predict the impact of change on events detected in application logic, where the change may involve a computing resource used by or referenced by the application logic and/or by event detection logic. The search may be performed prior to making a change, in order to judge potential impact of the change, or after the change has been made. The search makes the prediction by evaluating semantics of conditions that specify when and/or how an event will be detected at run-time.
US09384301B2	Accessing objects in a service registry and repository This invention relates to query management. A query management method includes receiving a database query, generating an abstract syntax tree representation of the database path query into a set of java objects, and processing the abstract syntax tree representation of the database path query. The method further includes determining a selector upon processing the abstract syntax tree representation of the database path query and deriving a SELECT clause from the selector clause, where the SELECT clause indicates a portion of an expression from an XMeta Query Language (XMQL) query. The method yet further includes appending a FROM clause to the expression for the XMQL query, appending a WHERE clause to the expression for the XMQL query, and executing the expression for the XMQL query including the appended FROM clause and also the appended WHERE clause to access objects in an object repository.
US09384298B2	Previewing web pages associated with search results Systems, methods, and computer-readable storage media for previewing search results determined in response to search queries input into a browser toolbar search box are provided. Descriptors of search results determined to match the input search query are presented in a search results window that overlays a first portion of the browser web page. Upon receiving an indication that the user desires to view one of the presented search results, a preview of a web page associated with the indicated search result is presented overlaying a second portion of the browser page. If the user determines from the preview that the indicated search result does not provide the desired information, s/he may move the mouse pointer to a different search result. In response, a web page associated with the second indicated search result is presented overlaying the second portion of the browser page for the user to preview.
US09384265B2	System and method for enhanced lookup in an online dictionary A system and method predictively generates words based on a user input, according to a frequency of lookup of each of the generated words. The system and method also allows for a user to add predictively generated words to a word list that assists in the facilitation of word and vocabulary comprehension for a user. Words in the online dictionary are grouped in word families where a user can navigate between different forms of a root word.
US09384263B2	Leveraging enterprise content A method and system for leveraging content is provided. The method includes receiving, data associated with a subscriber and registering the subscriber with an ECM computing system. Devices belonging to the subscriber are connected to the ECM computing system and metadata associated with content retrieved from the devices is generated. The content in the devices are classified into formal content and informal content. Multiple searches for additional content are monitored and multifaceted search results associated with the formal content and the informal content are generated and presented to the subscriber. The subscriber has an option to request informal content on additional end user devices from respective end users based on metadata presented by search results.
US09384262B2	Internal linking co-convergence using clustering with hierarchy Certain implementations of the disclosed technology include systems and methods for internal co-convergence using clustering when there is hierarchy in the data structure. A method is included for clustering hierarchical database records into a first set of clusters having corresponding first cluster identifications (IDs), each hierarchical database record including one or more field values, the clustering based at least in part on determining similarity among corresponding field values of the hierarchical database records. The method includes receiving parent-child hierarchical relationship information for the hierarchical database records, re-clustering at least a portion of the hierarchical database records into a second set of clusters having corresponding second cluster IDs, the re-clustering based at least in part on the received parent-child hierarchical relationship information, and outputting hierarchical database record information, based at least in part on the re-clustering.
US09384261B2	Automatic creation of rules for identifying event boundaries in machine data Methods and apparatus consistent with the invention provide the ability to organize and build understandings of machine data generated by a variety of information-processing environments. Machine data is a product of information-processing systems (e.g., activity logs, configuration files, messages, database records) and represents the evidence of particular events that have taken place and been recorded in raw data format. In one embodiment, machine data is turned into a machine data web by organizing machine data into events and then linking events together.
US09384256B2	Reporting and summarizing metrics in sparse relationships on an OLTP database Storing and/or accessing data in a transactional database, with use of the following technique: (i) selecting a set of base tables in a transactional database; and (ii) creating a factless materialized query table, having maximum sparsity, for the set of base tables. The set of base tables includes at least two base tables. The set of base tables includes a set of keys including at least two distinct primary keys. The factless materialized query table includes one record associated with each record in the set of base tables. Each record in the materialized query table includes a value for every primary key in the set of base tables.
US09384254B2	System and method for providing intra-process communication for an application programming interface Systems and methods are provided for intra-process communication in a backup framework. A custom requester is registered with a framework configured to run and coordinate one or more requesters and one or more providers, wherein the framework provides an application programmer interface for the requesters and providers. A first requester from the one or more requesters starts a backup process for a first data set associated with a first application. The first requester determines that the data storage device associated with the first data set and the first application is exported by a data management system. The first requester selects a first provider to create a backup of the first data set for the backup process, wherein the first requester and first provider are separate threads in a same process space that can communicate directly with each other using one or more intra-process communication channels.
US09384251B2	Synchronization of off-line reports and off-line mobile content packages Provided are techniques for presenting a data visualization on an off-line mobile device. A report specification is parsed to detect a drill definition to navigate from a report viewer to an interactive visualizer. Data package report specifications are generated to create data and metadata. Data package report output is obtained for each of the data package report specifications. Data and metadata in each data package report output are converted. The converted data and metadata are stored into a data package. A mobile content package is created using the data package and a visualization specification. A report and the mobile content package are delivered to the off-line mobile device. The report viewer is used to present the report. In response to a user interacting with a user interface control on the presented report, the interactive visualizer is launched to present the data visualization using the mobile content package.
US09384244B1	Search with autosuggest and refinements Techniques for search with autosuggest and refinements are disclosed. In some embodiments, search with autosuggest includes determining a plurality of potential query suggestions for a partially entered query string; and automatically suggesting a plurality of queries based on a query count for each of the queries. For example, the query count can correspond to a popularity of the query. In some implementations, the query count can be determined based on a number of times that the query was received, and the plurality of queries can be listed based on the popularity of each of the plurality of queries (e.g., to facilitate display of more popular queries higher in the list of suggested queries).
US09384242B1	Discovery of news-related content Techniques identify time-sensitive content and present the time-sensitive content to communication devices of users interested or potentially interested in the time-sensitive content. A content management component analyzes video or audio content, and extracts information from the content and determines whether the content is time-sensitive content, such as recent news-related content, based on analysis of the content and extracted information. The content management component evaluates user-related information and the extracted information, and determines whether a user(s) is likely to be interested in the time-sensitive content based on the evaluation results. The content management component sends a notification to the communication device(s) of the user(s) in response to determining the user(s) is likely to be interested in the time-sensitive content.
US09384236B2	Method and system for operating on database queries The present disclosure involves systems, software, and computer implemented methods for operating on database queries. One example method includes identifying a parameterized input query in a first database query language. The parameterized input query includes one or more parameter placeholders. A random value is generated, for each parameter placeholder. A concrete instance of the parameterized input query in the first database query language is constructed. The concrete instance of the parameterized input query replaces each parameter placeholder with the corresponding generated random value. A translated output query in a second database query language is generated, from the concrete instance of the parameterized input query. The translated output query includes the generated random values. Each of the generated random values are replaced within the translated output query in the second database query language with a placeholder value associated with the second database query language.
US09384228B2	Implementing a multi-column/multi-row constraint in a relational database table A method, system, and computer program product for implementing a multi-column/multi-row constraint. Lock techniques prevent access collisions even when two or more concurrently running software applications are attempting to insert rows into the same relational database table (subject to the same multi-column/multi-row constraints). The method commences by receiving (e.g., from a first process) a first row to be inserted into a relational database table where the row comprises at least two constrained columns corresponding to the multi-column/multi-row constraint, then receiving (e.g., from a second process) a second row to be inserted into the same table. Using column locks, the method recognizes the potential for conflicting row insertions, and manages locks to prevent conflicting access grants to the two constrained columns of the existing database table. The evaluation of the multi-column/multi-row constraint is performed over the first row to be inserted and a row or rows of the relational database table.
US09384227B1	Database system providing skew metrics across a key space A database service may maintain tables on behalf of clients and may provision throughput capacity for those tables. A table may be divided into multiple partitions, according to hash of the primary key values for each of the items in the table, and the items in the table may be accessed using the hash of their primary key values. Provisioned throughput capacity for the table may be divided between the partitions and used in servicing requests directed to items in the table. The service (or underlying system) may provide mechanisms for generating skew-related metrics or reports and presenting them to clients via a graphical user interface (GUI). The metrics and reports may indicate the amount of uniformity or skew in the distribution of requests across the key space for the table using histograms, heat maps, or other representations. Clients may initiate actions to correct any skewing via the GUI.
US09384217B2	Telestration system for command processing In one embodiment, a method detects a user input for a telestration on an image being displayed on a display device and determines a plurality of image portions of the image based on the telestration. The plurality of image portions are determined by a boundary around each image portion based on the telestration. The method then determines a set of tags for the plurality of image portions. The set of tags are determined based on image recognition of content in the plurality of image portions. An operator is determined based on the telestration where the operator characterizes an operation to perform for the plurality of image portions. The method determines a search query based on applying the operator to the set of tags and causes a search to be performed using the search query.
US09384216B2	Browsing related image search result sets Methods are provided for displaying image results responsive to a search query. In addition to displaying responsive results for a query, responsive results are also provided for related queries. The results are ordered along a plurality of display axes, including at least one axis corresponding to the ordering of the various search queries. The results can be displayed in an aligned or non-aligned manner. The results can then be translated along one or more of the display axes to allow a user to browse the various results.
US09384214B2	Image similarity from disparate sources A search engine determines a set of other images that are similar to a user-selected image, and presents those other images to the user. In determining whether two images are sufficiently similar to each other to merit presentation of one, the search engine determines a Euclidean distance between separate feature vectors that are associated with each of the images. Each such vector indicates diverse types of information that is known about the associated image. The types of information included within such a vector may include attributes that reflect visual characteristics that are visible in an image, verbal tags that have been associated with the image users in a community of users, concepts derived from those tags, coordinates that reflect a geographic location at which a camera that produced the image was when the camera produced the image, and concepts related to groups with which the image is associated.
US09384211B1	System, method, and computer program product for automated discovery, curation and editing of online local content A method for quantifying localness of content can be organized into several stages of information acquisition and processing, with each stage focusing on filtering or qualifying content based on geographic information relevant to a place. The method may comprise bootstrapping an initial set of terms for the place, building a local content corpus for the place utilizing the initial set of terms, and populating an index with information from documents in the local content corpus. In response to a request about the place, a query is formed and provided to the index for retrieving local content relevant to the place.
US09384209B2	Virtual file system integrating multiple cloud storage services and operating method of the same Disclosed is a virtual file system integrating and managing multiple cloud storages. A virtual file system may comprise an API database storing information on open API of the cloud storages, a storage state database storing state information of the cloud storages, a metadata database storing metadata of the cloud storages, a cloud storage allocation part receiving an user request and selecting a cloud storage appropriate for the user request among the cloud storages by referring to the storage state database and the metadata database, and an API mapping part reading out open API information of the cloud storage selected by the cloud storage allocation part from the API database, converting the user request to an open API of the selected cloud storage, and transferring the converted open API to the selected cloud storage.
US09384204B2	Efficient data compression and analysis as a service Data may be efficiently analyzed and compressed as part of a data compression service. A data compression request may be received from a client indicating data to be compressed. An analysis of the data or metadata associated with the data may be performed. In at least some embodiments, this analysis may be a rules-based analysis. Some embodiments may employ one or more machine learning techniques to historical compression data to update the rules-based analysis. One or more compression techniques may be selected out of a plurality of compression techniques to be applied to the data. Data compression candidates may then be generated according to the selected compression techniques. In some embodiments, a compression service restriction may be enforced. One of the data compression candidates may be selected and sent in a response.
US09384199B2	Distributed file system A distributed file system for devices is described. In an embodiment, each data element stored on one of the devices has an associated location and availability attribute. The location attribute is stored co-located with the data element. The availability attribute and a copy of the location attribute are stored by a metadata service. When a client on a device needs to access a data element, it sends a request to the metadata service to find the location of the data element. If the data element is available, this information is provided to the client and this may involve waking a dormant device which holds the data element. Where the data element is not available, read only access may be granted to a cached copy of the data element. Where replication is used and one of the devices holding a replica is unavailable, the system may use write off-loading.
US09384197B2	Automatic discovery of metadata This is directed to processing stored data to automatically generate metadata for the stored data. In particular, this is directed to identifying metadata associated with stored data, and identifying other data that relates to the stored data from one or more sources. A processing module can identify other data sharing some of the identified metadata, and can extract additional metadata associated with the identified other data. The extracted metadata can then be associated with the user's stored data. The processing module can extract additional metadata from any suitable source, including for example local application data, social networks or blogging sources, and other remote sources. In some embodiments, an electronic device can retrieve data from other users for a particular event based on metadata associated with the user's data for the event to form a master collection of data.
US09384187B2	Document analysis, commenting, and reporting system A method includes identifying a document structure instance that includes structure components. A selected structure component is chosen from the structure components. The method includes generating, with a processor, a hierarchical graph based on the selected structure component. The hierarchical graph includes classes, a class definition relationship, and an instance identifier that identifies the selected structure component. The hierarchical graph is output.
US09384186B2	Monitoring conversations to identify topics of interest A system and method for monitoring conversations of a community of users to identify topics of interest is provided. A user community which is based partly on social networking connections relative to a first user is identified. Conversations involving at least one member of the identified user community are monitored. Based in part on an aggregated analysis of the monitored conversations, keywords are selected to present to the first user. The first user is then provided with a display in which the selected keywords associated with the user community are presented to the first user such that the first user can select a keyword to access content associated therewith.
US09384183B2	Method and system for reporting web standard non-compliance of web pages A method and system for reporting web standard non-compliance of web pages is provided. The method includes receiving a local copy of the web page to be tested for web standard non-compliance. The method further includes determining a set of errors on the web page corresponding to a user specified accessibility guideline. Thereafter an HTML overlay report is generated based on the determined set of errors. Further, a set of controls is generated based on the user specified accessibility guideline, the local copy and the set of errors. Finally, one or more controls are selected from the set of controls and based on the one or more selected controls and the determined set of errors one or more images are associated with each HTML element non-conformant to the accessibility guideline on the web page.
US09384180B2	Methods and systems for processing filled forms The present disclosure describes a method and system for processing forms filled by a user. The system includes a scanner configured to scan a first form in a first language that includes one or more fillable fields filled with content; a content extractor configured to extract content from the scanned filled fields; a content processor configured to process the extracted content; and an embedding module configured to embed the processed content into a second form including one or more fields corresponding to the fillable fields of the first form.
US09384177B2	File history recording system, file history management system and file history recording method At the time of copy & paste, an item, a size and a paste content are recorded, and the importance of the paste is determined based on the number of pasted items, and a pasted data size relative to the overall file. Also, an item name and a change content are recorded, and when the manager inputs an important keyword (or unimportant keyword) in visualizing a file history, the importance is increased (or decreased) if the keyword is included in the item name or the change content. A function of displaying the file history in order of importance if the file history is displayed in table format in visualizing the file history, and a function of displaying, or highlighting, only the source file in which the importance is greater than or equal to a threshold set by the manager if the file history is displayed graphically are provided.
US09384176B2	Rich content in a browser-based word processor A tangible computer-readable storage medium having encoded on it data that represents a model of a document, the document model including a one-dimensional character string that includes characters of the document in an order in which they appear in the document; a map of styles that includes markers that correspond to changes in styles in the document, and pointers to the character string, wherein the pointers define locations along the character string at which the changes in styles are to occur and define style runs between matched markers; and one or more external references to objects outside the document model, the external references including identifiers for the objects and pointers to the character string indicating where in the character string the object will appear.
US09384173B2	Information processing apparatus having page preview function, method of controlling the same, and storage medium An information processing apparatus having a display function capable of easily designating a page and skipping pages to a page desired to be displayed. A CPU displays data on a page-by-page basis according to a display instruction. The CPU extracts consecutive pages of each of document sections of the data, as logical pages, in association with physical page numbers each sequentially assigned to each at least one of the pages of the data. The CPU decides a leading logical page of each document section, as a reference logical page, and gives the display instruction so as to cause a display unit to consecutively display a plurality of reference logical pages.
US09384170B2	Quantitative analysis and visualization of spatial points A method for analyzing spatial point patterns and visualizing the results is presented. The method includes simulating at least one point set within a region using a point process, dividing the region into a plurality of elements, determining scores for both real data and simulated data for each element by weighting the point sets within a domain of a predetermined kernel. The method further includes comparing scores for each element, computing confidence intervals for at least one confidence level having a predetermined statistical significance; and providing a visualization to identify clusters and exclusion zones.
US09384169B2	Numerical method for solving an inverse problem in subsonic flows It is a numerical method for solving an inverse problem about the shape design of aerodynamic body in inviscid subsonic flows. This method transfers the original Euler equations into the stream-function plane, where it solves the Riemann problem across the streamline presenting the solid-wall and obtains the geometry of the solid-wall concurrently.
US09384168B2	Vector matrix product accelerator for microprocessor integration In at least one example embodiment, a microprocessor circuit is provided that includes a microprocessor core coupled to a data memory via a data memory bus comprising a predetermined integer number of data wires (J); the single-ported data memory configured for storage of vector input elements of an N element vector in a predetermined vector element order and storage of matrix input elements of an M×N matrix comprising M columns of matrix input elements and N rows of matrix input elements; a vector matrix product accelerator comprising a datapath configured for multiplying the N element vector and the matrix to compute an M element result vector, the vector matrix product accelerator comprising: an input/output port interfacing the data memory bus to the vector matrix product accelerator; a plurality of vector input registers for storage respective input vector elements received through the input/output port.
US09384166B2	Vehicular input device and vehicular input method An object of the present invention is to provide a vehicular input device which is capable of improving accuracy for detecting a contactless input from a driver. A vehicular input device includes a contactless operation detecting unit for detecting a contactless operation on a center display, distance detecting units, distance information storing units in which distance information items obtained from the distance detecting units are stored for each of the distance detecting units, a proximity object determining unit for determining whether or not an object is in proximity of any of predetermined specific positions in a vehicle based on the stored distance information items, and a detecting operation controlling unit for limiting the detection by the contactless operation detecting unit when the object is determined to be in the proximity of any of the specific positions.
US09384165B1	Configuring routing in mesh networks A plurality of processor tiles are provided, each processor tile including a processor core. An interconnection network interconnects the processor cores and enables transfer of data among the processor cores. An extension network connects input/output ports of the interconnection network to input/output ports of one or more peripheral devices, each input/output port of the interconnection network being associated with one of the processor tiles such that each input/output port of the interconnection network sends input data to the corresponding processor tile and receives output data from the corresponding processor tile. The extension network is configurable such that a mapping between input/output ports of the interconnection network and input/output ports of the one or more peripheral devices is configurable.
US09384156B2	Support for IOAPIC interrupts in AMBA-based devices One disclosed computing system comprises a x86 processor, memory, a PCIe root complex (RC), a PCIe bus, and an interconnect chip having a PCIe endpoint (EP) that is connected to the PCIe RC through a PCIe link, the PCIe EP being connected to an AMBA® bus. The interconnect chip may communicate with the IO device via the AMBA® bus in an AMBA® compliant manner and communicate with the host system in a PCIe compliant manner. This communication may include receiving a command from the processor, sending the command to the IO device over the AMBA® bus, receiving a response from the IO device over the AMBA® bus, and sending over the AMBA® bus and the PCIe link one or more DMA operations to the memory. Further communication may include sending an IOAPIC interrupt to the processor of the host system according to PCIe ordering rules.
US09384153B2	Virtualized local storage Embodiments of electronic circuits, computer systems, and associated methods include a module that accesses memory using virtual addressing, the memory including local memory that is local to the module and nonlocal memory that is accessible via a system bus coupled to the module, the module including logic coupled to the local memory via a local bus. The logic is configured to receive a memory access specified to a virtual address, determine whether the virtual address is within the local memory, and direct the memory access either to the local memory via the local bus or to the nonlocal memory via the system bus based on the determination.
US09384146B2	Dynamic reservations in a unified request queue A unified request queue includes multiple entries for servicing multiple types of requests. Each of the entries of the unified request queue is generally allocable to requests of any of the multiple request types. A number of entries in the unified request queue is reserved for a first request type among the multiple types of requests. The number of entries reserved for the first request type is dynamically varied based on a number of requests of the first request type rejected by the unified request queue due to allocation of entries in the unified request queue to other requests.
US09384140B2	Apparatus and method for storage and decompression of configuration data An apparatus includes a plurality of cores and a fuse array. The plurality of cores is disposed on a die. The fuse array is disposed on the die and is coupled to each of the plurality of cores, where the fuse array includes a plurality of semiconductor fuses that are programmed with compressed configuration data for the each of the plurality of cores, and where the each of the plurality of cores accesses and decompresses all of the compressed configuration data upon power-up/reset, for initialization of elements within the each of the plurality of cores.
US09384138B2	Temporal tracking of cache data A data storage system with a cache organizes cache windows into lists based on the number of cache lines accessed during input/output operations. The lists are maintained in temporal queues with cache windows transferred from prior temporal queues to a current temporal queue. Cache windows are removed from the oldest temporal queue and least accessed cache window list whenever cached data needs to be removed for new hot data.
US09384132B2	Emulated message signaled interrupts in a virtualization environment A processor with coherency-leveraged support for low latency message signaled interrupt handling includes multiple execution cores and their associated cache memories. A first cache memory associated a first of the execution cores includes a plurality of cache lines. The first cache memory has a cache controller including hardware logic, microcode, or both to identify a first cache line as an interrupt reserved cache line and map the first cache line to a host physical memory address translated from a guest physical memory address in the address space of a virtual machine to which an I/O device has been assigned. The controller may set a coherency state of the first cache line to shared and, in response to detecting an I/O transaction including I/O data from the I/O device and containing a reference to the host physical memory address, emulate a first message signaled interrupt identifying the host physical memory address.
US09384127B2	Flash memory architecture with separate storage of overhead and user data A memory device has a plurality of dedicated data blocks for storing user data and a plurality of dedicated overhead blocks for storing overhead data. A dedicated overhead block of the plurality of dedicated overhead blocks has a plurality of overhead segments. The overhead segments have physical block address registers configured to store physical block addresses defining respective dedicated data blocks.
US09384123B2	Memory system According to one embodiment, a memory system includes a non-volatile memory, a resource managing unit that reclaims resources associated with the non-volatile memory and increases the resources, when the usage of the resources associated with the non-volatile memory reaches the predetermined amount, a transmission rate setting unit that calculates a setting value of the transmission rate to receive the write data from a host device, and a transmission control unit that receives the write data from the host device and transmits the received write data to the non-volatile memory. The transmission rate setting unit calculates a small setting value when the usage of the resources associated with the non-volatile memory increases. The transmission control unit executes the reception of the write data from the host device at the transmission rate of the setting value, while the resource managing unit reclaims the resources.
US09384122B2	High sampling rate sensor buffering in semiconductor processing systems Embodiments of the invention are directed toward systems and/or methods that buffer data from various sensors with a high sampling rate in a semiconductor processing system. Such sampling can provide better data about the processing for diagnosing the conditions leading up to a processing fault in the system.
US09384115B2	Determining and monitoring performance capabilities of a computer resource service To determine and monitor the performance of a computer resource service in real time, a resource monitoring tool can initiate test virtual machines on the computer systems of the computer resource service. The resource monitoring tool can then monitor various metrics that indicated the performance of the test virtual machines over time, such as processor performance, memory performance, input/output (I/O) performance, and network performance. The resource monitoring tool can store the monitored metrics, provide select metrics to users, and use the metrics to manage the computer resource service. To accurately gauge the performance, the resource monitoring tool can select computer systems for testing that are representative of the computer resource service and the computer resources of the computer resource service.
US09384110B2	Method, computer system, and apparatus for accessing peripheral component interconnect express endpoint device Embodiments of the present invention relate to a peripheral component interconnect express endpoint device accessing method, a computer system, and an apparatus. A state of an access request sent by a processor is monitored, and a simulation response message for the access request is sent to the processor when it is determined that the PCIe endpoint device sends no response message for the access request. Therefore, according to the simulation response message, the processor can confirm completion of the procedure corresponding to the previously sent access request, and shut down a timer for timing the access request and clear the buffered access request, thereby keeping normal processing in the processor and avoiding the MCE resetting problem that arises from accumulation of access requests in the processor.
US09384109B2	Processor with debug pipeline A processor includes an execution pipeline that includes a plurality of execution stages, execution pipeline control logic, and a debug system. The execution pipeline control logic is configured to control flow of an instruction through the execution stages. The debug system includes a debug pipeline and debug pipeline control logic. The debug pipeline includes a plurality of debug stages. Each debug pipeline stage corresponds to an execution pipeline stage, and the total number of debug stages corresponds to the total number of execution stages. The debug pipeline control logic is coupled to the execution pipeline control logic. The debug pipeline control logic is configured to control flow through the debug stages of debug information associated with the instruction, and to advance the debug information into a next of the debug stages in correspondence with the execution pipeline control logic advancing the instruction into a corresponding stage of the execution pipeline.
US09384103B2	EJB cluster timer Multiple application server instances can be arranged in a cluster that implements a distributed EJB timer system. A high availability database can store EJB timer info. The EJB timer jobs can be distributed among the application server instances of the cluster that implement the distributed EJB timer system. In case of a failure of an application server instance, the EJB timer info can be used to reassign the EJB timer jobs associated with the failed application server instance.
US09384097B2	Method and system for recovery of a failed registry A method of recovering a registry includes accessing a plurality of registry zone files for the registry and archiving, on a first periodic basis, the plurality of registry zone files. Each of the registry zone files includes at least domain names, registrar IDs, and status information represented in a first predetermined format. The method also includes accessing bulk WHOIS data for the registry and archiving, on a second periodic basis, the bulk WHOIS data. The bulk WHOIS data includes at least nameserver server names, IP addresses, and status information represented in a second predetermined format. The method further includes validating one of the plurality of archived registry zone files based on a comparison between the plurality of registry zone files and the bulk WHOIS data, publishing the validated registry zone file to a second registry's nameservers, initiating a root zone change request, and updating authoritative nameservers.
US09384091B2	Error code management in systems permitting partial writes A memory 10 stores a data block comprising a plurality of data values DV. An error code, such as an error correction code ECC, is associated with the memory and has a value dependent upon the plurality of data values which form the data block stored within the memory. If a partial write is performed on a data block, then the ECC information becomes invalid and is marked with an ECC_invalid flag. The intent is avoiding the need to read all data values to compute the ECC and thus save time and energy. The memory may be a cache line 28 within a level 1 cache memory 10. Memory scrub control circuitry 38 performs periodic memory scrub operations which trigger flushing of partially written cache lines back to main memory.
US09384086B1	I/O operation-level error checking Error checking in a computing environment at an input/output (I/O) level is facilitated by associating a cyclic redundancy check (CRC) control element (CCE) with an input/output (I/O) operation based on a command to perform the I/O operation of the computing environment. The CRC control element is used in accumulating during performance of the I/O operation an accumulated CRC value for the I/O operation to facilitate error checking of the I/O operation. By way of example, the associating and the accumulating of the accumulated CRC value may be performed within an I/O hub of the computing environment, and where data of the I/O operation is transferred in data fragments, the CRC control element is updated for each data fragment during the accumulating of the CRC context for the I/O operation.
US09384082B1	Proactively providing corrective measures for storage arrays Proactively providing corrective measures for storage arrays includes: receiving data from a storage array, the data including one or more events; detecting, in dependence upon a problem signature, one or more events from the data indicative of a particular problem, where the problem signature comprises a specification of a pattern of events indicative of the particular problem experienced by at least one other storage array; determining whether the particular problem violates an operational policy of the storage array, the operational policy specifying at least one requirement for an operational metric of the storage array; and if the particular problem violates the operational policy of the storage array, deploying automatically without user intervention one or more corrective measures to prevent the storage array from experiencing the particular problem.
US09384076B2	Allocating machine check architecture banks In accordance with embodiments disclosed herein, there is provided systems and methods for allocating machine check architecture banks. The processing device includes a plurality of machine check architecture banks to communicate a machine check error. The processing also includes an allocator to allocate during runtime of the processor a target machine check architecture bank of the plurality of machine check architecture banks. The runtime of the processor is during an occurrence of the machine check error.
US09384072B2	Distributed queue pair state on a host channel adapter A method for managing a distributed cache of a host channel adapter (HCA) that includes receiving a work request including a QP number, determining that a QP state identified by the QP number is not in the distributed cache, retrieving the QP state from main memory, and identifying a first portion and a second portion of the QP state. The method further includes storing the first portion into a first entry of a first sub-cache block associated with the first module, where the first entry is identified by a QP index number, storing the second portion into a second entry of a second sub-cache block associated with the second module, where the second entry is identified by the QP index number; and returning the QP index number of the QP state to the first module and the second module.
US09384063B2	Eliding synchronization in a concurrent data structure A concurrent data structure allows synchronization to be elided for read accesses. Processing resources that remove one or more elements of the concurrent data structure are allowed to delete the elements only after all other processing resources have reached a safe point. Each processing resource maintains an indicator that indicates whether the processing resource has reached as safe point (i.e., will not access the concurrent data structure). When the indicators indicate that all processing resources have reached a safe point, elements of the data structure may be deleted.
US09384042B2	Techniques for dynamically assigning jobs to processors in a cluster based on inter-thread communications A technique for operating a high performance computing (HPC) cluster includes monitoring communication between threads assigned to multiple processors included in the HPC cluster. The HPC cluster includes multiple nodes that each include two or more of the multiple processors. One or more of the threads are moved to a different one of the multiple processors based on the communication between the threads.
US09384041B2	Information processing system for ending a first program when a second program ends An information processing system includes a detection unit configured to detect an end of a second application program that cooperates with a first application program operated by a user; a report unit configured to report the end to the first application program, and end the first application program; and a request unit configured to request a third application program to display information relevant to the end of the second application program.
US09384040B2	Scheduling computer jobs for execution A method, system, and apparatus to divide a computing job into micro-jobs and allocate the execution of the micro-jobs to times when needed resources comply with one or more idleness criteria is provided. The micro-jobs are executed on an ongoing basis, but only when the resources needed by the micro-jobs are not needed by other jobs. A software program utilizing this methodology may be run at all times while the computer is powered up without impacting the performance of other software programs running on the same computer system.
US09384033B2	Large receive offload for virtual machines A network interface controller (NIC) that includes a set of receive NIC queues capable of performing large receive offload (LRO) operations by aggregating incoming receive packets is provided. Each NIC queue turns on or off its LRO operation based a set of LRO enabling rules or parameters, whereby only packets that meet the set of rules or parameters will be aggregated in the NIC queue. Each NIC queue is controlled by its own set of LRO enabling rules such that the LRO operations of the different NIC queues can be individually controlled.
US09384028B1	System, method, and computer program for preserving service continuity in a network function virtualization (NFV) based communication network A system, method, and computer program product are provided for preserving service continuity in a Network Function Virtualization based (NFV-based) communication network. In use, a first virtual network function (VNF) instance associated with a first VNF in a first hardware unit in a Network Function Virtualization based (NFV-based) communication network is identified. Additionally, a second VNF instance on a second hardware unit is instantiated, the second VNF instance being compatible with the first VNF instance. Further, communication directed to the first VNF instance is diverted to the second VNF instance on the second hardware unit, in response to initiating the second VNF instance on a second hardware unit.
US09384026B1	Sharing and injecting cookies into virtual machines for retrieving requested web pages Approaches for selectively sharing cookies between virtual machines responsible for retrieving web content. A request to display a web page is received. The web page includes top-level content served by a top-level domain and secondary content served by one or more other domains. A determination that at least a portion of the web page should be retrieved from within a virtual machine is made. A policy is consulted to identify a set of cookies to inject into the virtual machine. The policy considers whether the virtual machine is responsible for retrieving one or more of top-level content and secondary content in identifying the set of cookies to inject into the virtual machine. After injecting the set of cookies into the virtual machine, the portion of the web page is retrieved from within the virtual machine.
US09384025B2	Traffic and/or workload processing In this embodiment, techniques are provided that may permit operations performed by hardware and software to process one or more (e.g., network traffic-related) workloads to be coordinated, at least in part. Such coordination may permit this embodiment to operate in accordance with one or more advantageous usage models, and/or to achieve advantages such as, accelerated network traffic processing, while permitting and/or facilitating a multi-tenant (e.g., software-defined) network environment to be provided, for example, via enforcement of one or more associated policies. Many modifications are possible without departing from this embodiment.
US09384023B2	VM inter-process communication A method for enabling inter-process communication between a first application and a second application, the first application running within a first context and the second application running within a second context of a virtualization system is described. The method includes receiving a request to attach a shared region of memory to a memory allocation, identifying a list of one or more physical memory pages defining the shared region that corresponds to the handle, and mapping guest memory pages corresponding to the allocation to the physical memory pages. The request is received by a framework from the second application and includes a handle that uniquely identifies the shared region of memory as well as an identification of at least one guest memory page corresponding to the memory allocation. The framework is a component of a virtualization software, which executes in a context distinct from the context of the first application.
US09384017B2	System and method to provide grouping of warnings generated during static analysis The present disclosure generally relates to warnings generated based on static analysis and, more particularly, to grouping warnings generated based on static analysis. In one embodiment, a method for grouping a plurality of warnings generated based on a static analysis of an application program is provided. The method may include analyzing, by one or more processors using programmed instructions stored in a memory, the application program to generate the plurality of warnings; identifying, by the one or more processors, one or more similar warnings based on the plurality of warnings, the similar warnings having structurally and semantically similar expressions of interest (EOI); and generating, by the one or more processors, one or more groups of warnings based on the plurality of warnings, the one or more groups of warning including one or more of corresponding identified similar warnings.
US09384013B2	Launch surface control Example apparatus and methods concern controlling context associations while maintaining a user experience. A memory stores information concerning a context associated with a shared launch surface in a multi-user system running on an apparatus. The memory also stores information concerning a second context associated with an application launched from the shared launch surface and running on the apparatus. Example apparatus and methods provide a launch surface context interface and an application context interface. The interfaces present information that facilitates changing launch surface ownership or application context while maintaining a user experience. For example, logic may selectively control a launch surface context association as a function of data provided by the launch surface context interface and may control an application context association as a function of data provided by the application context interface. The context associations can be manipulated without having to navigate to the launch surface.
US09384007B2	Memory virtualization-based snapshot boot apparatus and method The present invention relates to a memory virtualization-based snapshot boot apparatus and method. The memory virtualization-based snapshot boot apparatus includes hardware unit including a processor, memory, and storage, the storage storing status information corresponding to an operating system, and a Virtual Machine Monitor (VMM) operated by the processor and configured to operate the operating system by loading the status information into the memory. In accordance with the present invention, technology for loading only a part of a snapshot image and booting a system is implemented using virtualization technology, thus shortening the booting time of the system.
US09384005B2	Systems and methods for dynamic configuration of client-side development environments through use of application servers A client-side integrated development environment (IDE) may rely on an application server for certain processing tasks, such as generating code or other output using server-side templates. The client-side IDE can itself be configured through use of the application server to handle events generated in the client-side IDE. This may allow developers to easily add and/or change IDE functionality without the need to be familiar with the IDE software architecture or programming language.
US09383998B2	MFENCE and LFENCE micro-architectural implementation method and system A system and method for fencing memory accesses. Memory loads can be fenced, or all memory access can be fenced. The system receives a fencing instruction that separates memory access instructions into older accesses and newer accesses. A buffer within the memory ordering unit is allocated to the instruction. The access instructions newer than the fencing instruction are stalled. The older access instructions are gradually retired. When all older memory accesses are retired, the fencing instruction is dispatched from the buffer.
US09383989B1	Systems and methods for updating applications The disclosed computer-implemented method for updating applications may include (1) identifying each version of an application, (2) determining possible upgrade paths to upgrade the application from an initial version of the application to a desired version of the application by, for each version of the application (a) creating a connection between the version and each subsequent version to which the version can be upgraded and (b) weighting each connection with a success rate that indicates the probability that the version will be successfully upgraded to the subsequent version, and (3) identifying, from among the possible upgrade paths, an optimal upgrade path for upgrading the application from the initial version to the desired version based on an analysis of both the combined weight and the combined length of the connections within each possible upgrade path. Various other methods, systems, and computer-readable media are also disclosed.
US09383981B2	Method and apparatus of instruction scheduling using software pipelining A modulo scheduling method including calculating at least two candidate initiation intervals between adjacent iterations, searching for schedules of the instructions in parallel by using the candidate initiation intervals, and selecting a schedule determined to be valid from among the searched schedules.
US09383980B2	Determining a method to inline using an actual footprint calculation Techniques for calculating the actual footprint of a computer-implemented method are disclosed. An example computer-implemented method includes a computer creating a map indicating to which code method each instruction included in compiled code belongs. This computer-implemented method also includes the computer sampling instructions executed using a hardware performance counter. This computer-implemented method also includes the computer mapping the sampled instructions to the code methods to which the instructions belong using the map. This computer-implemented method also includes the computer calculating the actual footprint of each code method as the total number of instructions sampled at least once among the instructions belonging to the code methods.
US09383978B2	Apparatus and method for on-demand optimization of applications An apparatus and method for optimizing an application to be executed in an execution environment of a client are provided. For example, on-demand optimizing of the performance of applications may be performed such that the applications are suitable for execution environments of various types of Consumer Electronic (CE) equipment, in order to distribute high performance applications.
US09383974B2	Graphical computer programming A computer program product and method for using a computer program product for graphically developing a computer program for execution at least in part on a separate host processor device, such as, a digital signal processor. The computer program product includes code for providing a graphical programming environment. The computer code which is used for developing the computer program includes a cell module for graphically representing a graphical control. The cell module does not contain any host processor specific code. The cell module may include code for rendering on the display of the computer that is operating as the programming environment one or more graphical controls. The cell module may also contain host processor independent code that accepts input from a user (parameter value) and converts the parameter value or applies an equation to the parameter value. The computer program also includes a plurality of algorithm modules, wherein each algorithm module provides functional code for the graphical control. The functional code is host processor specific code. The computer program also includes computer code for associating the cell module with one or more of the plurality of algorithm modules for developing the computer program. The computer program also includes code for defining an execution path amongst the algorithm modules. This can be achieved by graphically connecting the cell modules and defining an input and output.
US09383970B2	Distributed analytics platform A platform that facilitates software application development, maintenance, and support includes a storage component that receives structured and unstructured data pertaining to at least one application subject to development, maintenance, or support and causes the structured and unstructured data to be stored in a distributed fashion over a plurality of accessible data repositories. The storage component causes the structured and unstructured data to be stored in the data repositories such that the structured and unstructured data is accessible through utilization of a common access format. An executor component executes an analytical process over the structured and unstructured data and generates a first dataset, wherein the storage component causes the first dataset to be stored in at least one of the plurality of accessible data repositories in a format that is accessible by front end analysis applications.
US09383968B2	Math processing by detection of elementary valued operands One embodiment of the present invention includes a method for simplifying arithmetic operations by detecting operands with elementary values such as zero or 1.0. Computer and graphics processing systems perform a great number of multiply-add operations. In a significant portion of these operations, the values of one or more of the operands are zero or 1.0. By detecting the occurrence of these elementary values, math operations can be greatly simplified, for example by eliminating multiply operations when one multiplicand is zero or 1.0 or eliminating add operations when one addend is zero. The simplified math operations resulting from detecting elementary valued operands provide significant savings in overhead power, dynamic processing power, and cycle time.
US09383966B2	Number squaring computer-implemented method and apparatus Embodiments of the present disclosure describe computer-implemented methods, computer-readable media and computer system associated with big number squaring. A computer-implemented method to square a number x may include storing a t-digit vector representation of x in t b-bit registers of a processor. A 2t-digit intermediate vector may be generated and stored in 2t b-bit registers of the processor, using x stored in said t b-bit registers. A value stored in at least one of the t b-bit or 2t b-bit registers may be shifted to the left by n. n may be an integer at least equal to 1. At some point after the shifting, w, square of the number x, may be represented by the 2t-digit result vector stored in the 2t b-bit registers. Other embodiments may be described and/or claimed.
US09383964B1	Independent game and chat volume control Methods and systems are provided for independent audio volume control. For example, an audio component (e.g., implemented in an element of an audio setup) may control generation and/or outputting of a combined-game-and-chat audio signals. The audio component may receive user input comprising one or both of: a setting for a desired volume of a chat audio component of the combined-game-and-chat audio signal, and a setting for a desired volume of a game audio component of the combined-game-and-chat audio signal. The audio component may determine, based on the user input, a corresponding mix setting for mixing together of the chat audio component and the game audio component in an audio source to generate the combined-game-and-chat audio signal and a corresponding volume setting applicable at an audio output element; provide the mix setting to the audio source; and provide the volume setting to the audio output element.
US09383949B2	Information processing apparatus, information processing method, and storage medium An information processing apparatus includes a providing unit, a management unit, an input unit, and a notification control unit. The providing unit provides at least a first screen and a second screen from an application. The management unit manages the first screen as a screen for forced notification. The input unit inputs information to be displayed in a screen. In a case where the second screen is in an active state, the notification control unit notifies both of the first screen and the second screen of the information. In a case where the second screen is in an inactive state, the notification control unit notifies the first screen of the information and does not notify the second screen of the information.
US09383947B2	Printing digital images using an image printing system The present disclosure is directed toward printing of digital images with increased efficiency and ease. In particular, one or more embodiments provide an image printing system that allows a user to print images from a mobile or other device without having to upload a high-resolution version of the digital images to a print vendor. More specifically, one or more embodiments of the image printing system allow users to store images on a remote server or in a cloud storage space. When the users desire to print physical copies of the digital images, the image printing system can provide the digital images to a print vendor without requiring the users to upload the images to the print vendor from the users' own device.
US09383943B2	Mapping of logical start addresses to physical start addresses in a system having misalignment between logical and physical data blocks An alignment data structure is used to map a logical data block start address to a physical data block start address dynamically, to service a client data access request. A separate alignment data structure can be provided for each data object managed by the storage system. Each such alignment data structure can be stored in, or referenced by a pointer in, the inode of the corresponding data object. A consequence of the mapping is that certain physical storage medium regions are not mapped to any logical data blocks. These unmapped regions may be visible only to the file system layer and layers that reside between the file system layer and the mass storage subsystem. They can be used, if desired, to store system information, i.e., information that is not visible to any storage client.
US09383930B2	Code optimization to enable and disable coalescing of memory transactions A transactional memory system controls the coalescing of outermost memory transactions. The coalescing causing committing of memory store data to memory for a first transaction to be done at transaction execution (TX) end of a second transaction. A processor of the transactional memory system executes a run-time instrumentation program for monitoring and modifying an associated program having a plurality of transactions. The processor initiates execution of the associated program. Based on execution of transactions, by the processor, of the associated program, the run-time instrumentation program dynamically obtains instrumentation information associated with the execution. Based on the obtained instrumentation information, the processor dynamically modifies continued execution of transactions of the associated program to optimize transactional execution (TX).
US09383929B2	Data storing method and memory controller and memory storage device using the same A data storing method for a rewritable non-volatile memory module and a memory controller and a memory storage device using the same are provided. The data storing method includes moving or writing data into a physical erase unit of the rewritable non-volatile memory module and determining whether the physical erase unit contains a dancing bit. The data storing method further includes when the physical erase unit contains the dancing bit, restoring the rewritable non-volatile memory module to the state before the data is moved or moving the data from the physical erase unit to another physical erase unit. Thereby, the data storing method can effectively ensure the reliability of the data.
US09383922B2	Keyboard-based navigation of a user interface Various embodiments of systems and methods for keyboard-based navigation of a user interface are described herein. An area around a first object displayed on a user interface is divided into quadrants and one or more segments for at least one of the quadrants. The user interface includes a plurality of objects and the quadrants represent directions with respect to the first object. In response to a key stroke indicating a first direction, a first one of the quadrants corresponding to the first direction is identified. The segments of the first quadrant are scanned to identify a second object that is closest to the first object in the first quadrant. The second object is then selected.
US09383916B2	Dynamic image presentation One or more techniques and/or systems are disclosed for efficiently organizing images in a display. A size of an image is scaled by an image scale factor, while an aspect ratio for the image is maintained, where the image scale factor comprises a combination of a first scale distance and a second scale distance. The scaled image is filled into a first display line, if the size of the scaled image is not greater than an amount of display space remaining in the first display line; otherwise the scaled image is filled into a second display line. The image is expanded to mitigate white space in the display after the scaling, while maintaining the image's aspect ratio. This can be performed for a collection of images presented on a display to provide an enhanced user experience.
US09383904B2	Mobile terminal and method for controlling the same A mobile terminal and a method of controlling the mobile terminal are provided. The mobile terminal may generate and display a plurality of objects each having a specific contour, on a touch screen, and may display a bar for controlling an undo function on at least some section of the contour of one or more of the plurality of objects displayed on the touch screen. Accordingly, the contour of one or more of the displayed objects may be edited more conveniently.
US09383892B2	Graphical storage system visualization, timeline based event visualization, and storage system configuration visualization A method and system for visually displaying and navigating a computer storage system are disclosed. The storage system can be graphically browsed to select a particular entity in the storage system. A graphical timeline of events relating to the selected entity is displayed. Selecting an event from the timeline displays a graphical representation of the storage system at a time relating to the selected event or additional graphical detail about the selected event. Based on the selected event, configuration information for the entity in the storage system that experienced the event can be displayed and compared against the configuration of the entity at a different time or against a predefined template.
US09383887B1	Method and apparatus of providing a customized user interface A method and apparatus of providing a user with a customized user interface is disclosed. One example may include generating a window display area based on at least one predefined user preference, and displaying the window display area in a specified location of the user. The method may also include prompting the user to select at least one particular application that may be associated with the window display area, and prompting the user to customize the window attributes by modifying the window display area. Other operations may include saving the customized window display area in a memory of a computing device once the user has completed the customizing of the window attributes.
US09383886B2	Display device providing history information and method for controlling the same A method for controlling a display device, comprising, executing a first application and displaying an execution screen of the first application on a display unit, wherein the display unit includes a first display area and a second display area, and the execution screen of the application is displayed in at least one of the first display area and the second display area; and displaying a history screen including history information of the first application, wherein the history information is set up based upon a display mode, wherein first history information is displayed when the display mode of the first application corresponds to a single area mode, second history information is displayed when the display mode of the first application corresponds to an expand area mode, wherein the first history information has a display property different from the display property of the second history information.
US09383882B2	Conductive substrate and touch panel having conductive pads of different dimensions for impedance compensation and reduction A conductive substrate includes a substrate, a plurality of conductive areas, a plurality of first conductive wires, a plurality of conductive pads and a plurality of second conductive wires. The conductive areas are disposed on the substrate along a first direction in sequence. The conductive areas are formed and have a plurality of extending conductive portions along a second direction. The conductive portions of two of the adjacent conductive areas are disposed interlacedly. One terminal of each of the first conductive wires is electrically connected to one of the conductive areas. Each of the conductive pads is electrically connected to other terminal of one of the first conductive wires. One terminal of each of the second conductive wire is electrically connected to one of the conductive pads. In addition, a touch panel is also disclosed in the present invention.
US09383878B2	Touch panel and touch panel equipped display device An arrangement of a touch panel with improved sensitivity is provided. A touch panel (1) includes: an insulating substrate (10); a first light-shielding portion extending in a first direction; a second light-shielding portion extending in a second direction, the second direction crossing the first direction; a plurality of first insular electrodes (110) arranged in the first direction; a plurality of second insular electrodes (120) arranged in the second direction; a first metal film (141) in contact with the plurality of first insular electrodes (110) and extending in the first direction; a second metal film (152) in contact with the plurality of second insular electrodes (120) and extending in the second direction; and an insulating film (152) provided at least at a crossing of the first metal film (151) and the second metal film (152) as in a plan view for providing electrical insulation between the first metal film (151) and the second metal film (152).
US09383871B2	Display device with touch detection function and electronic apparatus According to an aspect, a display device with a touch detection function includes: a substrate; a touch detection electrode of a translucent conductor; a dummy electrode of the translucent conductor provided in a region where the touch detection electrode is not provided; and a drive electrode having capacitance with respect to the touch detection electrode. The dummy electrode comprises: a first direction slit dividing the dummy electrode so that pieces of the dummy electrode are adjacent to each other in a second direction; and a plurality of second direction slits each dividing the dummy so that the pieces of the dummy electrode are adjacent to each other in the first direction. The second direction slits include a first linear slit having a first angle and a second linear slit having a second angle different from the first angle.
US09383869B1	Capacitive touch screen An embodiment of a capacitive touch screen may comprise a display device comprising a substantially transparent substrate, a first plurality of electrodes attached to the substantially transparent substrate, wherein the first plurality of electrodes are substantially parallel in a first direction, and a second plurality of electrodes, wherein each of the second plurality of electrodes is capacitively coupled with each of the first plurality of electrodes.
US09383862B2	Liquid crystal display device An in-cell type liquid crystal display device includes a first unit that detects whether a touch is present, or not, on the basis of a current flowing in a plurality of detection electrodes when a touch panel scanning voltage is applied to counter electrodes of each of M (M≧2) divided blocks, and a second unit that detects noise on the basis of a current flowing in the plurality of detection electrodes, assuming that an (M+1)th counter electrode is present for the counter electrodes of each of the M divided blocks, and assuming that a touch panel scanning voltage synchronous with the touch panel scanning voltage applied to the counter electrodes of each of the M divided blocks is applied to the (M+1)th counter electrode.
US09383856B2	Touch sensing circuit and associated method A touch sensing circuit and method is provided. The touch sensing circuit discriminates a common voltage change of a display panel couple to the touch sensor in a touch panel display apparatus. The touch sensor comprises a plurality of sensor electrodes. The touch sensing circuit includes a plurality of channel circuits, each of which includes a reset switch and a sensing switch for alternately conducting an associated sensor electrode to a reset voltage and a charge collecting circuit. The channel circuits are divided to different groups that operate according to interleaving timings for encompassing possible common voltage changes.
US09383855B2	Identifying contacts on a touch surface Apparatus and methods are disclosed for simultaneously tracking multiple finger and palm contacts as hands approach, touch, and slide across a proximity-sensing, multi-touch surface. Identification and classification of intuitive hand configurations and motions enables unprecedented integration of typing, resting, pointing, scrolling, 3D manipulation, and handwriting into a versatile, ergonomic computer input device.
US09383844B2	Touch system and control method thereof Disclosed are a touch system and a control method thereof. The touch system has a structure in which a plurality of chips correspond to a touchscreen panel having a large screen, wherein the touchscreen panel is divided into areas corresponding to chips and a boundary area between the areas, and each chip performs sensing such that noise is prevented from being generated by a sensing signal of a sensing line of the boundary area.
US09383843B2	Multi-touch auto scanning A system and method for autonomously scanning a sensor panel device is disclosed. A sensor panel processor can be disabled after a first predetermined amount of time has elapsed without the sensor panel device sensing any events. One or more system clocks can also be disabled to conserve power. While the processor and one or more system clocks are disabled, the sensor panel device can periodically autonomously scan the sensor panel for touch activity. If one or more results from the autonomous scans exceed a threshold, the sensor panel device re-enables the processor and one or more clocks to actively scan the sensor panel. If the threshold is not exceeded, the sensor panel device continues to periodically autonomously scan the sensor panel without intervention from the processor. The sensor panel device can periodically perform calibration functions to account for any drift that may be present in the system.
US09383841B2	Shift register circuit A shift register is disclosed. The shift register circuit includes a pull up control circuit configured to provide a pull up control signal; a first pull up circuit configured to provide a sensor driving signal in response to the pull up control signal and a second clock signal; a second pull up circuit configured to provide a gate driving signal in response to a first clock signal, the pull up control signal and the second clock signal; a first pull down control circuit configured to output a first pull down control signal; a first pull down circuit configured to pull down the pull up control signal, the sensor driving signal and the gate driving signal in response to the first pull down control signal; and a main pull down circuit configured to pull down the pull up control signal and the gate driving signal.
US09383835B2	Multi-functional touch pen The disclosure provides a stylus comprising a first barrel, a second barrel, a first electromagnetic touch module and a capacitive touch module. The first electromagnetic touch module is disposed inside the first barrel. The second barrel is detachably sleeved to the outside of the first barrel and is of metallic material. When the first barrel is located inside the second barrel, the second barrel wraps the first barrel and the first electromagnetic touch module is shielded by the second barrel made of metal. When the second barrel and the first barrel are interlaced, the first electromagnetic touch module is exposed outside the second barrel. In addition, the second barrel has a capacitive touch end. The capacitive touch module is disposed corresponding to the capacitive touch end and has an electrical connection portion capable of being electrically connected to the capacitive touch end of the second barrel.
US09383833B2	Navigation device and power saving method thereof A navigation device includes an image sensor, a processing unit, a main clock circuit and an auxiliary clock circuit, wherein a clock frequency of the auxiliary clock circuit is much lower than that of the main clock circuit. The image sensor captures a predetermined number of image frames in a burst period. The processing unit is configured to calculate a displacement according to the image frames, to disable the main clock circuit after the predetermined number of image frames have been captured by the image sensor and to restart the main clock circuit with the auxiliary clock circuit before the end of the burst period.
US09383830B2	State-based auxiliary display operation Described is a technology by which routing of data may be automatically modified based on detected state data of a computing system. For example, user input may be routed from an actuator set to a host computer system when the host computer system is in an online state, or to an auxiliary computing device when the host computer system is offline. State may be determined based on one or more various criteria, such as online or offline, laptop lid position, display orientation, current communication and/or other criteria. The auxiliary display and/or actuator set may be embedded in the host computer system, or each may be separable from it or standalone, such as a remote control or cellular phone.
US09383827B1	Multi-modal command display A computing device includes at least one processor and at least one module, operable by the at least one processor to receive indications of user input comprising a selection of at least one key of a keyboard and at least one other user input, determine, based at least in part on the indications of user input, that the user input collectively indicates a command for execution of at least one operation, and, responsive to determining that the user input collectively indicates the command, determine that the command is alternatively indicated by a particular audio input. The at least one module may be further operable, responsive to determining that the command is alternatively indicated by the particular audio input, to output, for display, a visual representation of the particular audio input, and execute, based at least in part on the command, the at least one operation.
US09383819B2	Manipulation of virtual object in augmented reality via intent A system and method for manipulating a virtual object based on intent is described. A reference identifier from a physical object is captured. The reference identifier is communicated via a network to a remote server. The remote server includes virtual object data associated with the reference identifier. The virtual object data is received at the computing device. The virtual image is displayed in a virtual landscape using the virtual object data. In response to relative movement between the computing device and the physical object caused by a user, the virtual image is modified. Brain activity data of the user is received. A state of the virtual object in the virtual landscape is changed based on the brain activity data.
US09383816B2	Text selection using HMD head-tracker and voice-command A joint head tracker and voice command in a headset computer enables hands-free user text selection. The method and system enables an end-user to select sections of text without requiring use of a mouse cursor control input device. Embodiments include a headset computer, including a processor, configured to display text in a screen view. The computer further configured to place a first point within the displayed text according to one or more of first head tracking information, first voice commands and first gestures, and place a second point within the displayed text according to second head tracking information, second voice commands and second gestures. The computer further configured to select a text section between the first point and the second point in response to one or more of third head tracking information, third voice commands and third gestures, and display the selected text section as a highlighted text section.
US09383809B2	System and method for reducing memory I/O power via data masking Systems and methods are disclosed for reducing memory I/O power. One embodiment is a system comprising a system on chip (SoC), a DRAM memory device, and a data masking power reduction module. The SoC comprises a memory controller. The DRAM memory device is coupled to the memory controller via a plurality of DQ pins. The data masking power reduction module comprises logic configured to drive the DQ pins to a power saving state during a data masking operation.
US09383805B2	Generating clock on demand A clock generation system for an integrated circuit (IC) chip (e.g., a microcontroller) is disclosed that allows digital blocks and other components in the IC chip to start and stop internal clocks dynamically on demand to reduce power consumption.
US09383775B2	Icon display method for a pull-out display device A display device that incorporates a supplemental display screen that is stored within a main body of the display device must be able to transition objects displayed on a main display to a supplemental display. As the supplemental display is pulled out from storage within the main body of the display device, objects that were displayed on the main display may be transitioned onto the supplemental display. Various methods for transitioning the display of objects on the main display to the supplemental display are discussed, where methods may take into account the length of the supplemental display that is pulled out from storage and also touch input contacts that are made on either one of the displays.
US09383766B2	Chip performance monitoring system and method Disclosed are a chip performance monitoring system, method and a computer program product, wherein a performance monitor output signal is propagated through an adjacent scan chain to avoid signal degradation incident to across-chip transmission of high frequency signals. Since the clock signal frequency used to control signal propagation through the scan chain will typically be less than twice the performance monitor output signal frequency, frequency sub-sampling with aliasing occurs. To compensate, signal propagation through the scan chain can be controlled during different time periods using different clock signals having different clock signal frequencies and, during these different time periods, different data outputs can be captured at an output node of the scan chain. The data output frequencies of these different data outputs can be measured and the performance monitor output signal frequency can be determined based on the different data output frequencies given the different clock signal frequencies.
US09383762B2	Voltage regulator using both shunt and series regulation A voltage regulator for providing a constant voltage to a circuit is described in which a series regulator acts as the current source for a shunt regulator and the series regulator in turn is controlled by the current diverted from the output by the shunt regulator. The current being diverted by the shunt regulator is measured, either directly or by measuring a related operating parameter. When current below or above a certain desired amount is being diverted from the load by the shunt regulator, a signal is sent to the series regulator causing the series regulator to provide more or less current respectively, so that the shunt regulator again diverts the desired amount of current and the output voltage remains constant. This configuration results in efficiency near that of a series regulator while maintaining the better frequency response of a shunt regulator.
US09383759B2	Voltage monitoring system An integrated circuit (IC) includes a digital-to-analog converter (DAC), a voltage monitoring circuit, and a controller. The voltage monitoring circuit includes low voltage detect (LVD) and low voltage warning (LVW) circuits that generate LVD and LVW reference voltage signals. The controller generates and stores a voltage margin word (a difference between first and second DAC words that correspond to the LVD and LVW reference voltage signals, respectively). The controller compares the voltage margin word with predetermined maximum and minimum voltage margin words. If the voltage margin word does not lie between the predetermined maximum and minimum voltage margin words, the controller generates a voltage trimming signal that scales the LVW reference voltage signal. After scaling, if the voltage margin word lies between the predetermined maximum and minimum voltage margin words, the controller generates a calibration pass signal, otherwise the controller generates a calibration fail signal.
US09383751B2	Self operable wheelchair A self operable wheelchair includes a chair body having several wheels for moving about; a power module electrically connected to one wheel of the chair body for supplying power; a processing module electrically connected to the power module for processing one route data and converting into a control signal transmitted to the power module for controlling activation of the chair body; a memory module for storing and transmitting the route data to the processing module; a detection module capable of detecting the route data of the chair body and transmitting the route data via the processing module to store within the memory module; and an operation module for transmitting an operation signal to the processing module, which, in turn, activates the chair body based on the operation signal.
US09383749B2	Transitioning a mixed-mode vehicle to autonomous mode Disclosed are methods and devices for transitioning a mixed-mode autonomous vehicle from a human driven mode to an autonomously driven mode. Transitioning may include stopping a vehicle on a predefined landing strip and detecting a reference indicator. Based on the reference indicator, the vehicle may be able to know its exact position. Additionally, the vehicle may use the reference indictor to obtain an autonomous vehicle instruction via a URL. After the vehicle knows its precise location and has an autonomous vehicle instruction, it can operate in autonomous mode.
US09383744B2	Pace-aware music player An electronic device may comprise audio processing circuitry, pace tracking circuitry, and positioning circuitry. The pace tracking circuitry may be operable to selects songs to be processed for playback, and/or control time stretching applied to such songs, by the audio processing circuitry based on position data generated by the positioning circuitry. The position data may indicate the pace of a runner during a preceding, determined time interval. The pace tracking circuitry may be operable to control the song selection and/or time stretching based on a runner profile data stored in memory of the music device. The profile data may comprise runner's distance-per-stride data. The electronic device may comprise one or more sensors operable to function as a pedometer. The pace tracking circuitry may be operable to update the distance-per-stride data based on the position data and based on data output by the one or more sensors.
US09383731B2	Method and automation system for replacing an existing control device in an automation system with a new control device and automation system designed for this purpose In an automation system, a control device processes measured values received from automation components and generates control values for the, or for individual, automation components and/or other automation components. In order to shorten down times when replacing an existing control device, the new control device is tested during operation of the existing control device, for which purpose the measured values and control values are wirelessly transmitted to the new control device and the control values generated by the device are compared to the control values generated by the existing control device. After the test, the control values generated by the new control device are output to the automation components instead of the control values generated by the existing control device.
US09383730B2	Zone based identification for interactive experiences This disclosure relates to a system configured to trigger interactive experiences for guests. The system may be a zone based identification system that uses identification technology (e.g., RFID, image recognition, etc.) to detect and/or identify guests in zones prior to, during, and after an interactive experience. The zones may be physical areas where guests approach, participate in, and leave the interactive experience. The system may be configured such that as guests progress through zones prior to, during, and after the interactive experience, the system may access guest specific information before the interactive experience, present the guest specific information during the interactive experience, and then stop presenting the information responsive to the guest exiting the interactive experience. In some implementations, the system may comprise one or more objects associated with guests, one or more sensors, one or more processors, one or more host systems, and/or other components.
US09383725B2	Device for measuring the accuracy of a mechanical watch A device for measuring the accuracy of a mechanical watch includes a time reference source, a calculating mechanism, and another data processing unit. The time reference source is formed by an internal time reference source, or by a receiving and processing mechanism arranged to receive and process signals transmitted by an external time source to permanently update a repeater clock internal to the device. The calculating mechanism is arranged to calculate time differences between display values, and/or between time reference points provided by the time reference source, and to calculate a variation in rate. The another data processing unit is arranged to store and process at least one variation in rate calculated by the calculating mechanism, and/or a viewing mechanism arranged to display at least one variation in rate calculated by the calculating mechanism.
US09383723B2	Grand date display device for a timepiece The invention concerns a grand date display device that can change from displaying the last day of the month to displaying the first day of the following month by means of a single step of the first and of the second upper plates. This feature avoids the requirement for a correction at the end of months of less than 31 days.
US09383721B2	Image forming apparatus including blower for blowing air at sheet An image forming apparatus includes an image forming section, a fixing device, a sheet conveyance path, a conveyance guide member, a blower, and a control section. The conveyance guide member constitutes one of a pair of sheet conveyance surface portions of the sheet conveyance path. The blower is disposed on an opposite side of the sheet conveyance surface portion constituted by the conveyance guide member to the sheet conveyance path and blows air at a sheet passing through the sheet conveyance path. A ventilation port and an air passage recess are located in the sheet conveyance surface portion constituted by the conveyance guide member. The ventilation port allows air from the blower to flow into the sheet conveyance path. The air passage recess extends in a sheet width direction. The air passage recess allows air that has passed through the ventilation port to flow through the air passage recess.
US09383717B2	Developer container and image forming device A developer container includes a casing having a developer accommodating chamber and a waste-developer accommodating chamber, conveying member, a conveying-member accommodating unit, and a supporting member. The conveying member conveys waste developer in a longitudinal direction of the waste-developer accommodating chamber. The conveying-member accommodating unit accommodates the conveying member therein and has a first opening and a second opening. The first opening is provided in an upstream end portion and allows the waste developer to move from outside of the conveying-member accommodating unit to the inside of the conveying-member accommodating unit. The second opening allows the waste-developer to move from the inside of the conveying-member accommodating unit to the waste-developer accommodating chamber. The supporting member is provided on the casing. The supporting member supports the conveying-member accommodating unit such that the conveying-member accommodating unit is movable in directions perpendicular to the longitudinal direction relative to the casing.
US09383716B2	Cartridge assembly and shutter assembly for image forming apparatus A cartridge assembly for an image forming apparatus, including a drum unit provided with a waste toner conveyor which conveys waste toner collected from a surface of a photosensitive drum to one side; a developing unit connected with the drum unit, configured to receive the waste toner collected from the drum unit, and having a developer discharger to discharge a developer therein to an outside; and a developer collecting unit integrally formed with the drum unit at one side of the drum unit, and configured to collect the developer discharged by the developer discharger of the developing unit, wherein the drum unit includes a toner injector which connects the waste toner conveyor, a new toner supply unit and the developing unit so that the waste toner conveyed by the waste toner conveyor and new toner supplied from the new toner supply unit are injected together into the developing unit.
US09383703B2	Line width correction and tailing suppression An image forming apparatus is provided that prevents a deteriorated print quality even if a line width correction processing and a tailing suppression processing are configured in parallel. The image forming apparatus comprises a determination unit configured to determine a tailing suppression processing specification depending on a line width correction setting for detecting an edge neighboring region of an input image subjected to a line width correction processing. The tailing suppression processing specification is used to perform a tailing suppression processing on the input image.
US09383682B1	Developing device including a first transport path and a second transport path including a plurality of flow paths and image forming apparatus A developing device includes a first transport path and a second transport path. In the first transport path, a developer containing toner and a magnetic material is transported in the axial direction of a first transport member that opposes a developer holding element by rotation of the first transport member. The second transport path includes plural flow paths that extend along the axial direction, and plural second transport members provided in the plural flow paths to transport the developer. The plural flow paths each have a length in the axial direction that is shorter than the length of the first transport path in the axial direction. Respective end portions of the first and second transport path are connected such that the developer which has flowed into the second transport path from one end of the first transport path flows into the other end of the first transport path.
US09383680B2	Developer container and image forming apparatus including the same A toner container includes a container body, a toner discharge outlet, a moveable wall, and a stirring member. The container body includes an inner circumferential section having a tubular shape extending in a first direction and an internal space. The toner discharge outlet passes through the container body. The moveable wall includes a conveying surface and an outer circumferential section in sealed contact with the inner circumferential section of the container body. The moveable wall moves in the first direction while conveying developer toward the toner discharge outlet. The stirring member stirs toner in proximity to the toner discharge outlet. A first gear that transmits driving force to the moveable wall and a second gear that transmits driving force to the stirring member are located together outside of the container body.
US09383672B2	Liquid developer and image formation method A resin in a liquid developer contains 80 mass % or more of a urethane-modified polyester resin. A component derived from a polyester resin contains a constitutional unit derived from an acid component and a constitutional unit derived from an alcohol component. A ratio of a constitutional unit derived from an aliphatic monomer occupied in the constitutional unit derived from the acid component and the constitutional unit derived from the alcohol component is not lower than 90 mass %. Relation of \|Tm1−Tm5\|≧20° C. 70° C.≦Tm1≦170° C., 60° C.≦Tm5≦120° C.) is satisfied, where Tm1 (° C.) represents a softening temperature T1/2 of toner particles measured with a flow tester under a load of 1 kg and Tm5 (° C.) represents a softening temperature T1/2 of toner particles measured with a flow tester under a load of 5 kg.
US09383670B2	Toner and method for manufacturing the same A toner includes a plurality of toner particles each having a core and a shell layer on a surface of the core. In a cross section of the toner particle analyzed by EELS, for at least 50% of a circumferential length of the core, the shell layer has one or more portions each satisfying conditions that: a ratio of INc to INs is no less than 0.0 and no greater than 0.2; and a thickness of the shell layer is at least 5 nm. Here, INs indicates an intensity of an N-K shell absorption-edge originating from nitrogen atoms in the shell layer, and INc indicates an intensity of an N-K shell absorption-edge originating from nitrogen atoms in the core. In addition, the longest length among the one or more portions of the shell layer each satisfying the conditions is at least 100 nm.
US09383669B2	Brilliant toner, developer, toner cartridge, process cartridge, and image forming apparatus Provided is a brilliant toner containing a brilliant metallic pigment of which the surface is covered with at least one kind of metal oxides selected from a group consisting of silica, alumina, and titania, wherein the brilliant toner has a dielectric loss factor of from 10×10−3 to 60×10−3.
US09383660B2	Exposure apparatus and method of manufacturing device An exposure apparatus which includes a projection optical system and exposes a substrate to radiant energy via the projection optical system, includes a temperature measuring device configured to perform measurement of a temperature of a temperature measurement portion of the projection optical system, and a controller configured to perform prediction of a change in an optical characteristic of the projection optical system based on a change in temperature measured by the temperature measuring device, and to perform processing of reduction, based on the prediction, of a change in a state of an image formed on the substrate by the projection optical system, wherein the controller is configured to perform the prediction in accordance with a second-order lag response function to the change in temperature of the temperature measurement portion.
US09383658B2	Roll-printing apparatus and roll-printing method using the same Provided are a roll printing apparatus and a roll printing method using the same. The roll printing apparatus according to the present invention comprises 1) a first cliché stage, 2) a second cliché stage, 3) a pattern transfer unit provided between the first cliché stage and the second cliché stage and comprising a roll type printed film support unit, 4) a first printing unit comprising a first printing roll moving to the pattern transfer unit on the first cliché stage, and 5) a second printing unit comprising a second printing roll moving the pattern transfer unit on the second cliché stage, in which the first cliché stage and the second cliché stage are disposed on the same line and a film substrate is comprised in the roll type printed film support unit. The roll printing apparatus according to the present invention can perform a continuous roll printing, thereby reducing a tack time and as a result, improving productivity.
US09383655B2	Lithographic apparatus and device manufacturing method An immersion lithography apparatus comprises a temperature controller configured to adjust a temperature of a projection system, a substrate and a liquid towards a common target temperature. Controlling the temperature of these elements and reducing temperature gradients may improve imaging consistency and general lithographic performance. Measures to control the temperature may include controlling the immersion liquid flow rate and liquid temperature, for example, via a feedback circuit.
US09383645B2	Pattern forming method, actinic ray-sensitive or radiation-sensitive resin composition, actinic ray-sensitive or radiation-sensitive film, manufacturing method of electronic device, and electronic device A pattern forming method including: (i) a process of forming a film using an actinic ray-sensitive or radiation-sensitive resin composition containing a Resin (P) including a non-acid-decomposable Repeating Unit (b1) represented by a following General Formula (b1) and a repeating unit including a group capable of being decomposed by acid and generating a polar group, and a Compound (B) capable of generating an acid through irradiation of actinic rays or irradiation; (ii) a process of exposing the film using actinic rays or radiation with a wavelength of equal to or less than 200 nm; and (iii) a process of developing the exposed film using a developer including an organic solvent containing a hetero atom and carbon atoms having 7 or more carbon atoms to forming a negative tone pattern.
US09383644B2	Sulfonic acid derivative compounds as photoacid generators in resist applications Novel photoacid generator compounds are provided. Photoresist compositions that include the novel photoacid generator compounds are also provided. The invention further provides methods of making and using the photoacid generator compounds and photoresist compositions disclosed herein. The compounds and compositions are useful as photoactive components in chemically amplified resist compositions for various microfabrication applications.
US09383639B2	Mask An embodiment of the present invention discloses a mask. The mask comprises: a substrate; a light transmission area on the substrate; a light shielding area on the substrate, provided with at least two light shielding layers, each of the at least two light shielding layers having a preset mask pattern and being conductive; and one or more connecting wire(s), configured to respectively electrically connect the at least two light shielding layers.
US09383631B2	Camera carrying and mounting system Embodiments of the present disclosure include a camera carrying and mounting system. The system may include a camera plate configured to mount onto a camera, a carrying structure, and a coupling mechanism coupled to the camera plate and configured to releasably engage the carrying structure to the camera plate. The camera plate may be configured to secure the camera to a camera stand with the coupling mechanism remaining coupled to the camera plate.
US09383624B2	Reflection-type optical control element A reflection-type optical control element has an optical control layer whose state is reversibly changed between a transparent state caused by hydrogenation and a reflective state caused by dehydrogenation, a catalyst layer that accelerates the hydrogenation and the dehydrogenation in the optical control layer, and an oxidation inhibition member that is arranged between the optical control layer and the catalyst layer and inhibits oxidation of the optical control layer that is caused by oxygen that permeates through the catalyst layer.
US09383619B2	Bistable electrochemical mirror The present invention relates to a switchable infrared ray-visible ray reflection electrochemical mirror having high electrochemical stability and bistability, in which a stripping phenomenon of a metal thin film can be prevented and bistability can be improved through a process of increasing electrochemical stability of a reflective film from an electrode composition and an ionic liquid electrolyte composition having various compositions. In the proposed electrochemical mirror apparatus, since the metal thin film formed by electric reduction is not stripped from a transparent electrode through a surface treatment process, a more stable apparatus can be provided, and even though a voltage is not applied to the metal thin film, the thin film is prevented from being oxidized by using an optimized ionic liquid electrolyte, thus providing the effective electrochemical mirror apparatus where the metal thin film is continuously maintained.
US09383613B2	Liquid-crystal display device Provided is a lateral-electric-field mode active matrix liquid crystal display device in which an afterimage can be improved. The width of one pixel comb electrode 109B of a plurality of pixel comb electrodes 109 is larger than each of the widths of the other pixel comb electrodes 109 and common comb electrodes 110 and is equivalent to the width of a common shield electrode 110B that covers an image signal wiring line 104 via a second insulating film. A display region is divided into two subregions by the wide pixel comb electrode 109B. In each subregion, the number of pixel comb electrodes 109 is equal to that of common comb electrodes 110. In addition, the width of the common shield electrode 110B is equivalent to that of the wide pixel comb electrode 109B, and the concentration of an electric field in the vicinity of each pixel comb electrode is reduced. Since structural symmetry is achieved, an electric potential distribution becomes symmetrical, and the asymmetry of the manners of emitting light between frames is reduced. As a result, the DC offset component of an image signal after flicker adjustment is reduced to improve an afterimage.
US09383610B2	Display panel with agglomerates formed around spacers of substrate A display panel includes a first substrate having a first alignment film, a second substrate having a second alignment film and plural spacers, a liquid crystal layer disposed between the first and second substrates, and a plurality of agglomerates positioned between the first and second alignment films and further surrounding at least one of the spacers. The spacers maintain a uniform gap between the first and second substrates. The second alignment film is disposed oppositely to the first alignment film and covers the spacers. In one embodiment, sizes of the agglomerates are distributed in a range of 0.1 μm˜2 μm.
US09383609B2	Liquid crystal display device Provided is a liquid crystal display device which sufficiently prevents a spacer from coming in contact with pixel portions of opposed substrates, and fully inhibits a light leakage from occurring. A liquid crystal display device of the present invention includes a first substrate, a second substrate, a liquid crystal layer interposed between both of the substrates, and a spacer holding a gap between the first substrate and the second substrate, the spacer being configured by laminating a first spacer and a second spacer, the first substrate including the first spacer, the second substrate including the second spacer, each of the first spacer and the second spacer being slender in a plan view of a main surface of each of the substrates, the liquid crystal display device being configured by bonding the first substrate and the second substrate, the first spacer and the second spacer intersecting with each other.
US09383605B2	Backlight unit and liquid crystal display including the same A backlight unit includes a light source portion configured to provide light to a display panel, a reflection sheet arranged on a lower part of the light source portion, a mold frame accommodating the light source portion, and a support frame which supports the mold frame and includes a bottom portion, first and second side wall portions which extend upward from both end sides of the bottom portion and face each other, a ceiling portion which extends in a horizontal direction from an upper end of the first side wall portion, and a slant portion slanted downward from an end part of the ceiling portion and having one end that comes in contact with the end part of the ceiling portion and the other end that comes in contact with an upper end of the second side wall portion.
US09383595B2	Microwave frequency component controlled by a system of shielded coplanar electrodes, and corresponding manufacturing method A microwave frequency component includes a thin layer of dielectric material arranged between an earth electrode and a control electrode controlling a microwave frequency electrical signal such that the earth electrode extends over a first face, called the lower face, of the thin layer of dielectric material, and the control electrode extends longitudinally over a second face, called the upper face, of the thin layer of dielectric material. The microwave frequency component is such that it includes a set of at least two shielded coplanar electrodes extending along the entire length of the control electrode, to each side of and at an equal distance from the control electrode.
US09383594B2	Eyewear with chroma enhancement Some embodiments provide a lens including a lens body and an optical filter configured to attenuate visible light in a plurality of spectral bands. Each of the plurality of spectral bands can include an absorptance peak with a spectral bandwidth, a maximum absorptance, and an integrated absorptance peak area within the spectral bandwidth. An attenuation factor obtained by dividing the integrated absorptance peak area within the spectral bandwidth by the spectral bandwidth of the absorptance peak can be greater than or equal to about 0.8 for the absorptance peak in each of the plurality of spectral bands.
US09383590B2	Stereoscopic eyewear with stray light management Disclosed embodiments relate to eyewear configured to reduce stray light. An exemplary embodiment of the eyewear accounts for various design factors, including the cross sectional profile of the rim, the micro topography of the rim surface, the reflectivity, the theater or room geometry, proximity of the eye to the lens, lens size, and the screen gain. An exemplary eyewear includes lenses connected to the rims of a frame, and a path may be defined through a maximum height of the outer flange portion of a rim and a maximum height of the inner flange portion of the rim section. The path may be inclined at an angle relative to an angle α relative to a longitudinal axis defined by the lenses.
US09383584B2	Video playing system A video playing system includes a support, a screen mask, and a projecting device set on the support. The support includes a pair of rotating fasteners correspondingly set at two opposite sides of the support. The screen mask is rotatably connected to the rotating fasteners and covers a part of the support. The screen mask includes a inner projecting surface. The projecting device projects video onto the inner projecting surface.
US09383579B2	Method of controlling a display component of an adaptive display system An adaptive display system includes a display component to present an image to a user, a sensor for detecting a vision characteristic of the user and generating a sensor signal representing the vision characteristic of the user; and a processor in communication with the sensor and the display component, wherein the processor receives the sensor signal, analyzes the sensor signal based upon an instruction set to determine the vision characteristic of the user, and controls a visual output of the display component based upon the vision characteristic of the user.
US09383573B2	Phase modulation device and laser microscope A phase modulation device corrects wave front aberrations generated by an optical system including an objective lens disposed on an optical path of a light flux. The phase modulation device includes a phase modulation element which includes a plurality of electrodes, and modulates the phase of the light flux in accordance with a voltage applied to each electrode, and a control circuit which controls the voltage to be applied to each electrode. The control circuit controls the voltage to be applied to each electrode in such a manner that the light flux is imparted with a phase modulation amount in accordance with a phase modulation profile having a polarity opposite to the polarity of a phase distribution to be determined according to a relational equation representing a relationship between a numerical aperture of the objective lens and a ratio between third-order spherical aberration and fifth-order spherical aberration.
US09383568B2	Objective-coupled selective plane illumination microscopy A microscope assembly includes an illumination source coupled to an optical assembly by a coupler. The optical assembly includes an objective with optics that move along an optic axis. The illumination source generates a light blade that illuminates a portion of a sample at an illumination plane. The light blade induces a fluorescent emission from the sample that is projected through the objective optics to a detector. The focal plane of the objective optics is fixed with respect to the illumination source by the coupler so that the illumination plane is coincident with the focal plane as the objective optics move along the optic axis. The objective and illumination may be rapidly scanned along the optic axis to provide rapid three-dimensional imaging while the objective and illumination may also be rapidly scanned along the optic axis to provide rapid three-dimensional imaging.
US09383566B2	Zoom image-forming optical system and microscope equipped therewith A zoom image-forming optical system used in combination with an infinity-correction objective lens, the zoom image-forming optical system including: a tube lens for condensing a luminous flux from the objective lens to form an intermediate image; and a relay lens with a zoom function for projecting the intermediate image onto an image plane. The relay lens includes a first lens group with positive power, a second lens group that belongs to a movable group with positive power, a third lens group that belongs to a movable group with positive or negative power, and a fourth lens group with negative power, in this order from the intermediate image side. The zoom image-forming optical system changes its magnifying power by moving the second lens group and the third lens group in an optical axis direction.
US09383565B2	Tube shield lens unit A tube lens unit for microscopes with achromatically corrective effect for the use with objectives that image an object to infinity and that have achromatic residual errors. The tube lens unit includes of at least two lenses with the properties: nP<1.50 and vP<71 nN<1.66 and vN<37, wherein nP and nN signify the refractive index (ne) at a wavelength of 546 nm for a positive and negative lens respectively, and vP and vN signify the Abbe number (ve) at a wavelength of 546 nm for a positive and negative lens respectively, and the beam paths are characterized by the conditions: \|δA\|<0.60 and \|δB\|<0.30, wherein δA signifies the variation of the aperture ray and δB signifies the variation of the main ray while passing through the surfaces of the lenses.
US09383556B2	Optical lens system, imaging device and electronic device An optical lens system comprises, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, and a fourth lens element. The first lens element with positive refractive power has an object-side surface being convex in a paraxial region. The second lens element with refractive power has an image-side surface being convex in a paraxial region. The third lens element with positive refractive power has an aspheric object-side surface being concave in a paraxial region and an aspheric image-side surface being convex in a paraxial region. The fourth lens element with refractive power has an aspheric object-side surface being concave in a paraxial region and an aspheric image-side surface being convex in a paraxial region. There are a total of four lens elements with refractive power in the optical lens system.
US09383549B2	Imaging system According to an embodiment, an imaging system includes an image sensor, an imaging lens, a microlens array, an irradiator, a distance information acquiring unit, and a controller. The microlens array includes multiple microlenses arranged with a predetermined pitch, the microlenses being respectively associated with pixel blocks. The irradiator emits light to project a pattern onto an object. The distance information acquiring unit acquires information on the distance in the depth direction to the object on the basis of a signal resulting from photoelectric conversion performed by the image sensor. The controller controls the irradiator so that images contained in a pattern that is reflected by the object and scaled down on the image sensor by the imaging lens and the microlenses are smaller than the arrangement pitch of images each formed on the image sensor by each microlens and larger than twice the pixel.
US09383537B2	Cassette and drop handle with flexible radius controller Cassettes for optical cables with a plurality of adapters for connecting external devices to the cassette. The cassettes may be hingedly connected to a drop handle that is configured to inhibit access to the plurality of adapters when in a stored position, and allows access when in an open position. The drop handle includes a channel configured to guide cables to at least one side of the cassette while maintaining their connection to the plurality of adapters. The cassettes may also include an opening configured to allow the cables to exit the drop handle on at least one side of the cassette. A flexible radius controller may be connected to the opening and is configured to flex when the cassette is removed from a housing.
US09383534B2	Packaging for a fiber optic component and manufacturing method thereof The present invention provides a packaging for a fiber optic component, such as an optical fiber, wherein the heating induced strain to the fiber optic component is minimized, wherein the packaging comprises a first support member having a first coefficient of thermal expansion (k1). The packaging further comprises a second support member, which is resiliently mounted to the first support member for minimizing transfer of thermal expansion induced strain of the first support member to the second support member. The second support member comprises a longitudinal groove open at least on one side of the second support member for receiving a fiber optic component, wherein the second support member has a tensile strength considerably higher than that of the fiber optic component. The second support member has a second coefficient of thermal expansion (k2) substantially smaller than the first coefficient of thermal expansion (k1), wherein the first support member is adapted to exchange heat induced by free-space radiation. The second support member is made of material, such as quartz, which is transparent to the wavelengths used in the component.
US09383522B2	Fiber bundle A fiber optic bundle including a coupler and a large matrix of fibers assembled from optical ribbons positioned very accurately in the coupler. Preferably, the coupler includes at least two plates, most preferably silicon plates, with a plurality of fiber receiving guides etched therethrough.
US09383505B2	High output LED based illuminator that replaces CCFLS for LCD backlights A LCD illuminator (20), when energized, emits light which impinges upon an input surface of a light pipe included in a LCD module (54). The LCD illuminator (20) includes a thermally-conductive housing (22) to which a thin, thermally conductive printed circuit board (“PCB”) (32) is mechanically and thermally bonded. The PCB (32) has an array of LED die (34) mounted thereon that face away from the thermally conductive housing (22). A layer of thermal interface material (56) interposed between an outer surface of the thermally conductive housing (22) and the LCD module (54) facilitates conducting heat generated by the LED die (34) out of the LCD module (54). Also disclosed is an improved LCD module (54) that includes the disclosed LCD illuminator (22).
US09383502B2	Backlight module A backlight module including a light guide plate, a light conversion layer, a light source, and a reflecting surface is provided. The light guide plate has a light emitting surface, a back surface, a first side, and a second side. The light emitting surface is opposite to the back surface, and the first side and the second side are connected between the light emitting surface and the back surface. The light conversion layer is disposed on the light emitting surface. The light source is disposed at the first side. The reflecting surface is located at the second side. An included angle between the reflecting surface and an extending direction of the light emitting surface is an acute angle. A light beam emitted by the light source enters the light guide plate through the first side, and is reflected by the reflecting surface after being transmitted through the light guide plate.
US09383498B2	Light-condensing sheet, backlight and liquid crystal display Embodiments of the invention disclose a light-condensing sheet, a backlight and a liquid crystal display. The light-condensing sheet comprises a supporter and a plurality of flat light-condensing films provided on the supporter, and refractive indexes of the plurality of light-condensing films gradually increase from bottom to top.
US09383486B2	Films for display covers and display devices comprising the same Films for display device covers and display device covers comprising the same are disclosed. In one embodiment, a display cover for coupling to a display device includes a perimeter portion comprising a first surface and a second surface. A film of polymeric material may be attached to at least one of the first surface or the second surface of the perimeter portion. The film may include a first array of prisms extending from an edge of the perimeter portion to a distance L. The first array of prisms may be offset from and positioned below a surface of the film by an offset spacing dz.
US09383483B2	Diffuse cholesteric reflector A diffuse reflector (100) uses a host layer (120) containing particles (122). The host layer (120) contains a cholesteric material that reflects a first frequency of light, and the particles (122) in the host layer (120) create separate cholesteric domains (126) that reflect light of the first frequency in different directions.
US09383481B2	Liquid crystal display The present invention relates to a liquid crystal display comprising a conductive pressure sensitive adhesive layer. The present invention may provide a liquid crystal display which may prevent malfunction of devices by static electricity generated in preparation or use procedures even without using the ITO layer conventionally formed between the upper substrate and a polarizer in a liquid crystal panel for an antistatic purpose, and has excellent physical properties such as endurance reliability under high temperature or high humidity condition and optical characteristics.
US09383477B2	Feedthrough assembly for electrically conductive winding A well-logging tool for geological formation has a borehole. A housing that is to be positioned within the borehole includes an opening. An electrically conductive winding is carried by the housing. A feedthrough assembly includes an elongate electrical conductor having opposing first and second ends and a medial portion extending therebetween. The first end is coupled to the electrically conductive winding. An integrally formed, monolithic, dielectric layer sounds the elongate electrical conductor and includes a first enlarged diameter end portion surrounding the first end of the elongate electrical conductor and is positioned within the opening. A reduced diameter portion surrounds the medial portion of the elongate electrical conductor.

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