Document	Document Title
US09660952B2	Computer readable non-transitory medium, electronic mail information output method and electronic mail information output device A computer readable, non-transitory medium storing a program that causes a computer to execute a process, the process includes: storing identification information and information of a plurality of users of an electronic mail sent to the plurality of the users in a storage unit when receiving the electronic mail; determining whether a new electronic mail has a correlation with the electronic mail sent to the plurality of the users of which identification information is stored in the storage unit when receiving the new electronic mail; outputting information reporting receipt of the new electronic mail to at least one of the users included in the addresses of the electronic mail sent to the plurality of the addresses with reference to the storage unit when it is determined that the new electronic mail has the correlation with the electronic mail sent to the plurality of the users.
US09660951B1	Content sharing based on social graphing The subject matter of this specification can be embodied in, among other things, a method that includes generating a data structure that links users based on social relationships and permits a first user to target content to other users that are linked to the first user via a social relationship.
US09660950B2	Sharing television and video programming through social networking In particular embodiments, one or more computer systems of a social-networking system determine identities of one or more users in proximity to a display device and query a social graph of the social-networking system for social content associated with the determined identities. The social graph includes nodes and edges connecting the nodes. The nodes include user nodes that are each associated with a particular user of the social-networking system. The one or more computer systems of the social-networking system identify, using the social content, recommended media content for the one or more users in proximity to the display device and provide a playlist for display on the display device. The playlist includes the recommended media content for the one or more users in proximity to the display device.
US09660942B2	Automatic buffer sizing for optimal network-on-chip design The present disclosure relates to automatic sizing of NoC channel buffers of one or more virtual channels to optimize NoC design, SoC design, and to meet defined performance objectives. The present disclosure further relates to a NoC element such as a router or a bridge having input ports associated with input virtual channels, and output ports associated with output virtual channels, wherein, aspects of the present disclosure enable sizing of any or a combination of the width of the input virtual channel(s), width of the output virtual channel(s), buffer(s) associated with input virtual channels, and buffer(s) associated with output virtual channels. In another aspect, the sizing can be performed based on one or a combination of defined performance objectives, throughputs of the input virtual channels, and throughputs of the output virtual channels, load characteristics, bandwidth characteristics of each input/output channel, among other like parameters.
US09660922B2	Network assisted rate shifting for adaptive bit rate streaming Techniques are provided for adjusting or modifying content request messages in a video streaming environment. An aggregation device is configured to receive a content request message from a client device. The content request message has a request for a first content file of a video stream of a content file type with a first bit rate. The aggregation device determines the first bit rate. The aggregation device then accesses a database that stores a plurality of content files of the content file type at a corresponding plurality of bit rates and determines all available bit rates of the content file type. Network conditions are analyzed for client devices to determine whether the content request message should be adjusted to request a second content file with a second bit rate that is lower than the first bit rate.
US09660918B1	Reducing wireless communication signaling overhead In systems and methods of reducing wireless communication signaling overhead, it is determined that communication resource request traffic from a plurality of wireless devices in communication with an access node to communicate with a communication network meets a first threshold. One of the plurality of wireless devices is selected to operate as a router wireless device based on a power storage level and an assigned modulation and coding scheme of each of the plurality of wireless devices. At least one of the unselected wireless devices is instructed to communicate with the communication network via the selected router wireless device.
US09660915B2	Congestion control for tunneled real-time communications A system performs congestion control functionality for real-time communications (“RTC”). The system establishes a tunnel by a tunneling server with a tunneling client of a user equipment (“UE”). The system receives a request from the UE to enable the congestion control functionality for an inner socket of the tunnel. The system sends a response back to the UE to indicate that the congestion control functionality is enabled for the inner socket. The system then monitors congestion conditions at an outer transport layer of the tunnel and executes the congestion control functionality at an inner transport layer of the tunnel based on the congestion conditions at the outer transport layer of the tunnel.
US09660912B2	Control of packet transfer through a multipath session comprising a single congestion window A method for controlling a packet transfer through a multipath session is disclosed. The method comprises a number of n paths linking a first endpoint to a second endpoint, n being an integer greater or equal to 2, i being an integer and 1≦i≦n; each path Pi being defined by a couple of addresses of a communication interface of the first and second endpoint; the first endpoint being configured for sending the packet to the second endpoint through anyone of the paths; the second endpoint being configured for sending an acknowledgment message through anyone of the paths when the second endpoint received a packet. According to the invention, the method involves, at the first endpoint and at a time t, steps of: assessing a load distribution L through the path Pi based on evaluations of a round-trip-time RTT over the path Pi for every i between 1 and n; evaluating a current available load distribution R from the data load distribution L, from an aggregated size of packets D currently assigned to be transmitted on the path Pi for every i between 1 and N, and from the aggregated size of packets D currently assigned to be transmitted on any of the paths; selecting a path Pi among the from the current available load distribution R; sending the packet on the selected path such that the aggregated size of packets D to transmit through the selected path Pi is lower than a congestion window cwnd whose value is evaluated globally by the first endpoint for the multipath session. A device for controlling a transfer of a packet through a multipath session implementing the method is further disclosed.
US09660908B2	Method and apparatus for processing UDP data packets A method and apparatus for processing a plurality of data packets. A data packet is received. A determination is made as to whether a portion of the data packet follows a selected digital recorder standard protocol based on a header of the data packet. Raw data in the data packet is converted into human-readable information in response to a determination that the portion of the data packet follows the selected digital recorder standard protocol.
US09660903B2	Method and system for inserting an openflow flow entry into a flow table using openflow protocol A method for inserting an OpenFlow flow entry into a flow table is disclosed. In the embodiment, the method involves receiving a flow mod message at an OpenFlow-enabled switch, the flow mod message including a cookie field, decoding an OpenFlow flow entry from the flow mod message, identifying a flow table from the cookie field, and inserting the decoded flow entry into the flow table.
US09660900B2	Architected data transfer Techniques for architected data transfer are described. A controller maintains a network information database representing overarching knowledge of the network, such as the underlying communication infrastructure, resource consumption limits, and segment locations. The controller uses the information stored in the network information database to direct transmitters to transfer data segments to receivers in a manner that ensures relatively predictable resource consumption. In one approach, the controller receives a request to transfer data to a receiver. The controller, based on the information contained in the network information database, computes an optimal set of transmitters to participate in the transfer. The controller sends each transmitter in the optimal set an instruction assigning that transmitter to transfer one or more segments of the data to the receiver. Each transmitter, upon receiving the instructions, sends their respectively assigned data segments to the receiver.
US09660897B1	BGP link-state extensions for segment routing Mechanisms are described by which link state “path” information can be collected from networks and shared with external components, such as routers or centralized controllers or path computation elements, using an exterior gateway protocol, such as the Border Gateway Protocol. That is, the link state information for multiple interior gateway protocol (IGP) routing domains is shared between external components using the exterior gateway protocol, such as BGP. As such, the techniques described herein allow link state information to be shared across different routing domains, such as routing and reachability information shared between different autonomous systems. The extensions described herein allow an exterior gateway protocol to be used to signal explicit path segments within IPG routing domains so as to set up an overall path that spans the multiple IPG routing domains.
US09660895B1	Geolocation routing and simulation of network conditions Methods and systems for geolocation routing and simulation of network conditions are disclosed. A network traffic profile is determined for a client device. A network access server selects an endpoint server based on the location of the selected endpoint server. The network access server routes traffic from the client device to an external server through the selected endpoint server. The network traffic from the client device to the external server appears to originate from a network address of the selected endpoint server. Network conditions for the network traffic are simulated based on the network traffic profile.
US09660889B2	Tracking data usage under a schematized data plan Embodiments provide a schema for representing data usage plans and data usage statistics. The data usage plan describes threshold values associated with network connections of computing devices of the user. A web service dynamically generates data usage statistics for the computing devices to represent data consumed by the computing devices under the data usage plan. The schema is updated with the data usage statistics and distributed to the computing devices for presentation to the user.
US09660879B1	Flow deduplication across a cluster of network monitoring devices Embodiments are directed to monitoring flows of packets over a network. If a network monitoring computer (NMC) in a cluster of NMCs observes a new network flow, the NMC may perform a variety of actions to determine the NMC that is responsible for monitoring the new network flow. Network traffic associated with the new network flow may be buffered in a non-transitory processor readable media. The new network flow may be registered with the plurality of NMCs, providing an identifier that corresponds to one NMC. Registering may include, assigning the NMC a responsibility to monitor the new network flow. If the identifier corresponds to the NMC that observed the new network flow, the network traffic associated with the new network flow is processed using that NMC. If the identifier corresponds to another NMC, the buffered network traffic is forwarded to the other NMC.
US09660873B2	Method and apparatus for providing remote access service A remote access service is provided by receiving remote access transport agent (RATA) capability information of a home remote access server (RAS) and a remote RAS from the home RAS and the remote RAS, respectively, generating a RATA profile based on the RATA capability information, supported by the home RAS and the remote RAS, and transmitting the generated RATA profile to the home RAS and the remote RAS, respectively.
US09660872B2	Scalable performance management system A performance management system, having a peer-to-peer architecture, enables performance transparency in computer information systems, providing granular performance data and scalability. Peer appliances in a computer information system collect performance data. When a user requests a performance report, an originating peer appliance may determine which peer appliances contain the data required for the report and what data processing, if any, is required. The originating peer appliance may send requests indicating what data and what data manipulation processing is required. Each of the receiving peer appliances (including the originating peer appliance) may perform its own portion of the data processing. The originating peer appliance may receive resultant data from the peer appliances (including itself) and combine the resultant data into the requested report for the user. The performance management system distributes significant data processing across the peer appliances, avoids bottlenecks, and increases system scalability.
US09660860B1	Path computation delay timer in multi-protocol label switched networks In general, techniques are described for a path computation delay timer for multi-protocol label switched networks. As an example, an ingress network device configured to act as an ingress for a label switched path (LSP) may perform the techniques. The ingress network device comprises an interface and a processor. The interface may receive a message indicating an error along the LSP. The processor may delay an operation performed to configure a replacement LSP to be used in place of the LSP in order to provide time during which a cause of the error along the LSP is able to be determined. When the cause of the error is determined to be a failure of a network device supporting operation of the LSP, the processor may further perform the operation to configure the replacement LSP with the ingress network device such that the replacement LSP avoids the failed network device.
US09660853B2	Radio communication method and a base station and user terminal thereof A wireless communication method for transmitting data signals of first and second users using first and second subcarrier groups, respectively, and transmitting pilot signals of the first and second users by multiplexing the pilot signals to the data signals, including allocating the pilot signals of the first and second users to different frequencies, where each of the pilot signals is generated based on Zadoff-Chu sequence; and mapping subcarrier components of the pilot signals so that one or more subcarrier components of higher frequencies and one or more subcarrier components of lower frequencies in the transmission band become identical, in regard to the pilot signals of each of the first and second users.
US09660850B2	Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals A method and an apparatus for transmitting broadcast signals thereof are disclosed. The apparatus for transmitting broadcast signals comprises an encoder for encoding service data, a mapper for mapping the encoded service data into a plurality of OFDM (Orthogonal Frequency Division Multiplex) symbols to build at least one signal frame, a frequency interleaver for frequency interleaving data in the at least one signal frame by using a different interleaving-seed which is used for every OFDM symbol pair comprised of two sequential OFDM symbols, a modulator for modulating the frequency interleaved data by an OFDM scheme and a transmitter for transmitting the broadcast signals having the modulated data.
US09660848B2	Methods and structures to generate on/off keyed carrier signals for signal isolators An oscillator for a signal isolator system includes a capacitor and an inductor connected in parallel, two pairs of cross-coupled switches and a control switch. The capacitor, the inductor and the cross-coupled switches form an oscillator. The control switch controls operation of the oscillator between an ON state and an OFF state in response to a data signal to be communicated across an isolation barrier. The inductor may be formed from a winding of an isolation transformer, which reduces component count as compared to a system that provides a separate inductor. Other embodiments may include a current-supplying kickstart circuit and a shorting transistor that can speed transition between the ON and OFF states.
US09660839B2	Transmission apparatus and method using pre-distortion A transmission apparatus and a corresponding transmission method for transmitting data within a multi-carrier transmission system comprising two or more transmission apparatuses that are configured to transmit the same data. To avoid destructive interferences a transmission apparatus comprises a signal input configured to receive multi-carrier signals carrying data to be transmitted, a distortion unit configured to distort the multi-carrier signals by use of a distortion function including a phase parameter for differently modulating the phase of the multi-carrier signals wherein the distortion function is different from distortion functions used by other transmission apparatuses, whose coverage areas overlap with the coverage area of the present transmission apparatus, by using a phase parameter that is different from the phase parameter used by the other transmission apparatuses, and a transmission unit configured to transmit the distorted multi-carrier signals as a transmission signal.
US09660834B2	Bursting cloud resources to affect state change performance Systems, methods, and computer program products to perform an operation, by, responsive to a request specifying to transition a state of a virtual machine in a cloud computing environment from a first state to a second state, allocating one or more system resources to the virtual machine during the transition from the first state to the second state, and, upon completion of the transition, releasing a portion of the allocated one or more system resources to a pool of available resources, so that the virtual machine is left with a remaining portion of the allocated one or more resources sufficient for operation during the second state.
US09660827B2	System and method of switching from multicast to unicast calls Described is a communication device which includes a receiver receiving a multicast communication including audio data and identification data identifying an initiator of the multicast communication, a memory, an audio output, a processor processing the multicast communication, sending the processed audio data to the audio output to be played to a user, sending the identification data to the memory to be stored and initiating a unicast communication with the initiator based on the identification data and a transmitter transmitting the unicast communication to the initiator.
US09660825B2	System and method for multi-source multicasting in content-centric networks One embodiment of the present invention provides a system for updating routing information associated with a multicast group in an information-centric network (ICN). During operation, a first node in the ICN receives an update message for the multicast group from a neighbor node. The multicast group includes a root anchor node and a number of anchor nodes with the root anchor node having a smaller name than the anchor nodes. The update message specifies a prefix associated with the multicast group and the root anchor node of the multicast group. The system selects, based on topology information stored on the first node, from neighbors of the first node one or more next-hop neighbors that meet a notification condition, and forwards the update message to the one or more next-hop neighbors.
US09660822B1	Revealing connections for persons in a social graph An on-line system utilizing a social graph allows users to establish an account with the system and establish connections to nodes in the system. The social graph uses system-provided nodes that are created and maintained by the system, so that users cannot edit the system-provided nodes. The system aggregates and analyzes the social graph to present information in ways useful to its users. For example, the system reveals connections between persons in the system, with a corresponding strength of each connection.
US09660812B2	Providing independent verification of information in a public forum A social networking site host includes, in a user's profile, information that has been attested to and verified by both the user and an independent verifier. The independent verifier is an accepted authority with direct knowledge of the information. Both the user and verifier attest to the information by digitally signing the information and including the digital signature with the information. The host or visitors to the social networking site can authenticate the information by using both digital signatures. By authenticating the information, visitors and users viewing information on the social networking site can assume that the information is trusted and accurate.
US09660811B2	Apparatus and method for protecting message data Disclosed is a method for protecting message data. In the method, the message data is padded with padding bits generated based on a deterministic function performed on the message data. The padded message data is compressed to generate compressed data. A length of the compressed data is dependent on the padding bits. The compressed data is encrypted to generate encrypted message data.
US09660805B2	Methods and devices for securing keys when key-management processes are subverted by an adversary The present invention discloses methods and devices for securing keys when key-management processes are subverted by an adversary. Methods include the steps of: upon receiving a creation request in the computing-environment, creating a secure key in at least one location in a computing environment by repetitively computing respective secure-key contributions: in at least one location; and in a set of N computing resources in the computing environment, wherein N is a non-negative integer; and applying the respective secure-key contributions to change a secure-key value, wherein: the respective secure-key contributions cannot be omitted or modified by at least one location; and the secure key is never revealed to the computing resources; thereby enabling the computing resources in the computing environment to ensure that the secure key is truly random; wherein at least one location is a region of memory located in a computing resource operationally connected to the computing-environment.
US09660795B2	Start-stop synchronous type serial data acquisition device and start-stop synchronous type serial data acquisition method A start-stop synchronous type serial data acquisition device includes a counter to which a clock signal that defines an acquisition timing of serial data including a start bit is input, and that counts a number of cycles of a clock signal; and a changing section that, according to a transition of the clock signal when the start bit has been input, changes a maximum count value that is counted by the counter, the maximum count value corresponding to the start bit.
US09660790B2	Method for managing HF frequencies in broadband use A method for managing the HF frequencies in a broadband communication network, comprises the following steps: determining the range of passing frequencies for a user for a given link and SLA service; establishing the set of authorized frequencies S″ in the transmission range of the user with the different power and modulation configurations for each frequency; analyzing the received spectrum in order to determine the frequency or frequencies already used and deciding, on the basis of their associated usage type, whether they must be excluded; for each possible frequency fl of the set S′″, determining the necessary power , i=1 . . . N, j=1 . . . m for each of the m possible rate/waveform configurations, taking into account the power limit on each frequency fl; allocating the frequencies fl of the set S′″ to the different users, their modulation and their power, by taking account of multi-carrier constraints.
US09660786B2	Transmission of information in a wireless communication system Methods, devices, and systems for the transmission of information in a wireless communication system are disclosed. In one embodiment, a method for the transmission of information in a wireless communication system comprises receiving a downlink message, wherein the downlink message includes a first control channel element; determining a first index using the location of the first control channel element; determining a second index; determining a first orthogonal resource using the first index; determining a second orthogonal resource using the second index; spreading an uplink message using the first orthogonal resource to form a first spread signal; spreading the uplink message using a second orthogonal resource to form a second spread signal; transmitting the first spread signal using a first antenna; and transmitting the second spread signal using a second antenna.
US09660769B2	Scalable service in a wireless communication system A method for providing scalable service in a wireless communication system is disclosed. In this method, the transmitting side device performs initial transmission of base layer signals to a user equipment (UE) based on a HARQ (Hybrid Automatic Repeat Request) scheme, and performs transmission of enhancement layer signals to the UE after finishing the initial transmission of the base layer signals. The base layer signals and the enhancement layer signals are for one scalable service. The base layer signals can be independently used at the UE without the enhancement layer signals, while the enhancement layer signals cannot be used at the UE without the base layer signals. The transmitting side device further performs retransmission of the base layer signals determined to be retransmitted based on the HARQ scheme while performing the initial transmission of the enhancement layer signals.
US09660767B2	Communication control apparatus, communication control method, and computer-readable non-transitory recording medium A communication control apparatus is provided for controlling recovery of data loss during data communication from a first communication device to a second communication device, which includes an obtaining section configured to obtain a temporal change in a communication load between the first communication device and the second communication device. The communication control apparatus also includes a change section configured to dynamically change a permitted time and an interval between transmissions on the basis of the temporal change in the communication load, the permitted time being a time that is permitted to be used by the second communication device for recovery of data loss and the interval between transmissions being an interval between transmissions of a retransmission request message. The communication control apparatus further includes a retransmission control section configured to control transmission of the retransmission request message in accordance with the interval between transmissions.
US09660764B2	Broadcast transmitter and method of processing broadcast service data for transmission A method is provided for processing broadcast data in a broadcast transmitter. Broadcast service data is randomized. The randomized broadcast service data is first-encoded to add parity data to the randomized broadcast service data. The first-encoded broadcast service data is second-encoded. The second-encoded broadcast service data is first interleaved. The first-interleaved broadcast service data is second-interleaved. Signaling data is encoded for signaling the broadcast service data. The encoded signaling data is third-interleaved. The third-interleaved signaling data is fourth interleaved. A frame is transmitted that is divided into a data region including the second-interleaved broadcast service data, a first signaling region including the fourth-interleaved signaling data and a second signaling region that includes at least one symbol that is used for synchronization and channel estimation. The frame includes known data. The encoded signaling data includes information for identifying the code rate and information related to the known data.
US09660762B2	System and method for transmitting optical signal over multiple channels A method for transmitting optical signals over multiple channels is provided, the method including: coding tributaries of data to be transmitted; firstly rearranging the coded tributaries, thereby scrambling the data among the coded tributaries and outputting rearranged coded tributaries; modulating optical carriers with data from one of the coded tributaries, creating modulated optical signals; transmitting the modulated optical signals; spatially multiplexing the modulated optical signals into spatially multiplexed channels; converting the spatially multiplexed optical signals into individual optical signals; receiving the individual optical signals through the multiple channels; demodulating the individual optical signals into electrical signals; decoding the electrical signals into decoded tributaries; and secondly rearranging the decoded of tributaries to recover the tributaries of data before step, wherein, a number of tributaries of data is equal to or more than two and is less than or equal to a number of the multiple channels.
US09660760B2	Apparatus, system and method of communicating a wireless transmission according to a physical layer scheme Some demonstrative embodiments include apparatuses, devices, systems and methods of communicating a wireless transmission according to a Physical Layer scheme. For example, a wireless station may be configured to generate a frame including a header and a data portion, the header including a modulation and coding scheme (MCS) value of an Orthogonal Frequency Divisional Multiplexing (OFDM) Physical layer (PHY) scheme or a Low Power Single Carrier (LPSC) PHY scheme; modulate and encode the header according to a Single Carrier (SC) PHY scheme; modulate and encode the data portion according to the OFDM PHY scheme or the LPSC PHY scheme; and process transmission of the frame.
US09660759B2	Adaptive cyclic channel coding for orthogonal frequency division multiplexed (OFDM) systems A method and apparatus for an orthogonal frequency division multiplexed (OFDM) communication system for communication in the presence of cyclostationary noise is provided. A receiver receives from a medium a channel measurement packet of a communication channel. The channel measurement packet has a measured transmission characteristic. The measured transmission characteristic of the received channel measurement packet is compared to a defined transmission characteristic to provide a comparison. A modulation coding scheme (MCS) map referenced to a phase of a cyclostationary noise period of the medium is generated based upon the comparison. The MCS map is sent to a transmitter via the medium. Signals including packets that have been mapped to subcarriers based on the MCS map are received from the medium. Subcarriers of the signals received from the medium are demapped using the MCS map referenced to the phase of the cyclostationary noise period of the medium.
US09660756B2	Method for split spectrum signalling in an optical network The example embodiments presented herein are directed towards an Optical Network Element, ONE, node (14), and corresponding method therein, for establishing multiple spectral routing in an optical transport network. The establishment of the multiple spectral routing features the use of a Split-Spectrum Label, SSL, (11) which comprises multiple definitions for spectral slots, where each definition has an absolute starting and an absolute ending frequency allocation.
US09660750B2	Radio commnication device and response signal diffusion method Provided is a radio communication device which can suppress inter-code interference between an ACK/NACK signal and a CQI signal which are code-multiplexed. A diffusion unit (214) diffuses the ACK/NACK signal inputted from a judgment unit (208) by using a ZC sequence. A diffusion unit (219) diffuses the CQI signal by using a cyclic shift ZC sequence. By using a Walsh sequence, a diffusion unit (216) further diffuses the ACK/NACK signal which has been diffused by using the ZC sequence. A control unit (209) controls the diffusion unit (214), the diffusion unit (216), and the diffusion unit (219) so that the minimum value of the difference between the CQI signals from a plurality of mobile stations and a cyclic shift amount of the ACK/NACK signal is not smaller than the minimum value of the difference between the cyclic shift amounts of the ACK/NACK signals from the plurality of mobile stations.
US09660743B1	Channel estimation by searching over channel response candidates having dominant components A method in a receiver includes receiving a signal that traversed a multipath channel having a channel response, so as to produce a received sequence of samples that are indicative of the channel response. Using a predefined similarity measure, multiple metrics between the received sequence of samples and multiple respective candidate sequences of samples are calculated by the receiver. Each candidate sequence includes a combination of one or more dominant signal components having respective sample delays, and each candidate sequence corresponds to a channel multipath candidate that has one or more channel paths at the respective sample delays. The channel response is estimated by the receiver, by selecting the candidate sequence that best matches the received sequence, the selecting being based on the similarity measure.
US09660739B2	System and methods of testing adaptive antennas The technology disclosed relates to systems and methods for testing adaptive antennas via a multi-probe anechoic chamber, which includes the emulation of real world conditions of a radio frequency (RF) signal reaching a device-under-test (DUT). The technology disclosed can be applied to test and evaluate a range of changed conditions. In one case, beamforming scenarios use separate spatial desired and interference signals, and the results can be compared to uniform interference. Based on performance for a segment of a test profile, the segment can be modified or expanded: shortened, repeated, or repeated with a modification—to fully evaluate the aspect being tested. Also, a dynamic profile that is utilized to evaluate a first device can be saved and repeated as a fixed profile for further testing of a first or second device.
US09660734B2	Method, apparatus, and system to mitigate broadband radio frequency interference A radio frequency interference (RFI) mitigation module is provided that is coupled to a high speed data link. The RFI mitigation module is to reduce RFI caused by the high speed data link. The RFI mitigation module includes at least one resister, at least one inductor, and at least one capacitor.
US09660733B2	Signal processing apparatus, signal processing method, and signal processing system A signal processing apparatus includes: a filter; and a filter control circuit, wherein the filter control circuit is configured to: detect a power of signals output from the filter; determine one of a plurality of numerical ranges to which the power belongs; update a filter coefficient of the filter according to a determination result; count a number of the signals having the power of a first value or more; set an invalid area which becomes a target not to be determined for each of one or more boundaries between the plurality of numerical ranges when the number of the signals becomes a second value or more; and control a width of the invalid area based on the number of signals.
US09660728B2	Communication system for analog and digital communication services A first and a second interconnection unit comprising a respective first and a second communication interface, a first and a second electro-optical converter, and a multiplexing unit, is disclosed. The first interconnection unit is adapted to receive electrically transmitted analog and digital information, convert said information into electrically transmitted information, and to multiplex the information so as to enable transmission over a bidirectional link. The second interconnection unit is adapted to receive and de-multiplex the transmitted analog and digital information, to convert it back into electrically transmitted analog and digital information, and to output said information. A system comprising the first and second interconnection units is also disclosed. The system is adapted for supplying both analog services and digital services with communication information over the bidirectional link.
US09660721B2	Optical detector and amplifier for RF-detection having a position dependent capacitor with a displaceable membrane An optical detector for detecting radio frequency (RF) signals, the optical detector comprising a light source and a photodetector, and an electrical circuit comprising a position dependent capacitor and a bias voltage source adapted for providing a bias voltage for biasing the position dependent capacitor, the position dependent capacitor comprising an electrode and a membrane being displaceable in reaction to RF signals incident on the membrane, the membrane being metallized, has a thickness of less than 1 μm and a quality factor, Qm, of at least 20,000, and the distance between the membrane and the electrode being less than 10 μm.
US09660711B2	Communications terminal, and a method for selecting a transmit antenna for a transmission to a radio communications network A communications terminal may include: a plurality of antennas; and a selection circuit configured to select at least one antenna of the plurality of antennas as a transmit antenna for a transmission to a radio communications network, wherein a selection of the transmit antenna may be based on a selection criterion.
US09660710B2	Identifying coverage holes using inter-rat handover measurements Embodiments of systems and techniques for identifying coverage holes in a radio access technology (RAT) are described. In some embodiments, a network management (NM) apparatus may receive a first report, including one or more measurements taken by a first user equipment (UE), in response to an event related to a handover of the first UE between a first radio access technology (RAT) and a second RAT different from the first RAT. The NM apparatus may receive a second report including one or more measurements taken by a second UE in response to an event related to a handover of the second UE between the first RAT and a third RAT different from the first RAT. The NM apparatus may identify a hole in a coverage area of the first RAT based at least in part on the first and second reports. Other embodiments may be described and claimed.
US09660707B2	Precoding method, base station and user equipment Embodiments of the present disclosure provide a precoding method, a base station and a user equipment. The precoding method comprises: a base station acquires predetermined parameter(s) of at least one user equipment; calculates the acquired predetermined parameter(s) to obtain a calculation performance index; selects a target precoding solution according to the calculation performance index; precodes data information of all the user equipment(s) according to the target precoding solution; if the target precoding solution is a nonlinear precoding solution, sends the data information and indication signaling indicating information of the nonlinear precoding solution to each user equipment; and the user equipment receives the data information and the indication signaling which are sent by the base station; selects a receiver according to a receiver type obtained according to the indication signaling; and detects the received data information using the selected receiver.
US09660706B1	Increasing MIMO order to help offset reduction in quantity of serving carriers When a base station encounters a trigger to reduce the number of carriers on which the base station serves a wireless commination device (WCD), the base station will responsively reduce the number of carriers but will also responsively increase the number of multiple-input multiple-output (MIMO) layers on which the base station serves the WCD, to help offset for the reduction in number of serving carriers.
US09660697B2	Electrical installation with improved gateway module A gateway module for an electrical power grid, the gateway module configured to receive a power signal including a modulated component for conveying information from an electrical module producing electricity, and to process the power signal to provide a compatible signal to the electrical power grid. The gateway module includes a main unit including a control circuit controlling an interface to manage information from the modulated component of the power signal and a filtering circuit for filtering the modulated component.
US09660690B2	Optimized data converter design using mixed semiconductor technology for flexible radio communication systems A cellular radio architecture that includes a receiver module having a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The architecture further includes a transmitter module having a transmitter delta-sigma modulator for converting digital data bits to analog transmit signals. Portions of the receiver and transmitter modules are fabricated with silicon germanium (SiGe) technologies and portions of the receiver and transmitter modules are fabricated with CMOS technologies.
US09660689B2	Multiple radio frequency (RF) systems using a common radio frequency port without an RF switch Methods and systems are disclosed for changing between multiple radio frequency (RF) systems. The method comprising transmitting, by a first radio frequency (RF) transmitter of a first RF system, a first RF signal from an antenna, receiving, by a first RF receiver of the first RF system, a second RF signal from the antenna, and receiving, by a second RF receiver of a second RF system, the second RF signal from the antenna, wherein a first RF port of the first RF system and a second RF port of the second RF system are both connected to a common RF port of the antenna, and wherein the first and second RF systems operate with overlapping frequency bands.
US09660673B2	Apparatus and method for canceling inter-modulation products The present disclosure provides an apparatus and a method for canceling inter-modulation (IM) products in a transceiver. The apparatus includes: a pre-distortion circuit configured to estimate a first IM product caused by a transmission signal and pre-distort the transmission signal to cancel the first IM product; an IM product calculator configured to calculate a second IM product caused by the transmission signal in a received signal based on the first IM product; and a subtractor configured to subtract the second IM product from the received signal.
US09660665B2	Delta sigma modulator with dynamic error cancellation The disclosure provides a delta sigma modulator that includes a first input port and a second input port. These ports receive a differential input signal. A DAC is coupled to the first input port and the second input port, and receives a differential feedback signal and a plurality of selection signals. A loop filter generates a differential filtered signal in response to a differential error signal. The differential error signal is proportional to a difference in the differential input signal and the differential feedback signal. A quantizer generates a quantized output signal in response to the differential filtered signal. A modified DWA block coupled between the quantizer and the DAC, generates the plurality of selection signals in response to a chop clock, a regular clock, the quantized output signal and a plurality of selection index signals. A selection index signal is dependent on previously generated plurality of selection signals.
US09660660B1	Analog to digital converter with high precision offset calibrated integrating comparators An analog-to-digital converter includes a plurality of slave sampler multiplexers responsive to outputs of a master sampler that receives analog signals and whose output ports connect to integrating threshold comparators having capacitive digital-to-analog conversion offset adjustments for forming an analog-to-thermometer code conversion. A calibration state machine receives outputs of each of the integrating threshold comparators to control the capacitive digital-to-analog conversion offset adjustment of every integrating threshold comparator and to control a calibration digital-to analog converter. A thermometer code to binary code logic decoder receives outputs of each of the integrating threshold comparators and outputs digital samples.
US09660656B2	Delay compensation Methods and circuits for delay compensation are provided. A data clock may be generated from a peripheral clock. Sample data may be provided in a data signal on a bus in response to an edge of the data clock, where the edge of the data clock is triggered by an initial edge of the peripheral clock. A delay of the data clock relative to the peripheral clock may be selected based on a time difference between the initial edge of the peripheral clock and a time at which the sample data is detected on the bus. A delayed data clock having the selected delay relative to the peripheral clock may be generated. Requested data may be provided on the bus in response to an edge of the delayed data clock.
US09660653B1	Techniques for reducing skew between clock signals A skew reduction circuit includes a first delay circuit that delays a first clock signal to generate a second clock signal and a second delay circuit that delays a third clock signal to generate a fourth clock signal. The skew reduction circuit also includes a time-to-digital converter circuit that measures a skew between the second and fourth clock signals to generate a measurement of the skew between the second and fourth clock signals. The skew reduction circuit adjusts a delay of one of the first or second delay circuits to reduce the skew between the second and fourth clock signals based on the measurement of the skew.
US09660628B2	Resistor controlled timer circuit with gain ranging A timer circuit is provided comprising: a resistor; a programmable gain circuit coupled to amplify the reference level based upon a resistor and a selected gain; a detection circuit coupled to identify the amplified reference level based upon a resistor; a selection circuit configured to select the gain based at least in part upon the identified amplified reference level based upon a resistor; a comparator circuit configured to transition between providing a signal having a first value and providing a signal having a second value based at least in part upon comparisons of a reactive circuit element excitation level with the amplified reference level based upon a resistor and with a second reference level; and reactive circuit element excitation circuit configured to reverse excitation of the reactive circuit element in response to the comparator circuit transitioning between providing the signal having the first value and providing the signal having the second value.
US09660625B1	Continuously tunable delay line An apparatus includes a first conductive path comprising a first set of inductive elements connected in series, a second conductive path comprising a second set of inductive elements connected in series, each inductive element of the second set of inductive elements inductively coupled to, and having a mutual capacitance with, a corresponding inductive element of the first set of inductive elements. In some embodiments, the apparatus further includes a first amplifier having an amplifier input and an amplifier output, the amplifier output electrically connected to a proximal end of the first conductive path or the second conductive path. The described apparatus delays a signal according to the gain of the input amplifier. A method that uses the described apparatus is also disclosed herein.
US09660620B1	Dual-edge trigger clock gater Techniques are disclosed relating to dual-edge triggered clock gater circuitry. In some embodiments, an apparatus includes dual-edge triggered clock gater circuitry configured to generate an output signal based on an input clock signal and a control signal that indicates whether to gate the input clock signal. In some embodiments, the clock gater circuitry includes first and second storage elements. In some embodiments, the clock gater circuitry includes multiplexer circuitry that selects between outputs of the first and second storage elements to generate the output signal. In some embodiments, the clock gater circuitry includes a third storage element configured to store an indication of which of the first and second storage elements stores a first digital value and which stores an inverse of the first digital value when not gating. In some embodiments, the clock gater circuitry includes a buffering element configured, when gating, to copy data stored in one of the first and second storage elements to the other of the first and second storage elements.
US09660617B2	Semiconductor apparatus A semiconductor apparatus includes a pipe input/output signal generation block configured to generate a plurality of pipe input signals and a plurality of pipe output signals according to a pipe enable signal, and be initialized according to an error detection signal; a pipe latch group including a plurality of pipe latches, each of the plurality of pipe latches being configured to receive and store an input signal according to a corresponding pipe input signal and output a stored signal as an output signal according to a corresponding pipe output signal; and an error detection block configured to generate the error detection signal according to a pipe end signal, the pipe enable signal, the plurality of pipe input signals and the plurality of pipe output signals.
US09660615B2	Flip-flop devices with clock sharing A flip-flop device is provided. The flip-flop device includes a first flip-flop and a clock controller. The first flip-flop receives a first clock signal and a second clock signal for operation. The clock controller receives a clock source signal and generates the first clock signal and the second clock signal according to the clock source signal. Each of the first clock signal and the second clock signal switches between a first voltage level and a second voltage level. For each of the first clock signal and the second clock signal, a period of the first voltage level is shorter than a period of the second voltage level. The period of the first voltage level of the first clock signal and the period of the first voltage level of the second clock signal are non-overlapping.
US09660613B2	Impedance-matching network using BJT switches in variable-reactance circuits This disclosure describes systems, methods, and apparatuses for impedance-matching radio frequency power transmitted from a radio frequency generator to a plasma load in a semiconductor processing chamber. Impedance-matching can be performed via a match network having a variable-reactance circuit. The variable-reactance circuit can comprise one or more reactive elements all connected to a first terminal and selectively shorted to a second terminal via a switch. The switch can comprise a bipolar junction transistor (BJT) or insulated gate bipolar transistor (IGBT) controlled via bias circuitry. In an on-state, the BJT base-emitter junction is forward biased, and AC is conducted between a collector terminal and a base terminal. Thus, AC passes through the BJT primarily from collector to base rather than from collector to emitter. Furthermore, the classic match network topology used with vacuum variable capacitors can be modified such that voltages do not overload the BJT's in the modified topology.
US09660603B2	Sloped termination in molybdenum layers and method of fabricating A method of fabricating a sloped termination of a molybdenum layer includes providing the molybdenum layer and applying a photo resist material to the molybdenum layer. The photo resist material is exposed under a defocus condition to generate a resist mask having an edge portion. The molybdenum layer is etched at least at the edge portion of the resist mask to result in a sloped termination of the molybdenum layer.
US09660596B2	Audio transducer stabilization system and method System and method for audio transducer stabilization comprising providing a sound generation panel for transmission of audio sound waves in response to a plurality of force inputs received from three or more audio transducers, providing a mounting frame for coupling to the sound generation panel, the mounting frame having three or more predefined locations for receiving audio transducers, placing the three or more audio transducers in the predefined locations, the predefined locations optimized to reduce a plurality of force moments when the audio transducers are driven using an input drive signal, connecting a coupler ring on each of the audio transducers placed in the predefined locations on the mounting frame to an outer surface of the sound generation panel, and driving each of the audio transducers using the input drive signal from an audio amplifier.
US09660594B2	Resonating filter and method thereof In general the embodiments described herein can provide alternating-current (AC) resonating filters. These resonating filters comprise a transmission line, a first resonator, and a second resonator. The first resonator is configured to block AC signals in a first frequency range, while the second resonator is configured to block AC signals in a second frequency range, where the second frequency range is higher than the first frequency range. The transmission line has a first node coupled to an AC source, and the first resonator is coupled to the transmission line a first distance from the first node, and the second resonator is coupled to the transmission line a second distance from the first node, where the second distance is greater than the first distance. When so configured the resonating filter can effectively block signals in multiple selected frequency bandwidths.
US09660592B2	Psuedo resistor circuit and charge amplifier A pseudo resistor circuit and a charge amplifier include a first field effect transistor; a second field effect transistor having electrical characteristics matched with electrical characteristics of the first field effect transistor; and a voltage dividing circuit with terminal of a reference resistor electrically connected to a source terminal of the second field effect transistor. Further, a first operational amplifier with an output terminal is connected to a gate terminal of the first field effect transistor and a gate terminal of the second field effect transistor and in which midpoint voltage of the voltage dividing circuit is input into either an inverting or non-inverting input terminal and reference voltage is input into the other of the inverting and non-inverting input terminal. Furthermore, a second operational amplifier supplies voltage resulting from inversion and amplification of drain voltage of the first field effect transistor into the other terminal of the resistor.
US09660583B2	Signal generator and associated phase shift apparatus and method It is presented a signal generator for providing a first signal on a first output and a second signal on a second output wherein the first signal and the second signal are provided with phase shift relative to each other. The signal generator comprises: a control loop controller; a comparator; a phase shifter, the phase shifter being arranged to provide the first signal on the first output and the second signal on the second output; and a phase error detector, the inputs of which are connected to the outputs of the phase shifter and the output of which is connected to an input of the control loop controller. The output of the control loop controller is connected in a feedback loop to a first input of the comparator, and a second input of the comparator is arranged to be connected to an alternating current source.
US09660580B2	Synchronous buck inverter A power inverter, such as a synchronous buck power inverter, that is configured with a high frequency switching control having a (PWM) controller and sensing circuit. Controller provides a low frequency oscillating wave to effect switching control on a synchronous-buck circuit portion that includes a plurality of switches to invert every half cycle of the frequency provided by controller. The inverting process thus creates a positive and negative transition of the oscillating wave signal. A low frequency switching stage includes a further plurality of switches configured to operate as zero voltage switching (ZVS) and zero current switching (ZCS) drives Charge on an output capacitor is discharged to zero on every zero crossing of low frequency switching stage and advantageously discharges energy every half cycle. During this discharge of energy, the zero crossing distortion in the low frequency sine wave is greatly reduced.
US09660577B2	Solar cell characterization system with an automated continuous neutral density filter Techniques for solar cell electrical characterization are provided. In one aspect, a solar testing device is provided. The device includes a solar simulator; and a continuous neutral density filter in front of the solar simulator having regions of varying light attenuation levels ranging from transparent to opaque, the continuous neutral density filter having an area sufficiently large to filter all light generated by the solar simulator, and wherein a position of the continuous neutral density filter relative to the solar simulator is variable so as to control a light intensity produced by the device. A solar cell electrical characterization system and a method for performing a solar cell electrical characterization are also provided.
US09660575B2	Solar cell stringer calibrator A solar cell stringer calibrator has been disclosed. In an example, a method includes loading a base having pressure sensors into a solar cell stringer to be positioned under a tacking head. The tacking head is lowered onto the base. The pressure sensors measure pressure applied by the tacking head. The method involves determining whether the pressure applied by the tacking head is within a predetermined range. In another example, a method involves heating a solder joint, and measuring a temperature of the solder joint with a pyrometer and a temperature sensor, the temperature sensor disposed under the solder joint. The location of the pyrometer relative to the solder joint is determined based on a difference in temperatures measured with the pyrometer and the temperature sensor. The method involves adjusting the solar cell stringer if the location of the pyrometer is determined to be outside a predetermined range.
US09660568B2	Solar array column cap Disclosed herein is a solar array column cap that includes a body having an opening extending along a center axis from a bottom to a top, the opening configured to receive the vertical column such that the body surrounds the vertical column. The solar array column cap further includes an upper support surface configured to receive a horizontal beam, the upper support surface being located in a plane that is visibly non-perpendicular with the center axis.
US09660556B2	Linear ultrasonic motor and optical apparatus including the same A small linear ultrasonic motor includes: a vibration element generating ultrasonic vibrations by applying high frequency drive voltage; a slider against which vibration element is pressed and which is relatively moved by the ultrasonic vibrations; a vibration element supporting member retaining the vibration element and relatively moving with respect to the slider; a guide portion guiding a moving direction of the relative movement of the vibration element supporting member; and a pressurizing portion pressing the vibration element against the slider, wherein the guide portion is arranged sandwiching a position at which the vibration element is pressed against the slider, in a plane that includes the moving direction and intersects with a pressurizing direction of a pressurizing force exerted by the pressurizing portion, and at least each part of the pressurizing portion and the guide portion is disposed at a position equidistant from the plane in the pressurizing direction.
US09660550B2	Generator device for the voltage supply of a motor vehicle A generator device for the voltage supply of a motor vehicle is equipped with at least one rectifying element for rectifying an alternating voltage provided by a generator. The rectifying element has an n-channel MOS field-effect transistor in which the gate, the body area, and the source area are electrically fixedly connected to one another and in which the drain area is used as a cathode.
US09660547B1	Dimmer compatibility with reactive loads A system and method includes a controller that alternately enables at least two different current paths for a current flowing through a dimmer when the dimmer is in an OFF mode. In at least one embodiment, enabling and disabling the current paths allows a power supply of the dimmer to continue functioning and provides the controller sufficient voltage to continue functioning. One of the current paths is a low impedance path and another current path is a path to a voltage supply node of a switching power converter controller. In at least one embodiment, the controller generates an impedance control signal to enable a low impedance current path for a current in the dimmer and alternately provide a current path to the voltage supply node for the controller.
US09660544B1	Self-driven synchronous rectifier circuit A power converter includes a self-driven circuit for appropriately turning ON and OFF a synchronous rectifier during the operating cycle of the power converter. Without the use of a smart controller coupled to the synchronous rectifier, the self-driven circuit turns ON the synchronous rectifier during the positive cycle of the power converter when the main switch is turned OFF, and the self-driven circuit turns OFF the synchronous rectifier during the negative cycle of the power converter when the main switch is turned ON. Unlike conventional self-driven circuits that include an auxiliary secondary winding for driving a synchronous rectifier, the self-driving circuitry of the present application does not include an auxiliary secondary winding.
US09660533B2	Buck-boost converter with smooth transition circuits and methods A buck-boost converter with smooth transitions is disclosed. A buck-boost converter controller is disclosed including a first high side driver switch gate control signal output for controlling a first high side driver device; a first low side driver switch gate control signal output for controlling a first low side driver device; a second high side driver switch gate control signal output for controlling a second high side driver device; a second low side driver switch gate control signal output for controlling a second low side driver device; a state machine having four states comprising a buck state, a boost state, a transition buck state, and a transition boost state; a hysteresis timer indicating a pulse width greater than a predetermined threshold coupled to the state machine; and a minimum timer indicating a pulse width less than a predetermined threshold coupled to the state machine. Methods are also disclosed.
US09660522B2	DC-DC converter circuit arrangement A DC-DC converter circuit arrangement consisting of at least one multiphase DC-DC converter for transporting energy between two electrical systems. The arrangement may include several converter circuits whereby each features at least one first control element that can be regulated. A controller can produce several drive signals that have different phases. One switched mode operation of a converter circuit of the multiphase DC-DC converter can be controlled with each drive signal. The switched mode operation of each converter circuit of each subsequent multiphase DC-DC converter can be controlled by means of a drive signal, which can be produced by the controller. The controller is designed and equipped in such a way that it can enable or disable the energy transport by means of one of the multiphase DC-DC converter.
US09660514B2	Power feed device of inductive charging device A power feeding device of a non-contact charging device includes a power factor improvement circuit which converts an AC power supply to DC, and improves a power factor, a smoothing capacitor connected to an output end of the power factor improvement circuit, an inverter circuit which includes a plurality of switching elements, and generates an AC signal using a voltage of the smoothing capacitor as a power supply, a power feeding section which feeds power based on the AC signal to a power receiving device, and a control circuit which modulates a duty factor of each of the switching elements of the inverter circuit in synchronization with the AC power supply, wherein the control circuit controls the plurality of switching elements so that an increment of the modulated duty factor is not equal to a decrement of the modulated duty factor.
US09660501B2	Electric actuator with a manual drive means An actuator including a frame, an electric motor fastened to the frame and to a rotor that is constrained to rotate with an outlet shaft, and a connector electrically connected to the motor and secured to the frame to be connected to a complementary connector. The actuator includes a secondary drive device having a secondary shaft having a first end that extends outside the frame and is arranged to be coupled to rotate with a rotary drive tool, a second end of the secondary shaft in rotation coupled with the outlet shaft, and an activation rod opening out into the connector is secured to the frame and arranged to prevent the secondary shaft from being coupled in rotation with the outlet shaft only when the complementary connector is connected to the connector secured to the frame.
US09660492B2	Outer rotor construction An outer rotor construction for a wind turbine generator which outer rotor construction comprises a plurality of rotor housing segments, wherein a rotor housing segment is realized to hold a number of magnet poles, and wherein a rotor housing segment comprises a lateral connecting interface of a lateral connection for detachably connecting that rotor housing segment along its longitudinal length to a number of adjacent rotor housing segments. The invention further describes a wind turbine including a generator, which generator includes an inner stator and such an outer rotor is provided. A method of performing a maintenance procedure on such an outer rotor construction is also provided.
US09660489B2	Permanent magnet rotor for an electric generator A permanent magnet rotor comprising a rotor rim and a plurality of permanent magnet modules arranged on the outer or inner circumference of the rotor rim, the permanent magnet modules extending generally along an axial direction and being of substantially constant axial-cross section, and comprising a base adapted to be fixed to the rim of the generator rotor, one or more permanent magnets, and one or more pole pieces, wherein the permanent magnet modules comprise an axial cooling channel extending substantially along the length of the modules.
US09660486B2	Wireless power transfer device and wireless charging system having same The present specification provides a wireless power transfer device formed to transmit power to a wireless power reception device, and a power transfer unit in the wireless power transfer device comprises: a first coil formed to generate a magnetic field so as to transmit power in an induction scheme; and a second coil wound around the first coil and formed to generate a magnetic field vibrating at a resonance frequency so as to transmit power in a resonance scheme.
US09660472B2	Wireless communication controlled battery charging station An electronic device sends a wireless signal to a charging station indicating that charging of a battery of the electronics device is to commence. The electronic device determines whether charging of the battery is to continue. In response to a determination that charging of the battery is not to continue, the electronic device sends a wireless signal to the charging station indicating that charging of the battery is to cease.
US09660466B2	Tablet and monitor support systems Support systems and related methods for supporting tablets and monitors. A stand that includes a monitor support portion configured to support a monitor and a tablet support portion configured to support a tablet.
US09660464B2	Battery pack, electrical hardware, and communication control method A battery pack has a communicator storing various communication protocols. When new hardware is connected thereto, the battery pack sequentially transmits a respective communication request signal to request communication with the hardware using a stored communication protocol, and establishes communication. The battery pack transmits the communication request signal using a standard such as a compatibility priority among communication protocols, a frequency priority for communication protocols used according to a history record, a communication speed priority for communication protocols, and so on, thereby achieving quick establishment of communication.
US09660456B2	Switching of conductor pair in power over ethernet system Technique for providing power to a powered device (PD) over a cable having first and second sets of twisted pairs, such as signal pairs and spare pairs. Power Sourcing Equipment (PSE) circuitry is coupled via a first switch to the second set, e.g. to the spare pairs. A switch control circuit turns the first switch off to enable the PSE circuitry to perform a prescribed operation in connection with the PD over only the first set, e.g. over the signal pairs, and turns the first switch on to enable the PSE circuitry to perform the prescribed operation in connection with the PD over the first and second sets.
US09660454B2	Apparatus and method for managing and conditioning photovoltaic power harvesting systems The efficiency of a PV power generation system (10) is maximized by an apparatus providing series of electronic units (20) connected to the PV modules (12) and comprising microprocessor controlled DC converters/power supply units. A managing unit (60) communicates with the electronic units (20) of a string (11) in order to carry out a synergic optimization of the efficiency both of the single PV modules (12) and of the entire string (11). The apparatus also provides PV module (12) by PV module (12) diagnostic features and it is able to communicate with external devices for a full system control.
US09660443B1	Control circuits with energy recycling for envelope elimination and restoration and related methods Control circuits with energy recycling for envelope elimination and restoration and related methods are disclosed. A control circuit includes a filter module configured to condition an input power signal to provide an output power signal. An energy recapture module is electrically coupled to the filter module and is configured to capture a portion of residual energy from the filter module and return the portion of the residual energy to the input power signal. A control module is electrically coupled to the filter module and the energy recapture module and is configured to control the filter module to provide the output power signal and is further configured to control the energy recapture module to capture and return the portion of the residual energy to the input power signal.
US09660438B2	Secure and dependable differential protection for electric power generators Secure and dependable differential protection for electric power generators is described herein. An internal fault is declared if the operating current exceeds a function of the restraining current, and the operating current exceeds and adjusted pickup value. The adjusted pickup value is selected as a minimum of a compensated first pickup value and a second pickup value. The compensated first pickup value may be calculated by adding the absolute value of a compensation addend with a first pickup value. The compensation addend may be calculated by filtering, compensating, and summing current values from the neutral side and the power system side of the electrical generator. The absolute value of the compensation addend may be further adjusted using a security compensation factor.
US09660433B2	Active lightning arrester The present invention relates to an arrester, comprising: a rod member coupled to a ground means at one end in the longitudinal direction and charged with charges of the ground; a plurality of insulators provided to be spaced from each other in the longitudinal direction of the rod member; an charging plates provided between the neighboring insulators separately from the rod member so as to be electrically insulated and charged with a polarity opposite to that of the charges of the ground; a charging tube provided between the charging plates and the insulators, electrically connected to the charging plates, and charged with charges having a polarity opposite to that of the charges of the ground; a needle electrode member provided to the upper end of the rod member and having a needle-shaped part; and a discharge induction conductor electrode electrically connected to the charging plates between the insulators and the charging plates so as to induce discharge between the needle electrode member and the discharge induction conductor electrode and emit ion charges through the discharge, thereby forming a discharge path between a thundercloud and the needle electrode.
US09660432B2	Subsea umbilical An umbilical for use in the offshore production of hydrocarbons, the umbilical comprising at least one electric cable, the electric cable comprising at least one electric conductor (18), and at least one electric conductor (18) comprising plurality of electric strands having interstices (15), wherein the interstices are filled with a metal-based material. In this way, there is provided an umbilical with a ‘void-free1 or completely gap-filled conductor construction which therefore prevents water or gas migration or transport along such a conductor.
US09660430B2	Configurable enclosure A configurable enclosure including a cover portion operably attached to a base portion, the base portion including a wall disposed along a perimeter of a bottom surface, and a removable portion of the bottom surface configured to be peeled away from the base portion to create an opening on the bottom surface is provided. Moreover, an enclosure having a cover portion operably attached to a base portion, the base portion including a wall disposed around a perimeter of a bottom surface, a thin section of the bottom surface located proximate an outer edge of a removable portion of the bottom surface, an actuator operably attached to the removable portion, wherein through actuation of the actuator, the removable portion peels away from the bottom surface to create an opening on the base portion is also provided. Furthermore, an associated method is also provided.
US09660423B2	Spark plug having an electrode structure that effectively suppresses flashover It is an object to reduce eccentricity between a terminal nut and an insulator. A spark plug includes an insulator, a terminal nut, and a metallic shell. The outside diameter of the insulator at a rear end of the metallic shell is smaller than or equal to 8 mm, and the contact area between a flat portion of the insulator and a contact surface of the terminal nut is smaller than 10 mm2.
US09660408B2	All optical high energy radiation source A method for producing electromagnetic radiation comprising: firing a first laser pulse and generating a plasma region, the first laser pulse penetrating at least partially into the plasma region to create a plasma density wake in the plasma region; providing a group of charged particles in the plasma region arranged so as to be accelerated in the plasma density wake of the first laser pulse; reflecting the first laser pulse after the first laser pulse has penetrated into the plasma region, to give a reflected laser pulse; and arranging the reflected laser pulse to interact with the group of charged particles to generate an electromagnetic radiation.
US09660405B2	Electrical device with low friction contact parts An electrical device including an electrode arrangement having a magnet, and an electrode, an electrically conducting movable device, movable relative to the electrode arrangement and spaced apart from the electrode arrangement, whereby a gap (G) is formed therebetween, and a suspension including a liquid, a plurality of magnetic particles dispersed in the liquid and a plurality of non-magnetic electrically conducting particles dispersed in the liquid, which non-magnetic electrically conducting particles have higher electric conductivity than the magnetic particles, wherein the suspension) extends between the electrically movable device and the electrode arrangement in the gap (G), and wherein the magnet is arranged to provide a magnetic field through the suspension to thereby align the non-magnetic electrically conducting particles between the electrode arrangement and the electrically conducting movable device to obtain an electrical connection between the electrode arrangement and the electrically conducting movable device.
US09660403B2	Connector for devices for creating mosaicked display systems, and display mosaic systems comprising same Discrete electronic modules, such as display tiles, designed and configured to be mosaicked and operatively connected with one another and/or to one or more differing types of discrete electronic modules. In some embodiments, the electronic modules include one or more recessed receptacles along their edges that receive corresponding connector biscuits that operatively connect abutting or confronting electronic modules with one another and/or to a controller. In some embodiments, the sizes of the recessed receptacles and connector biscuits are precisely matched so that the biscuits participate in aligning the abutting or confronting display tiles with one another. In some embodiments, the recessed receptacles are provided in recesses in the backsides of the display tiles, which allows each tile to be easily installed and removed from a display mosaic of which the tile is part.
US09660402B2	Conductor assembly for power distribution equipment A conductor assembly for establishing a connection to a power distribution unit is disclosed. The conductor assembly includes one or more conductors have a conductive rod. Each end of the conductive rod has an end forming a ball member. The conductor assembly also includes a connector having a clamp mechanism to receive the ball member of the conductive rod. A fastener threadably couples with a conductor on power distribution unit to rigidly secure the conductor assembly to the electrical equipment units.
US09660399B2	Electrical connector with two insertion orientations An electrical connector comprises an insulating housing, several first and second conductive terminals, an inner grounding unit, and an outer grounding unit, which are disposed on the insulating housing. The insulating housing has a first surface, an opposite second surface, and two side surfaces arranged between the first and second surfaces. The inner grounding unit has a plate embedded in the insulating housing and two protruding sheets extended from the plate and respectively protruding from the side surfaces of the insulating housing. The plate is arranged to separate the first conductive terminals from the second conductive terminals. The outer grounding unit clips the insulating housing and engages the protruding sheets. A portion of the outer grounding unit engaged with one of the protruding sheets includes two stacked engaging portions, and at least one of the two stacked engaging portions has a thru-hole for engaging with the corresponding protruding sheet.
US09660387B2	Connector and method of manufacturing the same A connector and a method of manufacturing the same are disclosed. The connector includes a module including at least one protection device and a connector frame formed by a mold, and the module is buried in the mold. The connector further includes a plurality of connection pins that are connected to the connector frame, and each of the plurality of connections pins has an exposed portion. Each of the plurality of connection pins is exposed, and at least a first set of the plurality of connection pins is electrically connected to the at least one protection device.
US09660380B1	Alignment tolerant electronic connector An electronic connector includes a base and a tapered extension. The tapered extension includes a platform and a plurality of electrical contacts. An alignment tolerant joint couples the tapered extension to the base, such that the tapered extension is movable relative to the base in three orthogonal dimensions responsive to an external force applied to the tapered extension. One or more biasing components bias the tapered extension away from the base.
US09660378B2	Magnetic electrical connector An electrical connector that includes a first part housing for supporting contacting elements each configured to conductively couple with an electrical power source. First part coupling elements are configured to move between a connected and an unconnected configuration. In the connected configuration, each first part coupling element conductively couples with contacting elements, and in the unconnected configuration the first part coupling elements are not conductively coupled with contacting elements. At least one biasing element is configured to maintain the first part coupling elements in the unconnected configuration. A second part housing supports second part coupling elements each configured to conductively couple with one of the first part coupling elements. At least one magnetic element is configured to move and maintain the first part coupling elements into the connected configuration, wherein in the connected configuration electrical current can flow from the contacting elements to the second coupling elements.
US09660373B2	Waterproof electrical receptacle connector A waterproof electrical receptacle connector includes a plastic shell, a metallic shell, an insulated housing, and a buckling member. The plastic shell includes a shell body, a through hole defined in the shell body, and an assembling hole defined on the shell body. The metallic shell is received in the through hole and defines a receiving cavity. The insulated housing is received in the receiving cavity and includes a base portion and a tongue portion extending from the base portion. The buckling member is positioned with the assembling hole and includes a buckling body and a hook extending from the bottom of the buckling body and protruded out of the assembling hole. Accordingly, the hook is protruded out of the assembling hole and engaged with a buckling hole of a circuit board, so that the front of waterproof electrical receptacle connector can be firmly positioned with the circuit board.
US09660371B2	Conductive connector In a connector including a connection portion that is compressed between connection object members (F and F′) and that conductively connects the connection object members (F and F′) to each other, and a base portion that is connected to the connection portion and that forms a recess therein, the connection portion includes a plurality of conductive portions, each conductive portion having conductors arranged in a thickness direction and two electrode planes each in contact with the corresponding one of the connection object members (F and F′), and a retaining portion that retains the conductive portion, the base portion including erect walls and a top wall portion so as to form a recess in the erect walls and the top wall portion, the base portion including, in the recess, partition walls so as to form accommodation portions that accommodate projecting parts (S) connected to the connection object member (F′).
US09660368B2	High performance surface mount electrical interconnect An interconnect assembly including a substrate with a plurality of through holes extending from a first surface to a second surface. A plurality of discrete contact member are located in the plurality of through holes. The contact members include proximal ends that are accessible from the second surface, distal ends extending above the first surface, and intermediate portions engaged with an engagement region of the substrate located between the first surface and the recesses. Retention members are coupled with at least a portion of the proximal ends to retain the contact members in the through holes. The retention members can be made from a variety of materials with different levels of conductivity, ranging from highly conductive to non-conductive.
US09660367B2	Smart card seat and electronic device A smart card seat and an electronic device are provided. The smart card seat includes a seat body and at least one seat terminal for electrically contacting a metal contact of a smart card. Each of the at least one seat terminal comprises a terminal fixing portion and a strip-shaped terminal cantilever. Moreover the terminal cantilever has a tail fixedly connected to a first stationary end of the terminal fixing portion, a head operatively placed on a second stationary end of the terminal fixing portion, and a middle portion higher than the tail and the head.
US09660364B2	System interconnect for integrated circuits An electronic device for transmitting data is described herein. In some examples, the electronic device includes a package substrate, and a plurality of integrated circuits to be coupled to the package substrate, at least one integrated circuit comprising a topside connector or an edge connector to be coupled to a cable that is to couple to a cable receptacle.
US09660359B2	Automatic cable splice A cable splice includes a casing, a jaw assembly, a biasing member, a guide, and a bullet cup. The casing has an opening and an interior cavity. The jaw assembly is positioned in the interior cavity and moveable between a loading position and a terminated position. The biasing member biases the jaw assembly towards the terminated position. The guide includes a receiving end and a shaft extending at least partially into the interior cavity.
US09660340B2	Multiband antenna Two high frequency antennas are provided in a multilayer substrate. Each high frequency antenna is configured of a radiation element, a high frequency power supply line, and a high frequency power supply unit. A low frequency antenna is configured of a series radiation element, a low frequency power supply line, and a lower frequency power supply unit. The series radiation element is formed of two radiation elements connected by a radiation element connection line. One end side of the series radiation element is connected to the low frequency power supply unit via the low frequency power supply line. Open stubs to block transmission of a high frequency signal (SH) are connected to the radiation element connection line and the low frequency power supply line. Short stubs to block transmission of a low frequency signal (SL) are connected to the high frequency power supply lines.
US09660331B2	Radio modem antenna efficiency in on board diagnostic device An on board diagnostic (OBD) device having a radio modem is provided. An antenna of the radio modem is connected to a printed circuit board (PCB) housed within a plastic housing, where the PCB has a ground plane which is extended by a conductive extension. The conductive extension lengthens an effective length of a counterpoise of the antenna without necessitating an increase in size of the OBD device/plastic housing, resulting in maintaining a small form factor for the OBD device, while increasing antenna efficiency and/or bandwidth.
US09660329B2	Directional antenna A directional antenna including a ground plane, a feeding element and a radiating element is provided. The feeding element is adjacent to the ground plane and includes a feeding point. A coupling gap is formed between the radiating element and the feeding element, and the radiating element includes a coupling point. Both the coupling point of the radiating element and the feeding point of the feeding element are at the perpendicular line of a ground plane. Further, a distance between the coupling point and an open end of the radiating element is smaller than 0.16λ of a resonant frequency of the directional antenna.
US09660327B2	Combination antenna A combination antenna includes a conductive block having at least one electrical component mounted on the surface. A metallic housing is connected to the conductive block via at least one electronic element having a front surface and a rear surface. The front surface includes one or more plates separated by gaps of a predetermined width. The rear surface includes a continuous plate separated from the front surface by a gap of a second predetermined width. One or more antenna feeds are disposed between the front surface and the rear surface of the metallic housing and are connected to the metallic housing directly or via the at least one electronic element. A grounding plane includes one or more grounding points connected to the front surface and the rear surface directly or via the at least one electronic element.
US09660323B2	Independent adjustable azimuth multi-band antenna fixture A combination antenna fixture is configured to accommodate adjustment of independent azimuths for each frequency band of operation of antennas of a mobile telephone network. The antennas may be mounted within a single radome or housing used to protect the antennas from environmental conditions. Each of the antennas may be coupled to a different movable mounting device within a radome, which may enable directing the azimuth for each antenna independently. By directing the azimuth independently for each antenna, the signal coverage area for each antenna may be customized to optimize coverage over a geographic area.
US09660319B1	Signal distribution utilizing directional couplers connected in a chain topology The present disclosure is directed to combiners/splitters that reduce packaging and circuit board complexities. More specifically, an apparatus including a chain of directional couplers is used to distribute radio frequency power. The apparatus may also include a set of gain controllers. Each particular gain controller of the set of gain controllers is associated with a particular directional coupler of the chain of directional couplers, and each particular gain controller is configured to adjust a radio frequency power for the associated particular directional coupler.
US09660316B2	Millimeter wave dual-mode diplexer and method An embodiment millimeter wave diplexer includes a substrate integrated waveguide (SIW) high pass filter (HPF), a microstrip line low pass filter (LPF), and a T-junction. The SIW HPF is coupled to a first port, and the microstrip line LPF is coupled to a second port. The SIW HPF is operable in a first frequency band, and the microstrip line LPF is operable in a second frequency band. The T-junction is coupled between the SIW HPF and the microstrip line LPF. The T-junction is also coupled to a common port.
US09660310B2	Electrode materials for metal-air batteries, fuel cells and supercapacitors The present invention refers to an electrode comprised of a first layer which comprises a mesoporous nanostructured hydrophobic material; and a second layer which comprises a mesoporous nanostructured hydrophilic material arranged on the first layer. In a further aspect, the present invention refers to an electrode comprised of a single layer which comprises a mixture of a mesoporous nanostructured hydrophobic material and a mesoporous nanostructured hydrophilic material; or a single layer comprised of a porous nanostructured material wherein the porous nanostructured material comprises metallic nanostructures which are bound to the surface of the porous nanostructured material. The present invention further refers to the manufacture of these electrodes and their use in metal-air batteries, supercapacitors and fuel cells.
US09660309B2	Device and method for raising temperature of battery module in eco-friendly vehicle A device for raising a temperature of a battery module for an eco-friendly vehicle, the battery module including a plurality of battery cells disposed at intervals in a housing thereof, the device blowing air introduced by a blowing fan to the battery cells to raise a temperature of each the battery cell, the device may include a temperature sensor provided on each battery cell for measuring a temperature of corresponding battery cell, a flow passage for guiding air flowed from a blowing fan to each battery cell, and an air flow rate control means provided at a region connecting the flow passage and each battery cell to control the flow rate of air introduced to each battery cell.
US09660307B2	Battery temperature adjustment device A structure for effectively heating a battery. A battery is housed in a battery container. A condenser is formed such that a heating medium is in direct contact with a surface of the battery container, and condenses the heating medium to heat the battery via the battery container. The heating medium condensed by the condenser is supplied to an evaporator that heats and vaporizes the heating medium. The heating medium vaporized by the evaporator which is in vapor is circulated to the condenser.
US09660295B2	Electrolyte and rechargeable lithium battery including the same An electrolyte for a rechargeable lithium battery and a rechargeable lithium battery, the electrolyte including a lithium salt, a non-aqueous organic solvent, and an additive represented by the following Chemical Formula 1: wherein, in Chemical Formula 1, R1 to R3 are each independently a substituted or unsubstituted C1 to C10 alkylene group, a substituted or unsubstituted C3 to C30 cycloalkylene group, a substituted or unsubstituted C6 to C30 arylene group, or a substituted or unsubstituted C2 to C30 heteroarylene group.
US09660290B2	Oxidation resistant separator for a battery A lithium ion rechargeable battery comprises: a negative electrode adapted to give up electrons during discharge, a positive electrode adapted to gain electrons during discharge, a microporous separator sandwiched between said positive electrode and said negative electrode, an organic electrolyte being contained within said separator and being in electrochemical communication with said positive electrode and said negative electrode, and an oxidative barrier interposed between said separator and said positive electrode, and thereby preventing oxidation of said separator.
US09660289B2	Electrode for secondary battery, preparation thereof, and secondary battery and cable-type secondary battery comprising the same A sheet-form electrode for a secondary battery includes a current collector, an electrode active material layer formed on one surface of the current collector, a porous polymer layer formed on the electrode active material layer, and a first porous supporting layer formed on the porous polymer layer. The sheet-form electrode can have supporting layers on at least one of the surfaces thereof to exhibit surprisingly improved flexibility and prevent the release of the electrode active material layer from a current collector even if intense external forces are applied to the electrode, thereby preventing the decrease of battery capacity and improving the cycle life characteristic of the battery.
US09660281B2	Method for controlling startup of fuel cell system A method for controlling a startup of a fuel cell system is provided. The method includes comparing a voltage generated in a fuel cell stack when hydrogen is supplied to a fuel electrode of the fuel cell stack for a set period of time with a first reference voltage. A voltage of a unit cell of the fuel cell stack is compared with a second reference voltage for load connection when the voltage generated in the fuel cell stack is higher than the first reference voltage. A load is connected to the fuel cell stack when the voltage of the unit cell of the fuel cell stack is higher than the second reference voltage for load connection.
US09660275B2	Fuel cell including gas flow path layer A fuel cell is configured to comprise a power generation layer including an electrolyte membrane, an anode and a cathode, separators and a gas flow path layer provided between the power generation layer and the separator. The gas flow path layer is structured by a plurality of corrugated elements. Each corrugated element has a corrugated cross section where first convexes that are convex toward the separator and second convexes that are convex toward the power generation layer are alternately arranged. The plurality of corrugated elements are arranged, such that a top surface of the first convex in one corrugated element and a bottom surface of the second convex in an adjacent corrugated element cooperatively form an integral surface, and a plurality of through holes are formed between the respective adjacent corrugated elements. The plurality of corrugated elements include a corrugated element having positions of the first convexes and the second convexes shifted in a positive side of the first direction from those of an adjacent corrugated element, and a corrugated element having positions of the first convexes and the second convexes shifted in a negative side of the first direction from those of an adjacent corrugated element. The volume of a first reaction gas flow path, which is formed along the positions of the second convexes on a separator-side of the gas flow path layer, is less than the volume of a second reaction gas flow path, which is formed along the positions of the first convexes on a power generation layer-side of the gas flow path layer.
US09660272B2	Oxygen reduction catalyst and use thereof An oxygen reduction catalyst which includes composite particles including a portion including an inorganic metal compound and a portion containing carbon. The composite particles include a metal element M1, carbon, and oxygen as constituent elements; the amount of carbon atoms is 1 to 10 mol, and the amount of oxygen atoms is 1 to 3 mol, assuming that the total amount of atoms in the metal element M1 is 1 mol; a G-band and a D-band are present in a Raman spectrum, and a V/G ratio defined in an expression described below is 0.10 to 0.35: V/G ratio=(minimum value of spectral intensity in region V which is a region between G-band and D-band)/(peak intensity in G-band).
US09660268B2	Alkali-ion battery with enhanced transition metal cyanometallate electrode structure An alkali-ion battery is provided with a transition metal cyanometallate (TMCM) sheet cathode and a non-alkaline metal anode. The fabrication method mixes TMCM powders, conductive additives, and a polytetrafluoroethylene binder with a solution containing water, forming a wet paste. The wet paste is formed into a free-standing sheet of cathode active material, which is laminated to a cathode current collector, forming a cathode electrode. The free-standing sheet of cathode active material has a thickness typically in the range of 100 microns to 2 millimeters. The cathode electrode is assembled with a non-alkaline metal anode electrode and an ion-permeable membrane interposed between the cathode electrode and anode electrode, forming an assembly. The assembly is dried at a temperature of greater than 100 degrees C. The dried assembly is then inserted into a container (case) and electrolyte is added. Thick anodes made from free-standing sheets of active material can be similarly formed.
US09660263B2	Layered oxide materials for batteries Materials are presented of the formula: Ax My Mizi O2−d, where A is sodium or a mixed alkali metal including sodium as a major constituent; x>0; M is a metal or germanium; y>0; Mi, for i=1, 2, 3 . . . n, is a transition metal or an alkali metal; zi≧0 for each i=1, 2, 3 . . . n; 02−d. The formula includes compounds that are oxygen deficient. Further the oxidation states may or may not be integers i.e. they may be whole numbers or fractions or a combination of whole numbers and fractions and may be averaged over different crystallographic sites in the material. Such materials are useful, for example, as electrode materials in rechargeable battery applications. Also presented is a method of preparing a compound having the formula Ax My Mizi O2−d.
US09660255B2	Wrapping electrode assembly and method for manufacturing the same A wrapping electrode assembly for use in a secondary battery manufactured by an electrode-stacking method includes: an electrode plate which has a coating layer of an electrode active material and a non-coated protruding portion, the electrode active material being capable of reversibly inserting and extracting lithium ions; first and second separator films which cover both surfaces of the electrode plate while exposing only the non-coated protruding portion; and an insulating polymer film which is positioned between the first separator film and the second separator film at least on a portion of a circumference of the electrode plate to be bonded to the first separator film and the second separator film, wherein the insulating polymer film is formed as being divided into at least two parts.
US09660249B2	Rechargeable battery having a fuse A rechargeable battery includes an electrode assembly; a case housing the electrode assembly; and an electrode connection assembly electrically coupled to the electrode assembly, the electrode connection assembly including: a terminal; a current collector electrically coupled to the electrode assembly; an insulating member between the terminal and the current collector, wherein a portion of the insulating member is spaced from the terminal and the current collector; and a connection member electrically coupling the terminal and the current collector, the connection member including a fuse part, wherein the portion of the insulating member overlaps with the connection member.
US09660247B2	Secondary battery manufacturing method and secondary battery A secondary battery includes, in a battery case, an electrode body having an electrode sheet, a current collecting member including a weld part ultrasonic welded to a current collecting foil of the electrode sheet, and a pressure-type current interrupt mechanism electrically connected to the current collecting member. The current interrupt mechanism has a first valve element integrated with the current collecting member and a second element body, both joined at a joint portion. Of the current collecting member, the first valve element, and the second valve element, at least a part between the weld part and the joint portion is made of damping metal. A method of manufacturing this secondary battery includes: a step of forming a structure in which the first and second valve elements are joined at the joint portion; and a step of thereafter ultrasonic welding the current collecting foil and the weld part.
US09660245B2	Battery cell Provided is a battery cell including: an electrode assembly including a first electrode part, a second electrode part, and a separation membrane; a first terminal and a second terminal extending in a first direction or a fourth direction which is an opposite direction to the first direction from the first electrode part and the second electrode part, respectively; a first lead tap and a second lead tap connected to the first terminal and the second terminal, respectively; and a case in which the electrode assembly, the first terminal, and the second terminal are accommodated, which is sealed to expose the first lead tap and the second lead tap to the outside, and in which a sealing part sealed by coating a sealing member on circumferential sides joined with each other is formed.
US09660243B2	Battery wiring module A battery wiring module in which connection members are held by a resin protector, the connection members connecting adjacent electrode terminals of a plurality of single batteries, the single batteries having the positive and negative electrode terminals, as well as a battery-side detection terminal for detecting a status of the single battery. The battery wiring module includes a voltage detection terminal, which includes a flat plate-shaped flat plate and a wire connection connected to a terminal end of a wire. The resin protector includes an opening, which enables the battery-side detection terminal to contact the flat plate of the voltage detection terminal. The voltage detection terminal includes an engaged portion extending on a different plane than that of the flat plate. The engaged portion is engaged with a first engagement portion provided to the resin protector.
US09660242B2	Electrode board having security device and power battery system using same A power battery system includes a number of parallel groups that being connected in series and a number of improved electrode boards. Each of the parallel groups comprising a number of single batteries connected in parallel. Each of the improved electrode boards being connected between two neighbored parallel groups. Each of the improved electrode boards includes a number of electrode contact plate, a conductive substrate, and a number of security devices. Each electrode contact plate connects two neighbored single batteries of two neighbored parallel groups in series. Each of the security devices corresponds to an electrode connection plate and electrically connects an electrode connection plate to the conductive substrate. Each of the security devices fuses when one of the single batteries of a parallel group occurs short circuit.
US09660238B2	Slurry for secondary battery porous membrane, a secondary battery porous membrane, an electrode for secondary battery, a separator for secondary battery and a secondary battery A secondary battery porous membrane, manufactured by a slurry for secondary battery porous membrane, which is superior in coating priority and dispersibility of non-conductive organic particles, which improves cycle characteristic of the obtained secondary battery, which has high flexibility and can prevent powder falls, and which has less content of moisture amount; and non-conductive organic particles, which can be suitably used as a secondary battery porous membrane and has less content of metallic foreign particles. The slurry for secondary battery porous membrane comprises; a binder including a polymerized unit of vinyl monomer having a hydrophilic acid group, a non-conductive organic particle having a functional group, cross-linkable with the hydrophilic acid group and a solvent.
US09660235B2	Assembly with a first and a second component and method for producing such an assembly The present invention relates to an assembly (10) with a first and a second component (1, 2) which are fixed relative to each other by at least one fixation element (3), characterized by a fixation element (3) extending into or through a space (9) between the first and the second component (1, 2), wherein the fixation element (3) is filled with a hardenable filling material (61), wherein the fixation element (3) is a hollow deformable and at least in a radial direction expandable element if internally pressurized, at least before the filling material (61) hardens. The present invention also relates to a method for producing an assembly with a first and a second component.
US09660227B2	Sealing plate for prismatic secondary battery and prismatic secondary battery using the sealing plate A prismatic secondary battery includes a prismatic hollow outer body having a mouth and a bottom; a flat electrode assembly, a positive electrode collector, a negative electrode collector, and an electrolyte, all of which are stored in the prismatic outer body; a sealing plate sealing up the mouth of the prismatic outer body; and a positive electrode terminal attached to the sealing plate in an electrically insulated manner. The sealing plate includes a gas release valve and an electrolyte pour hole and further includes, on the front face, a concaved flat face having an identification code. With the prismatic secondary battery of the invention, a jig for assembly or the like is unlikely to come into contact with the identification code during an assembly process of the prismatic secondary battery, hence the identification code is unlikely to be abraded, and the traceability is unlikely to be lost.
US09660220B2	Multiple light-emitting element device To provide a novel light-emitting element or a novel light-emitting device with high emission efficiency and low power consumption, a light-emitting element having a plurality of light-emitting layers between a pair of electrodes includes a lower electrode, a first light-emitting layer over the lower electrode, a charge-generation layer over the first light-emitting layer, a second light-emitting layer over the charge-generation layer, and an upper electrode over the second light-emitting layer. An emission spectrum of the first light-emitting layer peaks at a longer wavelength than an emission spectrum of the second light-emitting layer. A distance of between a bottom surface of the upper electrode and a bottom surface of the first light-emitting layer is less than or equal to 130 nm.
US09660216B2	Light-transmitting adhesive film and display device comprising the same A light-transmissive adhesive film includes an adhesive layer in which an elastic modulus in a second area is higher than that in a first area, and also includes release layers on upper and lower portions of the adhesive layer.
US09660214B2	Organic light emitting diode and organic light emitting display device including the same An organic light emitting diode and an organic light emitting display device, the organic light emitting diode including a first electrode and a second electrode facing each other; an emission layer between the first electrode and the second electrode; and a hole transport layer between the first electrode and the emission layer, wherein the hole transport layer includes an organic material and a dipole material, the dipole material including a first component and a second component, the first component having a polarity different from that of the second component and the first component and the second component being combined with each other.
US09660208B2	Transparent gas barrier film, method for producing transparent gas barrier film, organic EL element, solar battery, and thin film battery A transparent gas barrier film that has excellent gas barrier properties and includes a transparent gas barrier layer having a very low internal stress, and a method for producing the same. The transparent gas barrier film according to the present invention includes: a resin substrate; and a transparent gas barrier layer formed over the resin substrate. The transparent gas barrier layer includes at least one kind selected from the group consisting of metals and metalloids. The transparent gas barrier layer includes a plurality of layers each having a density that changes continuously from high density to low density or from low density to high density and then cycles alternatively from low density to high density or high density to low density, respectively, once or two or more times.
US09660203B2	Material for organic electroluminescence device and organic electroluminescence device using the same Provided are an organic electroluminescence device, which shows high luminous efficiency, is free of any pixel defect, and has a long lifetime, and a material for an organic electroluminescence device for realizing the device. The material for an organic electroluminescence device is a compound having a π-conjugated heteroacene skeleton crosslinked with a carbon atom, nitrogen atom, oxygen atom, or sulfur atom. The organic electroluminescence device has one or more organic thin film layers including a light emitting layer between a cathode and an anode, and at least one layer of the organic thin film layers contains the material for an organic electroluminescence device.
US09660201B2	Organic light emitting device A compound for an organic light emitting device is represented by Chemical Formula 1. An organic light emitting device includes a first electrode, a second electrode facing the first electrode and an organic layer between the first electrode and the second electrode, and the organic layer includes a compound represented by Chemical Formula 1. In the above Chemical Formula 1, Ar and L are the same as defined in the specification.
US09660200B2	Organic light-emitting device An organic light-emitting device includes a first electrode, a second electrode disposed opposite to the first electrode, and an organic layer disposed between the first electrode and the second electrode and including an emission layer. The emission layer includes at least one first light-emitting material represented by Formula 1 and at least one second light-emitting material represented by Formula 2: and X1 to X12, Ar1, M, X21 to X24, A, B, R1 to R12, R21, R22, a1, a2, n, L, M in Formulae 1 and 2 are defined as in the specification.
US09660199B2	Compound, light-emitting material, and organic light-emitting device A compound represented by the general formula (1) is useful as a light-emitting material. In the general formula (1), Ar1 to Ar3 represent an aryl group, provided that at least one thereof represents an aryl group substituted by a group represented by the general formula (2). In the general formula (2), R1 to R8 represent a hydrogen atom or a substituent; Z represents O, S, O═C or Ar4—N; and Ar4 represents an aryl group.
US09660198B2	Organic electroluminescence element and compound used therein An organic electroluminescence element in which a compound represented by the general formula below is used in a light-emitting layer exhibits a high emission efficiency and is inexpensive to provide. At least one of R1 to R8 and R17 represent an electron-donating group and the others represent a hydrogen atom; at least one of R9 to R16 represent an electron-withdrawing group that does not have an unshared electron pair at the α-position thereof and the others represent a hydrogen atom; Z represents a single bond or >C═Y; Y represents O, S, C(CN)2 or C(COOH)2; provided that when Z is a single bond, then at least one of R9 to R16 is an electron-withdrawing group that does not have an unshared electron pair at the α-position thereof.
US09660183B2	Integration of spintronic devices with memory device A device and a method of forming a device are presented. A substrate is provided. The substrate includes circuit component formed on a substrate surface. Back end of line processing is performed to form an upper inter level dielectric (ILD) layer. The upper ILD layer includes a plurality of ILD levels. A plurality of magnetic tunneling junction (MTJ) stacks is formed in between adjacent ILD levels of the upper ILD layer. The plurality of MTJ stacks include a first MTJ stack having a first free layer, a first tunneling barrier layer and a first fixed layer. The first free layer is perpendicular to the first tunneling layer and fixed layer in the plane of the substrate surface. The plurality of MTJ stacks also include a second MTJ stack having a second free layer, a second tunneling barrier layer and a second fixed layer.
US09660181B2	Logic chip including embedded magnetic tunnel junctions An embodiment integrates memory, such as spin-torque transfer magnetoresistive random access memory (STT-MRAM) within a logic chip. The STT-MRAM includes a magnetic tunnel junction (MTJ) that has an upper MTJ layer, a lower MTJ layer, and a tunnel barrier directly contacting the upper MTJ layer and the lower MTJ layer; wherein the upper MTJ layer includes an upper MTJ layer sidewall and the lower MTJ layer includes a lower MTJ sidewall horizontally offset from the upper MTJ layer. Another embodiment includes a memory area, comprising a MTJ, and a logic area located on a substrate; wherein a horizontal plane intersects the MTJ, a first Inter-Layer Dielectric (ILD) material adjacent the MTJ, and a second ILD material included in the logic area, the first and second ILD materials being unequal to one another. Other embodiments are described herein.
US09660173B2	Vibration generating apparatus There is provided a vibration generating apparatus including: a housing having an internal space; a vibrating plate fixedly installed in the housing and having a disc shape; a piezoelectric element fixed to the vibrating plate and having a hollow disc shape; and a vibration element vibrating together with the vibrating plate when the piezoelectric element is deformed.
US09660171B2	Electronic component and acoustic wave device An electronic component has a mounting board, a bump located on a mounting surface of the mounting board, a SAW device located on the bump and connected to the bump. The SAW device has an element substrate, an excitation electrode located on the first primary surface of the element substrate, a pad located on the first primary surface and connected to the excitation electrode, and a cover located above the excitation electrode and formed with a pad exposure portion on the pad. Further, the SAW device makes the top surface of the cover face the mounting surface, makes the bump be located in the pad exposure portion, and makes the pad abut against the bump.
US09660169B2	Sensors and method of operating sensor Sensors and methods of operating sensors are described herein. One sensor includes a number of III-nitride strain sensitive devices and a number of passive electrical components that connects each of them to one of the III-nitride strain sensitive devices.
US09660157B2	Addition-curable silicone resin composition and die attach material for optical semiconductor device An addition-curable silicone resin composition includes (A-1) a linear organopolysiloxane having at least two alkenyl groups per molecule, (A-2) a terminal alkenyl group-containing branched organopolysiloxane having at least two alkenyl groups per molecule, (B) an organohydrogenpolysiloxane with a content of low-molecular-weight siloxane having a degree of polymerization of up to 10 and one or more terminal SiH group per molecule of 5 wt % or less, and (C) an addition reaction catalyst. The composition can be cured to form a product which, when used as a die attach material for optical semiconductor devices, minimizes contamination of the gold electrode pads on LED chips and imparts a good wire bondability.
US09660156B2	Optical semiconductor element mounting package, and optical semiconductor device using the same An optical semiconductor element mounting package that has good adhesion between the resin molding and the lead electrodes and has excellent reliability is provided, as well as an optical semiconductor device using the package is also provided. The optical semiconductor element mounting package having a recessed part that serves as an optical semiconductor element mounting region, wherein the package is formed by integrating: a resin molding composed of a thermosetting light-reflecting resin composition, which forms at least the side faces of the recessed part; and at least a pair of positive and negative lead electrodes disposed opposite each other so as to form part of the bottom face of the recessed part, and there is no gap at a joint face between the resin molding and the lead electrodes.
US09660147B2	Method for providing a reflective coating to a substrate for a light emitting device The present invention relates to a method for providing a reflective coating (114) to a substrate (104) for a light-emitting device (112), comprising the steps of: providing (201) a substrate (104) having a first surface portion (116) with a first surface material and a second surface portion (106, 108) with a second surface material different from the first surface material; applying (202) a reflective compound (401) configured to attach to said first surface material to form a bond with the substrate (104) in the first surface portion (116) that is stronger than a bond between the reflective compound (401) and the substrate (104) in the second surface portion (106, 108); curing (203) said reflective compound (401) to form a reflective coating (114) having said bond between the reflective coating (114) and the substrate (104) in the first surface portion (116); and subjecting said substrate (104) to a mechanical treatment with such an intensity as to remove (205) said reflective coating (114) from said second surface portion (106, 108) while said reflective coating (114) remains on said first surface portion (116).
US09660141B2	Pattern wafer for LEDs, epitaxial wafer for LEDs and method of manufacturing the epitaxial wafer for LEDs A pattern wafer (10) for LEDs is provided with an uneven structure A (20) having an arrangement with n-fold symmetry substantially on at least a part of the main surface, where in at least a part of the uneven structure A (20), a rotation shift angle Θ meets 0°<Θ≦(180/n)° in which Θ is the rotation shift angle of an arrangement axis A of the uneven structure A (20) with respect to a crystal axis direction in the main surface, and a top of the convex-portion of the uneven structure A (20) is a corner portion with a radius of curvature exceeding “0”. A first semiconductor layer (30), light emitting semiconductor layer (40) and second semiconductor layer (50) are layered on the uneven structure A (20) to constitute an epitaxial wafer (100) for LEDs. It is possible to provide the pattern wafer for LEDs and epitaxial wafer for LEDs with cracks and internal quantum efficiency IQE improved.
US09660135B2	Enhanced performance active pixel array and epitaxial growth method for achieving the same Methods are described to utilize relatively low cost substrates and processing methods to achieve enhanced emissive imager pixel performance via selective epitaxial growth. An emissive imaging array is coupled with one or more patterned compound semiconductor light emitting structures grown on a second patterned and selectively grown compound semiconductor template article. The proper design and execution of the patterning and epitaxial growth steps, coupled with alignment of the epitaxial structures with the imaging array, results in enhanced performance of the emissive imager. The increased luminous flux achieved enables use of such images for high brightness display and illumination applications.
US09660132B2	Method of manufacturing solar cell A solar cell includes a solar cell substrate including a principal surface on which a p-type surface and an n-type surface are exposed, a p-side electrode formed on the p-type surface and including a first linear portion linearly extending in a first direction, and an n-side electrode formed on the n-type surface and including a second linear portion linearly extending in the first direction and arranged next to the first linear portion in a second direction orthogonal to the first direction. Corners of a tip end of at least one of the first and second linear portions are formed in a chamfered shape.
US09660130B2	Passivation stack on a crystalline silicon solar cell A method for manufacturing a passivation stack on a crystalline silicon solar cell device. The method includes providing a substrate comprising a crystalline silicone layer such as a crystalline silicon wafer or chip, cleaning a surface of the crystalline silicon layer by removing an oxide layer at least from a portion of one side of the crystalline silicon layer, depositing, on at least a part of the cleaned surface, a layer of silicon oxynitride, and depositing a capping layer comprising a hydrogenated dielectric material on top of the layer of silicon oxynitride, wherein the layer of silicon oxynitride is deposited at a temperature from 100° C. to 200° C., and the step of depositing the layer of silicon oxynitride includes using N2O and SiH4 as precursor gasses in an N2 ambient atmosphere and depositing silicon oxynitride with a gas flow ratio of N2O to SiH4 below 2.
US09660124B2	Concentrator photovoltaic unit, concentrator photovoltaic module, concentrator photovoltaic panel, and concentrator photovoltaic apparatus A concentrator photovoltaic unit being an optical system base unit includes: a concentrating portion configured to converge sunlight; a cell configured to receive light converged by the concentrating portion to generate power; a package including a frame portion, the frame portion having insulating property and surrounding the cell, the package being in integrated relation with the cell; a shield plate provided between the concentrating portion and the cell, and including an opening allowing light converged by the concentrating portion to selectively pass therethrough; and a protection plate being a heat-resistant member provided on the frame portion to make the cell expose to the light and to shield the package, the protection plate being in contact with nothing but the frame portion, and securing a predetermined insulation distance from a live portion of the cell.
US09660118B2	Laminate for solar cell and solar cell module produced using same Provided are a laminate for solar cells, which facilitates production of solar cell modules, which does not require a crosslinking step and which is excellent in transparency, moisture-proofness, sealability and handleability (rigidity), and a solar cell module produced by the use of the laminate. The laminate for solar cells has a resin layer (I)-1 or a resin layer (I)-2 as at least one outermost layer thereof, and has a resin layer (II) that contains an etylene-based polymer (C) satisfying a specific requirement and a nucleating agent (D). The resin layer (I)-1 is a resin layer containing an ethylene/α-olefin random copolymer (A) satisfying a specific requirement, and an ethylene/α-olefin block copolymer (B) satisfying a specific requirement. The resin layer (I)-2 is a resin layer containing a silane-modified etylene-based resin (X).
US09660105B2	Finfet crosspoint flash memory A flash memory device in a dual fin single floating gate configuration is provided. Semiconductor fins are formed on a stack of a back gate conductor layer and a back gate dielectric layer. Pairs of semiconductor fins are formed in an array environment such that shallow trench isolation structures can be formed along the lengthwise direction of the semiconductor fins within the array. After formation of tunneling dielectrics on the sidewalls of the semiconductor fins, a floating gate electrode is formed between each pair of proximally located semiconductor fins by deposition of a conformal conductive material layer and an isotropic etch. A control gate dielectric and a control gate electrode are formed by deposition and patterning of a dielectric layer and a conductive material layer.
US09660104B2	Semiconductor device and manufacturing method thereof A transistor having a multi-layer structure of oxide semiconductor layers is provided in which a second oxide semiconductor layer having a crystalline structure including indium zinc oxide is formed over a first oxide semiconductor layer having an amorphous structure, and at least a third oxide semiconductor layer is formed stacked over the second oxide semiconductor layer. The second oxide semiconductor layer mainly serves as a carrier path for the transistor. The first oxide semiconductor layer and the third oxide semiconductor layer each serve as a barrier layer for suppressing entrance of impurity states of an insulating layer in contact with the multi-layer structure to the carrier path.
US09660103B2	Thin film transistor and method for manufacturing same This thin film transistor comprises, on a substrate, at least a gate electrode, a gate insulating film, an oxide semiconductor layer, a source-drain electrode, and two or more protective films. The oxide semiconductor layer comprises Sn, O and one or more elements selected from the group consisting of In, Ga and Zn. In addition, the two or more protective films are composed of at least a first protective film that is in contact with the oxide semiconductor film, and one or more second protective films other than the first protective film. The first protective film is a SiOx film having a hydrogen concentration of 3.5 atomic % or lower.
US09660102B2	Semiconductor device and manufacturing method thereof An object is to reduce to reduce variation in threshold voltage to stabilize electric characteristics of thin film transistors each using an oxide semiconductor layer. An object is to reduce an off current. The thin film transistor using an oxide semiconductor layer is formed by stacking an oxide semiconductor layer containing insulating oxide over the oxide semiconductor layer so that the oxide semiconductor layer and source and drain electrode layers are in contact with each other with the oxide semiconductor layer containing insulating oxide interposed therebetween; whereby, variation in threshold voltage of the thin film transistors can be reduced and thus the electric characteristics can be stabilized. Further, an off current can be reduced.
US09660099B2	Thin film transistor substrate and method of manufacturing the same A thin film transistor substrate includes a gate electrode disposed on a base substrate, an active pattern overlapping the gate electrode, a source metal pattern including both a source electrode disposed on the active pattern and a drain electrode spaced apart from the source electrode, a buffer layer disposed on the source metal pattern and contacting the active pattern, a first passivation layer disposed on the buffer layer and a second passivation layer disposed on the first passivation layer. The density of hydrogen in the buffer layer is greater than the density of hydrogen in the first passivation layer and less than the density of hydrogen in the second passivation layer.
US09660098B2	Semiconductor device and method for manufacturing the same Stable electrical characteristics and high reliability are provided for a miniaturized semiconductor device including an oxide semiconductor, and the semiconductor device is manufactured. The semiconductor device includes a base insulating layer; an oxide stack which is over the base insulating layer and includes an oxide semiconductor layer; a source electrode layer and a drain electrode layer over the oxide stack; a gate insulating layer over the oxide stack, the source electrode layer, and the drain electrode layer; a gate electrode layer over the gate insulating layer; and an interlayer insulating layer over the gate electrode layer. In the semiconductor device, the defect density in the oxide semiconductor layer is reduced.
US09660097B2	Semiconductor device A transistor that is to be provided has such a structure that a source electrode layer and a drain electrode layer between which a channel formation region is sandwiched has regions projecting in a channel length direction at lower end portions, and an insulating layer is provided, in addition to a gate insulating layer, between the source and drain electrode layers and a gate electrode layer. In the transistor, the width of the source and drain electrode layers is smaller than that of an oxide semiconductor layer in the channel width direction, so that an area where the gate electrode layer overlaps with the source and drain electrode layers can be made small. Further, the source and drain electrode layers have regions projecting in the channel length direction at lower end portions.
US09660095B2	Semiconductor device Stable electric characteristics and high reliability are provided to a miniaturized and integrated semiconductor device including an oxide semiconductor. In a transistor (a semiconductor device) including an oxide semiconductor film, the oxide semiconductor film is provided along a trench (groove) formed in an insulating layer. The trench includes a lower end corner portion having a curved shape with a curvature radius of longer than or equal to 20 nm and shorter than or equal to 60 nm, and the oxide semiconductor film is provided in contact with a bottom surface, the lower end corner portion, and an inner wall surface of the trench. The oxide semiconductor film includes a crystal having a c-axis substantially perpendicular to a surface at least over the lower end corner portion.
US09660094B2	Thin film transistor and method of manufacturing the same A thin film transistor includes a gate electrode on a substrate, a gate insulating layer on the gate electrode, a semiconductor layer on the gate insulating layer, the semiconductor layer overlapping at least a portion of the gate electrode, a plurality of etch stoppers on the semiconductor layer, and a source electrode and a drain electrode spaced apart from each other and disposed on the etch stoppers and the semiconductor layer, wherein a plurality of channel regions are defined in the semiconductor layer by the etch stoppers on the semiconductor layer.
US09660078B2	Enhanced dislocation stress transistor A device is provided. The device includes a transistor formed on a semiconductor substrate, the transistor having a conduction channel. The device includes at least one edge dislocation formed adjacent to the conduction channel on the semiconductor substrate. The device also includes at least one free surface introduced above the conduction channel and the at least one edge dislocation.
US09660067B2	III-N transistors with epitaxial layers providing steep subthreshold swing III-N transistors with epitaxial semiconductor heterostructures having steep subthreshold slope are described. In embodiments, a III-N HFET employs a gate stack with balanced and opposing III-N polarization materials. Overall effective polarization of the opposing III-N polarization materials may be modulated by an external field, for example associated with an applied gate electrode voltage. In embodiments, polarization strength differences between the III-N materials within the gate stack are tuned by composition and/or film thickness to achieve a desired transistor threshold voltage (Vt). With polarization strengths within the gate stack balanced and opposing each other, both forward and reverse gate voltage sweeps may generate a steep sub-threshold swing in drain current as charge carriers are transferred to and from the III-N polarization layers and the III-N channel semiconductor.
US09660066B2	High electron mobility transistor A high electron mobility transistor is provided, which includes a substrate, a superlattice structure formed on the substrate, and a transistor epitaxial structure formed on the superlattice structure such that the superlattice structure is interposed between the substrate and the transistor epitaxial layer. As the high electron mobility transistor has the carbon-doped AlN/GaN superlattice structure between the substrate and the transistor epitaxial layer. Thus, the present invention can effectively reduce vertical leakage current, so as to improve the epitaxial quality and the breakdown voltage of the high electron mobility transistor.
US09660062B2	Bidirectional HEMT and an electronic package including the bidirectional HEMT An electronic device can include a bidirectional HEMT. In an aspect, a packaged electronic device can include the bidirectional HEMT can be part of a die having a die substrate connection that is configured to be at a fixed voltage, electrically connected to drain/source or source/drain depending on current flow through the bidirectional HEMT, or electrically float. In another aspect, the electronic device can include Kelvin connections on both the drain/source and source/drain side of the circuit. In a further embodiment, a circuit can include the bidirectional HEMT, switch transistors, and diodes with breakdown voltages to limit voltage swings at the drain/source and source/drain of the switch transistors.
US09660055B2	Method of manufacturing a semiconductor device with lateral FET cells and field plates A method of manufacturing a semiconductor device includes providing dielectric stripe structures extending from a first surface into a semiconductor substrate between semiconductor fins. A first mask is provided that covers a first area including first stripe sections of the dielectric stripe structures and first fin sections of the semiconductor fins. The first mask exposes a second area including second stripe and second fin sections. A channel/body zone is formed in the second fin sections by introducing impurities, wherein the first mask is used as an implant mask. Using an etch mask that is based on the first mask, recess grooves are formed at least in the second stripe sections.
US09660054B2	Tunneling field effect transistor (TFET) with ultra shallow pockets formed by asymmetric ion implantation and method of making same An embodiment integrated circuit device and a method of making the same. The embodiment integrated circuit includes a substrate supporting a source with a first doping type and a drain with a second doping type on opposing sides of a channel region in the substrate, and a pocket disposed in the channel region, the pocket having the second doping type and spaced apart from the drain between about 2 nm and about 15 nm. In an embodiment, the pocket has a depth of between about 1 nanometer to about 30 nanometers.
US09660053B2	High-voltage field-effect transistor having multiple implanted layers A method for fabricating a high-voltage field-effect transistor includes forming a body region, a source region, and a drain region in a semiconductor substrate. The drain region is separated from the source region by the body region. Forming the drain region includes forming an oxide layer on a surface of the semiconductor substrate over the drain region and performing a plurality of ion implantation operations through the oxide layer while tilting the semiconductor substrate such that ion beams impinge on the oxide layer at an angle that is offset from perpendicular. The plurality of ion implantation operations form a corresponding plurality of separate implanted layers within the drain region. Each of the implanted layers is formed at a different depth within the drain region.
US09660051B1	Method for producing semiconductor device A method for producing a semiconductor device includes forming a first insulating film around a fin-shaped semiconductor layer and forming a pillar-shaped semiconductor layer and forming a second diffusion layer in an upper portion of the fin-shaped semiconductor layer and a lower portion of the pillar-shaped semiconductor layer. A metal-semiconductor compound is formed on the second diffusion layer. A first metal is deposited to form a gate electrode and a gate line. Second and third metal films are deposited to form a first contact in which the second metal film surrounds a sidewall of an upper portion of the pillar-shaped semiconductor layer, and a second contact connects an upper portion of the first contact and an upper portion of the pillar-shaped semiconductor layer. A third contact is formed on the gate line.
US09660040B2	Transistor contacts self-aligned two dimensions Embodiments of the present invention provide an improved semiconductor structure and methods of fabrication that provide transistor contacts that are self-aligned in two dimensions. Two different capping layers are used, each being comprised of a different material. The two capping layers are selectively etchable to each other. One capping layer is used for gate coverage while the other capping layer is used for source/drain coverage. Selective etch processes open the desired gates and source/drains, while block masks are used to cover elements that are not part of the connection scheme. A metallization line (layer) is deposited, making contact with the open elements to provide electrical connectivity between them.
US09660038B2	Lateral/vertical semiconductor device A lateral semiconductor device and/or design including a space-charge generating layer and an electrode or a set of electrodes located on an opposite side of a device channel as contacts to the device channel is provided. The space-charge generating layer is configured to form a space-charge region to at least partially deplete the device channel in response to an operating voltage being applied to the contacts to the device channel.
US09660037B1	Semiconductor wafer and method In an embodiment, a method includes forming an adhesion promotion layer on at least portions of a conductive surface arranged on a Group III nitride-based semiconductor layer, applying a resist layer to the adhesion promotion layer such that regions of the conductive surface are uncovered by the adhesion promotion layer and the resist layer, applying by electroplating a conductive layer to the regions of the conductive surface uncovered by the adhesion promotion layer and the resist layer, and removing the resist layer and removing the adhesion promotion layer.
US09660035B2	Semiconductor device including superlattice SiGe/Si fin structure A semiconductor device includes a semiconductor-on-insulator substrate having an insulator layer, and at least one silicon germanium (SiGe) fin having a superlattice structure. The SiGe fin is formed on an upper surface of the insulator layer. A gate stack is formed on an upper surface of the at least one silicon germanium fin. The gate stack includes first and second opposing spacers defining a gate length therebetween. First and second epitaxial source/drain structures are formed on the insulator layer. The first and second epitaxial source/drain structures extend beneath the spacer to define a silicon germanium gate channel beneath the gate stack.
US09660032B2	Method and apparatus providing improved thermal conductivity of strain relaxed buffer A structure includes a substrate and a strain relaxed buffer (SRB) that has a bottom surface disposed on the substrate and an opposite top surface. The SRB is formed to have a plurality of pairs of layers, where a given pair of layers is composed of a layer of Si1-xGex and a layer of Si. The structure further includes a plurality of transistor devices formed above the top surface of the SRB and at least one contact disposed vertically through the top surface of the SRB and partially through a thickness of the SRB. The at least one contact is thermally coupled to at least one of the plurality of the Si layers for conducting heat out of the SRB via the at least one of the plurality of Si layers. A method to form the structure is also disclosed.
US09660023B2	Semiconductor film with adhesion layer and method for forming the same Presented herein is a device including an insulator layer disposed over a substrate. An adhesion layer is disposed over the insulator layer and includes a semiconductor oxide, the semiconductor oxide including a compound of a semiconductor element and oxygen. A semiconductor film layer is over the adhesion layer, the semiconductor film layer being a material including the semiconductor element, the semiconductor film layer having a different composition than the adhesion layer. Bonds at an interface between the insulator layer and the adhesion layer comprise oxygen-hydrogen bonds and oxygen-semiconductor element bonds.
US09660018B2	Semiconductor device fabricating method and semiconductor device A method of fabricating a semiconductor device, including forming a lower electrode on a substrate; forming a first insulating film covering a periphery of the lower electrode and an upper surface end portion of the lower electrode; forming a second insulating film along an upper surface central portion outside the upper surface end portion of the lower electrode and a side surface and an upper surface of the first insulating film; and forming an upper electrode on the second insulating film.
US09660016B2	Method of manufacturing a capacitor A method of forming a device comprises forming a through via extending from a surface of a substrate into the substrate. The method also comprises forming a first insulating layer over the surface of the substrate. The method further comprises forming a first metallization layer in the first insulating layer, the first metallization layer electrically connecting the through via. The method additionally comprises forming a capacitor over the first metallization layer. The capacitor comprises a first capacitor dielectric layer over the first metallization layer and a second capacitor dielectric layer over the first capacitor dielectric layer. The method also comprises forming a second metallization layer over and electrically connecting the capacitor.
US09660006B2	Method for manufacturing display device and method for manufacturing electronic device A method for manufacturing a display device, which does not easily damage an electrode, is provided. In the first step, a terminal electrode, a wiring, and a functional layer are provided over a first substrate; the terminal electrode, the wiring, and the functional layer are electrically connected to one another; an insulating layer is provided over the terminal electrode; a first layer is provided over the terminal electrode and the insulating layer; an adhesive layer is sandwiched between the first substrate and a second substrate; the second substrate and the adhesive layer include a first opening overlapping with part of the first layer; and the insulating layer includes a second opening inside the first opening in a top view. In the second step, part of the first layer is removed by emitting particles having a high sublimation property to the first layer, so that the terminal electrode is exposed.
US09660005B2	Display device A display device includes a first substrate, a first light emitting structure, a first transistor, a second transistor, a second light emitting structure, and a second substrate. The first light emitting structure is disposed on the first substrate. The first transistor is disposed on the first light emitting structure, and electrically connected to the first light emitting structure. The second transistor is disposed on the same level with the first transistor. The second light emitting structure is disposed on the first and second transistors, and electrically connected to the second transistor. The second substrate is disposed on the second light emitting structure, and opposite to the first substrate.
US09660001B2	Organic light emitting diode display An organic light emitting diode display includes a plurality of transmission window areas arranged in a matrix form, a plurality of green pixels arranged in a plurality of horizontal line areas among the plurality of transmission window areas, and a plurality of red pixels and a plurality of blue pixels arranged in a plurality of vertical line areas among the plurality of transmission window areas.
US09659998B1	Memory having an interlayer insulating structure with different thermal resistance An integrated circuit memory comprises an intermediate layer disposed between a plurality of bit lines in a bit line conductor layer and a plurality of word lines in a word line conductor layer. The intermediate layer includes a plurality of memory posts through an interlayer insulating structure. Each memory post has a memory element and an access element. The interlayer insulating structure includes higher thermal resistance at the level of the memory element than at the level of the access element.
US09659993B2	Vertical integration of CMOS electronics with photonic devices A method of fabricating a composite semiconductor structure includes providing an SOI substrate including a plurality of silicon-based devices, providing a compound semiconductor substrate including a plurality of photonic devices, and dicing the compound semiconductor substrate to provide a plurality of photonic dies. Each die includes one or more of the plurality of photonics devices. The method also includes providing an assembly substrate having a base layer and a device layer including a plurality of CMOS devices, mounting the plurality of photonic dies on predetermined portions of the assembly substrate, and aligning the SOI substrate and the assembly substrate. The method further includes joining the SOI substrate and the assembly substrate to form a composite substrate structure and removing at least the base layer of the assembly substrate from the composite substrate structure.
US09659989B1	Image sensor with semiconductor trench isolation An image sensor pixel includes a photodiode disposed in a semiconductor material, and doped regions surrounding the photodiode, at least in part. The doped regions include a doped portion of the semiconductor material. Deep trench isolation structures are disposed in the doped regions, and surround the photodiode at least in part. The deep trench isolation structures include a SiGe layer disposed on side walls of the deep trench isolation structures, a high-k dielectric disposed on the SiGe layer, and a filler material.
US09659978B2	Array substrate, method for manufacturing the same, and display device An array substrate includes a GOA circuit area and a display area, the GOA circuit area includes a TFT area and a lead-wire area, the display area includes a data line and a gate line. The GOA circuit area is provided with at least one first via and at least one second via, a data-line metal layer is disposed at the bottom of the at least one first via, and a gate-line metal layer is disposed at the bottom of the at least one second via. The GOA circuit area further includes a first electrode and a second electrode, the data-line metal layer is electrically connected to one electrode through the at least one first via, the gate-line metal layer is electrically connected to the other electrode through the at least one second via, such that a capacitor is formed between the first electrode and the second electrode.
US09659977B2	Semiconductor device A semiconductor device having a high aperture ratio and including a capacitor capable of increasing the charge capacity is provided. A semiconductor device includes a transistor over a substrate, a first light-transmitting conductive film over the substrate, an oxide insulating film covering the transistor and having an opening over the first light-transmitting conductive film, a nitride insulating film over the oxide insulating film and in contact with the first light-transmitting conductive film in the opening, a second light-transmitting conductive film connected to the transistor and having a depressed portion in the opening, and an organic resin film with which the depressed portion of the second light-transmitting conductive film is filled.
US09659975B2	Fabrication methods of transparent conductive electrode and array substrate Fabrication methods of a transparent conductive electrode (301) and an array substrate are provided. The fabrication method of the transparent conductive electrode (301) comprises: forming a sacrificial layer pattern (201) on a substrate (10) having a first region (A1) and a second region (A2) adjacent to each other, wherein the sacrificial layer pattern (201) is located in the second region (A2), and has an upper sharp corner profile formed on a side adjacent to the first region (A1); forming a transparent conductive thin-film (30) in the first region (A1) and the second region (A2) of the substrate (10) with the sacrificial layer pattern (201) formed thereon, wherein a thickness ratio of the transparent conductive thin-film (30) to the sacrificial layer pattern (201) is less than or equal to 1:1.5, and the transparent conductive thin-film (30) is disconnected at the upper sharp corner profile of the sacrificial layer pattern (201), such that at least a part of a side surface of the sacrificial layer pattern (201) facing the first region (A1) is exposed; and removing the sacrificial layer pattern (201) so as to reserve the transparent conductive thin-film (30) in the first region as the transparent conductive electrode (301).
US09659968B2	Display device comprising a metal oxide semiconductor channel and a specified insulating layer arrangement Variation in the electrical characteristics of transistors is minimized and reliability of the transistors is improved. A display device includes a pixel portion 104 and a driver circuit portion 106 outside the pixel portion. The pixel portion includes a pixel transistor, a first insulating layer 122 which covers the pixel transistor and includes an inorganic material, a second insulating layer 124 which is over the first insulating layer and includes an organic material, and a third insulating layer 128 which is over the second insulating layer and includes an inorganic material. The driver circuit portion includes a driving transistor for supplying a signal to the pixel transistor, and the first insulating layer covering the driving transistor. The second insulating layer is not formed in the driver circuit portion.
US09659960B1	Extremely thin silicon-on-insulator silicon germanium device without edge strain relaxation A method for forming a semiconductor structure includes forming a strained silicon germanium layer on top of a substrate. At least one patterned hard mask layer is formed on and in contact with at least a first portion of the strained silicon germanium layer. At least a first exposed portion and a second exposed portion of the strained silicon germanium layer are oxidized. The oxidizing process forms a first oxide region and a second oxide region within the first and second exposed portions, respectively, of the strained silicon germanium.
US09659953B2	HKMG high voltage CMOS for embedded non-volatile memory The present disclosure relates to a structure and method for embedding a non-volatile memory (NVM) in a HKMG (high-κ metal gate) integrated circuit which includes a high voltage (HV) HKMG transistor. NVM devices (e.g., flash memory) are operated at high voltages for its read and write operations and hence a HV device is necessary for integrated circuits involving non-volatile embedded memory and HKMG logic circuits. Forming a HV HKMG circuit along with the HKMG periphery circuit reduces the need for additional boundaries between the HV transistor and rest of the periphery circuit. This method further helps reduce divot issue and reduce cell size.
US09659952B2	NAND memory array with mismatched cell and bitline pitch Embodiments of the present disclosure describe methods, apparatus, and system configurations for NAND memory arrays with mismatched cell and bitline pitch. Other embodiments may be described and claimed.
US09659944B2	One time programmable memory with a twin gate structure A one-time programmable memory (OTP) is provided that includes a combined word line programming line (WL-PL). The OTP includes a programmable transistor having a first threshold voltage and a first breakdown voltage, and a pass transistor having a second threshold voltage and a second breakdown voltage. The combined WL-PL is electrically connected to respective gate electrodes of both the programmable transistor and the pass transistor so that both receive the same control voltage. The second gate electrode has a work function that is greater than that of the first gate electrode, so that the second gate breakdown voltage is greater than the first gate breakdown voltage, which enables the use of the combined WL-PL.
US09659939B1	Integrated circuit having MIM capacitor with refractory metal silicided strap and method to fabricate same A method includes forming a trench in a Silicon substrate; depositing metal on sidewalls and a bottom of the trench; annealing to react the metal with underlying Si and form metal silicide adjacent to sidewalls and bottom of the trench; removing unreacted metal and depositing a dielectric layer on the metal silicide, a metal layer over the dielectric layer and polysilicon to fill a remainder of the trench thereby forming top plate electrode of a MIM capacitor. The method further forms a transistor adjacent to a top of the trench, where the transistor is connected to the top plate electrode of the MIM capacitor via a strap interface that comprises a portion of the metal silicide layer at the top of the trench. The portion of the metal silicide layer can be disposed in an SOI layer, and silicide in the Si substrate forms a bottom plate of the capacitor.
US09659938B2	Single source/drain epitaxy for co-integrating nFET semiconductor fins and pFET semiconductor fins A plurality of gate structures are formed straddling nFET semiconductor fins and pFET semiconductor fins which extend upwards from a surface of a semiconductor substrate. A boron-doped silicon germanium alloy material is epitaxially grown from exposed surfaces of both the nFET semiconductor fins and the pFET semiconductor fins not protected by the gate structures. An anneal is then performed. During the anneal, silicon and germanium from the boron-doped silicon germanium alloy material diffuse into the nFET semiconductor fins and act as an n-type dopant forming a junction in the nFET semiconductor fins. Since boron is a Group IIIA element it does not have any adverse effect. During the same anneal, boron from the boron-doped silicon germanium alloy material will diffuse into the pFET semiconductor fins to form a junction therein.
US09659933B2	Body bias multiplexer for stress-free transmission of positive and negative supplies An integrated circuit die includes a plurality of transistors formed in a semiconductor substrate, the body regions of the transistors on a doped well region of the semiconductor substrate. A body bias voltage generator generates a positive body bias voltage, and a negative body bias voltage in the ground body bias voltage. A multiplexer selectively outputs one of the positive, negative, or ground body bias voltage to the doped well region of the semiconductor substrate based on the temperature of the semiconductor substrate.
US09659932B2	Semiconductor device having a plurality of fins and method for fabricating the same A semiconductor device having a plurality of fins including at least one first fin and at least one second fin formed on a semiconductor substrate is provided. Each of the first fin and second fin has a first portion and a second portion. A gate electrode structure overlies the first portion of the plurality of fins. The gate electrode structure includes a gate electrode, and a gate dielectric layer between the gate electrode and the plurality of fins, A first electrode overlies the second portion of the plurality of fins and the first electrode is in electrical contact with the second portion of the plurality of fins. The gate electrode structure is in direct physical contact with the first portion of the first fin and the gate electrode structure is spaced apart from the first portion of the second fin.
US09659928B2	Semiconductor device having a high-K gate dielectric above an STI region By forming a trench isolation structure after providing a high-k dielectric layer stack, direct contact of oxygen-containing insulating material of a top surface of the trench isolation structure with the high-k dielectric material in shared polylines may be avoided. This technique is self-aligned, thereby enabling further device scaling without requiring very tight lithography tolerances. After forming the trench isolation structure, the desired electrical connection across the trench isolation structure may be re-established by providing a further conductive material.
US09659927B2	Junction barrier Schottky rectifier A junction barrier Schottky rectifier with first and second drift layer sections, wherein a peak net doping concentration of the first section is at least two times lower than a minimum net doping concentration of the second section. For each emitter region the first section includes a layer which is in contact with the respective emitter region to form a pn-junction between the first section and the respective emitter region, wherein the thickness of this layer in a direction perpendicular to the interface between the first section and the respective emitter region is at least 0.1 μm. The JBS rectifier has a transition from unipolar to bipolar conduction mode at a lower forward bias due to lowering of electrostatic forces otherwise impairing the transport of electrons toward the emitter regions under forward bias conditions, and with reduced snap-back phenomenon.
US09659925B2	Display panel A display panel includes a substrate, a first stacking unit, and a second stacking unit. The first stacking unit is disposed on the substrate and connected to a scan line. The first stacking unit includes a first conducting layer, a second conducting layer, at least one first through hole, and a first protruding portion. The first conducting layer is interposed between the second conducting layer and the substrate. The first through hole connects the first conducting layer and the second conducting layer. The position of the first protruding portion is relative to the position of the second protruding portion.
US09659919B2	Nearly buffer zone free layout methodology In some embodiments, an integrated circuit includes a central array region having a first layout feature density. A background region surrounds the central array region and has a second layout feature density, which is different from the first density. A peripheral array region surrounds the central array region and separates the central array region from the background region. The peripheral array region has a third layout feature density between the first and second layout feature densities.
US09659911B1	Package structure and manufacturing method thereof A package structure and a manufacturing method thereof are provided. The package structure includes a redistribution layer (RDL), at least one first die, a plurality of conductive terminals and solder balls, a first encapsulant, a plurality of second dies, and a second encapsulant. The RDL has a first surface and a second surface opposite to the first surface. The first die and the conductive terminals are electrically connected to the RDL and are located on the first surface of the RDL. The first encapsulant encapsulates the first die and the conductive terminals. The first encapsulant exposes part of the conductive terminals. The solder balls are electrically connected to the conductive terminals and are located over the conductive terminals exposed by the first encapsulant. The second dies are electrically connected to the RDL and are located on the second surface of the RDL. The second encapsulant encapsulates the second dies.
US09659895B2	Semi-conductor package structure Disclosed is a semiconductor package structure comprising a body, a plurality of first-layer, second-layer, third-layer and fourth-layer electrical contacts, wherein the first-layer, the second-layer, the third-layer and the fourth-layer electrical contacts are arranged sequentially from outside to inside on a bottom surface of the body in a matrix manner. Adjacent first-layer electrical contacts have two different spacings therein, and adjacent third-layer electrical contacts have the two different spacings therein.
US09659890B2	Methods and apparatus of packaging semiconductor devices Methods and apparatuses for wafer level packaging (WLP) semiconductor devices are disclosed. A redistribution layer (RDL) is formed on a first passivation layer in contact with a conductive pad over a surface of a die. The RDL layer is on top of a first region of the first passivation layer. A second passivation layer is formed on the RDL layer with an opening to expose the RDL layer, and over the first passivation layer. An under bump metallization (UBM) layer is formed over the second passivation layer in contact with the exposed RDL layer. A second region of the first passivation layer disjoint from the first region is determined by projecting an outer periphery of a solder ball or other connector onto the surface.
US09659889B2	Solder-on-die using water-soluble resist system and method This disclosure relates generally to generating a solder-on-die using a water-soluble resist, system, and method. Heat may be applied to solder as applied to a hole formed in a water-soluble resist coating, the water-soluble resist coating being on a surface of an initial assembly. The initial assembly may include an electronic component. The surface may be formed, at least in part, by an electrical terminal of the electronic component, the hole being aligned, at least in part, with the electrical terminal. The solder may be reflowed, wherein the solder couples, at least in part, with the electrical terminal.
US09659880B2	Semiconductor device A semiconductor device includes a wiring substrate, a semiconductor element mounted on an upper surface of a wiring substrate, and a magnetic shield arranged above the upper surface of the wiring substrate to cover an upper side of the semiconductor element. The magnetic shield is formed from a soft magnetic material and includes inclined faces that are inclined straight with respect to the upper surface of the wiring substrate at a portion overlapped with the semiconductor element in a plan view.
US09659875B2	Chip part and method of making the same A chip part includes a substrate, an element formed on the substrate, and an electrode formed on the substrate. A recess and/or projection expressing information related to the element is formed at a peripheral edge portion of the substrate.
US09659873B2	Semiconductor structure with aligning mark and method of forming the same The present invention provides a semiconductor structure comprising a wafer and an aligning mark. The wafer has a dicing region which comprises a central region, a middle region surrounds the central region, and a peripheral region surrounds the middle region. The aligning mark is disposed in the dicing region, wherein the alignment mark is a mirror symmetrical pattern. The aligning mark comprises a plurality of second patterns in the middle region and a plurality of third patterns disposed in peripheral region, wherein each third pattern comprises a plurality of lines, and a width of the line is 10 times less than a width of the L-shapes. The present invention further provides a method of forming the same.
US09659869B2	Forming barrier walls, capping, or alloys /compounds within metal lines Described herein are techniques structures related to forming barrier walls, capping, or alloys/compounds such as treating copper so that an alloy or compound is formed, to reduce electromigration (EM) and strengthen metal reliability which degrades as the length of the lines increases in integrated circuits.
US09659863B2	Semiconductor devices, multi-die packages, and methods of manufacture thereof Semiconductor device, multi-die packages, and methods of manufacture thereof are described. In an embodiment, a semiconductor device may include: first conductive pillars and second conductive pillars respectively aligned to a first row of first pins and a second row of second pins of a first die, the first pins and the second pins differing in function; a first insulating layer covering surfaces of the first conductive pillars and the second conductive pillars facing away from the first die; first pads disposed on a surface of the first insulating layer facing away from the first die, the first pads substantially aligned to the first conductive pillars; and first traces coupled to the first pads, the first traces extending over a portion of the first insulating layer covering the second conductive pillars.
US09659862B1	Method, apparatus, and system for e-fuse in advanced CMOS technologies Methods, apparatus, and systems for fabricating and using a semiconductor device comprising a first conductive element; a second conductive element; and an e-fuse comprising a first region comprising a conductive oxide of a first metal; and a second region comprising a second metal, wherein an oxide of the second metal is resistive; wherein the e-fuse is electrically connected to both the first conductive element and the second conductive element.
US09659860B2	Method and structure to contact tight pitch conductive layers with guided vias An apparatus including a circuit substrate; a first interconnect layer in a first plane on the substrate and a second interconnect layer in a different second plane on the substrate; and a hardmask layer separating the first interconnect layer and the second interconnect layer, wherein the hardmask layer comprises alternating guide sections comprising different hard mask materials, and a via guide. A method including forming a dielectric layer on an integrated circuit structure; forming a first interconnect layer having interconnect lines in the dielectric layer; forming a hardmask layer on a surface of the dielectric layer, the hardmask layer comprising alternating hardmask materials which form guide sections over the interconnect lines; forming a via guide in one of the guide sections; and forming a second interconnect layer over the hardmask guide layer which is electrically connected to one of the interconnect lines through the via guide.
US09659853B2	Double side via last method for double embedded patterned substrate An interposer substrate includes a first circuit pattern embedded at a first surface of a dielectric layer and a second circuit pattern embedded at a second surface of the dielectric layer; a middle patterned conductive layer in the dielectric layer between the first circuit pattern and the second circuit pattern; first conductive vias, where each first conductive via includes a first end adjacent to the first circuit pattern and a second end adjacent to the middle patterned conductive layer, wherein a width of the first end is greater than a width of the second end; second conductive vias, where each second conductive via including a third end adjacent to the second circuit pattern and a fourth end adjacent to the middle patterned conductive layer, wherein a width of the third end is greater than a width of the fourth end.
US09659852B2	Semiconductor package A semiconductor package may include a package substrate with a top surface and a bottom surface opposite to the top surface, the top surface of the package substrate configured to have a semiconductor chip mounted thereon, a power block and a ground block in the package substrate, the power block configured as a power pathway penetrating the package substrate, and the ground block configured as a ground pathway penetrating the package substrate, first vias extended from the power block and the ground block, and the first vias electrically connected to the semiconductor chip, second vias extended from the power block and the ground block toward the bottom surface of the package substrate, and block vias to penetrate the power block and the ground block, the block vias electrically connected to the semiconductor chip and electrically separated from the power block and the ground block.
US09659843B2	Lead frame strip with molding compound channels A lead frame strip has a plurality of unit lead frames. Each of the unit lead frames has a periphery structure connecting adjacent ones of the unit lead frames, a die paddle inside of the periphery structure, a plurality of leads connected to the periphery structure and extending towards the die paddle, and a molding compound channel in the periphery structure configured to guide liquefied molding material. The lead frame strip is processed by attaching a semiconductor die to each of the die paddles, electrically connecting each of the semiconductor dies to the leads, and forming a liquefied molding compound on each of the unit lead frames. The liquefied molding compound is formed such that the liquefied molding compound encapsulates the semiconductor dies and flows into the molding compound channels thereby forming molding extensions that extend onto the periphery structures.
US09659839B2	Barrier structures between external electrical connectors A structure includes a die substrate; a passivation layer on the die substrate; first and second interconnect structures on the passivation layer; and a barrier on the passivation layer, at least one of the first or second interconnect structures, or a combination thereof. The first and second interconnect structures comprise first and second via portions through the passivation layer to first and second conductive features of the die substrate, respectively. The first and second interconnect structures further comprise first and second pads, respectively, and first and second transition elements on a surface of the passivation layer between the first and second via portion and the first and second pad, respectively. The barrier is disposed between the first pad and the second pad. The barrier does not fully encircle at least one of the first pad or the second pad.
US09659837B2	Direct bonded copper semiconductor packages and related methods A power semiconductor package includes a first direct bonded copper (DBC) substrate having a plurality of connection traces on a first face of the first DBC substrate. A plurality of die are coupled to the connection traces, each die coupled to one of the connection traces at a first face of the die. A second DBC substrate includes connection traces on a first face of the second DBC substrate. A second face of each die is coupled to one of the connection traces of the first face of the second DBC substrate. A cavity between the first face of the first DBC substrate and the first face of the second DBC substrate is filled with an encapsulating compound. Terminal pins may be coupled to connection traces on the first face of the first DBC substrate. More than two DBC substrates may be stacked to form a stacked power semiconductor package.
US09659833B2	Semiconductor packages, methods of manufacturing the same, electronic systems including the same, and memory cards including the same A semiconductor package includes an adhesive member disposed on a package substrate to have a trapezoid cross-section view, and a semiconductor chip disposed on the adhesive member and attached to the package substrate by the adhesive member. The semiconductor chip has a first surface and a second surface facing the first surface, and the second surface of the semiconductor chip contacts the adhesive member. The semiconductor chip includes a tension supplement pattern attached to the second surface and spaced apart from the package substrate.
US09659832B2	Reactive hot-melt adhesive for use on electronics The disclosure relates to a method of making an electronic assembly with a reactive hot-melt adhesive composition that include an atmospheric curing prepolymer and optionally a thermoplastic component with a softening point of at least about 120° C., and the electronic assembly made therewith.
US09659829B1	Hybrid orientation vertically stacked III-V and Ge gate-all-around CMOS A method of CMOS construction may include stacked III-V nanowires and stacked Ge nanowires. The CMOS construction may include a hybrid orientation with surface SOI and a standard substrate.
US09659825B2	Method of CMOS manufacturing utilizing multi-layer epitaxial hardmask films for improved epi profile An integrated circuit containing PMOS transistors may be formed by forming a dual layer hard mask. A first layer of the hard mask is halogen-containing silicon nitride formed using a halogenated silane reagent. A second layer of the hard mask is silicon nitride formed on the first layer using halogen-free reagents. After source/drain cavities are etched in the PMOS transistors, a pre-epitaxial bake with hydrogen is performed. After SiGe epitaxial source/drain regions are formed, the hard mask is removed.
US09659824B2	Graphoepitaxy directed self-assembly process for semiconductor fin formation Guiding pattern portions are formed on a surface of a lithographic material stack that is disposed on a surface of a semiconductor substrate. A copolymer layer is then formed between each neighboring pair of guiding pattern portions and thereafter a directed self-assembly process is performed that causes phase separation of the various polymeric domains of the copolymer layer. Each guiding pattern portion is selectively removed, followed by the removal of each first phase separated polymeric domain. Each second phase separated polymeric domain remains and is used as an etch mask in forming semiconductor fins in an upper semiconductor material portion of the semiconductor substrate.
US09659819B2	Interconnects for stacked non-volatile memory device and method A method of forming a memory device includes providing a substrate having a surface region, defining a cell region and first and second peripheral regions, sequentially forming a first dielectric material, a first wiring structure for a first array of devices, and a second dielectric material over the surface region, forming an opening region in the first peripheral region, the opening region extending in a portion of at least the first and second dielectric materials to expose portions of the first wiring structure and the substrate, forming a second wiring material that is overlying the second dielectric material and fills the opening region to form a vertical interconnect structure in the first peripheral region, and forming a second wiring structure from the second wiring material for a second array of devices, the first and second wiring structures being separated from each other and electrically connected by the vertical interconnect structure.
US09659817B1	Structure and process for W contacts Structures and processes include a single metallization step for forming a metal nitride liner layer suitable for contact formation. The structure and processes generally includes forming a nitrogen-enriched surface in a deposited metal liner layer or forming a nitrogen-enriched surface in the dielectric material prior to deposition of the metal liner layer. In this manner, nitridization of the metal occurs upon deposition of nitrogen ions into the metal liner layer and/or as a function of additional conventional processing in fabricating the integrated circuit such that the deposited nitrogen ions diffuse into at least a portion of the metal liner layer. As a consequence, only a single metal layer deposition step is needed to form the metal liner layer.
US09659812B2	Microelectronic elements with post-assembly planarization A microelectronic unit can include a carrier structure having a front surface, a rear surface remote from the front surface, and a recess having an opening at the front surface and an inner surface located below the front surface of the carrier structure. The microelectronic unit can also include a microelectronic element having a top surface adjacent the inner surface, a bottom surface remote from the top surface, and a plurality of contacts at the top surface. The microelectronic unit can also include terminals electrically connected with the contacts of the microelectronic element. The terminals can be electrically insulated from the carrier structure. The microelectronic unit can also include a dielectric region contacting at least the bottom surface of the microelectronic element. The dielectric region can define a planar surface located coplanar with or above the front surface of the carrier structure.
US09659809B2	Support cylinder for thermal processing chamber Embodiments of the disclosure generally relate to a support cylinder used in a thermal process chamber. In one embodiment, the support cylinder includes a hollow cylindrical body comprising an inner peripheral surface, an outer peripheral surface parallel to the inner peripheral surface, wherein the inner peripheral surface and the outer peripheral surface extend along a direction parallel to a longitudinal axis of the support cylinder, and a lateral portion extending radially from the outer peripheral surface to the inner peripheral surface, wherein the lateral portion comprises a first end having a first beveled portion, a first rounded portion, and a first planar portion connecting the first beveled portion and the first rounded portion, and a second end opposing the first end, the second end having a second beveled portion, a second rounded portion, and a second planar portion connecting the second beveled portion and the second rounded portion.
US09659807B2	Method of forming a flexible semiconductor layer and devices on a flexible carrier A method for fabricating a semiconductor device comprises providing a preformed spalled structure comprising a stressor layer stack on a first surface of a semiconductor substrate; forming an interfacial release layer on an exposed second surface of the semiconductor substrate; adhesively bonding the interfacial release layer to a rigid handle substrate using an epoxy; removing at least a portion of the stressor layer stack from the first surface of the semiconductor substrate; processing the semiconductor substrate; and removing the semiconductor substrate from the interfacial release layer to impart flexibility to the semiconductor substrate.
US09659803B2	Electrostatic chuck with concentric cooling base Embodiments of the present disclosure generally provide apparatus and method for cooling a substrate support in a uniform manner. One embodiment of the present disclosure provides a cooling assembly for a substrate support. The cooling assembly includes a cooling base having a first side for contacting the substrate support and providing cooling to the substrate support, a diffuser disposed on a second side of the cooling base, wherein the diffuser defines a plurality of cooling paths for delivering a cooling fluid towards the cooling base in a parallel manner, and an inlet/outlet plate disposed under the diffuser, wherein the inlet/outlet plate is provides an interface between the diffuser and an inlet and outlet of a cooling fluid.
US09659792B2	Processing systems and methods for halide scavenging Systems, chambers, and processes are provided for controlling process defects caused by moisture contamination. The systems may provide configurations for chambers to perform multiple operations in a vacuum or controlled environment. The chambers may include configurations to provide additional processing capabilities in combination chamber designs. The methods may provide for the limiting, prevention, and correction of aging defects that may be caused as a result of etching processes performed by system tools.
US09659789B2	Etching method and etching apparatus An etching method is provided. In the etching method, a temperature of a chiller configured to cool a pedestal is controlled so as to become −20 degrees C. or lower. Plasma is generated from a hydrogen-containing gas and a fluoride-containing gas supplied from a gas supply source by supplying first high frequency power having a first frequency supplied to the pedestal from a first high frequency power source. A silicon oxide film deposited on a substrate placed on the pedestal is etched by the generated plasma. Second high frequency power having a second frequency lower than the first frequency of the first high frequency power is supplied to the pedestal from a second high frequency power source in a static eliminating process after the step of etching the silicon oxide film.
US09659775B2	Method for doping impurities, method for manufacturing semiconductor device Impurity elements are doped at a high concentration exceeding a thermodynamic equilibrium concentration into a solid material having an extremely small diffusion coefficient of the impurity element. A method for doping impurities includes steps for depositing source film made of material containing impurity elements with a film thickness on a surface of a solid target object (semiconductor substrate) made from the solid material. The film thickness is determined in consideration of irradiation time per light pulse and the energy density of the light pulse. The method also includes a step for irradiating the source film by the light pulse with the irradiation time and the energy density so as to dope the impurity elements into the target object at a concentration exceeding a thermodynamic equilibrium concentration.
US09659774B2	Impurity introducing method, impurity introducing apparatus, and method of manufacturing semiconductor element A method for introducing impurity into a semiconductor substrate includes bringing a solution containing a compound of an impurity element into contact with a primary surface of a semiconductor substrate; and irradiating the primary surface of the semiconductor substrate with a laser beam through the solution to raise a temperature of the primary surface of the semiconductor substrate at a position irradiated by the laser beam so as to dope the impurity element into the semiconductor substrate. The laser beam irradiation is performed such that the raised temperature does not return to room temperature until a prescribed dose of the impurity element is caused to be doped into the semiconductor substrate.
US09659773B2	Method for manufacturing silicon carbide semiconductor device by selectively removing silicon from silicon carbide substrate to form protective carbon layer on silicon carbide substrate for activating dopants A method for manufacturing a SiC semiconductor device includes the steps of: forming an impurity region in a SiC layer; forming a first carbon layer on a surface of the SiC layer having the impurity region formed therein, by selectively removing silicon from the surface; forming a second carbon layer on the first carbon layer; and heating the SiC layer having the first carbon layer and the second carbon layer formed therein.
US09659769B1	Tensile dielectric films using UV curing A highly tensile dielectric layer is generated on a heat sensitive substrate while not exceeding thermal budget constraints. Ultraviolet (UV) irradiation is used to produce highly tensile films to be used, for example, in strained NMOS transistor architectures. UV curing of as-deposited PECVD silicon nitride films, for example, has been shown to produce films with stresses of at least 1.65 E10 dynes/cm2. Other dielectric capping layer film materials show similar results. In transistor implementations, the stress from a source/drain region capping layer composed of such a film is uniaxially transferred to the NMOS channel through the source-drain regions to create tensile strain in the NMOS channel.
US09659768B2	Focused radiation beam induced thin film deposition A method of depositing a material on a surface is disclosed. The method includes focusing a radiation beam on the surface and introducing a precursor gas near the surface wherein the precursor gas forms the material on the surface upon radiation by the radiation beam. The method further includes introducing an assistant gas near the surface wherein the assistant gas produces nitric oxide radicals upon radiation by the radiation beam. The nitric oxide radicals facilitate the dissociation process of the precursor gas and reduce contaminants in the deposited material.
US09659766B2	Method for forming semiconductor structure with etched fin structure Methods for forming semiconductor structures are provided. The method includes forming a first fin structure and a second fin structure over a substrate and forming a first sidewall layer to cover the first fin structure and the second fin structure over the substrate. The method for manufacturing a semiconductor structure further includes forming a second sidewall layer over the first sidewall layer and etching a top portion of the first fin structure and the first sidewall layer and the second sidewall layer formed over the top portion of the first fin structure to expose a portion of the first fin structure. The method for manufacturing a semiconductor structure further includes oxidizing the exposed portion of the first fin structure to transform the exposed portion of the first fin structure into an oxide structure formed over the first fin structure.
US09659754B2	Plasma processing apparatus and plasma processing method The present disclosure provides a plasma processing apparatus, including: a processing chamber; an oscillator configured to output high-frequency power; a power supply unit configured to supply the high-frequency power from a specific plasma generating location into the processing chamber; a magnetic field forming unit provided outside the processing chamber and configured to forming a magnetic field at least at the specific plasma generating location; and a control unit configured to control the magnetic field formed by the magnetic field forming unit such that a relationship between an electron collision frequency fe of plasma generated in the processing chamber and a cyclotron frequency fc is fc>fe.
US09659752B2	Method for presetting tuner of plasma processing apparatus and plasma processing apparatus Disclosed is a method for presetting a tuner that matches a power required for plasma emission in a plasma processing apparatus. The method includes: obtaining a relationship of a time lapse from power supply, an emission intensity of plasma, and a setting position of the tuner by emitting plasma; differentiating the emission intensity by time to calculate a time when an increase rate of the emission intensity becomes maximum; and setting the setting position of the tuner at a time, which is obtained by subtracting a time required from the setting of the tuner until the setting is reflected on the emission intensity from the time when the increase rate of the emission intensity becomes maximum, as a preset position.
US09659743B2	Image creating method and imaging system for performing the same A spatial image having 2D spatial information is obtained from a surface of a sample by an image creating method. The surface of the sample is milled to obtain an elemental image having material information from the milled surface. The spatial image and the elemental image are composed to form a 2D spatial/elemental image.
US09659736B2	Particle beam isotope generator apparatus, system and method An isotope generation apparatus is disclosed including: an ion beam source of any of the types described herein; an extractor for extracting the ion beam from the confinement region, where the beam includes a portion of multiply ionized ions in a selected final ionization state; a target including a target material; and an accelerator for accelerating the ion beam and directing the ion beam to the target. The ion beam directed to the target transmutes at least a portion of the target material to a radio-isotope in response to a nuclear reaction between ions in the selected final ion state and atoms of the target material.
US09659735B2	Applications of graphene grids in vacuum electronics Graphene grids are configured for applications in vacuum electronic devices. A multilayer graphene grid is configured as a filter for electrons in a specific energy range, in a field emission device or other vacuum electronic device. A graphene grid can be deformable responsive to an input to vary electric fields proximate to the grid. A mesh can be configured to support a graphene grid.
US09659733B2	Method for preparing a molybdenum disulfide film used in a field emission device Method for preparing a molybdenum disulfide film used in a field emission device, including: providing a sulfur vapor; blowing the sulfur vapor into a reaction chamber having a substrate and MoO3 powder to generate a gaseous MoOx; feeding the sulfur vapor into the reaction chamber sequentially, heating the reaction chamber to a predetermined reaction temperature and maintaining for a predetermined reaction time, and then cooling the reaction chamber to a room temperature and maintaining for a second reaction time to form a molybdenum disulfide film on the surface of the substrate, in which the molybdenum disulfide film grows horizontally and then grows vertically. The method according to the present disclosure is simple and easy, and the field emission property of the MoS2 film obtained is good.
US09659718B2	High load switch for vehicle A high load switch for a vehicle includes a case having an opening formed at an upper side of the case; a first contact unit disposed at a lower side in the case; a second contact unit disposed at a lower side in the case and disposed directly above the first contact unit; and a contactor having one end fixed to one side in the case, and the other end disposed between the first contact unit and the second contact unit, in which a portion of the contactor between the one end and the other end is continuously formed, and the contactor includes a pusher unit formed by being bent upward so that an intermediate portion thereof penetrates the opening and protrudes, and a reinforcement bead formed on a surface of the contactor, thereby preventing deformation in the contactor and enhancing durability.
US09659710B2	Multilayer ceramic component and board having the same A multilayer ceramic component includes a multilayer ceramic capacitor including a ceramic body including a plurality of first and second internal electrodes, and first and second external electrodes, first and second insulation frames respectively including first and second horizontal insulation portions and first and second vertical insulation portions, first and second external conductive electrodes including first and second horizontal conductive portions and first and second vertical conductive portions, first and second internal conductive electrodes disposed on internal surfaces of the first and second vertical insulation portions and connected to the first and second external electrodes, and electrical connection portions.
US09659700B2	Neutralizing external magnetic forces on an OIS module A device is disclosed, comprising a camera comprising an optical image stabilization module, at least one magnetic component, at least one ferromagnetic component, wherein the at least one ferromagnetic component is disposed at a position so as to develop a magnetic force between the optical image stabilization module of the camera and the ferromagnetic component which acts in a direction opposite to a magnetic force exerted on the optical image stabilization module by the at least one magnetic component.
US09659696B2	Permanent magnet assemblies for generating concave field lines and process for creating optical effect coating therewith (inverse rolling bar) The invention relates to the field of the protection of security documents such as for example banknotes and identity documents against counterfeit and illegal reproduction. In particular, the invention relates to magnetic-field-generating devices which produce positively curved magnetic field lines in a concave fashion. The invention also relates to the use of these magnetic-field-generating devices for producing optical effect layers OEL which exhibit the optical impression of a positive rolling bar effect and to processes using these magnetic-field-generating devices, e.g. in the field of document security.
US09659695B2	Dipole ring magnetic field generator Provided is a dipole ring magnetic field generator capable of generating a substantially unidirectional magnetic field in the internal space of a ring without using permanent magnet pieces having fan-shaped or trapezoidal sections, and as a result, a smaller skew angle therein is achieved. The sections of the permanent magnet pieces are shaped to be rectangular, and a plurality of the rectangular permanent magnet pieces are circularly placed at predetermined positions. Each of first, second, third and fourth permanent magnet units, which are main permanent magnet units, comprises five or more permanent magnet pieces. The first and third permanent magnet units, as well as the second and fourth permanent magnet units, are positioned oppositely from each other with respect to a central axis of the magnetic field generator and have hollow shapes or E-shapes facing against each other in a section perpendicular to the central axis.
US09659689B2	Monolithic ceramic electronic component A monolithic ceramic electronic component includes a ceramic body including a stack of ceramic layers. Inner electrodes are disposed within the ceramic body and include exposed portions at the end surfaces of the ceramic body. A pair of outer electrodes is arranged on the end surfaces of the ceramic body so as to extend from the end surfaces to the main surfaces and side surfaces of the ceramic body. Each of the outer electrodes includes a lower electrode layer provided on the ceramic body, an intermediate electrode layer located on the lower electrode layer and defined by a plated Ni layer, and an upper electrode layer located on the intermediate electrode layer and defined by a plated Pd layer. A thickness of the intermediate electrode layer on the main surfaces and the side surfaces of the ceramic body is larger than a thickness of the intermediate electrode layer on the end surfaces of the ceramic body.
US09659688B2	Harness protector and wire-harness wiring structure Provided is a harness protector, wherein a wire harness can easily be formed into a planar shape (with an oblate cross section), and maintained in that state. The harness protector is provided with: a protector body further provided with a roughly tabular-shaped bottom-plate section onto which a wire harness is to be placed, and a holding plate section that is integrally formed on one side of the bottom-plate section in pivotable state, and crushes the wire harness into an oblate cross-section shape, along with the bottom-plate section; and tying bands that anchor the holding plate section onto the bottom-plate section, in a state of having the holding plate section crushing the wire harness into an oblate cross-section shape.
US09659683B2	Coaxial cable and medical cable using the same A coaxial cable includes a center conductor, and an insulation formed surrounding the center conductor. The insulation includes an insulating tape that includes a mesh layer including a plurality of threads woven and a reinforcement layer attached to the mesh layer. The insulating tape is wound, with an overlap, around the center conductor such that the mesh layer is arranged as an outer peripheral surface.
US09659678B2	Method for removing cesium ions from water The present invention provides a method for efficiently separating cesium ions in a short time from an aqueous solution with the number of human working steps being reduced as much as possible and recovering the cesium ions, and an apparatus therefor.Cesium ions in an aqueous solution are removed by preparing a cesium ion-containing magnetic particle in a cesium-containing aqueous solution and filtering or magnetically separating the magnetic particle.
US09659657B2	Reuse of electrical charge at a semiconductor memory device A semiconductor memory device having a plurality of decoders, wherein each decoder is assigned to a select line, wherein no other decoder is assigned to the select line, each decoder has an output configured to charge the select line to when the decoder is activated and to discharge the select line when said decoder is deactivated. Also, each decoder is configured such that, in case that a first decoder gets deactivated after being activated and a second decoder of the decoders gets activated after being deactivated, the output of the first decoder and the output of the second decoder get connected to a common node for a predefined time interval, so that an electrical charge may be transferred from the select line, to the first decoder is assigned to, to the select line, to which the second decoder is assigned to, before the output of the first decoder gets connected to a reference voltage and the output of the second decoder gets connected to a supply voltage.
US09659656B2	Techniques for programming of select gates in NAND memory In a non-volatile memory formed according to a NAND-type architecture that has, on one or both ends of the NAND strings, multiple select gates including some with programmable threshold voltages, a structure and corresponding for efficiently programming of such select gates. On the drain side, the end most of multiple drain select transistors is individually controllable and used for biasing purposes while one or more other drain side select gates are collectively programmed to set adjust their threshold voltage. Independently, on the source side, the end most of multiple source select transistors is individually controllable and used for biasing purposes while other source side select gates are collectively programmed to set adjust their threshold voltage.
US09659649B2	Semiconductor storage device and driving method thereof A memory includes first signal-lines, second signal-lines and resistance-change memory cells. First and second drivers can supply power to the first and second signal-lines, respectively. The second driver increases a voltage of a selected second signal-line in a write-loop higher than that in a previous write-loop. The write-loop includes a write operation and a verify operation. A voltage increase width of the selected second signal-line at a time of transition from a first write-loop to a second write-loop is larger than a voltage increase width of the selected second signal-line at a time of transition from the second write-loop to a third write-loop. A voltage increase width of the selected second signal-line at a time of transition from the second write-loop to the third write-loop is smaller than a voltage increase width of the selected second signal-line at a time of transition from the third write-loop to a forth write-loop.
US09659646B1	Programmable logic applications for an array of high on/off ratio and high speed non-volatile memory cells A non-volatile programmable circuit configurable to perform logic functions, is provided. The programmable circuit can employ two-terminal non-volatile memory devices to store information, thereby mitigating or avoiding disturbance of programmed data in the absence of external power. Two-terminal resistive switching memory devices having high current on/off ratios and fast switching times can also be employed for high performance, and facilitating a high density array. For look-up table applications, input/output response times can be several nanoseconds or less, facilitating much faster response times than a memory array access for retrieving stored data.
US09659643B2	Operation method for RRAM The present invention provides an operation method for RRAM. The operation method includes providing a reset voltage pulse to a RRAM, providing a dummy voltage pulse to the RRAM, and providing a verification voltage pulse to the RRAM. The reset current of the RRAM is read when the verification voltage pulse is provided. The voltage level of the verification voltage pulse is higher than the voltage level of the read voltage pulse for reading the RRAM.
US09659627B2	Semiconductor apparatus capable of preventing refresh error and memory system using the same A semiconductor apparatus includes a plurality of memory banks configured to perform a refresh operation in response to an address count value and row active signals; a refresh control block configured to update refresh bank informations which define a bank designated to perform the refresh operation in response to a refresh command and bank addresses, and activate a count control signal in response to the refresh bank informations; and a counter configured to change the address count value in response to activation of the count control signal.
US09659625B2	Dynamic random access memory with configurable refresh rate for communications systems An integrated circuit may comprise a digital logic circuit, a memory refresh circuit, a first one or more dynamic random access memory (DRAM) cells, and a second one or more DRAM cells. The first DRAM cell(s) may be refreshed by the memory refresh circuit whereas the second DRAM cell(s) is not refreshed by any memory refresh circuit. Each of the first DRAM cell(s) and the second DRAM cell(s) may be a one-transistor cell. The first DRAM cell(s) may be used for storage of data which is overwritten at less than a threshold frequency. The second DRAM cell(s) may be used for storage of data which is overwritten at greater than the threshold frequency. A rate at which the first DRAM cell(s) are refreshed may be adjusted during run-time of the integrated circuit.
US09659624B1	Method for sense reference generation for MTJ based memories In some aspects, the disclosure is directed to methods and systems for sense reference generation. A first array and a second array of MTJ based cells are configured as a magnetoresistive random access memory block. The first array is matched to the second array, the first array and the second array each including rows of MTJ based cells for storing data bits. Responsive to a first row of MTJ based cells in the first array being selected for at least a first stored data bit to be read, a reference row of MTJ based cells in the second array is connected to at least a first comparator of a plurality of comparators via reference lines, to provide sense reference for determining a value of the first stored data bit. The reference lines are shorted together prior to connecting to a first input of the first comparator.
US09659618B1	Memory interface, memory control circuit unit, memory storage device and clock generation method A memory interface, a memory control circuit unit, a memory storage device and a clock generation method are provided. The method includes: receiving a first data strobe signal and a second data strobe signal from a volatile memory, where the first data strobe signal and the second data strobe signal are differential signals corresponding to each other; if a relative relation between a first voltage value of the first data strobe signal and a reference voltage value of a reference voltage signal conforms to a default condition, generating a clock signal in response to the first data strobe signal and the second data strobe signal; and sampling a data signal from the volatile memory based on a raising edge and a falling edge of the clock signal. Thereby, an accuracy for sampling the data signal from the volatile memory can be improved.
US09659609B2	Semiconductor memory apparatus and system using the same A semiconductor memory apparatus includes a command input unit configured to generate an internal command in response to an external command and a selective input unit configured to transmit selection signals to one of a first internal circuit. The selective input unit transmits the selection signals to the first internal circuit when the internal command is not a predetermined command and transmits the selection signals to the second internal circuit when the internal command is the predetermined command.
US09659608B2	Semiconductor memory apparatus, and method for training reference voltage A semiconductor memory apparatus may be configured to, in a data reference voltage training mode, set a reference pad reference voltage by training a first initial data reference voltage for a reference pad being any one of a plurality of input/output pads, and set a data reference voltage for each of remaining input/output pads by training a second initial data reference voltage being the reference pad reference voltage for each of the remaining input/output pads.
US09659607B2	Sense amplifier circuit and semiconductor memory device To improve reading accuracy of a sense amplifier circuit and a semiconductor memory device. A sense amplifier circuit includes an N type FET which is a sensing transistor connected between a power supply and a ground via a data line that extends to a memory cell, a resistance element that is connected between a gate of the sensing transistor and the power supply, and a capacitance element that is connected between the gate of the sensing transistor and the ground.
US09659606B2	Differential sensing circuit with dynamic voltage reference for single-ended bit line memory The present invention provides a differential sensing circuit with a dynamic voltage reference for a single-ended bit line memory is disclosed. The exemplary differential sensing circuit comprises: a dynamic voltage reference generating unit and a differential sensing amplifying unit. The dynamic voltage reference generating unit is coupled to an input voltage, and utilized for receiving a setting signal to generate the dynamic voltage reference. The differential sensing amplifying unit is coupled to the single-ended bit line memory and the dynamic voltage reference generating unit, and utilized for receiving at least an input signal from the single-ended bit line memory and the dynamic voltage reference from the dynamic voltage reference generating unit, so as to generate at least an output signal accordingly.
US09659597B2	Annotating media content for automatic content understanding A system for annotating frames in a media stream 114 includes a pattern recognition system (PRS) 108 to generate PRS output metadata for a frame; an archive 106 for storing ground truth metadata (GTM); a device to merge the GTM and PRS output metadata and thereby generate proposed annotation data (PAD) 110; and a user interface 109 for use by the human annotator HA 118. The user interface 104 includes an editor 111 and an input device 107 used by the HA 118 to approve GTM for the frame. An optimization system 105 receives the approved GTM and metadata output by the PRS 108, and adjusts input parameters for the PRS to minimize a distance metric corresponding to a difference between the GTM and PRS output metadata.
US09659592B2	Perpendicular magnetic recording medium and method of manufacturing same A perpendicular magnetic recording medium exhibits reduced noise and improved performance in such measures as SN ratio, and can realize high magnetic recording densities. In the perpendicular magnetic recording medium, at least a first nonmagnetic intermediate layer, second nonmagnetic intermediate layer, and magnetic recording layer are stacked in order on a nonmagnetic substrate. The first nonmagnetic intermediate layer is formed from a CoCrRuW alloy, and the second nonmagnetic intermediate layer is formed from an Ru-base alloy.
US09659591B1	Polynomial spiral waveguide that facilitates coupling light to a near-field transducer at an oblique angle A recording head includes a near-field transducer located an oblique angle to a media-facing surface. The near-field transducer includes an enlarged portion and a peg extending from the enlarged portion towards the media-facing surface at a normal angle. An input waveguide of the recording head receives energy from an energy source, and an output waveguide delivers the energy to near-field transducer at the oblique angle. The output waveguide is oriented at the oblique angle. A bent waveguide with a polynomial spiral shape joins the input waveguide and the output waveguide.
US09659589B2	Free-standing reflector usable in heat assisted magnetic recording technology A heat assisted magnetic recording (HAMR) write apparatus is described. The HAMR write apparatus is coupled with a laser that provides energy. The HAMR writer has a media-facing surface (MFS) and a laser-facing surface. The HAMR write apparatus includes a free-standing reflector and at least one waveguide. The free-standing reflector resides on the laser-facing surface and has a concave reflective surface oriented to receive the energy from the laser. The waveguide(s) are optically coupled with the free-standing reflector and direct energy from the laser toward the MFS.
US09659585B2	Magnetic sensor seed layer with magnetic and nonmagnetic layers A magnetic sensor has a bottom shield layer, an upper shield layer, and a sensor stack adjacent the upper shield layer. The sensor includes a seed layer between the bottom shield layer and an antiferromagnetic layer of the sensor stack. The seed layer has a magnetic layer adjacent the sensor stack and a nonmagnetic layer adjacent the bottom shield layer.
US09659581B2	Module with coating for abrasion testing A module according to one embodiment includes a body having a tape bearing surface, and a coating on the tape bearing surface. The coating includes a bulk material and one or more sections of a second material at predetermined positions relative to the bulk material. The second material is constructed of a material selected from a group consisting of AlFeSil and Sendust.
US09659578B2	Computer implemented system and method for identifying significant speech frames within speech signals The present disclosure envisages a computer implemented system for identifying significant speech frames within speech signals for facilitating speech recognition. The system receives an input speech signal having a plurality of feature vectors which is passed through a spectrum analyzer. The spectrum analyzer divides the input speech signal into a plurality of speech frames and computes a spectral magnitude of each of the speech frames. There is provided a suitability engine which is enabled to compute a suitability measure for each of the speech frames corresponding to spectral flatness measure (SFM), energy normalized variance (ENV), entropy, signal-to-noise ratio (SNR) and similarity measure. The suitability engine further computes a weighted suitability measure for each of the speech frames.
US09659577B1	Voice controlled assistant with integrated control knob A voice controlled assistant has a housing to hold one or more microphones, one or more speakers, and various computing components. The housing has an elongated cylindrical body extending along a center axis between a base end and a top end. The microphone(s) are mounted in the top end and the speaker(s) are mounted proximal to the base end. A control knob is rotatably mounted to the top end of the housing to rotate about the center axis. The control knob has an outer surface that is substantially flush with an outer surface of the housing to provide a smooth, continuous appearance to the voice controlled assistant.
US09659574B2	Signal noise attenuation A noise attenuation apparatus receives a first signal comprising a desired and a noise signal component. Two codebooks (109, 111) comprise respectively desired signal candidates and noise signal candidates representing possible desired and noise signal components respectively. A noise attenuator (105) generates estimated signal candidates by for each pair of desired and noise signal candidates generating an estimated signal candidate as a combination of the desired signal candidate and the noise signal candidate. A signal candidate is then determined from the estimated signal candidates and the first signal is noise compensated based on this signal candidate. A sensor signal representing a measurement of the desired source or the noise in the environment is used to reduce the number of candidates searched thereby substantially reducing complexity and computational resource usage. The noise attenuation may specifically be audio noise attenuation.
US09659569B2	Audio signal encoder An apparatus comprising: a channel analyzer configured to determine for a first frame of at least one audio signal a set of first frame audio signal multi-channel parameters; a multichannel difference selector configured to select for the first frame groups of elements of the set of first frame audio signal multi-channel parameters based on a value associated with the first frame; and a multichannel parameter encoder configured to generate an encoded first frame audio signal multi-channel parameter based on the selected groups of elements of the set of first frame audio signal multi-channel parameters.
US09659566B2	Device and method for generating and decoding a side channel signal transmitted with a main channel signal For generating a signal to be transmitted original information is encoded into a main channel and a side channel, wherein the side channel is more robust against channel influences than the main channel. On the receiver side, when the receive quality is above a threshold, which is necessitated to execute a successful decoding of the main channel, the main channel is reproduced. If the receive quality falls below this threshold, however, the side channel is reproduced which may have less bits than the main channel and which is a correspondingly lower quality representation of the original information than the main channel.
US09659565B2	Method of and apparatus for evaluating intelligibility of a degraded speech signal, through providing a difference function representing a difference between signal frames and an output signal indicative of a derived quality parameter The present invention relates to a method of evaluating intelligibility of a degraded speech signal received from an audio transmission system conveying a reference speech signal. The method comprises sampling said reference and degraded signals into reference and degraded signal frames, and forming frame pairs by associating reference and degraded signal frames with each other. For each frame pair a difference function representing disturbance is provided, which is then compensated for specific disturbance types for providing a disturbance density function. Based on the density function of a plurality of frame pairs, an overall quality parameter is determined. The method provides for weighing disturbances in silent periods dependent on the loudness of the reference signal.
US09659564B2	Speaker verification based on acoustic behavioral characteristics of the speaker The present invention relates to a non-standard speech detection system and method whereby a speech is analyzed based on models that are trained using personalized speech for each individual. The model is stored in a database and used to analyze a speech in real time to determine the content and behavior of an individual who is a party to a conversation that produces the speech. The results of the analysis can be used to determine if a conversation takes place under normal circumstances or under extraneous circumstances.
US09659558B2	Systems, methods, apparatus, and computer-readable media for adaptive active noise cancellation An adaptive active noise cancellation apparatus performs a filtering operation in a first digital domain and performs adaptation of the filtering operation in a second digital domain.
US09659551B1	End blown woodwind harness A woodwind harness that provides support a woodwind musical instrument to relieve fatigue from a musician's arms and shoulders is described. The woodwind harness generally comprises a sternum plate adapted to press against a human sternum with a pair of rigid members extending from the sternum plate and terminating in a hook shaped bend that is arranged and configured to hook over a human shoulder. Between the sternum plate and the hook shaped bend is an elastic cord attached to each of the rigid members. An end-blown woodwind instrument is attached to the elastic cord by way of an attaching means.
US09659548B2	Automatic installation method for video wall and related system An automatic installation method for video wall comprises the following steps. In the step (a), it employs a control system to output a plurality of identifiable images to a plurality of video devices of the video wall. In the step (b), it employs an image capturing device to capture the plurality of identifiable images. In the step (c), based-on the plurality of identifiable images, it employs the image capturing device to determine position data for the video devices, frame dimension of each of the video devices and spacings between adjacent video devices, and calibrate the identifiable images to obtain a setting value thereof. In the step (d), based-on the position data for the video devices, the frame dimension of each of the video devices and spacings between adjacent video devices and the setting value, it employs the control system to install and set-up the video wall automatically.
US09659547B2	Method and device for displaying images and text in accordance with a selected pattern An electronic device and method for displaying a display item is disclosed. A first pattern comprises an image at a first image size and a character string at a first character string size. A second pattern comprises the image at a second image size and the character string at a second character string size, the character string not overlapping the image at the second image size. The second image size is larger than the first image size, and the second character string size is larger than the first character string size. A selected size comprises at least a first size and a second size. The first pattern is displayed for the display item if the selected size is the first size, and the second pattern is displayed for the display item if the selected size is the second size.
US09659539B2	Gate driver circuit, display apparatus having the same, and gate driving method A gate driver, a display apparatus having the same, and a gate driving method are provided. The display apparatus includes a plurality of pixels, a data driver circuit, and a gate driver circuit. The gate driver circuit includes M groups of gate channels. Each of the M groups of gate channels includes a control circuit and an output buffer. The control circuit receives a power supply voltage from a power supply circuit and generates a modulated supply voltage. The output buffer is connected to the control circuit, the output buffer is powered by the modulated supply voltage to output a gate signal to a gate line of the display panel, wherein a driving pulse of the gate signal is shaped during a charge period according to the modulated supply voltage, and the shape of the driving pulse of the gate signal is maintained during a pre-charge period.
US09659538B2	Power reduction technique for digital display panel with point to point intra panel interface A system and method are disclosed to control the power consumption of column drivers in a display system. A video input signal is received which has an active video period and a vertical blanking period between frames. A timing controller transmits a first video frame to a column driver. The timing controller transmits a column driver disable command during a vertical blanking period. Prior to the subsequent active video period, the timing controller transmits a column driver enable command. The timing controller proceeds to transmit a second video frame to the column driver. In one embodiment, the timing controller determines whether to disable and enable the column driver based on a refresh rate, the refresh rate calculated by the timing controller from the video input signal.
US09659533B2	Display apparatus and control method thereof Provided is a display apparatus including: a light emitting unit having a light source; a display unit configured to display an image by controlling a transmittance of light from the light emitting unit; first and second sensors provided in the light emitting unit to detect a brightness of the light source; and a control unit configured to control a transmittance of the display unit on the basis of detection values from the first and second sensors. A distance from the light source to the second sensor is longer than a distance from the light source to the first sensor. The control unit controls the transmittance of the display unit on the basis of a change degree of the detection value from the first sensor during a given period and a change degree of the detection value from the second sensor during the period.
US09659529B2	Display device that switches light emission states multiple times during one field period A scan driving circuit includes a shift register unit and a logic circuit unit. The start of a start pulse of an output signal STp+1 of a p+1'th shift register is situated between the start and end of a start pulse of the output signal STp of a p'th shift register, and one each of a first enable signal through a Q'th enable signal exist in sequence between the start of the start pulse of the output signal STp and the start of the start pulse of the output signal STp+1. The operations of a (p′, q)'th NAND circuit are restricted based on period identifying signals, such that the NAND circuit generates scanning signals based only on a portion of the output signal STp corresponding to the first start pulse, the signal obtained by inverting the output signal STp+1, and the q'th enable signal ENq.
US09659524B2	Light-emitting device including substrate having cavity, and method for fabricating the light-emitting device An EL display device capable of performing clear multi-gradation color display and electronic equipment provided with the EL display device are provided, wherein gradation display is performed according to a time-division driving method in which the luminescence and non-luminescence of an EL element (109) disposed in a pixel (104) are controlled by time, and the influence by the characteristic variability of a current controlling TFT (108) is prevented. When this method is used, a data signal side driving circuit (102) and a gate signal side driving circuit (103) are formed with TFTs that use a silicon film having a peculiar crystal structure and exhibit an extremely high operation speed.
US09659522B2	Display driver, method for driving display driver, and image display system A display driver includes a memory, a receiver, an image output unit, a controller, and an image mode selection unit. The memory stores a video signal. The receiver receives the video signal and a first control signal from a host processor, where the first control signal corresponds to the video signal. The image output unit processes the video signal stored in the memory and outputs the processed video signal to a display unit. The controller controls the image output unit based on an image mode to display an image corresponding to the video signal. The image mode selection unit detects the first control signal and a second control signal from the controller, and changes the image mode based on the first control signal and second control signal.
US09659519B2	Video-display control device for correcting a video signal and controlling a backlight In a video display control device, a control data generating section allocates a part of a dynamic range of a high gradation region of a video signal to a low gradation region, and a backlight controlling section controls a light emission luminance of a backlight so as to cancel an increase or decrease of a mean luminance of a video displayed on a screen in accordance with an increase or decrease of the mean luminance of a video signal after correction with respect to a mean luminance of the video signal.
US09659518B2	Display panel and display apparatus having interlace and progressive driving methods A method of driving a display panel, the method including analyzing input image data, determining a driving method of the display panel as one of a progressive driving method and an interlace driving method, and rearranging the input image data according to the determined one of the progressive driving method and the interlace driving method.
US09659515B2	Display driver integrated circuit chip A display driver integrated circuit chip is provided. The display driver integrated circuit chip may include a source driver circuit configured to process gamma data and generate a driving signal in response to a control signal and a clock signal, a gamma data manager circuit configured to provide the gamma data to the source driver circuit, control logic configured to provide the control signal and the clock signal to the source driver circuit, and a memory configured to store data used to operate the source driver circuit, the gamma data manager circuit and the control logic. A gamma signal line used to transmit the gamma data may include a metal line provided on an area other than an area on which the source driver circuit is disposed.
US09659504B2	Presentation capture with automatically configurable output A device and method for simultaneously capturing a combination of content video, content audio, presenter video and presenter audio, as well as distributing a combination of content video, content audio, presenter video and presenter audio to a digital sink via a high-definition multimedia interface (HDMI) connection. Video sources are automatically routed to the digital sink depending on the source configuration.
US09659500B2	Safety monitoring in systems of mobile assets Systems and methods for safety monitoring are described. Mobile assets may receive safety monitoring notifications responsive to one or more safety criteria being met. A driver or other user of the mobile asset may be prompted to acknowledge the safety monitoring notification. If the user requests assistance or does not acknowledge the safety monitoring notification, notifications may be communicated to other individuals, e.g. supervisors. In this manner, the safety of, e.g. drivers in a fleet of vehicles may be monitored.
US09659493B2	Traffic beacon A flashing beacon may include a signal unit, a control unit associated with the signal unit, a solar panel or collector, and an activation device that may all be mounted or otherwise positioned on a post of a roadway sign. Light units associated with the signal unit may be programmed to flash on and off in a unique wig-wag pattern. Further, a light bar may also be used with the beacon to generate an intense flash of light soon after activation of the beacon as an additional means of grabbing the attention of the operator of a vehicle.
US09659491B2	Dynamic location referencing strands Systems and methods are described for referencing road strands. Speed data for a set of adjoining road segments is identified. Using at least one of the adjoining road segments, a strand database for is accessed to retrieve a predetermined strand of road segments. An aggregate speed value for the predetermined strand of road segments is calculated based on the speed data for the set of adjoining road segments represented by the predetermined strand of road segments. The aggregate speed value is provided as a representative of traffic on the set of adjoining road segments represented by the predetermined strand of road segments.
US09659485B2	Self-testing smoke detector with integrated smoke source A device and method for self-testing fire detection devices that includes a smoke source housed within the fire detection device. The smoke source is typically a pressurized canister or cartridge, which stores or generates smoke or a smoke equivalent. In response to a signal from a controller, the smoke source releases the smoke or smoke equivalent in or near a sampling volume of the fire detection device to test the operation of the fire detection device. If the device is operating properly, it will be triggered in response to the smoke or a smoke equivalent.
US09659482B2	Context-based alerts for an electronic device Embodiments of the present disclosure provide a system and method for providing an output for an electronic device. In certain embodiments, an alert is output in accordance with a current alert mode, which are selected based on one or more environmental conditions. The environmental conditions may be detected using one or more environmental sensors. The alert can optionally include one or more of: an audio component, a haptic component and a visual component. One or more of alert components correspond to an aspect of the environmental condition detected by the one or more environmental sensors.
US09659479B2	System and method to indicate lack of usage for personal items A method, system and computer-usable medium for performing a usage monitoring operation on an item, comprising: defining a predefined criteria relating to usage of the item; monitoring usage of the item based upon input provided by a sensor associated with the item; and, generating an indication when the predefined criteria is detected.
US09659476B2	System to monitor the ingestion of medicines A system for monitoring ingestion of medicine (21) comprises forming a digestible radio frequency identification (RFID) tag (10). The RFID tag is attached to the medicine. The RFID tag and medicine are ingested. A signal from the RFID tag is monitored.
US09659474B1	Automatically learning signal strengths at places of interest for wireless signal strength based physical intruder detection A method for intruder detection is provided. The method includes determining received signal strength of a first wireless device, while the first wireless device is moved at random within a region and generating a profile of the received signal strength of the first wireless device. The method includes determining received signal strength of a second wireless device and issuing an alert, responsive to received signal strength of the second wireless device meeting the profile. An intruder detection system is also provided.
US09659471B2	Anti-theft apparatus for mobile device Provided is an anti-theft apparatus for a mobile device that does not disturb a customer when he or she observes and tests a mobile device in a shop and which can be efficiently used with various types of mobile devices. The anti-theft apparatus for a mobile device includes: a base attached to a back surface of a mobile device; a connecting terminal provided in a rear side of the base and connected to an access port of the mobile device; a separation sensor sensing separation of the mobile device from the base; and a distance control unit controlling the distance between the base and the connecting terminal.
US09659455B2	Games with persistent effects in player pick rounds A slot machine game feature provides for several types of persistent indicias in a player selection round. One type of persistent indicia can result not only awards an initial credit value when picked, like a regular pick result, but also have a persistent effect in the bonus round which continues to award another randomly-generated credit value in conjunction with each remaining or subsequent pick that the player makes in the bonus. Some versions include cumulative persistent effects, where multiple picks may uncover persistent prize features. Other persistent indicia cause other effects that persist through the player selection round.
US09659437B2	System and method for cross platform persistent gaming sessions using a mobile device Disclosed is a method for enabling cross platform persistent gaming sessions using a mobile device in a system that includes a game server, a network, one or more gaming machines, and one or more mobile devices. The method includes: associating a player's mobile device with one of the one or more gaming machines at which the player has a gaming session; presenting a player with an option to move their gaming experience to their mobile device when the player leaves the associated gaming machine if a gaming session is in progress; enabling the player to use its mobile device to continue playing a game after the player has left a proximity of the associated gaming machine by transferring the game from the associated gaming machine to the player's mobile device; and enabling transfer of funds between the associated gaming machine and the players' mobile device.
US09659435B2	System and method for providing off-site online based gaming A system and method for allowing wagers to be made on a game and awarding a payout as a function of an outcome of the game is provided. The game may played by a game server, located at a gaming facility, which is located at a predefined geographic location. A remote device may be provided at a location outside of the predefined geographic location. An agent, in communication with the game server and the remote device, may receive instructions from a patron via the remote device to place a wager on a game and for instructing the server to place the wager in response to receiving the instructions from the patron.
US09659433B2	System and method for providing remote wagering games in a live table game system Systems and methods for conducting multiple remote wagering games in a live table game system or similar system wherein the gaming symbols which are randomly generated as a result of a live table game are used to resolve the live table game and simulate play and resolve wagering outcomes of one or more remote wagering games which differ from the live table game.
US09659423B2	Personal authentication apparatus system and method A target authentication device includes an electrode to detect an electrical signal associated with a user of the device. The electrical signal represents an authentication code for the device. An authentication receiver module is coupled to the electrode. The module receives the electrical signal from the electrode and determines whether the electrical signal matches a predetermined criterion to authenticate the identity of the user based on the electrical signal. An authentication module is also disclosed. The authentication module includes one electrode to couple an electrical signal associated with a user to a user of a target authentication device, the electrical signal represents an authentication code for the device. An authentication transmission module is coupled to the electrode. The authentication transmission module transmits the electrical signal from the electrode. A method of authenticating the identity of a user of a target authentication device also is disclosed.
US09659419B2	Method of controlling mobile terminal based on location information and applying security policy based on priority rules, and system thereof A method for controlling a mobile terminal that includes receiving, at the mobile terminal, a security level of a defined location. The security level is set based on at least one of gate access information indicating a user of the mobile terminal is entering or exiting a gate, global positioning system (GPS) information of the mobile terminal, or an identifier (ID) of a wireless network apparatus scanned by the mobile terminal. The method further includes obtaining location information of the mobile terminal from a source that is determined according to the security level, identifying location of the mobile terminal based on the obtained location information, and applying a security policy to the mobile terminal based on the security level when the identified location corresponds to the defined location.
US09659417B2	Systems and methods for extraction and telemetry of vehicle operational data from an internal automotive network Systems, methods, and related computer programs are provided wherein vehicle operation data is extracted from an internal automotive network. In an embodiment, a method comprises: i) obtaining data available on the internal automotive network via iterative interrogation; ii) analyzing the obtained data to identify a set of candidate data values having at least one common feature within a suitable proximity margin; and iii) heuristically selecting a candidate data value best matching one or more selection criteria to identify a true value. These systems and methods allow data to be extracted from proprietary and non-proprietary busses in the internal automotive network.
US09659414B2	Control methodology for wireless fluid level sensor A control methodology for a wireless oil level sensor includes mounting a wireless oil pressure sensor to the oil plug of an engine. The oil pressure sensor detects a pressure which is used to determine a volume or level of oil in the oil pan. The oil level sensor can include an accelerometer sensor that can be excited by the vibration caused by the starting of the engine to “wake up” the sensor. The sensor can take an initial pressure reading at start up and associate the pressure reading with an oil level that can then be transmitted to a vehicle control unit. The sensor can remain idle until the accelerometer sensor no longer detects engine vibrations. The sensor is activated to take pressure readings at predetermined time intervals and to transmit an associated oil level to the vehicle central processor unit until a predetermined time period has expired.
US09659412B2	Methods and systems for displaying information on a heads-up display Methods and systems are provided for displaying information on a heads up display (HUD). A background image is captured with a camera. A plurality of regions of the background image are analyzed to determine a region-wise image attribute for each of the plurality of regions. A symbology having a symbology attribute is generated and overlaid on an overlay region of the background image to generate a heads up display image. The overlay region is one of the plurality of regions of the background image. The symbology attribute is adjusted based on the region-wise image attribute of the overlay region to generate an adjusted heads up display image. The adjusted heads up display image is displayed on the HUD.
US09659395B2	Systems, methods, and computer-readable media for generating and displaying visual images System, methods, and computer-readable media are provided that include receiving an input including data items for creating an account for a member on a website, where the data items include category and/or attribute selections, determining whether one or more category selections have been received, designating an image corresponding thereto, if the one or more category selections have been received, assigning an outer portion shape, based on a number of received category selections, determining whether attribute selections have been received, associating a visual indicator with each attribute selection, designating segments of the outer portion shape with the visual indicators associated with each of the attribute selections, generating an icon, based on the designated image and the assigned outer portion shape, wherein the one or more segments of the outer portion shape are designated visual indicators associated with each of the attribute selections, and displaying the icon.
US09659392B2	Method and system for utilizing transformation matrices to process rasterized image data A method and system render rasterized data by receiving non-rasterized page description language data and a corresponding transformation matrix representing transformation operations to be performed. The non-rasterized page description language data is rasterizing to create rasterized data. The corresponding transformation matrix is decomposed into a plurality of individual transformation operation matrices and a discrete transformation operation value, from each corresponding individual transformation operation matrix, is generated for each transformation operation to be performed upon the rasterized data. The transformation operations are performed upon the rasterized data based upon the generated discrete transformation operation values.
US09659387B2	Graphics primitive and color channels Graphics primitive and color channel techniques are described. In one or more implementations, image data is processed by a computing device to form a plurality of pixels and corresponding one or more color channels usable to define a color for a respective said pixel. A graphics primitive type is identified by the computing device associated with one or more of the pixels in the processed image data. The graphics primitive type is assigned by the computing device to the one or more pixels using at least one color channel.
US09659382B2	System and method for depth extraction of images with forward and backward depth prediction A system and method for spatiotemporal depth extraction of images with forward and backward depth prediction are provided. The system and method of the present disclosure provide for acquiring a plurality of frames, generating a first depth map of a current frame in the plurality of frames based on a depth map of a previous frame in the plurality of frames, generating a second depth map of the current frame in the plurality of frames based on a depth map of a subsequent frame in the plurality of frames, and processing the first depth map and the second depth map to produce a third depth map for the current frame.
US09659381B2	Real time texture mapping for augmented reality system A system and method for real-time texture mapping for an augmented reality system are described. A viewing device includes an optical sensor to capture an image of a real-world object. A texture extraction module extracts a texture of the image of the real-world object. A recognition module identifies the real-world object based on the captured image. A texture mapping module retrieves a virtual object corresponding to the identified real-world object, maps the texture to the virtual object, dynamically updates the texture to the virtual object in real time, and generates a visualization of the virtual object in a display of the viewing device.
US09659369B2	Radiological image radiographing display method and system thereof Targeting of a lesion which is performed by a stereoscopic biopsy device or the like is performed simply and highly accurately. Designation of a predetermined position in the stereoscopic image is received to acquire position information when a stereoscopic image is displayed, radiological images of radiographing directions are displayed as two-dimensional images, a mark based on the position information, which is designated in the stereoscopic image, is displayed in the two-dimensional images, designation of a predetermined position in the two-dimensional images is further received to acquire the position information after the mark is displayed.
US09659361B2	Measuring apparatus that generates positional deviation distribution of a pattern on a target object A measuring apparatus includes an optical image input unit to input optical image data of a figure pattern obtained by a pattern inspection apparatus, which inspects defects of a pattern on a target object to be inspected by scanning an inspection region of the target object, from the pattern inspection apparatus, a design data input unit to input design data of the pattern on the target object, a reference image generation unit to generate reference image data to be compared with the optical image data, by performing image development of the design data, a positional deviation distribution generation unit to generate positional deviation distribution by measuring a positional deviation amount of the pattern on the target object, by using the optical image data obtained from the pattern inspection apparatus and the reference image data having been generated, and an output unit to output generated positional deviation distribution of the pattern.
US09659352B2	Image denoising system and method A method, computer program product, and computer system for identifying a first portion of a facial image in a first image, wherein the first portion includes noise. A corresponding portion of the facial image is identified in a second image, wherein the corresponding portion includes less noise than the first portion. One or more filter parameters of the first portion are determined based upon, at least in part, the first portion and the corresponding portion. At least a portion of the noise from the first portion is smoothed based upon, at least in part, the one or more filter parameters. At least a portion of face specific details from the corresponding portion is added to the first portion.
US09659350B2	Image processing device and image processing method for image correction, and non-transitory computer readable recording medium thereof The present disclosure is to generate a high-quality image by correcting a predetermined correction target image based on a plurality of input images. In an image processing device 3, an image correcting section 160 detects a user tap gesture on a touch panel 250. When the position of the tap gesture is within foreground candidate areas detected by a foreground candidate area detecting section 140, the image correcting section 160 corrects a base image set by a base image setting section 120 in the areas corresponding to the foreground candidate areas.
US09659345B2	System and method of providing real-time dynamic imagery of a medical procedure site using multiple modalities A system and method of providing composite real-time dynamic imagery of a medical procedure site from multiple modalities which continuously and immediately depicts the current state and condition of the medical procedure site synchronously with respect to each modality and without undue latency is disclosed. The composite real-time dynamic imagery may be provided by spatially registering multiple real-time dynamic video streams from the multiple modalities to each other. Spatially registering the multiple real-time dynamic video streams to each other may provide a continuous and immediate depiction of the medical procedure site with an unobstructed and detailed view of a region of interest at the medical procedure site at multiple depths. As such, a surgeon, or other medical practitioner, may view a single, accurate, and current composite real-time dynamic imagery of a region of interest at the medical procedure site as he/she performs a medical procedure, and thereby, may properly and effectively implement the medical procedure.
US09659343B2	Transpose of image data between a linear and a Y-tiled storage format Systems, apparatus, articles, and methods are described including operations to transpose image data between a linear-type storage format and a Y-tiled-type storage format.
US09659335B2	Sample management for a sales call Systems and methods are provided that record details of product samples given to a customer. A request to add one or more product sample records is received, and in response, user interface showing product sample information for available product samples is presented. The user interface may include a field for entering a quantity of each product sample given to the customer. One or more product sample records is recorded corresponding to each product sample for which a quantity was entered in the user interface.
US09659327B2	Expense report system with receipt image processing A system and method for generating expense data for an expense report is disclosed. The method includes receiving receipt data that includes one or more data items pertaining to a transaction, where the one or more data items are obtained from characters optically recognized in receipt image data for the transaction, and the receipt data includes data indicating whether the transaction is a credit card transaction or a cash transaction. The method further includes, if the receipt data indicates the transaction is a credit card transaction, creating expense data for the expense report, where the expense data includes the receipt data and the receipt image data associated with the receipt data for the transaction, and the receipt data includes credit card data. If the transaction indicates the transaction is a personal credit card transaction, then the credit card data is personal credit card data.
US09659324B1	System, method, and computer program for aggregating fallouts in an ordering system A system, method, and computer program product are provided for aggregating fallouts in an ordering system. In use, a repository of fallout errors associated with an ordering system is maintained. Further, one or more fallout events associated with the ordering system are automatically detected. Additionally, it is determined that the one or more detected fallout events are associated with at least one fallout error associated with processing an order in the ordering system. Furthermore, it may be determined whether the at least one fallout error corresponds to one of a plurality of stored fallout errors stored in the repository of fallout errors, in response to determining that the one or more detected fallout events are associated with the at least one fallout error from processing an order in the ordering system.
US09659323B2	System for making financial gifts A computer-implemented method for electronic gift giving. An exemplary embodiment includes providing an internet site for access by a giver, prompting the giver to enter giver identification information, prompting the giver to enter recipient information, prompting the giver to enter a value of a monetary gift, providing a plurality of possible recommended gifts or transfers of funds, prompting the giver to recommend at least one gift or transfer of funds to be effectuated using the monetary gift, prompting the giver to select a presentation template from a plurality of recommended presentation templates, prompting the giver to transfer the value of the monetary gift to a gift account, and storing the value of the monetary gift and the at least one recommended gift or transfer in association with the presentation template for delivery to a recipient.
US09659313B2	Systems and methods for managing interactive features associated with multimedia content Methods and systems for managing interactive features associated with multimedia content are disclosed. One method includes applying a container to multimedia content using one or more computing systems, the container defining an interface through which metadata external to the multimedia content is linked with one or more portions of the multimedia content. The method further includes receiving a request for the multimedia content from a content consumer. The method also includes associating a set of metadata describing one or more interactive features with the multimedia content, the set of metadata linked to at least a portion of the multimedia content via the container and selected from a database including metadata defining interactive features capable of being associated with the multimedia content. The method also includes, upon receiving a request for playback of the multimedia content, providing the multimedia content and the one or more interactive features to the content consumer.
US09659309B2	Suggesting and/or providing ad serving constraint information Targeting information (also referred to as ad “serving constraints”) or candidate targeting information for an advertisement is identified. Targeting information may be identified by extracting topics or concepts from, and/or generating topics or concepts based on, ad information, such as information from a Web page to which an ad is linked (or some other Web page of interest to the ad or advertiser). The topics or concepts may be relevant queries associated with the Web page of interest, clusters, etc.
US09659298B2	Systems and methods for informing virtual agent recommendation Systems, methods, and apparatus for use in connection with at least one virtual agent. In some embodiments, at least one virtual agent is programmed to: identify a relationship between at least two persons; and make a recommendation for the at least two persons based at least in part on the relationship between the at least two persons.
US09659297B2	Biometric identification device The invention is directed towards methods, systems and apparatuses, see FIG. 1, (100) for providing secure and private interactions. The invention provides capability for verifying the identity of a party initiating an electronic interaction with another party through data input module (140) which is verified by the identity verification module (150), which further includes a self-destruct mechanism (153). Embodiments of the invention include secure methods for conducting transactions and for limiting the transfer and distribution of personal data to only those data that are absolutely necessary for the completion of the transactions. The invention facilitates the transfer of additional personal data contingent upon an agreement that appropriately compensates the provider of the personal data.
US09659289B2	Customer touch point for real time sharing of transaction data between different customer interaction channels Techniques and equipment for enabling a cross-channel real time awareness framework for capturing and sharing transaction data in real time for a user via an interface of a channel of an enterprise are disclosed. The captured transaction data are made accessible to other channels of the enterprise for processing transactions initiated by the user via an interface of the one of the other channels.
US09659286B2	Point-of-sale terminal having a scanner shared by full and scan-only checkout modules Disclosed herein are methods and systems for executing a first transaction at a checkout system at substantially the same time that a second transaction is started at the checkout system. For example, a cashier can scan one or more items, adding the items to a first transaction. When all items have been added to the first transaction and a first customer is making a payment in the first transaction, the cashier can begin to add items to a second transaction, such that execution of the first transaction occurs at substantially the same time that items are added to the second transaction.
US09659282B2	Generating a visitation schedule The method includes identifying a location of an individual and an amount of time the individual will be in the location. The method further includes identifying one or more contacts of the individual that are within a threshold distance of the identified location of the individual during the identified amount time the individual will be in the location. The method further includes generating a first visitation schedule and corresponding visitation route for the individual based upon the identified status for the one or more contacts of the individual based upon social media activity, the identified frequency of interaction between the individual and the identified one or more contacts of the individual, and the determined distances from the individual to the identified one or more contacts and between each of the identified one or more contacts.
US09659281B2	System for managing scheduling conflicts A system that incorporates teachings of the present disclosure may include, for example, a proactive scheduler having a controller element to determine a scheduling conflict between a called party and a calling party according to calendar information of the called party and presence information of the called party. Additional embodiments are disclosed.
US09659278B2	Methods, systems, and computer program products for displaying tag words for selection by users engaged in social tagging of content Methods, systems and computer program products for displaying tag words for selection by users engaged in social tagging of content accessible via a communications network, are provided. A tag cloud, tag word inventory curve and slider control are displayed within a graphical user interface. The tag cloud is a visual representation of an inventory of tag words. The tag word inventory curve is a graphical representation of the words in the inventory by frequency of usage by others. The slider control is responsive to user movement, and is movable within a range that spans the length of the tag word inventory curve. Movement of the slider control changes the number of tag words from the inventory displayed in the tag cloud according to frequency of usage by others.
US09659276B2	Method and system for socializing events An example of a method includes determining, electronically, a social network associated with a user in response to the user visiting a web page. Further, the method includes determining, electronically, a first buddy of the user on the social network. Furthermore, the method includes identifying, electronically, a first event from events associated with the first buddy which matches an event associated with the web page. In addition, the method includes displaying the first event and information associated with the first buddy on the web page.
US09659265B2	Methods and systems for collecting and analyzing enterprise activities Various systems and methods are described for gathering events and analyzing the events and nodes associated with the events. Various arrangements may include receiving events from one or more applications. An event may include two nodes and an action. These events may be stored and processed to determine relations between nodes. These relations may then be processed to determine the similarity between nodes. Further, the nodes may be ranked according to the importance of the nodes as compared with each other.
US09659263B2	Project management notification and updates using family tree A method and apparatus for automated project management notification using an update family tree. The system utilizes a set of subscription service managers and a set of message processing managers to automatically manage the inter-relationship between a set of systems belonging to different entities within the overall family tree of entities working on a project. Each subscription service manager tracks the other entities interested in the updates and events from the host of the subscription service manager. The message processing managers receive the update events from the subscription service manager and apply a set of host defined rules that govern the automated processing of the received messages. In turn, the entity hosting each message processing manager may have its own set of subscribers that are managed by their respective subscription service manager.
US09659251B2	Systems and methods of autonomic virtual network management The disclosed invention involves a method and systems of autonomic virtual network, which relates to three basic inventions in the area of autonomic computing: (1) systems and methods of multi-loop autonomic manager, preemptive contact point, i.e. sensors and effectors, and software-defined hardware resource, or abstraction and virtualization of the hardware functions; (2) service-delivery virtual network in the area of distributed network, and application assurance systems and methods; and (3) integration of these two fields of inventions, namely autonomic managed virtual network, such that the management of virtual networks which provide service delivery, is able to achieve n-tier architecture system and method ACRA.
US09659250B2	Facility state monitoring method and device for same In case-based anomaly indication detection in a facility, there are problems such as error generation due to insufficient learning data or execution difficulty due to increased memory capacity and calculation time when the learning data period has been increased to obtain the learning data sufficiently. Provided is a method for monitoring facility state on the basis of a time series signal outputted from the facility, wherein an operation pattern label for each fixed interval is assigned on the basis of the time series signal, learning data is selected on the basis of the operation pattern label for each fixed interval, a normal model is created on the basis of the selected learning data, an anomaly measure is calculated on the basis of the time series signal and the normal model, and the facility state is determined to be anomaly or normal on the basis of the calculated anomaly measure.
US09659247B2	System and method for employing the use of neural networks for the purpose of real-time business intelligence and automation control A system and integration infrastructure to provide a distributed matrix or neural network of connected real-time decision support modules designed to perform business intelligence evaluations in real time. The system and integration infrastructure provide a network of intelligence superimposed upon any company's existing IT data centers, and cloud computing connections. The system is highly customizable to the unique business model deployed by the client company within the best practices of the client company's industry. Whether or not the client company has integrated their diverse enterprise systems, the elements of the matrix are annealed to the various data sources, transaction logs and client software installations currently deployed. These matrix elements or neurons are designed to house critical operational data, determined by the operational model of the client company to be of critical importance. When combined with monitor neurons, they automatically assess the gap between the desired state of a critical element and the current condition in real time. Trigger conditions are pre-established, but modified by an executive controller in real-time, and the system is pre programmed to automatically respond in a prescribed manner to critical conditions having been met even when these conditions come from otherwise stove-piped enterprise applications.
US09659241B1	Method for printing on a stationary flat media using a portable large format printer A method for operating a portable large format inkjet printer includes determining an output image size of an output image to be printed on a stationary flat media; selecting a source image to serve as the output image; displaying a preview of the output image superposed with an output image grid defining a plurality of output image area portions; selecting a serial order of printing each of the output image area portions; selecting a next output image area portion based on the serial order; printing the selected next output image area portion at a media print area of the stationary flat media; and repeating the acts of selecting the next output image area portion and printing, for each of the plurality of output image area portions, until an entirety of the output image area has been printed at the media print area of the stationary flat media.
US09659239B2	Machine learning device and classification device for accurately classifying into category to which content belongs An image acquisition unit of a machine learning device acquires n learning images assigned with labels to be used for categorization (n is a natural number larger than or equal to 2). A feature vector acquisition unit acquires a feature vector representing a feature from each of the n learning images. A vector conversion unit converts the feature vector for each of the n learning images to a similarity feature vector based on a similarity degree between the learning images. A classification condition learning unit learns a classification condition for categorizing the n learning images, based on the similarity feature vector converted by the vector conversion unit and the label assigned to each of the n learning images. A classification unit categorizes unlabeled testing images in accordance with the classification condition learned by the classification condition learning unit.
US09659238B2	Video object classification A system comprises an input component, a feature extractor, an object classifier, an adaptation component and a calibration tool. The input component is configured to receive one or more images, and the feature extractor is configured to extract features for one or more objects in the one or more images, the extracted features comprising at least one view-independent feature. The object classifier is configured to classify the one or more objects based at least in part on the extracted features and one or more object classification parameters, and the adaptation component is configured to adjust the classification of at least one of the objects based on one or more contextual parameters. The calibration tool is configured to adjust one or more of the object classification parameters based on likelihoods for characteristics associated with one or more object classes.
US09659235B2	Low-dimensional structure from high-dimensional data Low-dimensional structure from high-dimensional data is described for example, in the context of video foreground/background segmentation, speech signal background identification, document clustering and other applications where distortions in the observed data may exist. In various embodiments a first convex optimization process is used to find low dimensional structure from observations such as video frames in a manner which is robust to distortions in the observations; a second convex optimization process is used for incremental observations so bringing computational efficiency whilst retaining robustness. In various embodiments error checks are made to decide when to move between the first and second optimization processes. In various examples, the second convex optimization process encourages similarity between the solution it produces and the solution of the first convex optimization process, for example, by using an objective function which is suitable for convex optimization.
US09659228B2	Image processing apparatus, image processing system, non-transitory computer readable medium, and image processing method An image processing apparatus includes an image information obtaining unit that obtains image information regarding a process target image on which image processing for adjusting an impression of an image to that of a sample image is performed, and image information regarding the sample image, a feature value extraction unit that extracts feature values of the process target image and those of the sample image, an image adjustment unit that adjusts the feature values of the process target image to those of the sample image, and an image display unit that temporarily displays, on the process target image, an image obtained by adjusting the feature values of the process target image to those of the sample image, within a predetermined area in response to a first operation, and thereafter displays an entire image obtained after image processing in response to a second operation.
US09659222B2	Vehicle event data recorder and operation method thereof A vehicle event data recorder and an operation method thereof are provided. The vehicle event data recorder includes a photography module, a database, a first image-processing circuit and a second image-processing circuit. The photography module is configured to capture the scene and output an original video frame. The first image-processing circuit generates a first video frame according to part or all of the original video frame, and records the first video frame into a database. The second image-processing circuit generates a second video frame according to part or all of the original video frame, and records the second video frame into the database. Wherein, the view angle of the second video frame is different from the view angle of the first video frame.
US09659214B1	Locally optimized feature space encoding of digital data and retrieval using such encoding A digital document is represented as a set of codes comprising indices into a feature space comprising a number of subspaces, each code corresponds to one subspace and identifying a cell within the subspace. Each digital document can be represented by a code set, and the code set can be used as selection criteria for identifying a number of digital documents using each digital document's corresponding code set. By way of some non-limiting examples, digital document code sets can be used to identify similar or different digital images, used to identify duplicate or nearly-duplicate digital images, used to identify similar and/or different digital images for inclusion in a recommendation, used to identify and rank digital images in a set of search results.
US09659203B2	Low power multi-core decoder system and method A portable data terminal including a multi-core processor having at least a first core and a second core, at least one illumination assembly and at least one imaging assembly and data storage means configured to store a plurality of program instructions, the program instructions including at least one one-dimensional decoder and at least one two-dimensional decoder.
US09659201B2	Information code, information code producing method, information code reader, and system which uses information code An information code producing apparatus produces a free space inside the code region of an information code arranged on a medium such as sheets of paper. The free space is arranged at a position other than specification pattern regions. Data being interpreted, which are expressed by cells, are not recorded in the free space. The free space has a preset size which is larger than that of a single cell. The information code producing apparatus detects the size of this free space by, at least, either selection from a plurality of candidate shapes prepared in advance or input of shape designating information provided from the outside.
US09659195B2	Tone-based wake up circuit for card reader A card reader for a point-of-sale system that is configured to accept both magnetic strip-type and integrated circuit (IC) chip-type payment cards. The card reader is a component of a point-of-sale system including a portable computing device in communication with the card reader that is configured to present a first graphical user interface (GUI) when a magnetic stripe-type card is detected and a second GUI when an IC chip-type card is detected in the card reader. The card reader comprises a slot configured to receive the payment card, a magnetic reading device and an IC chip reading device. The card reader also includes a discriminator contact disposed within the slot that is configured to conduct across a surface of a metal pad of the IC chip-type card prior to the CI chip reading device making contact with the IC chip.
US09659189B2	Systems and methods of safeguarding user information while interacting with online service providers The disclosed technology includes techniques for improving data privacy in mobile communications over public cloud services. According to certain implementations, a novel conceptual layer may be interposed between the “application” layer and the “user” layer. In some implementations, the conceptual layer may be at least partially embodied by a transparent window or pane overlaid on top of existing app graphical user interfaces to: (1) intercept plaintext user input before transforming the input and feeding it to an underlying app; and (2) reverse transform output data from the app before displaying the plaintext data to the user. Accordingly, the conceptual layer may serve as a protective layer while preserving the original application workflow and look-and-feel.
US09659177B1	Authentication token with controlled release of authentication information based on client attestation An authentication token configured to generate authentication information comprises an attestation module. The attestation module of the authentication token is configured to receive an attestation generated by an attestation module of a client, to perform a check on the received attestation, and to release the authentication information to a designated entity if the check indicates that the attestation is valid. The designated entity may comprise the client itself or another entity that participates in an authentication process involving at least one of the authentication token and the client. The authentication token in performing the check on the attestation received from the client may determine if the received attestation conforms to a predetermined policy. The attestation may comprise a platform attestation generated by the client for a given instantiated software stack of the client.
US09659175B2	Methods and apparatus for identifying and removing malicious applications A system, method, and apparatus for identifying and removing malicious applications are disclosed. An example apparatus includes an analysis server configured to receive from an executable application operating on a client device a data structure including information identifying processes operating on the client device during a time period and analyze the data structure to identify a malicious application by determining which of the processes on the client device were triggered after an application server was accessed by the executable application and identifying processes associated with the malicious application by comparing the determined processes to records of processes of a device similarly configured as the client device. The apparatus also includes a remover configured to determine files on the client device that are associated with the identified malicious application and transmit instructions to the executable application causing the executable application to remove the malicious application from operation on the client device.
US09659174B2	Apparatus, system, and method for protecting against keylogging malware and anti-phishing An apparatus, system, and method is disclosed for protecting against key logger malware. The protection includes protection form grabbing keylogger malware. In response to detecting a form submission event from a browser associated with a user entering data into a form, confidential data is cleared to prevent it being captured by malware. Additional protection of data inputs, entered at a driver level, may be provided as an additional level of protection against hook based malware operating at a virtual keyboard level or operating system level. Data inputs received at a physical driver level may be protected as they pass through a virtual keyboard level and an operating system level. The projection against malware may be provided as a preventive measure that does not require detection of the key logger malware itself.
US09659170B2	Securing data on untrusted devices One example method for securing data on untrusted devices includes the steps of identifying, by a first process, a command in a command queue, the command from a second process and comprising an action on secure data; determining whether the command is permitted based on the action and a user credential; and responsive to determining the command is not permitted, removing, by the first process, the command from the command queue.
US09659165B2	Method and apparatus for accessing corporate data from a mobile device A computer-implemented communication method performed by a computerized device and a computerized communication apparatus, the method comprising: receiving by a buffer server a first communication request and a device key from a mobile device; verifying the device key and a buffer server key; sending a request with details associated with the device key and the buffer server key, to a corporate server; receiving a response from the corporate server; removing data from the response, and sending a reduced response to the mobile device; receiving a user identification and a second communication request from the mobile device, for the data that has been removed; and sending the data that has been removed to the mobile device, upon verifying the user identification.
US09659162B2	Sensor derived authentication for establishing peer-to-peer networks Methods, systems and devices for generating an authentication key are provided. Two or more communications devices can generate an authentication key by monitoring a physical stimulus that is experienced by both devices (e.g., a common physical stimulus). Each device can then use an identical, predetermined algorithm to generate a common authentication key based on the stimulus. The devices can use the common authentication key to establish a secure network.
US09659161B2	Authentication management system, authentication management apparatus, authentication method, and storage medium An authentication management system for managing use of a processing apparatus includes an authentication management apparatus including a position storing unit to store position information of the processing apparatus; a receiving unit to receive user information that identifies a portable terminal to be used for authenticating when a user requests the processing apparatus via a requester to perform a target process; a determination unit to determine whether distance between the portable terminal and the processing apparatus satisfies a proximity determination condition between the portable terminal and the processing apparatus, the distance being obtained based on position information of the portable terminal received from the portable terminal, and the position information of the processing apparatus; and an authentication unit to conduct authentication processing based on user information received from the requester, and the user information received from the portable terminal when the distance satisfies the proximity determination condition.
US09659158B2	Technologies for determining confidence of user authentication Technologies for determining a confidence of user authentication include authenticating a user of a computing device based on a set of authentication factors and a fusion function that fuses the set of authentication factors to generate an authentication result. A false accept rate and a false reject rate of the authentication result is determined, and an authentication confidence for the authentication result is determined. The authentication of the user is performed passively, without interruption or interruption of the user. If the authentication confidence is below a threshold value, an active authentication procedure may be performed.
US09659152B2	Computer-implemented technique for defining a bone cut A technique for generating a data set that geometrically defines a bone cut configuration for transverse maxillary distraction is using a computer-implemented method. An aspect of the technique comprises creating a numeric model of a maxilla based on patient-specific data of the maxilla. The numeric model is representative of mechanical properties of the maxilla. Based on the numeric model thus generated, one or more cut configurations for one or more bone cuts on at least one of a left hand side and a right hand side of the maxilla are determined. Each cut configuration has been determined to compensate for asymmetric mechanical properties of the maxilla. In a further step, a data set indicative of the one or more cut configurations thus determined is generated. The data set may be used to create a surgical template or jig, for computer-assisted surgery or a surgical navigation system.
US09659150B2	Method for assessing cognitive function and predicting cognitive decline through quantitative assessment of the TUG test Methods and systems may provide for cognitive decline prediction or assessment. Baseline and follow-up inertial sensor data may be received from one or more inertial sensors attached to a person. Baseline and follow-up data indicative of cognitive decline may be received from the person. An indication of cognitive decline may be determined based on the baseline and follow-up cognitive decline data. A classifier function for predicting cognitive decline may be trained with the baseline inertial sensor data and the indication of cognitive decline. A classifier function for assessing cognitive decline may be trained with the baseline inertial sensor data, a difference between the baseline inertial sensor data and follow-up inertial sensor data, and the indication of cognitive decline.
US09659149B2	Medical monitoring system based on sound analysis in a medical environment The invention relates to a medical monitoring system (100) based on sound analysis in a medical environment. A sound level analyzer (SLA, 10) is capable of providing an indicator for perceived levels of sound from a number of sound events, and a data storage modality (DSM, 20) is receiving and storing said indicator for perceived levels of sound and also corresponding information from an associated patient monitoring system (PMS, 60) handling information indicative of a physical and/or mental condition of a patient under influence by sound. A sound event analyzer (SEA, 30) is further being arranged for performing, within a defined time window, an overall sound analysis (ANA, 50) related to physical and/or mental condition of the patient that may be influenced by sound in order to assist or supervise medical personal with respect to the acoustic environment.
US09659147B2	Virtual physician office systems and methods Electronic records are formatted according to recipient addresses. When an electronic database record is received by a server or other device, the electronic database record has any formatting, herein termed a legacy format. The electronic database record is destined for delivery to device identified by a recipient address. The recipient address is associated with a software agent that reformats the legacy format into a different format. The electronic database record is thus reformatted according to software agent associated with the recipient address. A reformatted database record is thus sent to the recipient address, and the reformatted database record has the different format.
US09659144B2	Systems and methods for determining speed control management settings Methods and devices for determining speed control management settings are provided. A vehicle configuration is obtained, specifying at least a transmission, including a number of gears present in the transmission. One or more speed control management modules, such as progressive shift and/or gear down protection modules, are selected by a customer. One or more default progressive shift limits and a default gear down protection limit are calculated, along with gears for which they are active. Performance of the vehicle using the default speed control management settings is simulated and compared to typical vehicle performance. The customer may alter the speed control management settings within dynamically determined valid ranges. The speed control management settings are used in the manufacture or other configuration of the vehicle for the customer.
US09659139B2	Approach for performing improved timing analysis with improved accuracy One embodiment of the present invention includes a method for updating timing parameters after a circuit design change. The method includes, prior to the circuit design change, deriving a value for a first timing parameter based on a signoff timing analysis of a timing arc, and a value for a second timing parameter based on a quick timing analysis of the timing arc; and obtaining a first transition time based on the quick timing analysis. The method further includes, after the circuit design change, deriving a value for a third timing parameter based on the quick timing analysis, obtaining a second transition time based on the quick timing analysis, and deriving a fourth value for a fourth parameter based on the quick timing analysis, wherein the fourth parameter is based on the first, second, and third parameters and on the first and second transition times.
US09659138B1	Methods, systems, and computer program product for a bottom-up electronic design implementation flow and track pattern definition for multiple-patterning lithographic techniques Disclosed are techniques for implementing parallel fills for bottom-up electronic design implementation flow and track pattern definition for multiple-patterning lithographic processing. These techniques identify a canvas in a layout and design rules for track patterns and multiple-patterning, where the canvas is not yet associated with any base track patterns. A first shape having the first width is inserted along a first track in the canvas based on the design rules. A custom, legal track pattern is generated by arranging multiple tracks in an order and further by associating the first width with the first track in the custom, legal track pattern. The layout may then be further modified by guiding the insertion of one or more additional shapes with the custom, legal track pattern.
US09659134B2	Computing device and method for determining wiring paths on printed circuit board A printed circuit board (PCB) layout method executed in a computing device obtains pins of a first electronic component that are connected to a second electronic component or third electronic components included in a T topology circuit. A model of the first electronic component is created according to the obtained pins and is modified to form extended nets of the first electronic component. Pin pairs and match groups are set. Wiring paths of the T topology circuit are determined according to the match groups. The wiring paths are output to an output device.
US09659132B2	Method of generating a target layout on the basis of a source layout Generating a target layout of an integrated circuit includes providing a source layout comprising one or more source pcells having one or more shapes; providing a set of connectivity constraints for connecting each shape of each source pcell to none, one, or more other components of the integrated circuit; for each shape of each source pcell, determining a corresponding target shape having a contour composed of edges with defined lengths, inserting none, one, or more edges into the contour of the shape, or into the contour of the corresponding target shape, determining a corresponding edge of the corresponding target shape; for each edge, defining an edge length constraint for constraining the edge to have the length of the edge of the corresponding target shape; applying a legalization procedure to the source layout based on the connectivity constraints, the target design constraints, and the edge length constraints.
US09659131B2	Copper feature design for warpage control of substrates An approach is provided in which a laminate substrate includes top layers, bottom layers, and a core layer. The top layers are positioned between the core layer and a top surface metallurgy (TSM) layer and include at least one top conductive layer. The bottom layers are positioned between the core layer and a bottom surface metallurgy (BSM) layer and include at least one bottom conductive layer includes a material void pattern that is based upon the top conductive layer and reduces warpage of the laminate substrate.
US09659129B2	Standard cell having cell height being non-integral multiple of nominal minimum pitch An integrated circuit, manufactured by a process having a nominal minimum pitch of metal lines, includes a plurality of metal lines and a plurality of standard cells under the plurality of metal lines. The plurality of metal lines extends along a first direction, and the plurality of metal lines are separated, in a second direction perpendicular to the first direction, by integral multiples of the nominal minimum pitch. At least one of the plurality of standard cells has a cell height along the second direction, and the cell height is a non-integral multiple of the nominal minimum pitch.
US09659124B2	Transport network Some embodiments provide a method of monitoring the implementation of a user design in a configurable integrated circuit (IC). The method receives a user design for an IC and optimizes the user design to produce a second IC design. The optimization results in the elimination of circuit element(s). The method defines the second IC design for the configurable IC and generates output data for the eliminated circuit element(s) to allow for monitoring the user design.
US09659122B2	Aerodynamic design optimization using information extracted from analysis of unstructured surface meshes A computer-implemented method of analyzing data representing the optimization of real-world designs of physical entities according to at least one criterion. Different modifications of the design are generated by a cyclic optimization algorithm. The design data is represented by unstructured triangular surface meshes. A displacement measure representing local differences between two design modifications of the different modifications is calculated. Performance difference between the two design modifications is calculated. The performance difference is represented by at least one criterion. Sensitivity information representing correlation between the displacement measure and the performance differences is outputted.
US09659112B2	Pipeline structure and computer readable recording medium having recorded thereon program for pipeline structure There are provided a pipeline structure and a computer readable recording medium having recorded thereon a program that supports the design of the pipeline structure. The pipeline structure includes two collars and a plurality of short pipes. The plurality of short pipes are connected by joint structures. Two collars are arranged to sandwich a zone where a fault displacement is expected to occur, and thereby, a ground displacement in the pipe axis direction is dealt with (absorbed). The plurality of short pipes are connected by the larger number of joints than the number of joints in the case of arranging a long pipe. By increasing the number of joints, it becomes easier to deal with (absorb) a ground displacement in the direction perpendicular to a pipe axis.
US09659109B2	System and method for query auto-completion using a data structure with trie and ternary query nodes A method of providing predictive search query recommendations for a search query. The method can be implemented via execution of computer instructions configured to run at one or more processing modules and configured to be stored at one or more non-transitory memory storage modules. The method can include receiving the search query from a user. The method also can include determining the predictive search query recommendations for the search query using a tree data structure. At least one top layer of the tree data structure can include at least one trie query node and bottom layers of the tree data structure can include ternary tree query nodes. The method further can include sending the predictive search query recommendations to the user. Other embodiments of related systems and methods are also disclosed.
US09659108B2	Pluggable architecture for embedding analytics in clustered in-memory databases Disclosed are pluggable, distributed computing-system architectures allowing for embedding analytics to be added or removed from nodes of a system hosting an in-memory database. The disclosed system includes an API that may be used to create customized, application specific analytics modules. The newly created analytics modules may be easily plugged into the in-memory database. Each user query submitted to the in-memory database may specify different analytics be applied with differing parameters. All analytics modules operate on the in-memory image of the data, inside the in-memory database platform. All the analytics modules, may be capable of performing on-the-fly analytics, which may allow a dynamic and comprehensive processing of search results.
US09659107B2	Image processing apparatus, image processing method, and storage medium An object including at least one element is moved on a document in which the object is arranged in response to an instruction from a user.In addition, if the object is moved to a boundary between two pages, at least one element that is included in the object and that corresponds to a break position of the two pages is detected.Then, a position where the at least one detected element is arranged in the document is determined so that the element is arranged in either of the documents of the two pages and an image corresponding to the document is output.In the above manner, it is possible to appropriately arranging elements in a document to output an image corresponding to the document having the elements appropriately arranged therein.
US09659101B2	Method and apparatus for abstracting internet content A method and apparatus for abstracting Internet content is disclosed. An apparatus that incorporates teachings of the present disclosure may include, for example, a terminal device having a user interface element that links a graphical user interface element to each internet resource identifier of one or more subject matters of interest defined in a profile by an end user, and presents the one or more graphical user interface elements in a graphical user interface window without association to an Internet browser. Additional embodiments are disclosed.
US09659097B1	Propagating query classifications In general, one aspect described can be embodied in a method for determining a classification for a query. The method can include receiving a request to determine whether to assign a classification to a first query, identifying a plurality of search entities that are associated with the first query based upon data associated with each of the plurality of search entities and the first query, and determining whether to assign the classification to the first query based upon classifications for the identified search entities.
US09659096B2	Consumable data management The present invention relates to methods, devices and systems for associating consumable data with an assay consumable used in a biological assay. Provided are assay systems and associated consumables, wherein the assay system adjusts one or more steps of an assay protocol based on consumable data specific for that consumable. Various types of consumable data are described, as well as methods of using such information in the conduct of an assay by an assay system.
US09659088B2	Information processing apparatus and non-transitory computer readable medium It is a non-transitory computer readable medium storing a program causing a computer to execute a process for information processing, the process including: calculating a feature amount of each of document contents to which common attribute information is added; and generating distribution map information by plotting each of document contents in a feature amount space on the basis of the calculated feature amount.
US09659087B2	Unsupervised prioritization and visualization of clusters Techniques are disclosed that automatically identify and order the most differentiated clusters from a given collection of clusters within a dataset. A measure of dissimilarity is computed for each cluster from a defined reference cluster, and the clusters are ordered according to the chosen dissimilarity. At least N clusters are selected as the most differentiated clusters relative to the defined reference. Within each cluster, the top-M most distinguishing cluster attributes can be automatically identified by an analogous process that computes the dissimilarity of each cluster attribute to its corresponding attribute in the reference cluster, and orders the attributes by dissimilarity. This then allows for automatic surfacing of what it is about a cluster that differentiates its members relative to the population as a whole, and to provide insight on what action or treatment might be made to address that specific segment of the underlying population.
US09659081B1	Independent data processing environments within a big data cluster system A cluster system includes an interface and a processor. The interface is to receive a request from a user associated with one of a plurality of shells. The processor is to determine a plurality of tasks to respond to the request; determine a local set of data and a shared set of data for a task of the plurality of tasks, wherein the local set of data is associated with the one of the plurality of shells; and provide the task, a local set indication, and a shared set indication to a worker associated with the task, wherein the local set indication refers to the local set of data and the shared set indication refers to the shared set of data.
US09659076B2	Systems and methods for database archiving A data storage system according to certain aspects can archive database data associated with different database applications. The data storage system according to certain aspects may provide database archiving modules that include logic incorporating and/or based on the native schema and/or native commands specific to particular database applications. The database archiving modules according to certain aspects may determine the relationship between tables associated with corresponding database applications and archive selected database data based on the native schema and native commands.
US09659066B2	Dynamic interest-based notifications Providing dynamic, interest-based change notifications includes detecting an event for an artifact managed by a collaborative system, determining a user subscribed to the artifact, and, responsive to the event, calculating a score for the event using a processor. The score is user-specific and indicates a level of interest of the user for the event. The score is compared with a threshold score. A change notification of the event is sent to the user responsive to determining that the score exceeds the threshold score.
US09659063B2	Systems and/or methods for event stream deviation detection Certain example embodiments described herein relate to systems and/or methods for event stream deviation detection. More particularly, certain example embodiments described herein relate to maintaining short and long-term statistics of an incoming stream of event data. In certain example embodiments, a deviation is calculated based at least in part on the long-term and short-term statistics. The deviation may then be compared to a threshold value. In certain example embodiments, the estimations required for the statistics are done with Kernel Density Estimators (KDEs).
US09659059B2	Matching large sets of words Word phrases are stored in a phrase structure. Each word is stored as a keyword in a keyword structure. Each keyword is associated with usage attributes identifying use of a word in a word phrase. Any preceding words associated with a keyword, and a mapping from any preceding words to a word phrase, is stored for each word. A word string is input. Match attributes are updated in a match structure if a word in the word string matches any keyword and if any preceding words associated with any matching keyword includes a preceding word which precedes the word in the word string. The match attributes indicate use of the matching word in the word string and in a word phrase. Whether a word phrase is present in the word string is determined based on the usage attributes and the match attributes associated with multiple matching words.
US09659056B1	Providing an explanation of a missing fact estimate Systems and methods are disclosed for providing an explanation of an estimate for information missing from a data graph. An example method may include receiving a query that requests information for a first entity and receiving an estimate for the information, the estimate being based on a plurality of features of a joint distribution model. The method may include determining respective contribution scores for the plurality of features, selecting a quantity of the features with highest contribution scores, generating, using the selected quantity of features, an explanation for the estimate; and providing the explanation and the estimate as part of a search result for the query.
US09659050B2	Delta store giving row-level versioning semantics to a non-row-level versioning underlying store A delta store giving row-level versioning semantics to a non-row-level versioning underlying store is described. An example method includes establishing a column-based in-memory database including a main store and a delta store, where the main store does not allow concurrent transactions on a same table and the delta store has a plurality of row-visibility bitmaps implementing a row-level versioning mechanism that allows concurrent transactions on the same table. A transaction associated with the column-based in-memory database is received. For each table read by the transaction, a version of the table in the delta store that represents a transaction-consistent snapshot of the database visible to the transaction is determined. Each table is represented in the main store and the delta store; and each version of the table is represented by one or more bitmaps. Upon execution of a DML as part of the transaction, for each table written by the transaction, the data changes generated by the transaction is recorded in the one or more bitmaps that represent a private version of the table. Upon commit of the transaction, for each table written by the transaction, a new public version of the table is generated based on the private version of the table, and the public version represents a new transaction-consistent snapshot of the database visible to subsequent transactions.
US09659049B2	Creating and managing granular relationships on an online social network This disclosure provides some implementations of methods, apparatus, systems, and computer program products for creating and managing granular relationships on an online social network. In some implementations, a request to generate an information feed is associated with configuration information, which identifies a source of information updates. Each of the information updates can be of a certain type. The configuration information identifies one or more of these types. An information update can be selected from the identified information source. The selected information update has one or more of the types associated therewith. The requested information feed is generated to include the selected information update and displayed on a display device.
US09659037B2	Management method and system for implementation, execution, data collection, and data analysis of a structured collection procedure which runs on a collection device Embodiments related to a system and method managing the implementation, execution, data collection, and data analysis of a structured collection procedure running on a portable, hand-held collection device are disclosed. The collection device performing the structured collection procedure has program instructions that when executed by a processor causes the processor to initiate automatically a schedule of events of the structured collection procedure upon one or more entry criterions being met at some unknown time, store in memory patient data collected in accordance to the schedule of events, end automatically the structured collection procedure upon one or more exit criterions being met at some unknown time, and mark/indicate the structured collection procedure as completed if no exception occurred during performance of an event in the schedule of events.
US09659036B2	Adaptive relational database access An approach is provided that receives an alteration request to mark a selected column in a database table as an unused column. A database control table is then updated to indicate that the selected column is unused. After the database control table is updated, when a read request is received for the selected column, the same data is returned for the selected column for each row being read and this data is not stored in the database table.
US09659034B2	Method of providing capture data and mobile terminal thereof A method of providing capture data, performed by a mobile terminal, is provided. The method includes sensing a user's gesture requesting a capture panel, and displaying the entire capture panel, which was partially displayed at a side of a screen or was hidden, according to the user's gesture requesting the capture panel. The capture panel displays a list of capture data including an image and meta data corresponding to each of at least one content captured by the mobile terminal.
US09659023B2	Maintaining and using a cache of child-to-parent mappings in a content-addressable storage system Techniques for maintaining and using cached child-to-parent mappings in a content-addressable storage system are provided. A cache of child-to-parent mappings is maintained. Each child-to-parent mapping corresponds to a particular chunk in a hierarchy of chunks stored in a content-addressable chunk store, and maps the particular chunk to a parent chunk in the hierarchy of chunks. The hierarchy of chunks includes a first root chunk associated with a file system volume. In response to a change to the file system volume that causes associating a new root chunk with the file system volume, the cache is updated by adding one or more first child-to-parent mappings based on traversing at least a portion of a current file system hierarchy from the new root chunk, and removing one or more second child-to-parent mappings based on traversing at least a portion of a prior file system hierarchy from the first root chunk.
US09659004B2	Retrieval device and method A processor performs semantic analysis on a query and generates one or more semantic structures where each structure is expressed by a graph. The processor generates retrieval keys corresponding to combinations of nodes connected directly or indirectly in the semantic structures, in addition to retrieval keys corresponding to minimum units of semantic connections between nodes in the generated semantic structures. The processor retrieves relevant documents whose sentences are matched to combinations of nodes, by using the generated retrieval keys, in the semantic structures stored in an index for retrieval on a database storing the documents.
US09659003B2	Hybrid language processing For hybrid language processing, a method is disclosed that includes identifying, by use of a processor, one or more user specific terms in a user generated portion of text, modifying the portion of text by replacing one or more of the user specific terms with general tokens, and converting the modified portion of text to one or more commands to be executed by the processor.
US09658998B2	Systems and methods for internationalization and localization Webpage content is sent to a user's web browser in a neutral format. On the user's web browser the webpage content is translated by a transformation application into the appropriate language and locale. A Language template file that contains the internationalization and localization data and processing components is loaded onto a browser and is used by the transformation application to render the final data to the user. The transformation application can render a new language and locale by loading an appropriate language template file.
US09658987B2	Regression using M-estimators and polynomial kernel support vector machines and principal component regression Embodiments of the invention relate to sketching for M-estimators for performing regression. One embodiment includes providing one or more sets of input data. A matrix A and a vector b are generated using the input data. A processor device is used for processing the matrix A and the vector b based on a randomized sketching matrix S. A vector x that minimizes a normalized measure function is determined based on the matrix A and the vector b. A relationship between the input data is determined based on the vector x.
US09658984B2	Method and apparatus for synchronizing multiple MAC tables across multiple forwarding pipelines Embodiments provide techniques for synchronizing forwarding tables across forwarding pipelines. One embodiment includes receiving, in a network switch comprising a plurality of forwarding pipelines, a plurality of data packets. Each of the plurality of data packets corresponds to a respective one of the plurality of forwarding pipelines. Each of the plurality of forwarding pipelines maintains a respective forwarding table corresponding to a respective plurality of ports managed by the forwarding pipeline. A plurality of update operations to be performed on the forwarding tables are determined, based on the received plurality of data packets. Embodiments further include performing the plurality of update operations on the forwarding tables, such that the forwarding tables across all forwarding pipelines of the plurality of forwarding pipelines are synchronized.
US09658971B2	Universal SPI (serial peripheral interface) A Universal SPI Interface is provided that is compatible, without the need for additional interface logic or software, with the SPI bus, existing DSA and other serial busses similar to (but not directly compatible with) the SPI bus, and parallel busses requiring compatibility with 74xx164-type signaling. In an additional aspect, a reduced-pincount Universal SPI Interface is provided that provides the same universal interface, but using fewer external output pins. The Universal SPI Interface includes multiple latches, buffers, and in an alternative embodiment, a multiplexer, configured together such that a Universal SPI interface is provided that can be readily reconfigured using only input signals to provide compatibility across multiple bus interfaces.
US09658968B1	Implementing hardware accelerator for storage write cache management A method and controller for implementing enhanced storage adapter write cache management, and a design structure on which the subject controller circuit resides are provided. The controller includes a hardware write cache engine implementing hardware acceleration for storage write cache management. The controller manages write cache data and metadata with minimum or no firmware involvement for greatly enhancing performance.
US09658955B2	Data storage device and operating method thereof A data storage device includes a plurality of memory apparatuses, a searching unit configured to search for “k” physical addresses mapped to “k” continuous logical addresses, and a processor configured to determine numerical consecutiveness of “i” logical addresses mapped to “i” continuous physical addresses consecutive to an Kth physical address of the “k” physical addresses, and transmit a first pre-read command with respect to a first pre-read memory area corresponding to the “i” continuous physical addresses and first read-estimated physical addresses consecutive to the “i” continuous physical addresses when the numerical consecutiveness is admitted.
US09658953B2	Single command, multiple column-operation memory device A memory access command, column address and plurality of write data values are received within an integrated-circuit memory chip via external signaling links. In response to the memory access command, the integrated-circuit memory chip (i) decodes the column address to select address-specified sense amplifiers from among a plurality of sense amplifiers that constitute a sense amplifier bank, (ii) reads first data, constituted by a plurality of read data values, out of the address-specified sense amplifiers, and (iii) overwrites the first data within the address-specified sense amplifiers with second data constituted by one or more of the write data values and by one or more of the read data values.
US09658950B2	Performance testing of web components using identity information Performance testing of web components using identity information includes providing a web component for testing having business logic code and an associated authorization layer code, locating, using a processor, branches in the authorization layer code and the business logic code which are dependent on identity information, and creating, using the processor, symbolic identities with claims or attributes having values corresponding to the branch options of the located branches. The method also includes propagating the symbolic identities downstream from the branch locations through the authorization layer code and the business logic code and analyzing, using the processor, the performance of each symbolic identity.
US09658944B2	Generic test automation for graphical user interface (GUI) applications A method for generic test automation comprises mapping generic interface commands for objects to be tested to tool-specific interface commands of a test automation tool. An application-specific element map based on an application for test is identified, and the application-specific element map includes label names for the elements of the application-specific element map. Application-specific user actions, which are created based on the generic interface commands and the application-specific element map, are sent to the test automation tool for testing the application.
US09658942B2	Dynamic tracing framework for debugging in virtualized environments Embodiments of the present invention provide a system and method for a dynamic tracing framework for debugging in a virtualized environment. Embodiment of the present invention can include selecting a home node and a set of remote nodes to which apply a set of probes. Data collection is performed by a tracing agent of each node and the collection of data is shared across multiple software systems.
US09658930B2	Method and device for managing hardware errors in a multi-core environment A method and device for managing hardware errors in a multi-core environment includes allocating processor cores to a main set and a spare set of processor cores. The main set of processor cores are used by an operating system, and the spare set of processor cores are dedicated to software applications. Should a processor core error occur, a processor core swap may be performed to swap a spare processor core for a failing main processor core without interrupting the execution of the operating system.
US09658925B1	Systems and methods for restoring application data A computer-implemented method for restoring application data may include (1) identifying a virtual disk image used by a virtual machine to represent a volume of data within the virtual machine used for storage by an application within the virtual machine, (2) identifying a request to back up the virtual disk image, and, in response to the request, (3) identifying, within the volume of data, at least one file including application data used by the application, (4) generating application metadata and a catalog associating a logical view of the application data with the file, the logical view being based on application logic of the application, (5) backing up the virtual disk image, and (6) associating the catalog with the backed up virtual disk image. Various other methods and systems are also disclosed.
US09658922B2	Computer-readable recording medium having stored therein program for write inspection, information processing device, and method for write inspection An information processing device that inputs and outputs data into and from a storage device having a plurality of regions, and includes a processor that: changes a first counter value corresponding to a first region serving as a writing target and being retained in a retainer retaining multiple counter values one representing the number of times of data writing into each of the regions; obtains the first counter value from the retainer; generates block data by attaching the first counter value to data to be written into the first region; writes the block data into the first region; when the first counter value satisfies a predetermined condition, reads the block data from the first region after the writing, and compares the read block data with the block data written into the first region, and when the read block data does not match the written block data, notifies an error.
US09658913B2	Method for continuous operation of controller functionality during transient frame overrun A method of adaptively reconfiguring controller functions during a frame overrun. A frame overrun condition is detected. A respective task from a plurality of tasks is identified as a largest contributor to the frame overrun. A mode associated with the identified task is identified to correct the frame overrun. Functions are reallocated within the identified task to one or more other tasks until the frame overrun condition is corrected. Respective functions reallocated are identified as a function of the identified mode.
US09658911B2	Selecting a directory of a dispersed storage network A method begins by a processing module receiving a dispersed storage network (DSN) access request accessing DSN memory regarding a set of encoded data slices, selecting a local DSN directory or a global DSN directory to produce a selected DSN directory, identifying an entry of the selected DSN directory regarding the set of encoded data slices to produce an identified entry, and accessing the DSN memory regarding the set of encoded data slices. The method continues with the processing module determining whether to update one or more of the local DSN directory and the global DSN directory based on the accessing the DSN memory and when the one or more of the local DSN directory and the global DSN directory is to be updated, updating the one or more of the local DSN directory and the global DSN directory in accordance with the accessing the DSN memory.
US09658909B2	Information processing apparatus, information processing method, and information processing program An information processing apparatus includes a storage configured to store trace information relating to execution conditions of monitoring subjects, and a determination value, the determination value being a number of the monitoring subjects using a specific resource that can be used by the monitoring subjects, and a processor configured to increase the determination value by a predetermined value when one of the monitoring subjects starts to use the specific resource, reduce the determination value by the predetermined value when one of the monitoring subjects stops using the specific resource, and delete the trace information stored in the storage when the determination value indicates that none of the monitoring subjects are using the specific resource.
US09658907B2	Development tools for refactoring computer code Methods of calculating a maintainability index are provided. The methods include, for each function in software code for an existing software product, locating errors related to the function in the software code in a common historical error database; filtering the located errors for the function based on developer experience; calculating a percentage of errors for the function based on the filtered located errors for the function and successful compiles for the function; and providing a maintainability index for the function based on the calculated percentage of errors.
US09658905B2	Information processing apparatus and method for carrying out multi-thread processing For a thread where data is to be popped off of queue storage, whether or not there is data that can be popped out of the queue storage accessed is first checked and then the data, if any, is popped. When there is no such data, the thread pushes thread information, including the identification information of its own thread, on the same queue and then releases a processor and shifts to a standby state. For a thread that is to push the data, when there is the thread information in the queue, it is determined that there is a thread waiting for the data, and then the data is sent after the thread information has been popped, which in turn resumes the processing.
US09658903B2	Event processing method and apparatus An event processing method and apparatus which relate to the field of data processing technologies and applicable to a device on which a system having a pattern matching function runs, and reduce memory overheads when a complex event processing (CEP) system performs pattern matching in a complex scenario. The method includes performing, by a state machine instance, matching in a current matching period after an Xth event occurs, detecting, by the state machine instance, whether a quantity of events that have currently occurred is greater than 1 when no result indicating successful matching is obtained, and setting a time when an (X+1)th event occurs as a start time of a next matching period when the quantity of events that have currently occurred is greater than 1, and performing matching again in the next matching period.
US09658902B2	Adaptive clock throttling for event processing Methods, apparatuses, and computer program products for adaptive clock throttling for event processing are provided. Embodiments include an event processing system receiving a plurality of events from one or more components of the distributed processing system. Embodiments also include the event processing system determining that an arrival attribute of the plurality of events exceeds an arrival threshold. Embodiments also include the event processing system, adjusting, in response to determining that the arrival attribute of the plurality of events exceeds the arrival threshold, a clock speed of at least one of the event processing system and a component of the distributed processing system.
US09658889B2	Isolating applications in server environment Managing memory allocation for application deployment on a J2EE® server. The server receives applications for processing. The server also receives defined memory boundaries of the application. A custom memory-aware classloader is generated on the server and tracks memory allocated to the application during application processing. Excess memory usage characteristic of the application is detected, and an out of memory exception is thrown, without affecting other applications on the server. A responsive action is taken without affecting other applications processed by the server.
US09658884B2	Smart data staging based on scheduling policy An embodiment includes selecting a job to upload to a remote system, uploading a portion of data for the job to the remote system, and receiving notice that the portion of data for the job has been staged at the remote system. The embodiment also includes, based on the portion of data being staged, instructing the remote system to begin performing operations for the job on the portion of the data, where after the remote system begins to perform the operations for the job on the portion of data prior to all data for the job being uploaded. From an alternate perspective an embodiment includes receiving a description of a job to be performed on data, receiving a portion of the data, receiving an instruction to begin performing computations on the portion of data, and beginning to perform identified computations on the portion of data before receiving all the data.
US09658883B2	Method and apparatus for controlling job schedule A controller apparatus obtains job history information including execution records of one or more jobs not registered in a scheduler. Based on the job history information, the controller apparatus then estimates resource usage during execution time periods initially scheduled for jobs registered in the scheduler. This resource usage includes that of at least one of the jobs not registered in the scheduler which is to be executed together with the registered jobs on an information processing apparatus. When the estimated resource usage satisfies predetermined conditions, the controller apparatus schedules jobs including the registered jobs and the at least one of the non-registered jobs.
US09658871B2	Providing configurable bootstrapping of software execution Techniques are described for facilitating execution of software programs in a configurable manner, including to configure bootstrapping operations that are performed at startup of the software programs. At least some of the software programs may be software images that each include, for example, a defined file system, an operating system, and one or more application programs. In addition, configuration of the software programs' startup may include using distinct bootstrap packages that each include their own distinct file system, such that loading of a bootstrap package within a software image includes adding the included file system of the bootstrap package to a new location within the defined file system of the software image (e.g., by mounting the included file system of the bootstrap package within the defined file system of the software image, and optionally removing the included file system of the bootstrap package after bootstrapping operations are completed).
US09658867B2	Preserving object code translations of a library for future reuse by an emulator Provided is a method of preserving object code translations of a library for future reuse by an emulator. A munmap(2) system call is intercepted from an application for unmapping a mapped library memory address. A determination is made if an entry related to the mapped library memory address is present in a first predefined data structure. If said entry is present, a determination is made if the mapped library memory address corresponds to a library text or library data. If the mapped memory address corresponds to the library text, said entry is flagged as inactive in the first predefined data structure, and an object code translation of the library text is preserved in the mapped library memory address. If the mapped library memory address corresponds to the library data, contents of the mapped address are reset to zero.
US09658855B2	Compile method and compiler apparatus A compiler apparatus copies a branch instruction included in first code to produce a plurality of branch instructions. The compiler apparatus generates a control instruction to cause different threads running on a processor, which is able to execute a plurality of threads that share storage space for storing information to be used for branch prediction, to execute different ones of the plurality of branch instructions. The compiler apparatus generates second code including the plurality of branch instructions and the control instruction.
US09658850B2	Apparatus and method of improved permute instructions An apparatus is described having instruction execution logic circuitry. The instruction execution logic circuitry has input vector element routing circuitry to perform the following for each of three different instructions: for each of a plurality of output vector element locations, route into an output vector element location an input vector element from one of a plurality of input vector element locations that are available to source the output vector element. The output vector element and each of the input vector element locations are one of three available bit widths for the three different instructions. The apparatus further includes masking layer circuitry coupled to the input vector element routing circuitry to mask a data structure created by the input vector routing element circuitry. The masking layer circuitry is designed to mask at three different levels of granularity that correspond to the three available bit widths.
US09658836B2	Automated generation of transformation chain compatible class Automatically generating a software class that is compatible with a transformation chain class library. Such may be used to further populate the transformation chain class library with additional classes of software that was not originally generated as a transformation chain. In response to receiving a software representation, a dependency is identified in the software representation. It is then determined that the dependency corresponds to a dependency element of a transformation chain class of the transformation class library. Then, a software class is generated that corresponds to the software representation and that includes a dependency element that corresponds to the identified dependency, and that is recognized by a merging module as being compatible with the dependent element of the transformation chain class of the transformation chain class library. The software class may then be added to the transformation chain class library.
US09658835B1	Systems and methods for hardware resource sharing A system and method optimizes hardware description generated from a graphical program or model having oversampling constraints automatically. The system may include a streaming optimizer, a resource sharing optimizer, a delay balancing engine, and a global scheduler. The streaming optimizer may transform vector data paths to scalar or smaller-sized vector data paths. The resource sharing optimizer may replace multiple, functionally equivalent blocks with a single shared block. The delay balancing may insert one or more elements to correct for data path misalignment. The global scheduler may place portions of the program or model into conditional execution sections and create control logic that controls the model sample times or steps that the portions are enabled. A validation model, a report, or hardware description code that utilizes fewer hardware resources may be generated from a modified version of the model that is created.
US09658833B2	Automated methods and systems for developing and deploying projects in parallel Embodiments of the invention are directed to system and method for managing parallel development of projects. One embodiment of the invention is a method of automatically managing processes in the parallel development of an application through a graphical user interface. The graphical user interface manages the automated processes, which are able to complete their tasks without further user interaction. The automated processes managed by the graphical user interface include, provisioning a first development environment and second development environment. The processes also includes deploying a second release of an application to the second development environment, and merging modifications to the second source code and the second content of the second release into a first source code and a first content of the first release. After the releases have been merged together, the process automatically deploys the third release of the application to a production environment for use by users.
US09658827B2	Apparatus and method for performing reciprocal estimation operation A data processing apparatus has floating-point add circuitry for performing a floating-point add operation for adding or subtracting two floating-point operands. The apparatus also has reciprocal estimation circuitry for performing a reciprocal estimation operation on a first operand to generate a reciprocal estimate value which represents an estimate of a reciprocal of a first operand or an estimate or a reciprocal of the square root of the first operand. The reciprocal estimation circuitry is physically distinct from the floating-point adder circuitry, which allows both the reciprocal estimate and the add operations to be faster.
US09658802B2	Storage system According to one embodiment, a storage system includes a plurality of memory nodes that are connected to each other in two or more different directions and a connection unit. The connection unit issues a command in response to a request from the outside. In the storage system, a plurality of logical memory nodes are constructed by allocating, to one logical memory node, memory nodes including at least one first memory node which stores data to be accessed by the command and a second memory node which stores redundant data of the data stored in the first memory node. The command includes a first address which designates one of the plurality of logical memory nodes and a second address which designates a storage position in a memory space allocated to each logical memory node.
US09658794B2	Two stage memory allocation using a cache The presently claimed invention manages memory in a multi-processor system. The presently claimed invention may use a combination of global and local locks when allocating memory and de-allocating memory in a multi-processor system. A method consistent with the presently claimed invention may first receive an allocation of a first memory space in the system memory of a multi-core processing system. The allocation of the first memory space may globally locks the first memory space where the memory space may administered by a software module using one or more local locks.
US09658791B2	Managing temperature of solid state disk devices A solid state disk (SSD) device has a set of data transfer parameters which regulate I/O operations of the SSD device. The temperature of the SSD device is monitored using temperature readings from a temperature sensor. The temperature of the SSD device satisfies a temperature threshold. A data transfer modification is determined. The data transfer modification is capable of modifying one or more data transfer parameters of the set of data transfer parameters. The set of data transfer parameters is modified using the data transfer modification in response to the temperature of the SSD satisfying the temperature threshold. One or more I/O operations are completed with the SSD device using the modified set of data transfer parameters.
US09658788B2	Systems and methods for immediate physical erasure of data stored in a memory system in response to a user command Systems and methods for immediate physical erasure of data in a memory system in response to a user command are disclosed. In one implementation, a memory system includes a non-volatile memory and a controller in communication with the non-volatile memory. The controller comprises a processor that is configured to receive from a host in communication with the memory system, a destruct command that indicates a user request to make the memory system inoperable. The processor is further configured to perform one or more operations to render the memory system inoperable in response to the destruct command received from the host.
US09658777B2	Storage module and host device for storage module defragmentation A storage module and host device for storage module defragmentation are disclosed. In one embodiment, a host controller sends a storage module a first set of logical block addresses of a file stored in the storage module. The host controller receives a metric from the storage module indicative of a fragmentation level of the file in physical blocks of memory in the storage module. If the metric is greater than a threshold, the host controller reads the file and then writes it back to the storage module using a different set of logical block addresses. To avoid sending the file back and forth, in another embodiment, the host controller sends the fragmentation threshold and the different set of logical block addresses to the storage module. The storage module then moves the file itself if the metric indicative of the fragmentation level is greater than the threshold. Other embodiments are provided.
US09658766B2	Edge gesture This document describes techniques and apparatuses enabling an edge gesture. In some embodiments, these techniques and apparatuses enable selection of a user interface not currently exposed on a display through an edge gesture that is easy-to-use and remember.
US09658764B2	Information processing apparatus and control method thereof An information processing apparatus detects a touched point where an operation screen has been touched, and when the number of touched points detected has decreased to one point, recognize an input based on one detected touched point as a single-touch operation by using a condition different from that when the number of touched points has increased to one point from a state in which a touched point is not detected.
US09658760B2	Methods for searching digital files on a user interface There are provided methods for searching at least one desired digital file on a user interface. The user interface may include a first section showing a first sorted listing of digital files and a second section showing a second sorted listing of groupings by which the digital files in the first sorted listing are grouped. The user interface may be on either a touch-screen display or a non touch-screen display.
US09658759B2	User adjustable data sharing between multiple graph elements First sample data is generated to render an instance of a first graph element type with a first axis. Second sample data is generated to render an instance of a second graph element type with a second axis parallel to the first axis. Data points used for the first axis are different from data points used for the second axis. A first axis selector is presented in association with the first axis. An indicator is received that indicates selection of the presented first axis selector. After receipt of the indicator, a second indicator is received that indicates selection of a shared role between the first axis and the second axis. After receipt of the second indicator, the instance of the second graph element type is rendered with the first axis. Third data points used for the second axis automatically have the same value as first data points used for the first axis.
US09658755B2	Electronic device An electronic device that increases both visual perceptibility and selectability of executable programs. A display is a display with an elongated shape whose display surface includes a first region and a second region aligned in a longitudinal direction. In the first region, only an image that corresponds to a program that is specified as the main program is displayed. In the second region, images that correspond to sub-programs are displayed to be lined up in the longitudinal direction. The image includes an execution image of the program that is specified as the main program.
US09658750B2	Private messaging via content provider web sites and applications A device provides content for display to a first user device associated with a user, and provides for display, to the first user device, an option to share the content. The device receives a selection of the option from the first user device, and causes a list of contacts, associated with the user, to be presented for display, on the first user device, based on the selection of the option. The device receives, from the first user device, a selection of a contact from the list of contacts, and receives, from the first user device, a message from the user for the selected contact. The device provides for display the message with the content, to the first user device and to a second user device, associated with the selected contact. The message is privately provided to only the first user device and the second user device.
US09658738B1	Representation management on an electronic device In some examples, a device presents a plurality of icons of items, such as applications, content items, etc., in a user interface. When determining how to present the icons, the device may refer to an access history that identifies which items of a plurality of items have been accessed on the device. One or more of the icons may be presented in a designated area of the interface based at least in part on a frequency with which the items corresponding to the one or more icons have been accessed on the device. In addition, the one or more icons may be selected for presentation in the designated area based at least in part on a current context of the device, which may include at least one of a current time, a current location of the device, or a current activity of a user of the device.
US09658727B2	Interior rearview mirror system An interior rearview mirror system suitable for use in a vehicle includes an interior rearview mirror assembly having a mirror casing and a transflective reflective element. The transflective reflective element has an electrochromic active region, and a plurality of user input elements is disposed outside of the electrochromic active region and below the electrochromic active region. Each of the individual user input elements is a touch or proximity sensor. A plurality of display elements is disposed behind the transflective reflective element at the electrochromic active region, and each display element is selectively activated by activation of a respective user input element. Each of the individual display elements and its associated respective one of the individual user input elements are located local to one another such that a cognitive relationship between actuation by a user of a respective user input element and activation of its associated display element is established.
US09658722B2	Using a printed circuit to offset charge during capacitive sensing In a method of capacitive sensing an absolute capacitive sensing signal is driven through at least one of a plurality of routing traces of a printed circuit. Absolute capacitive sensing is performed with at least one sensor electrode of a plurality of sensor electrodes in a sensor electrode pattern. The at least one sensor electrode is coupled with the at least one of the plurality of routing traces. An offsetting signal is transmitted on a parallel conductor overlapping the at least one of the plurality of routing traces, such that charge is offset from the at least one of the plurality of routing traces during the absolute capacitive sensing.
US09658719B2	Touch screen with acoustic mode reflective and conversion arrays A touch panel includes a first plurality of echelons arranged on a substrate along a first centerline at a first angle and a second plurality of echelons arranged on a substrate along a second centerline at a second angle. A first wave generator on an end of the substrate is configured to transmit a first wave along the first centerline of the first plurality of echelons and a second wave generator on an end of the substrate is configured to transmit a second wave along the second centerline of the second plurality of echelons. First and second trapping slots are positioned parallel to their respective plurality of echelons.
US09658711B2	Touch panel module, touch device and manufacturing method thereof A touch panel module includes a substrate, a sensor layer disposed on the substrate, a first glue layer disposed on the sensor layer and an anti-electromagnetic interference layer disposed on the first glue layer. The touch panel module with anti-electromagnetic interference can be formed independently, and may be combined with other electronic device to form a touch device, thereby reducing the thickness of the touch device and simplifying the process steps.
US09658701B2	Input device with hybrid tracking Embodiments of the invention are directed to input devices configured for use with computing devices. The present invention relates to input devices configured with a plurality of sensors configured to determine the displacement and position of the input device. Tracking of the input device may be switched from an optical sensor to an inertial sensor based on the speed of movement of the input device or based on the input device detecting that loss of tracking has occurred. In some embodiments, a gyroscope may be configured to modify data from the inertial sensor module to correct for fictitious accelerations generated when the input device is rotated.
US09658689B2	Interfacing via heads-up display using eye contact According to one embodiment of the present invention, a system for device interaction via a heads-up display determines an area of sight of a first entity employing a first heads-up display, and establishes interaction between at least one first device and the first heads-up display in response to detecting at least an impact of the determined area of sight on at least one second device. Embodiments of the present invention further include a method and computer program product for interacting with a device via a heads-up display in substantially the same manners described above.
US09658669B2	Solid-state mass storage devices with capacitor-based power supply and methods of operation Solid-state mass storage devices and methods of operation thereof include a solid-state mass storage device that may have a capacitor-based power supply module configured for providing power to the mass storage device. In one embodiment, the mass storage device has a first mode of operation wherein a primary power supply provided by a host system provides power to the mass storage device sufficient for its operation and provides power to the capacitor-based power supply module to recharge the module, and a second mode of operation wherein power is provided to the mass storage device from both the primary power supply and the capacitor-based power supply module. The mass storage device may be capable of providing power from the capacitor-based power supply module to the mass storage device after a voltage level of the capacitor-based power supply module falls below an under voltage lock out level.
US09658645B2	Control circuits for generating output enable signals, and related systems and methods Control circuits for generating output enable signals are disclosed. In one aspect, a control circuit is provided that employs combinatorial logic to generate an output enable signal that meets timing constraints using a standard clock signal, a feedback clock signal based on the standard clock signal, and a single data rate (SDR) data output stream. The control circuit includes a double data rate (DDR) conversion circuit configured to generate a DDR output stream based on a received SDR output stream. The control circuit includes an output enable circuit configured to receive the standard clock signal, feedback clock signal, and DDR output stream, and to generate the output enable signal that is asserted and de-asserted according to the defined timing constraints. The control circuit is configured to generate an accurately timed output enable signal without the need for a fast clock signal in addition to the standard clock signal.
US09658644B2	CRUM unit mountable in consumable unit of image forming apparatus and image forming apparatus using the same A customer replacement unit monitor (CRUM) unit that can be mounted in an image forming apparatus includes a decoder which receives first clock signals from the image forming apparatus and converts the first clock signals into second clock signals, a memory which stores data related with a consumable unit, and a controller which manages the memory based on data signals transmitted from the image forming apparatus and the second clock signals. The first clock signals are divided into a data section in which the data signals are transmitted and received and an idle section in which the data signals are not transmitted and received. The first clock signals have a first frequency on the data section while having a second frequency on the idle section, and the second clock signals are clock signals maintaining a high value or a low value on the idle section.
US09658638B2	Buck-boost voltage converter circuits for solid state lighting apparatus A voltage converter includes a converter circuit and a control circuit coupled to the converter circuit and configured to selectively operate the converter circuit in a boost mode or a floating buck mode in response to a level of an input voltage supplied to the voltage converter circuit. The converter circuit may further include an inductor, a first control switch coupled to the control circuit, and a second control switch coupled to the control circuit. The control circuit may be configured to control a state of the first control switch in the boost mode in response to a level of current in the inductor, and the control circuit may be configured to control a state of the second control switch in the floating buck mode in response to the level of current in the inductor.
US09658631B2	Semiconductor integrated circuit device, power supply device, and method of controlling power supply device A conventional power supply device has a problem in miniaturization. A power supply device generates a prediction value of an error signal from first and second error signals, and controls an output voltage so that the prediction value lies between first and second threshold values. The first error signal is obtained by converting an error voltage based on the difference between the output voltage and a reference voltage at a first timing. The second error signal is obtained by converting an error voltage based on the difference between the output voltage and the reference voltage at a second timing.
US09658629B2	Method and apparatus for controlling the temperature of components A method and apparatus for the temperature control of a component within a storage system wherein the storage system includes a heat exchanger in thermal communication with the component to control the temperature of the component. One method includes: generating a flow of heat transfer fluid through the heat exchanger to transfer heat to or from the heat exchanger; receiving a set point signal indicative of the desired temperature of the component in the storage system; receiving temperature data regarding the component and the heat transfer fluid, and generating an output signal to control the flow of heat transfer fluid. The heat transfer fluid may be a gas or liquid.
US09658628B2	Advanced valve actuator with true flow feedback A valve and actuator assembly that includes a valve configured to control a flow of liquid into a coil or heat exchanger. The valve and actuator assembly further includes a valve actuator configured to control opening and closing of the valve via positioning of a valve closure member. The valve actuator is further configured to provide both a maximum flow rate and a minimum flow rate of the liquid through the valve. In an embodiment, the valve actuator includes a valve closure member position sensor configured to determine the position of the valve closure member based on a flow rate of the liquid through the valve.
US09658626B2	Fault isolation and decontamination procedures for electrohydraulic valves A method for isolating a fault or blocked work port in an electro-hydraulic system is disclosed. In one step, a system pump is set to a first predetermined pressure and a valve assembly is commanded to a center position. In another step, the center position of the valve is recorded. In one step, the valve assembly is opened to place a work port associated with the valve in fluid communication with the pump, after which a first end position of the valve, a first work port pressure, and a first pump supply pressure are recorded. In another step, the valve assembly is opened to place the work port to a tank reservoir, after which a second end position of the valve and a fluid pressure associated with the work port are recorded. The recorded and measured data can then be analyzed to identify the fault condition or blocked work port.
US09658625B2	Add-on chamber for improved response of gas pressure regulators A gas pressure regulator regulates a pressure of a gas system. The gas pressure regulator includes a first chamber, a first diaphragm which separates the first chamber into a first compartment and a second compartment, a second chamber, with a second diaphragm separating the second chamber into a third compartment and a fourth compartment, the fourth compartment being connected to, and in communication with, the first compartment of the first chamber. A movement of the first diaphragm causes a corresponding movement of the second diaphragm, and a change in the volume of the fourth compartment.
US09658619B1	Unmanned aerial vehicle modular command priority determination and filtering system Methods, systems, and apparatus, including computer programs encoded on computer storage media, for unmanned aerial vehicle modular command priority determination and filtering system. One of the methods includes enabling control of the UAV by a first control source that provides modular commands to the UAV, each modular command being a command associated with performance of one or more actions by the UAV. Modular commands from a second control source requesting control of the UAV are received. The second control source is determined to be in control of the UAV based on priority information associated with each control source. Control of the UAV is enabled by the second control source, and modular commands are implemented.
US09658616B2	Cleaning robot and method for controlling the same A cleaning robot includes a main body, a moving assembly to move the main body, a cleaning tool provided at a bottom part of the main body to collect foreign substances on a floor, an imager to collect images around the main body and a controller to recognize motion of a hand by performing image processing of the collected images, identify a control command corresponding to the motion of the hand, plan a moving direction and a moving distance of the main body as movement information based on the control command, and control operations of the moving assembly and the cleaning tool based on the planned movement information. Since the user directly controls movement of the cleaning robot, it is possible to improve interactivity between human and cleaning robot, reduce the user's labor and increase convenience.
US09658614B2	Light guided assembly system and method A guide system and method of projecting visual indicators onto a physical object to guide actions of an individual comprises providing a guide system having a guide system controller and a projector, with the guide system controller including a plurality of addressed display features. An input signal is provided to the guide system controller whereby an addressed display feature is selected based on the input signal and the projector projects a visual indicator corresponding to the selected addressed display feature onto a physical object. The guide system controller may also include a plurality of positional identifiers, with the method including the selecting of a positional identifier based on the input signal and the projecting of the visual indicator onto a physical object at a location corresponding to the selected positional identifier.
US09658611B2	Machine tool including numerical controller with function to determine replacement time for maintenance component A controller for a machine tool outputs an operation instruction signal to the machine tool. The machine tool transmits a signal indicating that the instructed operation is compete. The controller determines a response time of operation to be a difference in time between a point in time when the numerical controller outputs an operation instruction signal and a point in time when the numerical controller receives a signal from the machine tool. When the response time of operation exceeds a preset value, the numerical controller determines that a corresponding maintenance component needs to be replaced and informs a user of the need for replacement by means of a display unit.
US09658610B2	Displacement and position measurement in machine tool A machine tool includes a displacement measuring unit to measure the displacement of a workpiece center-to-blade tip distance which is the distance between a center equivalent position of a workpiece support surface of a workpiece support unit and a blade tip equivalent position of a tool support unit in a direction perpendicular or substantially perpendicular to a spindle axis. The displacement measuring unit measures the displacement by measuring the displacement of a continuous path between the center equivalent position of the workpiece support unit and the blade tip equivalent position and excluding a processing movement region. The displacement measuring unit includes workpiece side and tool side linear position detecting units. A measured value of the displacement measuring unit is used in correcting an X-axis command value.
US09658606B2	Protection circuit to prevent power-on operation motherboard A protection circuit to prevent power-on operations for a motherboard includes a first power supply, a spring mechanical switch attached to a chassis of an electronic device, a plurality of second power supplies with different voltages, and a plurality of electronic switches. The spring mechanical switch includes a first terminal coupled to the first power supply, and a second terminal grounded. First pins of the electronic switches are coupled to the first terminal, second pins of the electronic switches respectively are coupled to the second power supplies, third pins of the electronic switches are capable of powering the motherboard. When the cover is detached from the chassis, the mechanical switch rebounds, the first terminal disconnects and the second terminal are disconnected, the electronic switches are turned off, no voltages output from the third pins of the electronic switches.
US09658604B2	Electronic timepiece with internal antenna An electronic timepiece has; an annular antenna; and a time display unit. The antenna includes an annular dielectric; a conductive driven element that is disposed on the dielectric, is ring-shaped with a notch therein (C-shaped), and is fed with a specific potential; and a conductive parasitic element that is disposed on the dielectric with a gap to the driven element, and is an endless ring or a ring with a notch therein (C-shaped). A feed position to which a specific potential is fed is disposed to the driven element at one place. When the electronic timepiece is seen in plan view, the feed position is disposed in a range from approximately 8:00 to approximately 10:00 relative to the center (center pivot) of the electronic timepiece.
US09658602B2	Watchcase with manually rotatable ring The watchcase includes a top portion (11) for holding a watchglass (1), a case back (40), and a case middle (10) with a circumferential case wall (12) arranged between the top portion and the case back. The watchcase further includes at least one ring (20), which extends around the case wall (12) and is rotatably arranged with respect to the case wall (12). The at least one ring (20) is arranged such that it accessible from the outside for a manual rotation.
US09658585B2	Film and image heating device using film A cylindrical film used in an image heating device heating a recording material, on which an image has been formed, has a resin layer, this resin layer being made from a resin in which a crystalline resin and an amorphous resin having a higher glass transition temperature than the crystalline resin are blended, wherein a volume ratio of the crystalline resin with respect to the amorphous resin in the resin layer is 70/30 to 99/1.
US09658584B2	Fixing apparatus A fixing apparatus for fixing a toner image on a recording material while conveying and heating, at a nip portion, the recoding material on which the toner image has been formed, the fixing apparatus including a rotary member including a conductive layer, a helical coil provided inside the rotary member, a helical axis of the helical coil extending in a generatrix direction of the rotary member, a magnetic core provided inside the helical coil, the magnetic core having a shape that does not form a loop outside the conductive layer, and a back-up member forming a nip portion together with the rotary member. In the generatrix direction, when winding pitches of the helical coil in a middle area, in end-portion areas, and in intermediate areas that are areas between the middle area and the end-portion areas are X, Y, and Z, respectively, then Y
US09658580B2	Image forming apparatus An image forming apparatus includes: a fixing portion for heat-fixing the image on a recording material; a duct including a suction port for sucking air from outside of the image forming apparatus and an exhaust port for delivering the air to the outside of the image forming apparatus; and a fan for forming a flow of the air from the suction port toward the exhaust port in the duct. The duct includes a merging portion, between the suction port and the exhaust port, for merging the air from the neighborhood of the fixing portion with the flow of the air by taking the air from the neighborhood of the fixing portion inside the duct. The recording material on which the image is fixed at the fixing portion is cooled by the air delivering through the exhaust port.
US09658577B2	Image forming apparatus having transfer belt rollers of specific shapes An image forming apparatus includes: an image bearing member; a toner image forming unit; an endless transfer belt; a transfer roller urged from an inner peripheral surface of the transfer belt toward the image bearing member via the transfer belt; a feeding surface forming roller, provided downstream of the transfer roller with respect to a traveling direction of the transfer belt, having such a shape that a diameter at each of end portions is smaller than a diameter at a central portion with respect to a rotational axis direction; and a stretching roller, downstream of the feeding surface forming roller with respect to the traveling direction of the transfer belt, having such a shape that a diameter at each of end portions is larger than a diameter at a central portion with respect to the rotational axis direction.
US09658576B2	Developing device, and process cartridge and image forming apparatus incorporating same A developing device includes a developer bearer, a developer regulator, a casing including an opposing face to oppose the developer bearer upstream from a developing range in a direction of rotation of the developer bearer, and first, second, and third seals. The first seal includes a first end secured to the casing and a second end to contact a latent image bearer upstream from the developing range in a direction of rotation of the latent image bearer. The second seal includes a first end secured to the opposing face of the casing, and a second end to contact the first seal upstream from the developing range. The third seal includes a first end secured to the opposing face of the casing, and a second end to contact developer on the developer bearer between the developer regulator and the developing range in the direction of rotation of the developer bearer.
US09658575B2	Developing device and image forming apparatus therewith A developing device includes a developer container, a first stirring member, a second stirring member, and a developer carrying member. The second stirring member includes a second transport blade for transporting developer inside a second transport chamber, a regulating portion formed next to, on the downstream side of, the second transport blade in the transport direction of the developer inside the second transport chamber and formed by a transport blade that transports developer in the opposite direction to the second transport blade, a discharge blade formed next to, on the downstream side of, the regulating portion in the transport direction of the developer and transporting developer in the same direction as the second transport blade to discharge the developer through the developer discharge port, and an annular portion arranged at least either between the second transport blade and the regulating portion or between the regulating portion and the discharge blade.
US09658569B2	Image forming apparatus with toner refilling unit The present invention prevents a toner bottle from being erroneously determined to be empty and allows toner to be reliably refilled into a hopper and thus a developing unit in an image forming apparatus including the developing unit configured to develop an electrostatic latent image formed on an image carrier, using toner.
US09658560B2	Exposing device and image forming apparatus An exposing unit forms a scanning line by exposing an image surface in a main scanning direction, and forms a plurality of pixels arrayed in the main scanning direction by sequentially forming a plurality of scanning lines shifted in a sub-scanning direction. A clock generator generates frequency-spread clocks having frequency that is spread with a particular modulation period and that changes in accordance with a modulated waveform corresponding to the particular modulation period. A driver drives the exposing unit to emit light during light emitting time that is determined from the frequency-spread clocks. The plurality of scanning lines is formed with respective phases of the modulated waveform. The phases corresponding to the plurality of scanning lines are shifted from each other for compensating, among the plurality of scanning lines, deviations of the light emitting time relative to a reference value, for each of the plurality of pixels.
US09658559B2	Image forming apparatus that forms image using a plurality of light beams A determination unit determines a bias current caused to flow through at least plurality of light-emitting portions regardless of image data during an image period by determining a first drive current for setting a light quantity of a light beam incident on a light reception unit during the non-image period to a first target light quantity, and determining a second drive current for setting a light quantity of a light beam incident on the light receiving unit to a second target light quantity that is different from the first target light quantity. The determination unit determines a drive current for performing switch-driving of the plurality of light-emitting portions, based on image data, the drive current corresponding to the first drive current and the bias current upon the image data being generated in a second section of a non-image period.
US09658556B2	Image data processing apparatus and image data processing method An image data processing apparatus includes a total-colorant-amount calculating unit that calculates a total amount of a metallic colorant and a process-color colorant used by an image forming apparatus to form an image having a unit area, the image forming apparatus forming an image by using a white colorant, the metallic colorant, and the process-color colorant; a white-colorant-amount specifying unit that specifies an amount of the white colorant used to form the image having a unit area on the basis of a calculation result obtained by the total-colorant-amount calculating unit; and a white-colorant-amount correcting unit that corrects the amount of the white colorant so that the amount of the white colorant used to form the image having a unit area decreases as the amount of the metallic colorant used to form the image having a unit area increases.
US09658555B2	Image forming apparatus having a moving mechanism to move a developing roller to a retracted position and a transmission mechanism to cut off transmission to the developing roller An image forming apparatus includes first and second photosensitive drums, first and second developing rollers configured to supply developers to the first and second photosensitive drums, respectively, an electric motor configured to generate a driving force to rotate the second developing roller, a moving mechanism configured to move the second developing roller between a development position and a retracted position, a transmission mechanism configured to transmit the driving force to the second developing roller, a drive mechanism configured to drive the moving mechanism and the transmission mechanism simultaneously, and a connecting mechanism configured to, when the second developing roller is in the development position, bring the transmission mechanism into a transmission state that allows transmission of the driving force to the second developing roller, and to, when the second developing roller is in the retracted position, bring the transmission mechanism into a cut-off state the cuts off the transmission.
US09658552B1	Electrostatic charge image developing toner, electrostatic charge image developer, and toner cartridge An electrostatic charge image developing toner includes toner particles including a binder resin, a cyano pigment containing cyano group (—CN) in a molecular structure, and a benzonitrile compound which has a structure in which at least one cyano group (—CN) is present on a benzene ring as a substituent and has a molecular weight equal to or smaller than 300, wherein a content of the benzonitrile compound is from 1 ppm to 500 ppm with respect to the total amount of the toner particles.
US09658546B2	Toner and method of producing toner Provided is toner comprising toner particle containing binder resin and colorant and silica fine particle, wherein: the silica fine particle contains silica fine particle A and silica fine particle B; silica fine particle A has a number average particle diameter of primary particle of 5 nm or more and 20 nm or less; silica fine particle B has a number average particle diameter of primary particle of 80 nm or more and 200 nm or less; and silica fine particle B has a half width of a peak of primary particle of 25 nm or less, in a weight-based particle size distribution, and wherein when the toner is measured by adhesive force-measuring method by using polycarbonate thin film, an adhesion of the silica fine particle A is 0.5% by area or less relative to 100% by area of the total area of the polycarbonate thin film.
US09658545B2	Polymeric composite materials, manufacture, and uses Composite materials such as composite particles have a solid non-elastomeric continuous phase made of an organic polymer having a glass transition temperature of at least 25° C. Dispersed within this solid non-elastomeric continuous phase are many multi-compartment porous chemically crosslinked elastomeric particles that have a mode particle size of at least 1 μm and up to and including 10 μm. The composite particles can be used as toner particles in electrophotographic imaging methods to provide fused toner images and especially stacked fused toner images.
US09658520B2	Wavelength converting element comprising ceramic capsule A wavelength converting member is provided, comprising a sealed capsule at least partly made of sintered polycrystalline ceramic, for example sintered polycrystalline alumina, said capsule defining at least one sealed cavity; and—a wavelength converting material contained within said sealed cavity. The wavelength converting member has high total forward transmission of light, high thermal conductivity, high strength and provides excellent protection for the wavelength converting member against oxygen and water. The wavelength converting member can advantageously be applied in a light emitting arrangement or as a color wheel for a digital image projector.
US09658517B2	Camera mounting device The present disclosure describes a device for mounting a camera and methods of using the same. The device comprises one or more mounting segments, preferably two or more mounting segments which may preferably be connected together. In preferred embodiments, the device further comprises one fastener-free mounting segment and one or more fastener-enabled mounting segments, wherein a fastener-enabled mounting segment comprises a mounting brace, a fastener, a mounting nut, and a mounting spacer, and wherein a fastener-free mounting segment comprises a mounting brace.
US09658512B2	Cycloidal diffractive waveplate and method of manufacture A cycloidal diffractive waveplate (50) comprising first and second substrate layers (52, 54), a liquid crystal layer (60C, 60H) provided between the first and second substrate layers, and transparent positive electrodes (56) and transparent negative electrodes (58) provided on the first substrate layer. The liquid crystal layer has a diffractive state (60C) in which the optical axes of the liquid crystal molecules are periodically rotated across a plane of the waveplate and a non-diffractive state (60H) in which the optical axes of the liquid crystal molecules are all orientated in the same direction in the plane of the waveplate. The electrodes (56, 58) are arranged in an alternating series, such that when an electric voltage is applied to the electrodes an electric field is produced in the plane of the waveplate and the liquid crystal layer is switched from the diffractive state to the non-diffractive state. A method of manufacturing the cycloidal diffractive waveplate is also provided.
US09658510B2	Devices, systems and methods for ultrafast optical applications An optical device capable of an ultrafast and large change of its reflection or absorption coefficient upon being excited by an ultrafast optical pulse with wavelength in the visible, near-infrared, or infrared spectral regions. The optical device includes, in sequential order, a first thick metallic layer, a first dielectric layer, a second thin metallic layer, and a second dielectric layer. The optical device acts as a nonlinear mirror that presents a large reflectance at low irradiance and a low reflectance at large irradiance. The optical device can further act as a nonlinear mirror that presents a linear and nonlinear reflectance with a large angular bandwidth.
US09658508B1	Manufacturing methods for a transparent conductive oxide on a flexible substrate An electrochromic device is provided. The device includes a substrate and an electrochromic stack on the substrate. The stack includes a first set of bus bars, a first transparent conductive layer, at least one electrochromic layer, a second transparent conductive layer, and a second set of bus bars, wherein at least one of the first transparent conductive layer or the second transparent conductive layer includes resistivity that varies by horizontal location according to a resistivity profile. In some embodiments the resistivity profile has a vertical component that may or may not be in addition to the horizontal component. Various embodiments of these materials can be tuned as to profiles of vertical resistance and horizontal sheet resistance.
US09658504B2	Display panel having a light shielding layer overlapped even number of source lines and a gate line A display panel comprising a substrate, a plurality of gate lines, source lines, semiconductor layers and light shielding layers is provided. The gate lines are disposed on the substrate in parallel. The source lines are disposed on the substrate in parallel. The gate lines and the source lines are intercrossed to define a plurality of pixel areas. The semiconductor layers are disposed on the corresponding pixel areas, and each semiconductor layer includes at least one channel region overlapping each gate line. The slight shielding layers are located between the channel regions and the substrate. In a normal direction of the substrate, one of the gate lines is overlapped by two of the light shielding layers, and one of the light shielding layers overlaps even number of the source lines.
US09658497B2	Liquid crystal display and display device The present invention discloses a liquid crystal display panel and a display device. A capacitance compensation portion is arranged using a shading region, and the capacitance compensation portion is arranged opposite to a portion of a common electrode located within the shading region. Compared to the case where a common electrodes and a pixel electrode are overlapped only in a light transmitting region, the present invention enlarges the overlap area of the pixel electrode and the common electrode in the shading region, compensates the storage capacitance between the pixel electrode and the common electrode, and reduces the voltage difference before and after jump of the voltage of the pixel electrode, and improves the flicker of a liquid crystal display panel. Moreover, as the capacitance compensation portions additionally provided in the pixel electrodes are located within the shading region, the aperture rate of pixel regions will not be influenced.
US09658491B2	Optical apparatus and display apparatus provided with same An optical device (100) includes a first substrate (10) and a second substrate (20), and an optical layer (30) interposed therebetween. The first substrate includes a first electrode (11) and a second electrode (12), to which respectively different potentials can be applied. The optical layer (30) contains a medium (31P) and anisotropically-shaped particles (32) whose alignment direction changes in accordance with the direction of an electric field applied to the optical layer. The medium is a liquid crystal material. When no electric field is applied to the optical layer, the anisotropically-shaped particles are aligned substantially vertically with respect to the substrate plane.
US09658490B2	Touch display device A touch display device includes an upper polarizer, a display unit and a touch sensing unit. The upper polarizer allows light having a first linear polarization direction to pass therethrough and blocks light having a second linear polarization direction. The second linear polarization direction is perpendicular to the first linear polarization direction. The display unit is spaced-apart from the upper polarizer and is used to display images. The touch sensing unit is disposed between the upper polarizer and the display unit, and includes an optical compensation substrate and a touch sensing electrode structure disposed on the optical compensation substrate. The optical compensation substrate is flexible and is able to control the polarization property of the light passing therethrough.
US09658489B1	Backlight units for display devices Embodiments of a device and a method of forming the same are described. The device includes a backlight unit and an image generating unit. The backlight unit includes an optical cavity having a top side, a bottom side, and side walls. The backlight unit further includes an array of light sources coupled to the optical cavity and a quantum dot film positioned within the optical cavity. The quantum dot film is configured to process light received from the array of light sources and the backlight unit is configured to transit the processed light to the image generating unit. The method includes providing an optical cavity having a top side, a bottom side, and side walls. The method further includes coupling an array of light sources to the optical cavity and supporting a quantum dot film within the optical cavity.
US09658487B2	Display device including support frame having reflective stepped portion A display device includes a display panel which displays an image, a backlight unit which generates light and emits the light toward the display panel, a supporting member which supports edge parts of the display panel, and an accommodation member defining an accommodation space in which the backlight unit and the supporting member are disposed. In the accommodation space, the backlight unit includes a light source which generates the light, and a side-emitting lens which covers the light source and through which the light generated by the light source is emitted. In the accommodation space, the supporting member defines a plurality of stepped parts, where the plurality of stepped parts extended toward the light source has a light reflecting characteristic.
US09658483B2	Liquid crystal lens and display including the same A liquid crystal lens includes a first substrate, a second substrate which faces the first substrate, a liquid crystal layer which is interposed between the first substrate and the second substrate and a lens polarizer which is disposed on the outside of the second substrate. The lens polarizer includes a first polarization region having a first polarization direction and a second polarization region having a second polarization direction which is different from the first polarization direction.
US09658477B2	Systems, devices, and methods for photonic to radio frequency upconversion A system, method, and device for RF upconversion is provided. The system can include a laser, a local oscillator, and an RF mixer, an EAM, a photonic filter, and a photodiode. The mixer can receive an LO signal from the local oscillator. The mixer can be configured to mix LO with an IF signal and output a mixed signal. The EAM can receive an optical signal from the laser, receive the mixed signal from the mixer, and be configured to convert the mixed signal into the photonic domain by modulating the optical signal based on the mixed signal to output a modulated optical signal. The photonic filter can receive the modulated optical signal and can be configured to output a filtered optical signal. The photodiode can receive the filtered optical signal and can be configured to convert the filtered optical signal into the RF domain to output upconverted RF output.
US09658475B2	Backlight assembly and display device including the same A backlight assembly includes a light source portion including a plurality of light sources. The light sources are configured to emit light. A wavelength conversion member is disposed on the light source portion. The wavelength conversion member is configured to convert a wavelength of light emitted from the light source portion. The wavelength conversion member includes a first substrate disposed on the light source portion, a second substrate disposed on the first substrate, and a plurality of wavelength conversion layers interposed between the first substrate and the second substrate. Each of the plurality of wavelength conversion layers correspond to a light source of the plurality of light sources.
US09658472B2	Method of controlling a programmable lens device A method of controlling a programmable lens device comprising a programmable lens and an optical function controller, the programmable lens having an optical function and extending between at least one eye of the wearer and the real world scene when the device is used by the wearer, and the optical function controller being arranged to control the optical function of the programmable lens, the method comprising: —an optical function data receiving step during which optical function data relating to the optical function of the programmable lens is received by the optical function controller, —an activity data receiving step during which activity data relating to the activity of the wearer are received by the optical function controller, —an optical function modifying step during which the optical function of the programmable electronic lens device is modified by the optical function controller based on the optical function data and the activity data.
US09658468B2	Zone extension systems and methods Wavefront measurements of eyes are often taken when the pupil is in a first configuration in an evaluation context. The results can be represented by a set of basis function coefficients. Prescriptive treatments are often applied in a treatment context, which is different from the evaluation context. Hence, the patient pupil can be in a different, second configuration, during treatment. Systems and methods are provided for determining a transformed set of basis function coefficients, based on a difference between the first and second configurations, which can be used to establish the vision treatment.
US09658466B2	Lens drive apparatus, camera module and camera A lens drive apparatus comprises: an assembly that is formed by assembling a lens holder together with a magnet holder that holds a magnet; a first drive section that displaces the lens holder in a direction of an optical axis in collaboration with the magnet and a first coil; and a second drive section that displaces the assembly in a direction orthogonal to the optical axis in collaboration with the magnet and a second coil, wherein the magnet holder comprises a hollow part that accommodates the magnet at a position facing both of the first coil and the second coil.
US09658465B2	Projector and screen This projector includes a laser light generation portion, a projection portion scanning laser light, and a projection screen. The projection screen includes a lens member including a plurality of lens portions splitting the laser light and a diffusion member arranged to be opposed to the lens member, having an incident surface and a diffusion portion. The diffusion portion of the diffusion member is arranged at a position apart by a distance larger than the focal length of the lens member along an optical axis with respect to the optical principal surface of the lens member.
US09658460B2	Head mount display device A head mount display device including a housing comprising a closed, front side and a back side having an opening, a pair of optic modules arranged horizontally and a head fixing unit configured to fix the housing to a user's head is provided. Each of the optic modules includes a display provided in the housing; a barrel comprising one side arranged in the housing and the other side exposed outside the housing via the opening; a lens fixed to the barrel; a focus adjuster configured to adjust a distance between the barrel and the display; and a horizontal adjusting unit configured to guide horizontal movement of the optic module, and the focus adjuster and the horizontal adjusting unit provided in one of the optic modules is operable independently from the focus adjuster and the horizontal adjusting unit provided in the other optic module.
US09658456B2	Image display apparatus, image generating device, and transmissive spatial light modulating device An image display apparatus 100 includes: (A) an image generating device 111 including a light source 160 and a transmissive spatial light modulating device 150 formed with pixels 152 arranged in a two-dimensional matrix; and (B) a light guiding unit 120 that guides light from the image generating device 111, and emits the light toward an eye 21 of a viewer 20, wherein the transmissive spatial light modulating device 150 includes, on a light emitting side thereof, a microlens array 170 including a microlens corresponding to each pixel, and when an incident solid angle of light entering a pixel from the light source 160 is assumed to be ωin, and an emitting solid angle of light that passes through the pixel and is emitted from the microlens corresponding to the pixel is assumed to be ωout, ωout>ωin is satisfied.
US09658455B2	Optical device having a diffraction region An optical device that is capable of producing an image in the air includes a substrate having a reflective diffraction region formed into a net structure, and a light radiation unit which radiates a light beam onto one surface of the substrate. The diffraction region is capable of collecting light beams that are diffracted in the upper space of one surface of the substrate by diffracting the light beam which is incident on one surface of the substrate. Here, the light radiation unit may have a display source that generates the light beams which form the image, and a lens portion that radiates the generated light beams onto the substrate.

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