Document	Document Title
US10523503B2	Network orchestration Measures, including methods, apparatuses and non-transitory computer-readable storage media, associated with network orchestration. A model of a physical resources part of a network and a model of a virtualised resources part of the network are obtained. The physical/virtualised resources part of the network includes a plurality of physical resources/at least one virtualised network function and represents dependencies between different physical/virtualised resources in the physical/virtualised resources part of the network. At least one optimisation operation is performed using the models of the physical and virtualised resources parts of the network to identify an optimised mapping of the at least one virtualised network function onto at least one of the plurality of physical resources. The at least one virtualised network function is instantiated on the at least one of the plurality of physical resources based on the identified optimised mapping.
US10523499B2	Master controller selection in a software defined network Examples disclosed herein relate to selection of a master controller in a software defined network (SDN). In an example, a master controller may monitor a parameter on each SDN controller in a team of SDN controllers comprising the master controller, wherein the master controller performs a role of master over a group of network devices. In response to a determination that a value of the parameter on the master controller is above a pre-defined limit, master controller may select another SDN controller from the team. Master controller may assign the role of master over network devices in the group to the selected SDN controller based on a ranking of the network devices, wherein the network devices may be assigned in succession until a limit defined for a value of the parameter on the selected SDN controller is reached.
US10523493B2	Cross-cloud operation management Operations include executing operations across different third-party computing clouds provided by different vendors. A cloud discovery process allows for a virtual machine, executing on a computing cloud, to discover resources on a different computing cloud provided by a different vendor. The cloud discovery process is implemented by one or more cloud agents executing within third-party clouds. A cloud agent, corresponding to a third-party computing cloud, may use a cross-cloud repository that is maintained by a tenant to discover resources in other third-party computing clouds provided by different vendors. An Application Programming Interface (API) for accessing a particular third-party computing cloud may be exposed to a cloud agent of another third-party computing cloud provided by a different vendor. The cloud agent may trigger operations on the particular third-party computing cloud based on events detected by the cloud agent in the third-party computing cloud corresponding to the cloud agent.
US10523491B2	Reliable and resilient end-to-end connectivity for heterogeneous networks Embodiments of the present invention address deficiencies of the art in respect to connectivity management in a heterogeneous network and provide a method, system and computer program product for resilient and reliable end-to-end connectivity in a heterogeneous network. In one embodiment of the invention, a method for resilient and reliable end-to-end connectivity in a heterogeneous network environment can be provided. The method can include creating an instance of an abstracted network resource model (NRM) for a heterogeneous network environment of different network resource nodes. The method further can include binding an application endpoint in the instance of the abstracted NRM with a connectivity endpoint for a first of the different network resource nodes. The method yet further can include detecting an outage in the first of the different network resource nodes. Finally, the method can include re-binding the application endpoint to a second of the different network resource nodes in response to detecting the outage.
US10523486B2	Data modulation and demodulation method and data transmission method and node for multi-carrier system Disclosed in the embodiments of the present application are a data modulating and demodulating method, a data transmission method and node for multi-carrier system. The data modulating method including: selecting, by a transmitting node, corresponding waveform functions based on values of a first parameter, wherein the first parameter includes K values corresponding to K different waveform functions, respectively, and K is an integer greater than 1; and performing, by the transmitting node, using the selected waveform functions, modulation on time domain data sequences processed by Inverse Fast Fourier Transform (IFFT) to obtain a modulated data sequence. The first parameter may be configured by a base station for a UE. Also provided by the embodiments of the present application are a corresponding demodulation method and data transmission method and node.
US10523485B2	Generalized frequency division multiplexed transmission for narrowband with internet of things (Iot) devices An apparatus for band-limited frequency division multiplexing for uplink transmission to a base station or access point, particularly from an IoT device, comprises a signal modulator to transmit a signal over a set of contiguous equally spaced frequency sub-carriers ranging from a lowest frequency sub-carrier via intermediate sub-carriers to a highest frequency sub-carrier. The signal modulator contains a filter to apply asymmetric filtering over the range of the frequency sub-carriers, thereby to reduce a peak-to-average power ratio of the transmitted signal.
US10523477B2	Method and system for split voltage domain receiver circuits Methods and systems for split voltage domain receiver circuits are disclosed and may include amplifying complementary received signals in a plurality of partial voltage domains. The signals may be combined into a single differential signal in a single voltage domain. Each of the partial voltage domains may be offset by a DC voltage from the other partial voltage domains. The sum of the partial domains may be equal to a supply voltage of the integrated circuit. The complementary signals may be received from a photodiode. The amplified received signals may be amplified via stacked common source amplifiers, common emitter amplifiers, or stacked inverters. The amplified received signals may be DC coupled prior to combining. The complementary received signals may be amplified and combined via cascode amplifiers. The voltage domains may be stacked, and may be controlled via feedback loops. The photodetector may be integrated in the integrated circuit.
US10523476B2	Signal scrambling sequence techniques for wireless communications Techniques for scrambling sequence generation may provide scrambling for a reference signal, a control signal, or a data signal that is independent of a center frequency of a wireless system bandwidth. Generated scrambling sequences may allow for demodulation of signals in which a synchronization channel does not share a same center frequency as the wireless system bandwidth.
US10523473B2	Characterization of decision feedback equalizer taps Various embodiments, disclosed herein, can include apparatus and methods to characterize taps of a decision feedback equalizer of a data receiver. In characterizing the taps of the decision feedback equalizer of the data receiver, a signal can be transmitted to the data receiver and the received data can be iteratively sampled at an output of the decision feedback equalizer. The sampling can include stepping a sample time relative to arrival of the received data and stepping a reference voltage level to which the received data is compared. Values of the sampled data can be compared with known correct values and such measurements can be used to characterize the taps. Additional apparatus, systems, and methods are disclosed.
US10523455B2	Distributed multicast logical router For a managed network implementing at least one logical router having centralized and distributed components, some embodiments provide a method for processing multicast data messages at a first managed forwarding element (MFE) executing on a first host machine that implements a distributed multicast logical router and multiple logical switches logically connected to the logical router in conjunction with a set of additional MFEs executing on additional host machines. The method replicates multicast data messages received from a source data compute node (DCN), operating on the first host machine, that logically connects to a first logical switch of the multiple logical switches. The method replicates the multicast data message to a set of DCNs in the multicast group in the logical network without routing through a centralized local multicast router.
US10523444B2	Solid state storage device with command and control access Several embodiments of memory devices and systems with command and control access are described herein. In one embodiment, a memory device includes a controller having a processor and a memory component operably coupled to the processor. The controller is configured to receive at least one command and control (C2) packet from a remote computer associated with a device vendor. The C2 packet includes a request for the controller to perform a restricted command, and a vendor signature. The memory component stores instructions executable by the processor to determine if the vendor signature is valid and to direct the controller to perform the restricted command if the vendor signature is determined to be valid.
US10523428B2	Method and apparatus for providing asymmetric cryptographic keys A method and apparatus provides cryptographic keys using, for example, a cryptographic co-processor (CCP) that uses spare processor cycles to work on cryptographic key generation in advance of the keys being needed by a requestor such as an application, or other process in the device. In one example, the cryptographic co-processor detects an idle condition of the CCP such as an idle condition of a cryptographic engine in the CCP. Control logic causes the CCP to generate at least one asymmetric key component corresponding to an asymmetric cryptographic key in response to detecting the idle condition. The method and apparatus stores the asymmetric key component(s) in persistent memory and generates the asymmetric cryptographic key using the stored asymmetric key component that was generated in response to detection of the idle condition of the CCP.
US10523426B2	Distributed VPN service For a network that includes host machines for providing computing and networking resources and a VPN gateway for providing external access to those resources, a novel method that distributes encryption keys to the hosts to encrypt/decrypt the complete payload originating/terminating at those hosts is described. These encryption keys are created or obtained by the VPN gateway based on network security negotiations with the external networks/devices. These negotiated keys are then distributed to the hosts via control plane of the network. In some embodiments, this creates a complete distributed mesh framework for processing crypto payloads.
US10523425B2	Database password changes Systems and methods for changing database passwords are described. A first server computing system receives an indication to perform a password change process for an administrative account of an associated database. The server generates a vault configured to store a password change status and a password secret associated with the account. The server sets the password change status to a first value to indicate that the server is performing the password change process and then performs the password change process for the account. The server then sets the password change status to a second value to enable a second server computing system to perform a second password change process for a second administrative account of a database associated with the second server system. The database associated with the second server computing system is a standby database of the database associated with the first server system.
US10523424B2	Optimizing use of hardware security modules Use of cryptographic key-store hardware security modules is optimized in a system having a first scarce high-security key storage device and a second more plentiful low-security key storage device comprising securing a cryptographic key to the higher security level by initially storing the key in the first storage device, then responsive to an event, evaluating the stored key against one or more rules, and subsequent to the evaluation, reclassifying the stored key for relocation, encrypting the reclassified key using a key-encryption key; relocating the reclassified key into the second, lower-security storage device, and storing the key-encryption key in the first storage device.
US10523420B1	Transmitting encoded data along transmission mediums based on colorspace schemes Techniques to transmit encoded data along a transmission medium and decode the transmitted data along the transmission medium are provided. Some techniques include logic to encode data transmitted along a transmission medium, such as a fiberoptic line or cable, where the encoding is pursuant to a conversion between a first and second colorspace. The logic may further be configured to decode the data once it is received at a node along the fiberoptic line, where the colorspace conversion provides the basis, key, or cipher for preforming the decoding operation. The logic may be further configured to alter the encryption and decryption basis, key, or cypher by altering the colorspace scheme defining the encoding (and by extension the decoding) during transmission, including a transmission that takes place after a previous transmission governed by the previously defined (and subsequently altered) colorspace conversion scheme. Other embodiments are described and claimed.
US10523418B2	Providing access to a hardware resource based on a canary value A container corresponding to executable code may be received. In response receiving the container, an assertion value may be stored in an assertion register. A final canary value may be generated based on a cycles combining a prior canary value and a mix value. A determination may be made as to whether the final canary value matches with the assertion value stored in the assertion register. In response to determining that the final canary value matches with the assertion value, one or more privilege registers may be programmed to provide access to hardware resources for the container corresponding to the executable user code.
US10523413B2	Non-transitory machine readable medium for clock recovery An apparatus comprises a plurality of sampling circuits configured to receive a non-Non Return to Zero (non-NRZ) data signal; and a control circuit coupled to the plurality of sampling circuits, wherein the control circuit is configured to provide one or more control signals indicating whether to decrease or increase a frequency of a clock signal associated with the non-NRZ data signal based on the non-NRZ data signal.
US10523409B2	Method of synchronization during the processing, by a multimedia player, of an item of multimedia content transmitted by an MBMS service A method for playing back an item of multimedia content by user devices, the method including steps of: receiving segments of an item of multimedia content by a server, storing the received segments in a buffer memory, transmitting a segment request from a multimedia player of a user device to the server, and transmitting, in response, a requested segment from the server to the multimedia player, if the segment is present in the buffer memory, transmitting a request for synchronization data from the multimedia player to the server, and transmitting, in response to the request, synchronization data from the server to the multimedia player, the data including an identifier of a last segment received, and a datum defining the time of receipt of the last segment by the user's device.
US10523401B2	Method, apparatus, and system for handling co-channel cell interference Embodiments provide a method, an apparatus, and a system for handling co-channel cell interference, a base station and a user terminal. The method includes obtaining interference information of a non-serving cell; and sending the obtained interference information of the non-serving cell to a user terminal UE. Co-channel interference caused in the non-serving cell to the UE can be well suppressed or cancelled, and performance of the UE in demodulating a PDSCH can be better improved.
US10523400B2	Multi-code probabilistic signal shaping using frequency-division multiplexing An FDM communication system in which encoding/decoding settings for different sets of tones are specified using index values assigned to different sets of tones by selecting suitable respective values from a fixed set of index values. Each of the specified index values causes the corresponding digital signal processor to use a respective predefined pair of encoding or decoding settings that includes a respective predefined constellation and a respective predefined shaping code. In some embodiments, the used shaping codes are configured to operate as block codes, with the block sizes being selected such that a multi-code frame generated using multiple shaping codes can be matched to exactly one DMT symbol or to a desired number of whole DMT symbols.
US10523399B2	Apparatus and method for transmitting/receiving multimedia data delivery characteristics information in multimedia communication system A method for transmitting multimedia data delivery characteristics information by a multimedia data transmission apparatus in a multimedia communication system is provided. The method includes transmitting, to a multimedia data reception apparatus, an element indicating whether multimedia data delivery characteristics information denoting information related to a Quality of Service (QoS) for multimedia data is included, and the multimedia data delivery characteristics information if the element indicates that the multimedia data delivery characteristics information is included.
US10523397B2	Method for transmitting uplink control information and apparatus therefor A method for transmitting uplink control information and an apparatus therefor are disclosed. In a method for transmitting uplink control information using a physical uplink shared channel (PUSCH) in a wireless communication system, the method is performed by a terminal and includes receiving downlink control information including an accumulated number of physical downlink shared channels (PDSCH) transmissions associated with a cell group configured for the terminal, coding the uplink control information using the accumulated number of PDSCH transmissions, and transmitting the coded uplink control information using the PUSCH.
US10523385B2	Method and device for transmitting signal of base station in wireless communication system A method for transmitting a signal of a base station in a wireless communication system, according to an embodiment of the present invention, comprises the steps of: transmitting transmission standby traffic indication information to a node when a first traffic is received in a first duration; and determining whether to transmit the transmission standby traffic indication information to the node in a second duration, on the basis of whether the transmission standby traffic indication information has been transmitted in the first duration and whether a second traffic has been received in the second duration.
US10523370B2	Data packet synchronization Provided is a data packet transmission method and device. The method includes: generating, by a first network element, first indication information according to a delivery status fed back by a second network element to the first network element, where the first indication information is used for instructing the second network element which has not successfully sent a data packet to a terminal to discard the data packet indicated by the first indication information. The present disclosure may solve the problem in the related art of unsynchronized data transmission in sending of a data packet to a terminal by a plurality of second network elements.
US10523369B2	Mutual-information based recursive polar code construction Decoding and encoding methods, systems, and devices for wireless communication are described. One method may include receiving a codeword over a wireless channel, the codeword being encoded using a polar code, identifying a set of repeated bit locations in the received codeword, and identifying a set of bit locations of the polar code used for information bits for the encoding. The set of bit locations may be determined based at least in part on recursively partitioning bit-channels of the polar code for each stage of polarization and assigning portions of a number of the information bits to bit-channel partitions of each stage of polarization based on a mutual information transfer function of respective aggregate capacities of the bit-channel partitions. The method may also include decoding the received codeword according to the polar code to obtain an information bit vector at the set of bit locations, and other aspects and features.
US10523368B2	Polar code processing method and communications device Embodiments of the present invention disclose a polar code processing method and communications device. The method includes: obtaining, based on a target coded bit quantity M and preset first mapping relationship information, a first sequence number set of M uncoded bits that is corresponding to the target coded bit quantity M, the first mapping relationship information is used to indicate a one-to-one correspondence between a plurality of coded bit quantities and a plurality of uncoded bit sequence number sets, the M uncoded bits include K information bits, and M target coded bits are obtained after polar encoding is performed on the M uncoded bits; and selecting, from the first sequence number set of the M uncoded bits according to a preset first selection rule, K sequence numbers as a sequence number set of the K information bits.
US10523362B2	Systems and methods for error-free reconstruction of transmitted symbols in a coherent receiver Systems and methods for estimating a transmit symbol sequence implemented in a coherent receiver include receiving a nominally error-free information bit sequence subsequent to Forward Error Correction (FEC) decoding; determining a nominally error-free estimate of the transmitted bit sequence based on the nominally error-free information bit sequence; and determining a nominally error-free estimate of the transmit symbol sequence by mapping the transmit bit sequence to transmit symbols. The system and methods can further include comparing a transmit optical field based on the transmit symbols to a received optical field for one or more measurements.
US10523357B2	Laser component and laser generating apparatus A laser component includes multiple laser devices arranged in an array to include different emission wavelengths, and a driving unit that, while switching each of the laser devices along the array into a turn-ON-enabled state that enables the laser device to turn to an ON state, brings one of the laser devices that has an emission wavelength corresponding to a predetermined wavelength into an ON state and maintains the ON state.
US10523353B2	Method and device for transmitting and receiving secondary synchronization signal in wireless access system supporting narrowband Internet of things The present invention provides a method and devices for transmitting and receiving a synchronization signal and a method for generating a synchronization signal in a wireless access system supporting NB-IoT. A method for transmitting a narrowband secondary synchronization signal (N-SSS) by a base station in a wireless access system supporting NB-IoT, according to an embodiment of the present invention, can comprise the steps of: generating a first sequence having a size M so as to generate an N-SSS; generating a second sequence having a size M so as to generate an N-SSS; generating an N-SSS by means of the first sequence and second sequence; and transmitting the N-SSS by means of n OFDM symbols. The size of a bandwidth used in the wireless access system supporting NB-IoT is the size of one physical resource block (PRB), and one PRB can comprise twelve subcarriers in a frequency domain.
US10523348B2	Uplink signal to interference plus noise ratio estimation for massive MIMO communication systems This invention presents methods for estimating the uplink SINR and channel estimation error level in MU-MIMO wireless communication systems comprising the BS obtaining the channel coefficients between each receiving antenna of a BS and a transmitting antenna of a UE in the uplink; for the BS estimating the SU-MIMO SINR of a UE using the channel coefficients between a UE and the BS; for the BS estimating the channel estimation error level of a UE using the channel coefficients between a UE and the BS.
US10523345B2	Methods and apparatus for calibration and array operation in advanced MIMO system Methods and Apparatuses for a transceiver calibration and antenna array operation in a multi-input multi-output (MIMO) system. One of the methods for operation of one or more of the apparatuses comprises sending a calibration signal and a pre-designed training sequence, via a coupling network, receiving a calibration signal and a pre-designed training sequence that is sent by the transceiver array in a time slotted pattern via a coupling network, generating an Rx calibration measurement (R1) based on one or more uplink signals received via antenna array and the coupling network, generating a Tx calibration measurement (T1) based on receipt of the calibration signal from each of antennas via the coupling network; and performing a joint Tx/Rx (TRx) calibration based on HR, R1, and T1, where H is a channel response in air interface, R is a channel response of receivers in transceiver array.
US10523344B2	Periodic calibration for communication channels by drift tracking A method and system that provides for execution of a first calibration sequence, such as upon initialization of a system, to establish an operation value, which utilizes an algorithm intended to be exhaustive, and executing a second calibration sequence from time to time, to measure drift in the parameter, and to update the operation value in response to the measured drift. The second calibration sequence utilizes less resources of the communication channel than does the first calibration sequence. In one embodiment, the first calibration sequence for measurement and convergence on the operation value utilizes long calibration patterns, such as codes that are greater than 30 bytes, or pseudorandom bit sequences having lengths of 2N−1 bits, where N is equal to or greater than 7, while the second calibration sequence utilizes short calibration patterns, such as fixed codes less than 16 bytes, and for example as short as 2 bytes long.
US10523341B1	Methods and systems for in-situ crosstalk measurements in communication systems A method includes deactivating transmitters of a first plurality of transceivers that are associated with an endpoint to multi-channel communication fabric. A given transceiver of the first plurality of transceivers includes a receiver. The method includes controlling the given transceiver to cause the given transceiver to couple a reference source of the given transceiver to a first node of the receiver, measure a first value at a second node of the receiver, and determine a gain between the first node and the second node based on the measured first value. The method includes controlling the given receiver to cause the given receiver to isolate the reference source from the first node of the receiver; and measuring, by the given transceiver, a second value at the second node and determining, by the given transceiver, an intrinsic noise based on the measured second value. The method includes activating the deactivated transmitters; measuring, by the given transceiver, a third value at the second node and determining, by the given transceiver, a composite noise based on the measured third value; and determining, by the given transceiver, a crosstalk noise at the first node of the receiver based on the determined gain, the determined intrinsic noise and the determined composite noise.
US10523331B2	Increasing RF power output in photonics-fed phased array antenna systems Delivering a radio frequency (RF) signal to a remote phased array antenna system involves using an optical modulator at an RF source location to modulate a high power optical carrier signal with a source RF signal SRF so as to produce a high power transmit modulated optical carrier (TMOC) signal. An optical link communicates the high power TMOC signal to a remote antenna location, where the high power TMOC is split into N optical paths to obtain N reduced power TMOC signals. In each of the N optical paths, photodetection operations are performed upon the reduced power TMOC signal to obtain N reduced power S′RF signals which are then constructively combined to obtain a high power S′RF signal which is communicated to at least one antenna element.
US10523318B2	Device awareness in line-of-sight optical communication systems Techniques are disclosed by which electronic devices that include line-of-sight optical communication systems may become optically aware of other electronic devices and perform optical communication handshakes with other devices. An electronic device may use a motion sensor to record its posing when it determines, during the performance of an optical communication handshake, that it is pointed at the electronic device with which it is performing the optical communication handshake (or that the other electronic device is within a field of view of the electronic device). A recorded device posing, in combination with optical communications and motion sensor data, may also be used to map another device's location and enable a user of an electronic device to pan away from and break optical communication with the other device, then easily return to a recorded posing that enables a continuation of optical communications with the other device.
US10523317B2	Measurement system and measurement method A measurement system is a measurement system inspecting an optical transmission line configured by connecting a plurality of optical cables, each of which includes a plurality of optical fibers, wherein the optical transmission line includes a plurality of optical fiber lines configured by connecting the plurality of optical fibers in the plurality of optical cables, the measurement system including: a first measurement device configured to be disposed at a first end of the optical transmission line; and a second measurement device configured to be disposed at a second end of the optical transmission line, wherein the first measurement device and the second measurement device perform a first measurement to inspect whether the optical cable is misconnected, and a second measurement to inspect the plurality of optical fiber lines in a case where it is determined that there is no misconnection in the first measurement.
US10523316B2	Parametric information control An example system includes capture circuitry to obtain first parametric data based on a first signal at an interface to a first communication channel, with the first parametric data representing non-informational content of the first signal; and control circuitry to receive the first parametric data and to provide second parametric data, the second parametric data being based on one or both of: the first parametric data or a programmatic input. The example system also includes interface circuitry to receive the second parametric data and to receive informational content data representing informational content, and to process the informational content data and the second parametric data to produce a second signal. The second signal has the informational content represented by the informational content data and having at least some non-informational content based on the second parametric data.
US10523313B2	Method and apparatus for handling communications between spacecraft operating in an orbital environment and terrestrial telecommunications devices that use terrestrial base station communications A multiple-access transceiver handles communications with mobile stations in environments that exceed mobile station design assumptions without necessarily requiring modifications to the mobile stations. One such environment is in Earth orbit. The multiple-access transceiver is adapted to close communications with mobile stations while exceeding mobile station design assumptions, such as greater distance, greater relative motion and/or other conditions commonly found where functionality of a terrestrial transceiver is to be performed by an orbital transceiver. The orbital transceiver might include a data parser that parses a frame data structure, a signal timing module that adjusts timing based on orbit to terrestrial propagation delays, frequency shifters and a programmable radio capable of communicating from the Earth orbit that uses a multiple-access protocol such that the communication is compatible with, or appears to the terrestrial mobile station to be, communication between a terrestrial cellular base station and the terrestrial mobile station.
US10523308B2	Relaying device, communication system, and method for relaying audio signal [Problem] To enable the response audio signal of one transceiver to be heard by other transceivers, in cases when a plurality of subordinate transceivers (wireless handset) are present.[Solution] A relaying device is provided with: a wireless apparatus interface having a repeater connected thereto; a signal processing unit connected to the wireless apparatus interface; a network interface connected to a network; a packet processing unit connected to the network interface; and a mixing unit provided between the signal processing unit and the packet processing unit. The packet processing unit reads out an audio signal from a packet inputted from the network interface, and outputs the audio signal as a downlink audio signal. The mixing unit inputs the downlink audio signal into the signal processing unit, and inputs an uplink audio signal into the signal processing unit. The signal processing unit outputs, to the wireless apparatus interface, the downlink audio signal and the uplink audio signal.
US10523301B2	Method and apparatus for focused data communications A method and apparatus for focused communication is disclosed. The method includes a base transmitter array in communication with at least one client device at the same frequency. The base transmitter array provides a focused data communication to the client device.
US10523297B2	Method for determining precoder for hybrid beamforming in wireless communication system, and apparatus therefor Disclosed is a method for reporting channel quality information by a terminal to a base station in a wireless communication system to which hybrid beamforming is applied. Particularly, the method comprises the steps of: obtaining information associated with a first precoder for first beamforming from among hybrid beamforming; calculating information associated with a second precoder for second beamforming by receiving, from the base station, a reference signal to which the first beamforming is applied; calculating channel quality information by assuming that a pre-compensation precoder and the second precoder are applied; and reporting the channel quality information to the base station.
US10523290B2	Codebook-based uplink transmission in wireless communications Various solutions with respect to codebook-based uplink transmission in wireless communications are described. A user equipment (UE) constructs a precoder to be used to wirelessly communicate with a network node of a wireless network. The UE then performs an uplink (UL) transmission to the network node using the precoder via one or more of a plurality of antennas of the UE.
US10523289B2	Base station device, terminal device, and communication method The present invention provides a base station device, a terminal device, and a communication method, where the terminal efficiently learns information of an interference signal and reduces interference in a reception process to make it possible to enhance throughput, enhance communication opportunity of each terminal device by feedback from the terminal, and the like. The base station device includes a transmission unit configured to transmit, to the terminal device, Multiuser Superposition Transmission (MUST) information used for canceling interference due to MUST. The MUST information includes multiple combinations of modulation schemes for the MUST, and a list of power ratios used for the MUST in each of the combinations of the modulation schemes.
US10523273B1	Vehicle-mounted communication system A vehicle-mounted communication system that includes a plurality of electronic control units to which power is supplied from a positive and negative power supply trunk line installed in a vehicle, wherein: each of the electronic control units includes a first communication unit that performs power line communication via the power supply trunk line; and the electronic control units exchange communication signals with each other using the first communication units.
US10523262B2	Communication apparatus A communication apparatus according to an embodiment of the present invention is configured to determine a frequency band of a communication signal by analyzing a power level of the communication signal detected by a detection unit, and control a band setting unit to set the communication frequency band as the determined frequency band of the communication signal, and determine an output band of the communication signal by analyzing the communication frequency band and a waveform of the communication signal, and control a output setting unit to set a communication output band as the determined output band of the communication signal.
US10523259B2	Transmitter and communication system A three-phase transmitter that sets voltages of first, second, and third output terminals based on first, second, and third signals. The transmitter includes a first transmitting section configured to set the voltage of the first output terminal based on the first and third signals; a second transmitting section configured to set the voltage of the second output terminal based on the first and second signals; and a third transmitting section configured to set the voltage of the third output terminal based on the second and third signals.
US10523258B2	Communication device to perform wireless communication and wireless power transfer, and electrode device to transmit and receive electrical signal from target A communication device includes: a coil disposed around a core area of the communication device; a processor disposed in the core area and configured to establish communication with an external device through the coil; and a discrete element disposed on the coil and connected to the processor through a via.
US10523243B2	Encoder, associated encoding method, and flash memory controller utilizing divided partial parity blocks for circulant convolution calculations An encoding method includes: processing a plurality of data blocks to generate a plurality of partial parity blocks, wherein the partial parity blocks includes a first portion and a second portion; using a first computing circuit to generate a first calculating result according to the second portion of the partial parity blocks; using the first calculating result to adjust the first portion of the partial parity blocks; performing circulant convolution operations upon the adjusted first portion to generate a first portion of parity blocks; and using a second computing circuit to generate a second portion of the parity blocks according to at least the first portion of parity blocks; wherein the first portion of the parity blocks and the second portion of the parity blocks serve as a plurality of parity blocks generated in response to encoding the data blocks.
US10523242B2	Data processing apparatus and method A data processing apparatus includes a group-wise interleaving unit that performs group-wise interleaving; and a block interleaving unit that performs block interleaving in such a manner that an LDPC code obtained by performing the group-wise interleaving is written in m number of columns as storage regions arranged in the row direction. A type of the block interleaving includes a type A and a type B. A MODCOD which is a combination of the LDPC code and the modulation scheme includes a MODCOD-A which is a MODCOD based on the assumption that the block interleaving of the type A is performed, and a MDOCOD-B which is a MDOCOD based on the assumption that the block interleaving of the type B is performed.
US10523235B2	Transmission checking method, node, system and computer storage medium Disclosed in the embodiments of the disclosure are a transmission checking method, node, system and computer storage medium. The method comprises: transmitting, by a SERializer/DESerializer (SERDES) transmitter, a first synchronization frame to a SERDES receiver; after the SERDES receiver receives the first synchronization frame, transmitting a second synchronization frame to the SERDES transmitter; and after the SERDES transmitter receives the second synchronization frame, transmitting a third synchronization frame to the SERDES receiver, such that the SERDES transmitter and the SERDES receiver can determine that a transmitting path and a receiving path of the SERDES transmitter and the SERDES receiver are in a normal state respectively.
US10523233B1	Membrane digital analog switches A membrane digital analog switch includes an input button surface adapted to receive an input pressure from a user, and a digital switch positioned below the input button surface to generate a digital switch activation signal when the received pressure on the input button surface is greater than or equal to a specified digital pressure threshold. The membrane digital analog switch also includes an analog switch adapted to generate an analog switch activation signal when the received pressure on the input button surface is greater than or equal to a specified analog pressure threshold. The specified analog pressure threshold is greater than the specified digital pressure threshold, the digital switch activation signal is a binary digital signal, and the analog switch activation signal is variable and corresponds to an analog sensed value of the received pressure on the input button surface.
US10523232B1	System and method for converting a digital input signal into an analog output signal A system for converting a digital input signal into an analog output signal is provided, the system has at least three different signal paths with different but overlapping frequency ranges, at least three digital-to-analog converters, at least three analog filters, and a combiner unit. Each of the digital-to-analog converters is connected to at least one signal path, wherein the signals transmitted to the digital-to-analog converters are phase coherent. Each of the digital-to-analog converters is connected to a combiner unit, and each of the analog filters is associated with one of the digital-to-analog converters, wherein at least one of the digital-to-analog converters has a lower sampling rate than the sampling rate of at least two others of the digital-to-analog converters. Further, a method for converting a digital input signal into an analog output signal is shown.
US10523223B2	Phase-locked loop circuit calibration method, memory storage device and connection interface circuit A phase-locked loop circuit calibration method for a memory storage device including a rewritable non-volatile memory module is provided according to an exemplary embodiment of the disclosure. The method includes: receiving a first signal from a host system; generating a jitter signal by the memory storage device; generating a second signal according to the first signal and the jitter signal; performing a phase-lock operation on the second signal to generate a third signal by a phase-locked loop circuit; and detecting the third signal to calibrate an electronic parameter of the phase-locked loop circuit.
US10523216B2	Receiving circuit, semiconductor apparatus including the receiving circuit and semiconductor system using the receiving circuit A semiconductor apparatus includes an internal clock generation circuit, a receiver, and a sampling circuit. The internal clock generation circuit generates a receiving clock signal and a sampling clock signal based on a reference clock signal, the sampling clock signal having a phase different from the receiving clock signal. The receiver receives an input signal in synchronization with the receiving clock signal and to generate an amplified signal. The sampling circuit samples the amplified signal in synchronization with the sampling clock signal to generate an output signal.
US10523214B1	Stabilized microwave-frequency source A voltage-controlled oscillator generates a VCO output signal at frequency fM. A dual optical-frequency source generates optical signals at frequencies v1S and v2S. An electro-optic frequency divider (EOFD) generates multiple optical sidebands spaced by fM, and from two sidebands generates a beat signal at beat frequency δf. A first control circuit generates an error signal from the beat signal and a first reference signal at frequency fREF1, and couples the VCO and the EOFD in a negative feedback arrangement that stabilizes the output frequency fM. A second control circuit generates an error signal from the frequency-divided output signal and a second reference signal at frequency fREF2, and couples the VCO and one or both of the dual source or the first reference signal in a negative feedback arrangement that stabilizes, or compensates for fluctuations of, a difference frequency v2S−v1S.
US10523208B2	Efficient lookup table modules for user-programmable integrated circuits A 4-input lookup table module including eight first-rank 2-input multiplexers, four second-rank multiplexers, two third-rank multiplexers, and one fourth-rank multiplexer, the first-rank through fourth-rank multiplexers forming a tree structure. A select input of the fourth-rank multiplexer is coupled to a first input node. Select inputs of the third-rank multiplexers are coupled to a second input node. Select inputs of a first and a second adjacent ones of the second rank 2-input multiplexers are electrically isolated from select inputs of a third and a fourth adjacent ones of the second rank 2-input multiplexers. Select inputs of a first through a fourth adjacent ones of the first rank 2-input multiplexers are electrically isolated from select inputs of a fifth through an eighth adjacent ones of the first rank 2-input multiplexers.
US10523206B2	CMOS inverters with asymmetric contact distances and methods of making such inverters One illustrative method disclosed herein includes forming a first transistor for an inverter and forming asymmetrically spaced first and second conductive contact structures that are conductively coupled to the source region and the drain region, respectively, of the transistor. In this example, the first conductive contact structure (for the source region) is positioned a first predetermined target distance from a first side of the gate structure of the transistor, and the second conductive contact structure (for the drain region) is positioned a second predetermined target distance from a second side of the gate structure, wherein the second predetermined target distance is less than the first predetermined target distance.
US10523200B2	Proximity sensor A proximity sensor is provided. The proximity sensor has an exposed exterior surface formed of a metal material to improve the aesthetics thereof. The proximity sensor mounted within a vehicle includes a frame formed of a nonconductive material and a metal layer that covers an exterior surface of the frame. A sensor electrode contacts the metal layer and a sensor integrated circuit (IC) connected to the sensor electrode to sense an approach or a contact of a user on the metal layer.
US10523194B2	Low leakage power switch A power switch control circuit is disclosed. A sensor circuit may determine a leakage current of a power switch coupled to a power supply signal and a power terminal of a circuit block. The power switch may be configured to selectively couple or decouple the circuit block from the power supply signal using a switch control signal. The switch control circuit may, in response to receiving a request to open the power switch, determine a target voltage level that is greater than a voltage level of the power supply signal for the switch control signal using the leakage current, and transition the switch control signal from an initial voltage to the target voltage level.
US10523187B2	Semiconductor device and electronic device An object is to provide a level shift circuit that operates stably. A semiconductor device includes a level shift circuit including first to fourth transistors and a buffer circuit. One of a source and a drain (S/D) of the first transistor is connected to one of a source and a drain of the second transistor. The other of the source and the drain of the second transistor is connected to one of a source and a drain of the third transistor. A gate of the first transistor and a gate of the fourth transistor are connected to the other of the source and the drain of the second transistor and the one of the source and the drain of the third transistor. A gate of the third transistor is connected to a wiring to which an input signal is input. An input terminal of the buffer circuit is connected to one of a source and a drain of the fourth transistor. An output terminal of the buffer circuit is connected to a gate of the second transistor and a wiring to which an output signal is output.
US10523182B1	Adaptive harmonic cancellation Disclosed systems and methods relate to an adaptive harmonic cancellation circuit for communication. The adaptive harmonic cancellation circuit includes a harmonic generator circuit configured to generate a reference harmonic of an interference signal. The adaptive harmonic cancellation circuit includes a harmonic prediction circuit coupled to the harmonic generator circuit. The harmonic prediction circuit is configured to receive an input signal including a target signal at a frequency and a radiated harmonic of the interference signal. The harmonic prediction circuit is configured to generate a predicted harmonic of the interference signal by modifying the reference harmonic of the interference signal to match the radiated harmonic of the interference signal in the input signal. The adaptive harmonic cancellation circuit includes a cancellation circuit coupled to the harmonic prediction circuit. The cancellation circuit is configured to obtain the target signal at the frequency by subtracting the predicted harmonic from the input signal.
US10523180B2	Method and structure for single crystal acoustic resonator devices using thermal recrystallization A method of manufacture and structure for an acoustic resonator device having a hybrid piezoelectric stack with a strained single crystal layer and a thermally-treated polycrystalline layer. The method can include forming a strained single crystal piezoelectric layer overlying the nucleation layer and having a strain condition and piezoelectric layer parameters, wherein the strain condition is modulated by nucleation growth parameters and piezoelectric layer parameters to improve one or more piezoelectric properties of the strained single crystal piezoelectric layer. Further, the method can include forming a polycrystalline piezoelectric layer overlying the strained single crystal piezoelectric layer, and performing a thermal treatment on the polycrystalline piezoelectric layer to form a recrystallized polycrystalline piezoelectric layer. The resulting device with this hybrid piezoelectric stack exhibits improved electromechanical coupling and wide bandwidth performance.
US10523178B2	Surface acoustic wave (SAW) resonator A surface acoustic wave (SAW) resonator includes a piezoelectric layer disposed over a substrate, and a plurality of electrodes disposed over the first surface of the piezoelectric layer. A layer is disposed between the substrate and the piezoelectric layer. A surface of the layer has a smoothness sufficient to foster atomic bonding between layer and the substrate. A plurality of features provided on a surface of the piezoelectric layer reflects acoustic waves and reduces the incidence of spurious modes in the piezoelectric layer.
US10523173B2	Quartz crystal resonator and method for manufacturing the same, and quartz crystal resonator unit and method for manufacturing the same A method for manufacturing a quartz crystal resonator that includes a quartz crystal blank having a vibrating portion including a center of a principal surface of the quartz crystal blank when viewed in plan from a direction normal to the principal surface and a peripheral portion adjacent to the vibrating portion, a pair of excitation electrodes disposed opposite to each other with the vibrating portion interposed therebetween, a pair of electrode pads disposed on the peripheral portion, and a pair of extended electrodes each extending from the vibrating portion to the peripheral portion to electrically connect one excitation electrode to a corresponding electrode pad, where the method includes conducting a first trimming of the vibrating portion and the peripheral portion; and conducting a second trimming of part of one of the excitation electrodes on the vibrating portion.
US10523167B2	Variable attenuation device, phase-switching variable attenuation device, and phase shifter A variable attenuation device includes: a first variable attenuator configured to receive a first signal through a first input end, attenuate the first signal by an amount of attenuation according to a control voltage, and output the attenuated first signal through a first output end, the first signal being one of a pair of differential signals having a 180-degree phase difference; a second variable attenuator configured to receive a second signal through a second input end, attenuate the second signal by the amount of attenuation according to the control voltage, and output the attenuated second signal through a second output end, the second signal being the other one of the pair of differential signals; a first signal distributer configured to distribute the second signal to the first output end; and a second signal distributer configured to distribute the first signal to the second output end.
US10523164B2	Semiconductor integrated circuit A semiconductor integrated circuit including a differential amplifier circuit, a first output circuit, a second output circuit, a selection circuit, and a feedback circuit. The differential amplifier circuit is configured to operate at a first source voltage. The first output circuit is configured to receive an output of the differential amplifier circuit, output a first output, and operate at the first source voltage. The second output circuit is configured to receive an output of the differential amplifier circuit, output a second output, and operate at a second source voltage lower than the first source voltage. The selection circuit is configured to select one of the first output from the first output circuit and the second output from the second output circuit according to an operating phase determined by an external control signal. The feedback circuit is connected between the differential amplifier circuit and the selection circuit. The feedback circuit is configured to feed the selected output back to the differential amplifier circuit.
US10523161B2	Power amplification module A power amplification module includes: an amplifier that amplifies an input signal and outputs an amplified signal; and a harmonic-termination circuit to which harmonics of the amplified signal are input and the impedance of which is controlled in accordance with the frequency of a harmonic. The power amplification module can operate in a first mode in which a power supply voltage changes in accordance with the average voltage value of the amplified signal over a prescribed time period or in a second mode in which the power supply voltage changes in accordance with the envelope of the input signal. The impedance of the harmonic-termination circuit is controlled such that at least one even-ordered harmonic is short-circuited when the power amplification module operates in the first mode and at least one odd-ordered harmonic of third order or higher is short-circuited when the power amplification module operates in the second mode.
US10523157B1	Method for improving threshold accuracy in an RFID-device through offset cancellation A method for improving threshold accuracy in an RFID-device through offset cancellation, and including the steps of providing a comparator including a first and a second amplifiers, providing a current output digital-to-analogue converter, AC-coupling in an RF-signal into the detector circuit, during a first phase, applying a signal based on the RF-signal into the first amplifier while a current of the DAC is set to zero, and applying a current of the DAC into the second amplifier while a signal based on the RF-signal is set to zero, during a second phase, applying the current of the DAC into the first amplifier while the signal based on the RF-signal is set to zero, and applying the signal based on the RF-signal into the second amplifier while the current of the DAC is set to zero.
US10523156B2	Mixer with series connected active devices A unit cell for a resistive mixer includes a plurality of active devices arranged in series, wherein each of said plurality of active devices having a different output conductance. A resistive mixer includes a plurality of active devices connected in series with one another to form a unit cell.
US10523155B2	Low-voltage crystal oscillator circuit compatible with GPIO Low voltage crystal oscillator having native NMOS transistors used for coupling/decoupling to/from GPIO. The native NMOS transistors function properly at a low supply voltage when on (low resistance) and a high supply voltage when off (high resistance). Oscillator Gm driver bias resistors are repurposed to degenerate the native NMOS transistors when they are off, thereby reducing the leakage current thereof (oscillator circuit decoupled from GPIO nodes). This ensures compliance with the CMOS IIH leakage current specification during an external clock (EC) mode at a high supply voltage.
US10523153B2	Spectrum shaping voltage to current converter A voltage controlled oscillator (VCO) is disclosed. The VCO includes an amplifier that receives a control signal and a feedback signal and generates an amplified output signal based on the difference between the control signal and the feedback signal. The VCO also includes circuitry to generate an oscillating output signal based on the amplifier output signal. Additionally, the VCO includes a feedback amplifier that generates the feedback signal based on the output of the amplifier. The feedback amplifier includes a first resistor connected in parallel with a second resistor, the second resistor having an adjustable resistance.
US10523152B2	Solar-operated adjustment device for a solar installation Solar-operated adjustment device for a solar installation including, at least one retaining element for fixing at least one solar element, a swivel device which is designed and intended to swivel the retaining element around a support point, wherein the swivel device includes at least one liquid tank, wherein a float of the retaining element is arranged at least in part beneath a filling level of the liquid tank and the float is supported on a perimeter of the liquid tank, and the retaining element can only be swiveled around a support point with respect to a longitudinal axis of the liquid tank by means of its buoyancy and is mounted above the filling level, at least indirectly on the edge of the liquid tank.
US10523149B2	Motor control device A motor control device includes: a PWM count computation unit that computes a PWM count for each of three phases for each current control cycle; a PWM count setting unit that sets the PWM count for each phase in the current control cycle as a PWM count for each PWM cycle in the relevant current control cycle for the corresponding phase; and a common mode noise reduction unit that changes the PWM count in a PWM cycle for at least one phase, of two of the three phases other than one particular phase, such that a current that flows through a stray capacitance because of an output voltage for the one particular phase is canceled out with a current flowing through the stray capacitance because of an output voltage for the at least one of the two other phases in at least one PWM cycle in the current control cycle.
US10523148B2	Reconfigurable winding connection for five-phase permanent magnet electric machine A vehicle includes a five-phase electric machine with open windings driven at each side by phase legs of an inverter. A controller monitors for open-circuit windings. In response to detecting an open-circuit winding above a predetermined speed threshold, the controller operates the inverter to drive the windings that are not open-circuited in a square configuration.
US10523134B2	Comb drive with non-parallel overlapping comb fingers A comb drive includes an inactive comb finger array and an opposing active comb finger array positioned to oppose the inactive comb finger array and configured to move in a non-linear path relative to the inactive comb finger array, wherein each comb finger array includes a comb spine and a plurality of comb fingers extending from its comb spine, and each comb finger on the active comb finger array is shaped to match a non-parallel profile. The non-parallel profile may be tapered, curved, or selected to linearize the capacitance in a gap between adjacent comb fingers from the inactive comb finger array when a comb finger from the active comb finger array moves through the gap.
US10523133B2	Vehicular motor control device and vehicular motor control method Provided is a motor control device for a vehicle including: an inverter, in which a plurality of power semiconductor devices are installed, and which is configured to drive a motor through switching control; and a DC/DC converter configured to step up an output voltage of a DC power supply in accordance with a voltage command value to apply the stepped-up voltage to the inverter, in which the inverter employs a wide bandgap semiconductor, for example, a SiC device, as the power semiconductor devices, and the DC/DC converter has a circuit configuration in which a stepwise output voltage is generated at the time of DC/DC power conversion.
US10523130B2	Alternate grounding of inverter midpoint for three level switching control A method of and system for controlling a DC midpoint of a multi-level inverter. The method includes receiving an input power signal from an AC power source at a multi-level motor control system that includes a DC bus and a multi-level inverter configured to supply a load, the DC bus having a DC midpoint, connecting a DC midpoint of a DC bus to a neutral point of the AC power source, while isolating a neutral point of a load supplied by the multi-level inverter from the DC midpoint, monitoring a voltage on the DC midpoint of the DC bus. In addition, the method may include controlling a voltage of the neutral point of the AC load based on imbalances in the load supplied by the multi-level inverter.
US10523124B1	Two-stage multi-phase switching power supply with ramp generator DC offset for enhanced transient response A multi-phase switching power converter is disclosed in which the duty cycle of active phases following a phase shedding transition is temporarily adjusted to increase the operating speed of the multi-phase switching power converter.
US10523112B2	Power converter and method of controlling the same A power converter and a method of controlling the power converter are provided. The power converter includes a PFC rectifier module and a DC-DC converter module. When the output voltage of the power converter is greater than or equal to a minimum limit value of the bus voltage output by the PFC rectifier module, the DC-DC converter module is operated in a constant-on mode in which the DC-DC converter module does not perform voltage conversion and the PFC rectifier module outputs the bus voltage which is adjusted according to the output voltage of the power converter. When the output voltage of the power converter is less than the minimum limit value, the DC-DC converter module is operated in a voltage-regulation mode in which the DC-DC converter module converts the bus voltage into the output voltage of the power converter, and the bus voltage is a constant value.
US10523104B2	Power transistor bias circuit A direct current-direct current (DC-DC) converter includes an upper transistor, a lower transistor, a first bias circuit and a second bias circuit. A first input end of the first bias circuit is coupled to a first voltage reference, a second input end of the first bias circuit is coupled to a power source (PVDD), and an output end of the first bias circuit is coupled to a gate of the upper transistor to provide a first bias voltage for the gate of the upper transistor. A first input end of the second bias circuit is coupled to a second voltage reference, a second input end of the second bias circuit is coupled to a power ground (PGND), and an output end of the second bias circuit is coupled to a gate of the lower transistor to provide a second bias voltage for the gate of the lower transistor.
US10523102B1	Methods and apparatuses for stable control in power converters Apparatus and associated methods relate to modulating the frequency of a switch signal to achieve a fast transient response while holding the average frequency constant over a predetermined number of N cycles. In an illustrative example, a quantum charge modulator may include a compensation processor configured to compensate an error signal and generate a compensation signal by performing operations to maintain an average switching frequency over the N cycles in response to the transient. The compensation signal may be a function of a real phase deviation ΔTSW between a stable pulse modulated signal having a cycle period TSW before the transient and a measured pulse modulated signal having a cycle period TSW_M after the transient. A forgetting factor may be used to calculate the phase deviations. The quantum charge modulator may provide a compensation free, stable, and high performance response over power stage component changes.
US10523101B2	Motor A motor includes a magnet and a coil. α2=[{(Br2−Br1)/Br1}/(T2−T1)]×100≥−0.10 and α3=[{(Br3−Br1)/Br1}/(T3−T1)]×100≤−0.12 are satisfied. In the magnet, Br1 (mT) is a residual magnetic flux density at T1 (° C.), Br2 (mT) is a residual magnetic flux density at T2 (° C.), and Br3 (mT) is a residual magnetic flux density at T3 (° C.), and α2 (%/° C.) is a temperature coefficient at a target temperature of T2 (° C.) with respect to a reference temperature of T1 (° C.), and α3 (%/° C.) is a temperature coefficient at a target temperature of T3 (° C.) with respect to a reference temperature of T1 (° C.) in conditions of T1=23, T2=60, and T3=180.
US10523099B2	Rotor, reluctance machine and production method for a rotor A rotor for a reluctance machine is provided. The rotor includes a cylindrical soft-magnetic element having cutouts for forming magnetic flux barriers. Some or all of the flux barriers are divided by one or more webs, with the profile of the individual webs forming a closed line which divides the rotor in the radial direction into an inner and an outer region. The cut-outs may be partially or fully filled with a a paramagnetic or diamagnetic filler material.
US10523098B1	Progressive magnetic rotation motor An efficient energy saving progressive magnetic rotation motor utilizing interacting rows of magnets on field pole rotors and a main rotor. The field pole rotors have rows of permanent magnets with increasing numbers of magnets per row. The main rotor has magnets and an electro-magnet. Magnets are arranged in opposite direction and polarity on the field pole rotors in relation to the main rotor. Magnetic attraction of the field pole rotors to the main rotor magnets results in a progressive magnetic rotational action producing rotational output. The motor is started, operated and stopped utilizing an electronic controller. Constant rotation is maintained by pulsing the electro-magnet with the controller from a positive to negative pulse synchronized to a feedback sensor located on the main rotor shaft.
US10523081B2	Brushless motor for a power tool A power tool is provided including a housing and an electric brushless DC (BLDG) motor housed inside the housing. The motor includes a stator, a rotor pivotably arranged inside the stator, and a motor end cap arranged at an end of the stator. At least one of the motor end cap or the stator includes flexible posts that engage a surface of the other one of the motor end cap or the stator to absorb tolerances associated with the stator and the end cap.
US10523073B2	Rotating electric machine and method of manufacturing same TIG welding can be applied, and short circuiting of stator winding due to a jointing material of coil conductors is prevented. A rotating electric machine includes a rotor; and a stator having a stator core and a stator winding, wherein the stator winding has a plurality of coil conductors, and joint parts connecting ends of the coil conductors protruding from an end face of the stator core, and the ends of the coil conductors have weir portions formed for blocking flow of metal of the joint parts.
US10523072B2	Electric machine rotor An electric machine may include a plurality of sections, each defining a permanent magnet pocket and a field formation chamber. The sections may be stacked to form a rotor such that when walls of the permanent magnet pockets are aligned from end to end, walls of the chambers of at least some of the sections are offset. An adjacent pair of the sections may have different chamber to pocket relative positions to define different pole arc angles. A difference between the first pole arc angle and the second pole arc angle may be equal to a slot pitch of a stator of the electric machine. The slot pitch may be 7.5 mechanical degrees. The chamber may be defined on a radially outward edge of the pocket. The chamber may taper in a radially outward direction.
US10523071B2	Magnetic motor with stator and rotor Disclosed is a motor comprising a stator and a rotor, wherein the rotor comprises a plurality of rotor cores and a plurality of magnets, and wherein the magnet is configured to have a face facing the center of rotation of the rotor exposed. Accordingly, a motor may minimize a non-magnetization area and enable a magnet to be fully magnetized, when it comes to post magnetization of the magnet.
US10523068B2	Stator for an electric machine and electric machine A stator of an electric machine for a hybrid vehicle or electric vehicle includes: a substantially cylinder-jacket-shaped, axially extending stator carrier. The stator carrier is configured to carry a lamination stack having a plurality of stator teeth substantially annularly arranged and has a radially inwardly extending shoulder edge configured so as to axially support the lamination stack. At least one cutout is formed at the shoulder edge of the stator carrier.
US10523067B2	Power transmitting device and power transmission system A power transmitting device includes a power transmitting unit, a first tuner, and a second tuner, and a controller. The power transmitting unit is configured to transmit AC transmission power to a power receiving device in a non-contact manner. The first tuner is configured to discretely tune a frequency of the transmission power. The second tuner is configured to discretely tune a resonance frequency of the power transmitting unit. The controller is configured to control the first and second tuners such that the number of tunings using one tuner having the smaller frequency tuning interval of the first and second tuners is larger than the number of tunings using the other tuner.
US10523066B2	Wireless power transmission method and apparatus A wireless power transmission method and apparatus are provided. The wireless power transmission method receives a signal associated with a relative position of the wireless power transmission based on a frequency in a high frequency band, and determines whether to wirelessly transmit a power based on an intensity of the received signal.
US10523062B2	Multi-mode wireless power transmission method and device for same The present invention relates to a multi-mode wireless power transmission method and a device for the same. A wireless power transmitter for supporting a plurality of wireless power transmission modes, according to one embodiment of the present invention, can comprise: a first transmitter for transmitting a first power signal corresponding to a first wireless power transmission mode; a second transmitter for transmitting a second power signal corresponding to a second wireless power transmission mode; and a first power cutoff circuit coupled to the first transmitter so as to block the incoming second power signal and allow the first power signal to pass therethrough. Therefore, the present invention can minimize power consumption in the wireless power transmitter supporting the plurality of wireless power transmission modes, and can maximize power transmission efficiency.
US10523052B2	Wireless inductive power transfer A wireless power transfer system includes a power receiver and a power transmitter providing power using an inductive power signal. The power transmitter includes a resonance circuit having capacitive and inductive impedances, and a driver configured to generate a drive signal for the resonance circuit. A frequency modification circuit is configured to control the resonance frequency of the resonance circuit by slowing a state change for the capacitive and/or inductive impedance for a fractional time interval of at least some cycles of the drive signal, The frequency modification circuit is configured to align at least one of a start time and an end time for the fractional time interval to transitions of a timing signal. In the power transmitter, the driver is configured to generate the timing signal to have transitions synchronized to the drive signal. The slowing may be by impeding current flow between the capacitive and inductive impedances.
US10523047B2	Autonomous ROVs with offshore power source that can return to recharge A resident remotely operated vehicle may be deployed subsea by deploying a remotely operated vehicle (ROV) (200) configured to be disposed and remain resident subsea for an extended time where the ROV comprises an ROV electrical power connector port (202) to be operatively connected to an electrical power supply (700) dedicated to the ROV. An RTMS configured to be disposed subsea for an extended time is also deployed subsea (210), typically proximate the ROV. A subsea docking hub subsea is also deployed subsea proximate the RTMS and operatively connected to the ROV and the RTMS. In addition, an umbilical is connected from the subsea docking hub to a subsea structure and a signal supplied from the subsea structure to the ROV.
US10523039B2	Systems for battery charging using a wireless charging signal Systems for charging a battery are provided, the systems comprising: a regulator having an output coupled to the battery and having an input; a wireless charging receiver having an output coupled to the input of the regulator and having an input that receives a power signal from a wireless charging transmitter; a controller having a first input coupled to the input of the regulator, having a second input coupled to the output of the regulator, and having a first output coupled to the wireless charging transmitter, wherein the controller is configured to send, using the first output of the controller, a control signal to the wireless charging transmitter that causes the wireless charging transmitter to change the power signal provided to the wireless charging receiver.
US10523038B2	System and method for wireless charging of a beacon and/or sensor device A beacon and/or sensor device having a primary and secondary power source uses the second power source in case of a requirement to carry out additional tasks such as advanced functions. The secondary power source of the beacon or sensor device is capable of being wirelessly charged by a wireless charging transmitter when brought in close proximity and/or contact to the beacon and/or sensor device. Thus, the primary power source is not used and drained while performing advanced functions.
US10523032B2	Charging apparatus with multiple power paths A charging apparatus includes a DC switch circuit, a wireless power unit, a capacitive power conversion unit, and a switching power conversion unit. The charging apparatus operates in at least one of the following modes: in a constant current mode, the capacitive power conversion unit converts a bus current provided by the DC switch circuit or the wireless power unit to generate a predetermined constant charging current on a charging node to charge a battery; in a constant voltage mode, the switching power conversion unit converts a bus voltage provided by the DC switch circuit or the wireless power unit to generate a predetermined charging voltage on the charging node to charge the battery; in a first power output mode, the switching power conversion unit converts the battery voltage to generate an output voltage on a transmission interface pin.
US10523031B2	Method and device for controlling two-wire discharge circuit of battery A method and device for controlling a two-wire discharge circuit of a battery, introducing a whole-bus voltage outer loop and an inductive current average value or inductive current actual value closed loop as a main control loop of the two-wire discharge circuit of the battery so as to guarantee a stable voltage of the whole bus. On the basis of the main control loop, duty ratios of switch transistors in respective discharge branches are adjusted to control the respective discharge branches to independently charge and discharge corresponding half-buses so as to balance the bus voltage. The method and the device avoid accessing a central wire of the battery and any additional circuits, and satisfy a technical specification of a three-wire access of the battery, thereby improving a circuit performance of the two-wire discharge circuit of the battery.
US10523028B2	Electric power station The disclosed apparatus and method is a closed loop system that obtains, stores and transfers motive energy. Preferably, the majority of the electricity generated is utilized to service a load or supplied to the grid. A portion of the electric power produced is used to recharge the batteries for subsequent use of the electric motor. The system controls and manages the battery power by controlling the charging and discharging of the battery reservoir via a series of electrical and mechanical innovations controlled by electronic instruction using a series of devices to analyze, optimize and perform power production and charging functions in sequence to achieve its purpose.
US10523025B2	Voltage converters and methods to use therewith A voltage error signal is provided to a PWM controller of a voltage regular and used to produce a PWM signal that drives a power stage of the regulator. When operating in an adapter current limit regulation mode, an adapter current sense voltage, indicative of an adapter current, is compared to an adapter current reference voltage to produce an adapter current error signal. A compensator receives the adapter current error signal and outputs a compensated adapter current error signal. The adapter current sense voltage, or a high pass filtered version thereof, is subtracted from the compensated adapter current error signal to produce the voltage error signal provided to the PWM controller. Alternatively, an input voltage, or a high pass filtered version thereof, is added to the compensated adapter current error signal to produce the voltage error signal.
US10523019B2	Hybrid power pack The present disclosure relates to a hybrid power pack. The hybrid power pack includes a first storage component, a second storage component, a battery management system, a cell balancing circuit, a capacitor balancing circuit, a bidirectional switch, a unipolar transistor, an inout port, a first unidirectional switch and a second unidirectional switch. The hybrid power pack can provide sustained DC power to a load, drawing power selectively from the first storage component, the second storage component or from both storage components simultaneously.
US10523017B2	Switch module and converter with at least one switch module A switch module and a converter developed with the help of a switch module. The switch module presents two series connections comprising a power semi-conductor switch and a diode and. Parallel to the first series connection a first capacitor is connected. Between the first capacitor and the second series connection at least one intermediate connection is connected. This is designed as quadripole, whereby between both the output connections a second capacitor is connected. The first output connection is connected through a third power semi-conductor switch with the first input connection. The second output connection is connected with the cathode of a third diode, whose anode is connected with the second input connection of the intermediate circuit. With this switch module at least five voltage levels can be set up for an output voltage. For each additionally present intermediate circuit the number of the possible voltage levels increases by two.
US10523013B2	Systems and methods for remote or local shut-off of a photovoltaic system Systems and methods for shut-down of a photovoltaic system. In one embodiment, a method implemented in a computer system includes: communicating, via a central controller, with a plurality of local management units (LMUs), each of the LMUs coupled to control a respective solar module; receiving, via the central controller, a shut-down signal from a user device (e.g., a hand-held device, a computer, or a wireless switch unit); and in response to receiving the shut-down signal, shutting down operation of the respective solar module for each of the LMUs.
US10523003B2	Auxiliary power circuit and method of use An auxiliary power circuit includes an impedance circuit, a switch, and a controller. The switch is coupled in series with the impedance circuit. The switch is configured to selectively couple the impedance circuit to a power source. The controller is coupled to the switch. The controller is configured to close the switch when an output voltage of the power source exceeds a voltage threshold.
US10523000B2	Arc flash mitigation switch for quenching external arc faults in low voltage switchgear Systems, methods, and devices, for forming and using an arc flash mitigation switch are provided. In one exemplary embodiment, an arc flash mitigation switch includes a cylindrical shell having a first end cap and a second end cap located at either end of the cylindrical shell. A first and second conductive feed through extend through the first and second end cap, respectively, at one end, and at the other connect to a first and second electrode separated by a gap. The exemplary arc flash mitigation switch further includes a trigger feed through that receives a trigger current that commutates the external arc flash event into the arc flash mitigation switch, quenching the external hazard.
US10522987B2	Modular cable protector A modular cable protector can be removably connected in series with like cable protectors by complementary male and female end connectors. A number of openings extend downward along the peripheral walls of the adjacent end connectors to define a pattern of gaps and regions of contact between adjacent end connectors. Preferably, undercuts extend from the lower portions of the openings. A tool can be used to removably engage these openings and undercuts, thereby allowing a user to exert an upward force to disengage the end connectors on adjacent cable protectors.
US10522983B2	Injection electrical connector A cable accessory for injecting fluid into a cable. The accessory has first and second ends configured to be coupled to the cable and an external cable accessory, respectively. The accessory has an injection port configured to introduce the fluid to a stranded conductor of the cable. The accessory may include a body and conductive rod. The body defines a through-channel configured to receive the conductor. The rod has a first portion that extends outwardly from the second end to be received inside the external cable accessory and to form an electrical connection therewith. The rod has a second portion configured to be coupled to the conductor and form an electrical connection therewith. The second portion (with the conductor coupled thereto) is positionable inside the through-channel with the first portion extending outward from the second end. The fluid is injectable into the conductor through injection port, which extends into the through-channel.
US10522982B2	Gas insulation switch cabinet and switch device A gas insulation switch cabinet and a switch device are provided. The gas insulation switch cabinet includes: a cabinet body; and a cable chamber, a breaker chamber and a busbar chamber which are in the cabinet body and configured that a current sequentially flows through the cable chamber, the breaker chamber and the busbar chamber. The gas insulation switch cabinet further includes a cable side disconnecting switch between the cable chamber and the breaker chamber in a flowing direction of the current.
US10522978B2	Ignition plug and ignition system including the same In an ignition plug, since a ground electrode is formed in a thin-rod-shape or a mesh-like shape, sufficiently strong radicals are locally generated by a barrier discharge, an anti-inflammation effect by the electrode is small, and the growth of a flame is hardly hindered. Furthermore, by making the thickness dimension of a second dielectric facing a discharge region uniform, the barrier discharge is spread over the surface of the second dielectric, the generation of the radicals is maintained, and combustibility after ignition is promoted. Furthermore, because an end portion of a high voltage electrode and a ground electrode are disposed to face each other within a combustion chamber, a fuel gas introduced into the combustion chamber is liable to flow into the discharge region, and is easily ignited by the radicals generated due to the discharge.
US10522959B2	System and method for metered public electrical wall charger The invention is directed to an electrical device charger comprising at least one stopper that is configured to hold one electrically powered device in position on the charger while the charger is coupled to a power source, and housing a wireless payment processing system. The stopper may be a channel, groove and or protrusion. The charger may be formed of two separate parts that can be connected via snap, clamp and/or press fit mechanism. The electrical device charger may include a mechanism to compensate for non-horizontal electrical outlets and/or a horizontal level keychain charger. The payment processing system comprises: an electric power sensor for determining a quantity of power used; the rate charging processor, which calculates a power rate to charge the user based on the quantity of power used and vendor fees; and a transaction mechanism, which facilitates a wireless card payment online or via a card swipe reader.
US10522953B2	Coaxial electrical connector and manufacturing method thereof A coaxial electrical connector connected to a circuit board having a metal outer conductor having a tubular portion and a metal center conductor equipped with a contact portion extending in the axial direction of said tubular portion within the interior space of said tubular portion, and in which said center conductor is secured in place by the outer conductor, with a dielectric interposed therebetween, the center conductor has a radial portion with a plate-shaped configuration extending radially outward from the base portion side of the contact portion, and a connecting portion placed in contact with a circuit board is formed on the bottom face of said radial portion, wherein the radial portion has grain flow lines formed by a flow of metallographic structure oriented parallel to two major surfaces opposing each other in the axial direction, and the contact portion has grain flow lines oriented in the axial direction.
US10522945B2	Electrical connector A connector for connection to a substrate for mounting electronic devices. The connector includes a stack of coupling contacts pivotably disposed within a housing. Each coupling contact is generally H-shaped and defines opposing first and second spaces. The first and second spaces are aligned to form first and second receiving grooves in the stack, respectively. The connector also includes one or more mounting contacts partially disposed within the housing. Each mounting contact has a fastening structure joined to a bar section. The fastening structure is adapted for securement to the substrate and the bar section is disposed in the second receiving groove of the stack of coupling contacts.
US10522942B2	Securing module A securing module includes a positioning member, a fixing member, a wire management member, and a cover. The positioning member is disposed on a case. The fixing member is passed through the positioning member and fixed to the case. The wire management member is disposed on the fixing member. The cover is assembled to the case. The cover includes at least one hook, a clamping component, and a hollow shell. The at least one hook and the clamping component are disposed on the hollow shell. The hollow shell covers the positioning member, the fixing member, and the wire management member. The clamping component is selectively moved between a fixing position and a releasing position. When the at least one hook is snap-fit to the case and the clamping component is located at the fixing position, the clamping component clamps the positioning member so that the hollow shell is fixed to the case.
US10522941B1	Waterproof single-conductor connection system Connection system that provides robust, waterproof, high current capacity connections between cables and devices. Cables each contain a single conductive wire that terminates in a threaded rod. The threaded rod screws into a corresponding threaded hole in a receiving socket. Engagement of the threads provides a large contact surface area to support high current capacity and to provide a strong holding force to secure the connection. Cables terminate in a housing with an O-ring that forms a waterproof seal; the connection system can therefore be used for underwater connections. Right-handed and left-handed threads may be used on opposite ends of a cable so that tightening or loosening connections on both sides causes twists in the cable to cancel out. The connection system may include a hub with two busses that each have multiple connection points for cables. The hub may distribute power to connected devices and support inter-device communication.
US10522934B2	Connection terminal and connection assembly The present invention discloses a connection terminal and a connection assembly. The connection assembly has the connection terminal and a housing. The connection terminal has a body, a plug-in portion, and a wire connecting portion. The plug-in portion and the wire connecting portion are disposed at two ends of the body respectively. The body is provided with a primary locking portion, which has a connection portion, a first stopping portion, and a reinforcing portion. The connection portion is disposed on the body. The first stopping portion is disposed on the connection portion, and extends in a direction opposite to a plug-in direction. The reinforcing portion is disposed on the first stopping portion, and extends continuously along the plug-in direction of the connection terminal to the connection portion. The connection terminal of the present invention has high mechanical strength and a high pressure-bearing capability, so as to be securely mounted in the housing.
US10522930B2	Systems and methods for frequency shifting resonance of connector stubs In accordance with embodiments of the present disclosure, a connector may include a housing and an electrically-conductive pin housed in the housing and configured to electrically couple to a corresponding electrically-conductive conduit of an information handling resource comprising the connector. The pin may include a beam extending from the housing and a stub terminating the pin, the stub having a per-unit-length surface area greater than that of the beam.
US10522929B2	Connector to provide reliable electrical connection In a connector, a terminal has a pair of contact portions that are fixed to a housing and disposed so as to provide a stable and reliable electrical connection. In the connector, a movable housing has a first contact portion fixation groove that supports a first contact portion of the terminal and a second contact portion fixation groove that supports a second contact portion. The terminal has a link portion that can join the first contact portion and the second contact portion to each other so as to be able to adjust the clearance therebetween. The link portion can absorb a variation in the clearance between the first contact portion fixation groove and the second contact portion fixation groove and a variation in the clearance between the first contact portion and the second contact portion.
US10522927B2	Floating connector device A floating connector device allows movement of a movable-side housing in board-parallel and pushing directions, allows floating in a pushing/removal direction when mated with a mating connector, and has high contact reliability. A fixed housing (11) includes a long through-hole and a pair of board-facing plates. A movable housing (12) includes an outer portion projecting from the long through-hole and a retaining projection overlapping the board-facing plates in plan view. A contact group includes a tail for board mounting, a fixing portion supported by the fixed housing (11), a U-shaped portion supported by a contact support groove in the outer portion, and an elastic deformation portion, in a free state unsupported by either groove, that by its own elasticity allows the movable housing (12) to sink in a board direction, and in a sunken state, allows elastic movement in a longitudinal direction, a direction orthogonal thereto, and a tilting direction.
US10522924B2	Electrical receptacle connector An electrical receptacle connector includes a insulated block, first receptacle terminals, second receptacle terminals, an insulated housing, and a metallic shell. A first surface of the insulated block includes a plurality of first engaging grooves for holding the first receptacle terminals, and a second surface of the insulated block includes a plurality second engaging grooves. Accordingly, when the insulated block is formed in a first molding procedure, the first receptacle terminals and the second receptacle terminals are respectively positioned on the insulated block. Next, a second molding procedure is applied to form the insulated housing out of the insulated block. Therefore, the difficulties in manufacturing the components of the connector and the cost for manufacturing the connector can be reduced, while the manufacturing efficiency of the connector can be improved.
US10522920B2	Method of generating circularly polarised signals from a polarisation controller of a ground station A method for generating a circular polarisation signal from at least two transponders of a satellite able to process linearly polarised signals includes: a transmission of at least two linearly polarised signal components so as to produce a circularly polarised signal by at least two transponders of a satellite; processing signals by the two transponders of the satellite to produce a circular polarisation of the signals transmitted by the satellite; ground receiving by at least one circularly polarised antenna; measuring a physical parameter from the received signals, and determining a correction parameter to be applied to the generation of the components of linearly polarised signals; generating a compensation of the components of linearly polarised signals transmitted to the satellite.
US10522919B2	Surface integrated waveguide antenna and a transceiver including a surface integrated waveguide antenna array A substrate integrated waveguide, SIW, antenna comprises a modified design of prior art SIW antennas that comprises an addition of electrically conducting means, e.g. vias, also along the substrate extending from the antenna aperture. By doing so, the SIW antenna of the present disclosure enables a reduction of mutual coupling between neighboring SIW antennas when arranged adjacent each other, e.g. in an array. Moreover, a reduction of back radiation in the SIW antenna can also be observed.
US10522918B1	Contrawound helical antenna apparatus and method Example apparatuses and methods relating to antennas are provided. An example apparatus in the form of an antenna assembly includes a first conductor formed into a first helical structure wound around a central axis and a second conductor formed into a second helical structure wound around the central axis. The first helical structure may have a first coil sense and the second helical structure may have second coil sense that is opposite the first coil sense. The first conductor may have a first conductor proximal end and a first conductor distal end and the second conductor may have a second conductor proximal end and a second conductor distal end. The first conductor distal end may be adjacent the second conductor proximal end. The antenna assembly may further include first, second, and third ground planes with one disposed at each end of the conductors and one disposed between the conductors.
US10522914B2	Patch antenna with ferrite cores Disclosed herein is a method and system for using ferrite cores to suppress harmonic radiation with microstrip patch antennas. In certain embodiments, the ferrites cores exemplified herein significantly suppressed second and third harmonic radiation generated by RF components coupled to the microstrip patch antenna.
US10522910B2	Antenna device, communication device, and method for producing antenna device An antenna device includes a magnetic portion and a coil. The magnetic portion includes a plurality of magnetic pieces arranged. The plurality of magnetic pieces are individual pieces of a magnetic body. The coil is formed of a litz wire coiled around the magnetic portion. The litz wire includes a bundle of a plurality of conducting wires.
US10522907B2	WiFi and bluetooth smart indoor/outdoor antenna with automatic motorized and app control An antenna system for receiving over-the-air broadcast television signals includes a steerable directional antenna, a pedestal on which the directional antenna is rotatably mounted, a stepper motor to effect rotation of the steerable directional antenna, and a control circuit. The control circuit receives a control signal and causes the stepper motor to effect rotation of the steerable directional antenna. The directional antenna is steered such that its main lobe is generally directed to a television signal transmitting antenna selected by the user of the antenna system. The steering of the directional antenna is based on geographic location information associated with the television signal transmitting antenna.
US10522905B2	Antenna for low frequency communication within a vehicle environment and low frequency communication system An antenna for low frequency communication within a vehicle environment, low frequency communication system and uses of the antenna.The antenna comprises a flexible or semi-flexible magnetic core of at least 500 mm, and the magnetic core incorporates a dual coil configuration that provides a first coil configuration for transmission capabilities and a second coil configuration for reception capabilities, and further including means for switching between both of said coil configurations.
US10522898B2	Integration of millimeter wave antennas in reduced form factor platforms Generally, this disclosure provides systems, devices and methods for integration of millimeter wave antennas in platforms with reduced form factors while maintaining or improving antenna gain. An antenna assembly may include a first planar substrate; a ground plane disposed on the first planar substrate; a second planar substrate disposed on the ground plane; and an antenna radiation element disposed on the second planar substrate. The antenna radiation element may be configured to transmit a signal in the millimeter wave frequency region. The assembly may also include a via to provide a conductive path for the signal from a microstrip feed line, beneath the first planar substrate, to the antenna radiation element. The assembly may further include a dielectric layer disposed on the antenna radiation element to provide increased antenna gain under conditions of reduced air gap between the antenna radiation element and a structural element of an enclosing platform.
US10522892B2	High-frequency line This invention provides a high-frequency line adopting a structure to suppress an impedance variation and occurrence of an excessive power loss in high-frequency wiring having intersection with an optical waveguide. A high-frequency line is a microstrip line which has a basic configuration of stacking a ground electrode, a dielectric layer, and a signal electrode in this order on a SI-InP substrate. In addition, as shown in a transverse sectional view, an optical waveguide core made of InP-based semiconductor intersects with the high-frequency line in a crossing manner. A width of the signal electrode is partially increased in a certain region covering the intersection with the optical waveguide along a propagating direction of the high-frequency line. In the microstrip line, the width of the signal electrode is partially increased from w1 to w2, and characteristic impedance is thus reduced as compared to one with the uniform width w1.
US10522891B2	Millimeter-wave coupler for semi-confocal fabry-perot cavity A coupler for coupling electromagnetic radiation into a cavity, including a metal layer having a reflective surface and forming a ground plane; and one or more waveguides for gigahertz or terahertz electromagnetic radiation embedded in the metal layer. The waveguides each include two openings in the metal layer exposing a dielectric underneath; and a section of the metal layer between the two openings. A plurality of holes in the metal layer are disposed along a perimeter of the openings so as to shape the electric field of the electromagnetic radiation in a cavity coupled to the coupler.
US10522881B1	Estimation of self discharge rate as a measure of battery health Various embodiments of a technique to estimate and monitor a self-discharge rate for use as a measure of battery health are described herein. In some embodiments, the technique includes a system including a processor and a memory coupled with the processor. The memory is configured to provide the processor with instructions that when executed cause the processor to receive a plurality of snapshots obtained by monitoring a battery system in a quiescent state at a plurality of times. Each snapshot includes a plurality of cell state values at one of the plurality of times. The memory is further configured to provide the processor with instructions that when executed cause the processor to estimate a self-discharge indicator using at least one snapshot in the plurality of snapshots, compare the self-discharge indicator to a threshold, and recommend a remedy for the battery system in response to the self-discharge indicator exceeding the threshold.
US10522880B2	Method of detecting metallic lithium present on an electrode A method of detecting metallic lithium present on an electrode of a lithium ion secondary battery includes depositing a lithium-reactive solution including an oxidized fluorescent dye onto the electrode to form a coated electrode. Concurrent to depositing, the method includes reducing the oxidized fluorescent dye to form a reduced dye and a plurality of lithium ions. The method further includes, after reducing, drying the coated electrode to again form the oxidized fluorescent dye. After drying, the method includes exposing the oxidized fluorescent dye to ultraviolet radiation having a wavelength of from 100 nm to 500 nm to thereby illuminate and detect the metallic lithium. A lithium ion secondary battery system is also disclosed.
US10522878B2	Method and device for increasing the safety during the use of battery systems The invention relates to a method for operating a battery system (EB), preferably a lithium-ion battery system, containing at least one battery device, wherein in the case that a safe state of the at least one battery device is brought about from an irregular operating state of the at least one battery device, a current state of the at least one battery device is continuously checked and evaluated by means of at least one component (CSC) of the battery system and the bringing about of the safe state is performed in dependence on the current state of the at least one battery device or an environmental state of the at least one battery device, wherein in particular after the safe state of the at least one battery device has been brought about, hazard information is transmitted to a battery management system (BMS) by means of the at least one component (CSC) of the battery system (EB), wherein the hazard information in particular is hazard information about the current state of the at least one battery device and/or about the environmental state of the at least one battery device and/or about the fact that the safe state of the at least one battery device is present.
US10522874B2	Solid state fiber-based battery system and method of forming same A solid state battery system and methods of forming a solid state battery system. The solid state battery system has a plurality of fiber battery cells formed into a pattern. Each fiber battery cell has a fiber inner core which may be a carbon-graphite, carbon-nanotube, boron-nanotube or boron-nitride-nanotube fiber and serves as the anode. In addition, the fiber battery cell has an electrolyte layer formed over the fiber inner core and an outer conductive layer (the cathode) formed over the electrolyte layer. A first terminal is electrically coupled to the fiber inner core of each of the plurality of fiber battery cells. A second terminal is electrically coupled to the outer conductive layer of each of the plurality of fiber battery cells. The solid state battery system may be incorporated into a composite part for a vehicle, such as an aircraft.
US10522872B2	Polymer electrolyte having multi-layer structure, and all-solid battery comprising same A polymer electrolyte for an all-solid battery, having a multi-layer structure is provided. An embodiment of the polymer electrolyte is a polymer electrolyte having a multi-layer structure, which includes a first polymer electrolyte layer and a second polymer electrolyte layer, where the EO:Li molar ratio of a poly(ethylene oxide)(PEO)-based polymer and a lithium salt is different between the first and second polymer electrolyte layers is provided. A solid polymer electrolyte of the present invention in the all-solid battery substantially reduces the interfacial resistance with lithium and the discharge overvoltage, resulting in a sufficient discharge capacity, which improves output characteristics and energy density.
US10522866B2	Fuel cell stack and fuel cell system A fuel cell stack obtained by stacking a plurality of fuel cells has an internal manifold that extends in a stacking direction of the fuel cells to externally discharge a gas used in the fuel cell, and an extension member that adjoins an inner wall surface of the internal manifold and extends in the stacking direction. The extension member is a bar-shaped member provided in an opposite side to a side where a gas from the fuel cells flows to the inside of the internal manifold and has a sloping surface making an acute angle with an inner-wall lower surface of the internal manifold.
US10522861B2	Electroactive cultures and apparatuses therefor Disclosed herein are methods, systems, and devices for generating electricity from an effluent source. In the presence of electrogenic bacteria and substrate electrodes, an electroactive biofilm is produced which possesses bioconductive capacity for efficiently producing an electric current while treating an effluent source such as, e.g., wastewater. This disclosure relates generally to the production of electricity from a biological source. In particular, this disclosure relates to microbial fuel cells (MFCs) and other bioelectrochemical systems (BES) that exploit an exogenous fuel source.
US10522860B2	Systems for hybrid fuel cell power generation Apparatus are provided for a hybrid fuel cell system. The hybrid fuel cell system includes a fuel supply system. The fuel supply system includes a fuel source, a reforming subsystem and a depressurization system. The fuel source is in fluid communication with the reforming subsystem. The reforming subsystem reforms the fuel from the fuel source to generate hydrogen enriched gases, and the reforming subsystem is in fluid communication with the depressurization system. The depressurization system reduces a pressure of the hydrogen enriched gases. The hybrid fuel cell system also includes a fuel cell stack in communication with the depressurization system to receive the hydrogen enriched gases at the reduced pressure.
US10522858B2	Power control apparatus, fuel cell system, and method of calculating amount of used fuel gas A power control apparatus includes a controller configured to control a fuel cell. The fuel cell generates power and heats water using fuel gas. The fuel gas supplies the power and hot water to a plurality of consumer facilities. The controller obtains an amount of the fuel gas used by the fuel cell. The controller obtains an amount of the hot water supplied to the plurality of consumer facilities. The controller calculates, based on the amount of the fuel gas and the amount of the hot water, an amount of the fuel gas used by each one of the plurality of consumer facilities.
US10522850B2	Three-dimensionally printed bipolar plate for a proton exchange membrane fuel cell A bipolar plate for a fuel cell is provided. The bipolar plate includes a main body with a first end and a second end spaced from the first end along a longitudinal axis of the main body. At least one inlet is disposed at the first end of the main body. At least one outlet corresponding to the at least one inlet is disposed at the second end of the main body. At least one continuous flow path extends from the at least one inlet to the at least one outlet. The main body comprises a single, contiguous piece.
US10522849B2	Electrochemical cell comprising channel-type flowable electrode units The present invention relates to an electrochemical cell having a channel-type flow-electrode unit.The channel-type flow-electrode structure according to the present invention, which has at least two channel-type flow-electrode units, can significantly reduce manufacturing costs and installation space by reducing the number of parts while extending the electrode capacity to be suitable for large-scale plants for electricity generation, energy storage, desalination, etc. In addition, the channel-type flow-electrode structure can be applied not only to a capacitive flow-electrode device and/or a redox flow battery device, but also to all of the devices for electricity generation, energy storage, and desalination while moving ions or protons.
US10522839B2	Electronic device including battery with notch formed in at least a portion of uncoated part of the battery Disclosed is a battery mounted in an electronic device and having a notch structure patterned on an uncoated part, thereby reinforcing the bond between the partitioning films of the battery and providing a structure robust to external stress and enhanced for stabilized battery performance.
US10522838B2	Nonaqueous electrolyte secondary cell Provided is a nonaqueous electrolyte secondary battery in which Li3PO4 is added to a positive electrode active material layer and the increase of battery temperature when the voltage rises is suppressed. The nonaqueous electrolyte secondary battery disclosed herein includes a positive electrode, a negative electrode, and a nonaqueous electrolytic solution. The positive electrode has a positive electrode active material layer. The positive electrode active material layer includes a positive electrode active material, Li3PO4, and polyvinyl alcohol having a degree of saponification of 86% by mole or more. The content of Li3PO4 in the positive electrode active material layer is 1% by mass or more and 15% by mass or less. The content of the polyvinyl alcohol having a degree of saponification of 86% by mole or more in the positive electrode active material layer is 0.05% by mass or more and 0.2% by mass or less.
US10522826B2	Manganese oxide nano-rods in the form of a core-shell, a method for producing the same, and an active material for a secondary battery comprising the same The present disclosure relates to manganese oxide nano-rods in the form of a core-shell, in which the manganese oxide nano-rods are formed in a core-shell structure, the core and the shell each include MnxOy, when x of MnxOy of the core is 1 and y is 2, x of MnxOy of the shell is 2 and y is 3, and when x of MnxOy of the core is 2 and y is 3, x of MnxOy of the shell is 1 and y is 2. According to the present disclosure, in the secondary battery using the manganese oxide, the elution of manganese is inhibited and the structural stability of an active material is increased, thereby increasing the capacity and the cycle life at a high temperature.
US10522819B2	Stabilised (partially) lithiated graphite materials, methods for the production thereof and use for lithium batteries Described is a coated, (partly) lithiated graphite powder characterized in that it has been produced in a non-electrochemical process from metallic lithium and graphite in powder form and has been stabilized outside an electrochemical cell by application of a coating layer; and a galvanic cell comprising a cathode, a lithium-conductive electrolyte-separator system and an anode comprising a coated, (partly) lithiated graphite powder, where the (partial) lithiation and the coating of the graphite powder are performed non-electrochemically outside the galvanic cell (ex situ).
US10522815B1	Method to alleviate voltage decay In some embodiments, lithium-sulfur electrochemical cells, fabrication methods thereof, and methods useful to enable improvement of one or more performance characteristics in lithium-sulfur electrochemical cells are provided herein. In some embodiments, a method to enable improvement of one or more performance characteristics in a lithium-sulfur electrochemical cell(s) is disclosed, wherein a conductive network is formed within the lithium-sulfur electrochemical cell(s) by applying a voltage thereto for a threshold time period. The one or more performance characteristics of the lithium-sulfur electrochemical cell increase as a result of the presence of the conductive network.
US10522814B2	Battery explosion prevention apparatus, battery pack, and method for operating the same Provided are a battery explosion prevention apparatus including a battery holder which is installed and fixed to a circumference of a battery module constituted by a plurality of secondary battery cells and on which at least one or more electromagnets are disposed on a lower portion thereof at a predetermined interval and a movable frame which has an opened one side to provide an insertion space into which the battery module is inserted and on which a plurality of punching needles are disposed on a bottom surface of the insertion space, and a battery pack including the battery module.
US10522813B2	Secondary battery A secondary battery includes an electrode assembly including a first electrode plate, a second electrode plate and a separator, a case accommodating the electrode assembly, a cap plate sealing the case and including a first terminal hole, and a first terminal coupled to the first terminal hole. The first terminal includes at least two groove portions having a predetermined depth from a top surface of the first terminal, the at least two groove portions being spaced apart from each other.
US10522808B2	Cross-linked, microporous polysulfone battery electrode separator A cross-linked microporous polysulfone or polysulfone copolymer battery electrode separator membrane are described. Such membranes, which would otherwise be soluble above a particular, generally high temperature in selected battery electrolyte systems, once at least in part cross-linked, swell in the electrolyte at the particular higher temperature instead of dissolving. When the membrane separators are restrained between solid electrodes in a battery, the separator cannot increase in bulk volume, and the swelling occurs within the pores with the pore volume decreasing from its original bulk volume. The drop in pore volume causes the battery current density to drop, thereby reducing the heat generation within the hot area of the battery. This process provides a measure of safety against overheating and fires, and the battery is capable of continued usage if the overheating is localized.
US10522801B2	Modular energy storage system A modular energy storage system includes a housing, a plurality of energy storage devices, a first door assembly and a second door assembly. The housing includes a first end and a second end. The plurality of energy storage devices are coupled within the housing. The first door assembly is pivotally coupled to the first end of the housing. The second door assembly is pivotally coupled to the first end of the housing adjacent the first door assembly. The first and second door assemblies each comprise an air distribution member configured to distribute and direct a cooling air flow toward the plurality of energy storage devices to absorb heat energy from the plurality of energy storage devices.
US10522800B2	Variable volume battery assembly A battery assembly according to an exemplary aspect of the present disclosure includes, among other things, an enclosure assembly defining an interior and a variable volume device integrated into a wall of the enclosure assembly and configured to modify a volume of the interior.
US10522786B2	Organic electronic device having dimension tolerance between encapsulating layer and metal layer less than or equal to 200 microns Provided are an organic electronic device (OED) and a method of manufacturing the same. The OED may effectively block moisture or oxygen permeating into the OED from an external environment, provide high reliability by increasing a life span and durability of an organic electronic diode, and minimize an align error in a process of attaching a film encapsulating the organic electronic diode to a substrate.
US10522781B2	Electroluminescence device and display device An electroluminescence device and a display device including an electroluminescence device are provided. The electroluminescence device includes an anode including silver, wherein at least a portion of the anode substantially extends in a horizontal direction; a first layer provided over the anode; an organic layer including a luminescent layer; a cathode provided over the organic layer; and an insulating layer provided over an end portion of the anode and an end portion of the first layer, wherein at least a portion of the cathode substantially extends in the horizontal direction in a light emission region, wherein a surface of the insulating layer has a curved portion, and wherein at least a portion of the cathode within a region of the insulating layer above the curved portion extends along a first angled upward direction between the horizontal direction and the thickness direction of the anode.
US10522778B2	Organic light-emitting diode including an electronic transport layer comprising a three component blend of a matrix compound and two lithium compounds The present invention relates to an organic light-emitting diode (100) comprising an emission layer (150) and at least one electron transport layer (161), wherein the at least one electron transport layer (161) comprises at least one matrix compound and at least two lithium compounds.
US10522773B2	Radiation detector According to one embodiment, a radiation detector includes a stacked body. The stacked body includes a first metal layer, a second metal layer, and an organic semiconductor layer provided between the first metal layer and the second metal layer.
US10522758B2	Ink for forming functional layer, method of manufacturing ink for forming functional layer, and method of manufacturing organic electro-luminescence element An ink for forming a functional layer, which is used when any thin film layer among functional layers consisting of a plurality of thin film layers is formed, includes a functional layer forming material and a solvent for dissolving the functional layer forming material, and in which the number of particles of 0.5 μm or more is 7 or less in 10 ml of the ink for forming a functional layer.
US10522756B2	Dual resistance heater for phase change memory devices In various examples, a dual resistance heater for a phase change material region is fabricated by forming a resistive material. Prior to forming the phase change material region over the resistive material, at least an upper portion of the resistive material is exposed to an implantation or plasma that increases the resistance of an upper portion of the resistive material relative to the remainder, or bulk, of the resistive material. As a result, the portion of the resistive material proximate to the phase change material region forms a heater because of its high resistance value, but the bulk of the resistive material has a relatively lower resistance value and, thus, does not increase the voltage drop and current usage of the device. Other methods and devices are disclosed.
US10522752B1	Magnetic layer for magnetic random access memory (MRAM) by moment enhancement A perpendicularly magnetized magnetic tunnel junction (p-MTJ) is disclosed wherein a boron containing free layer (FL) is subjected to a plasma treatment with inert gas, and a natural oxidation (NOX) process to form B2O3 before overlying layers are deposited. A metal layer such as Mg is deposited on the FL as a first step in forming a Hk enhancing layer that increases FL perpendicular magnetic anisotropy, or as a first step in forming a tunnel barrier layer on the FL. One or more anneal steps are essential in assisting B2O3 segregation from the free layer and thereby increasing the FL magnetic moment. A post-oxidation plasma treatment may also be used to partially remove B2O3 proximate to the FL top surface before the metal layer is deposited. Both plasma treatments use low power (<50. Watts) to remove a maximum of 2. Angstroms FL thickness.
US10522742B2	Spin current magnetization reversal element, magnetoresistance effect element, and magnetic memory A spin current magnetization reversal element includes: a first ferromagnetic metal layer with a changeable magnetization direction; and a spin-orbit torque wiring, wherein a first direction is perpendicular to a surface of the layer, the wiring extends in a second direction intersecting the first and is bonded to the layer, wherein the wiring material is a binary alloy represented by the formula AxB1-x, a metal carbide, or metal nitride, wherein A is selected from Al, Ti, and Pt, and B is selected from Al, Cr, Mn, Fe, Co, Ni, Y, Ru, Rh, and Ir and the material has a cubic structure with symmetry of a space group Pm-3m or Fd-3m; or A is selected from Al, Si, Ti, Y, and Ta, and B is selected from C, N, Co, Pt, Au, and Bi and the material has a cubic structure with symmetry of a space group Fm-3m.
US10522740B2	Techniques for MRAM MTJ top electrode to metal layer interface including spacer Some embodiments relate to an integrated circuit including a magnetoresistive random-access memory (MRAM) cell. The integrated circuit includes a lower metal layer and an upper metal layer disposed over the lower metal layer. A bottom electrode is disposed over and in electrical contact with the lower metal layer. A magnetic tunneling junction (MTJ) is disposed over an upper surface of bottom electrode. A top electrode is disposed over an upper surface of the MTJ and is in contact with the upper metal layer. A sidewall spacer surrounds an outer periphery of the top electrode. An etch stop layer is disposed on top of an outer periphery of the spacer top surface and surrounding an outer periphery of the bottom surface of the upper metal layer. The etch stop layer overhangs the outer periphery of the spacer top surface.
US10522728B2	Beveled chip reflector for chip-scale packaging light-emitting device and manufacturing method of the same A chip-scale packaging (CSP) light-emitting device (LED), including a light-emitting semiconductor die, a photoluminescent layer, a chip-side-spacer structure, and a beveled chip reflective structure, is disclosed. The beveled reflective structure is disposed surrounding the chip-edge surfaces of the light-emitting semiconductor die, wherein the chip-side-spacer structure is disposed between the beveled reflective structure and the chip-edge surfaces of the light-emitting semiconductor die. A manufacturing method to fabricate the CSP LED is also disclosed. The CSP LED with a beveled chip reflector can effectively reflect the light radiated from the light-emitting semiconductor die toward the photoluminescent layer so that the light extraction efficiency is improved.
US10522726B2	Display device A display device includes a display and at least one light source. The display displays image. The at least one light source emits light to the display. The at least one light source includes a semiconductor element with a substrate, a translucent sealing resin that covers the semiconductor element, and a reflective layer that is disposed on an upper face of the sealing resin.
US10522725B2	LED structure and light-emitting unit An LED structure includes a substrate, an LED chip disposed on the substrate, a wavelength conversion layer disposed above a light-emitting surface of the LED chip, and a cut-on optical filter disposed on a central region of the wavelength conversion layer.
US10522724B2	LED packaging material and manufacturing method of the same A light-emitting diode (LED) packaging material is formed by compounding graphene with silane or epoxy resin, to improve the defects of manufacturing an LED packaging material only of silane or epoxy resin. The addition of graphene helps improve the performance of the LED packaging material. Also provided is a manufacturing method of a LED packaging material.
US10522721B2	Light-emitting device and manufacturing method thereof A light-emitting device includes a light-emitting element, a wavelength conversion layer, a light pervious element and a light-reflecting enclosure. The light-emitting element includes a top surface, a bottom surface, and a side surface between the top surface and the bottom surface. The wavelength conversion layer covers the top surface of the light-emitting element, and includes a plurality of wavelength conversion particles having an equivalent particle diameter D50. The light pervious element includes a recess structure and an outer wall. The light-reflecting enclosure surrounds the outer wall. The D50 of the wavelength conversion particles is not great than 10 μm. The recess structure is laterally overlapped with the side surface of the light-emitting element and the wavelength conversion layer.
US10522719B2	Color-filter device A micro-transfer color-filter device comprises a color filter, an electrical conductor disposed in contact with the color filter, and at least a portion of a color-filter tether attached to the color filter or structures formed in contact with the color filter. In certain embodiments, a color filter is a variable color filter electrically controlled through one or more electrodes and can be responsive to heat, electrical current, or an electrical field to modify its optical properties, such as color, transparency, absorption, or reflection. In certain embodiments, A color-filter device includes connection posts and can be provided in or on a source wafer suitable for micro-transfer printing. In some embodiments, a color-filter device is disposed on a device substrate and can include a control circuit for controlling the color filter. An array of micro-transfer color-filter devices can be disposed on a display substrate in order to form a display.
US10522706B2	Photosensitive field-effect transistor A photosensitive field-effect transistor configured to provide an electrical response when illuminated by electromagnetic radiation incident on the transistor. The photosensitive field-effect transistor comprises a layer of two-dimensional material which forms a horizontal transistor channel configured to transport current, and a horizontal semiconducting layer in contact with the transistor channel. The semiconducting layer comprises two or more assemblies of semiconducting material. If the two-dimensional material in the transistor channel has a high work function, the assemblies of semiconducting material are vertically stacked on the transistor channel in order of decreasing work function. If the two-dimensional material in the transistor channel has a low work function, the assemblies of semiconducting material are vertically stacked on the transistor channel in order of increasing work function. The semiconducting materials may, for example, comprise semiconductor nanocrystals, quantum dots or thin-film semiconducting layers.
US10522704B2	Solar cell, method for manufacturing same The solar cell includes a collecting electrode on a first principal surface of a photoelectric conversion section. The collecting electrode comprises a first electroconductive layer and a second electroconductive layer in this order from the photoelectric conversion section side. An insulating layer is provided on the first principal surface of the photoelectric conversion section so as to cover substantially the entire surface of the region where the first electroconductive layer is not provided and a part of the first electroconductive layer. The insulating layer on the first electroconductive layer has an opening, and the second electroconductive layer is a plating layer that is in conduction with the first electroconductive layer through the opening section of the insulating layer. The first electroconductive layer contains a metal particle component and an insulating material. The metal particle component of the first electroconductive layer includes primary particles and secondary particles. It is preferable that in a cross-section of the first electroconductive layer, the area ratio of the secondary particles to the total of the primary particles and the secondary particles and the coefficient of variation of the particle size are respectively within specific ranges.
US10522702B2	Solar cell module and solar cell module manufacturing method A solar cell element includes a plurality of finger electrodes and a bus bar electrode on a surface thereof. A light diffuser is provided in an outer circumferential region of the surface. The light diffuser includes first light diffusers provided along the left side and the right side of the surface, and second light diffusers provided along the upper side and the lower side of the surface. The width of the first light diffuser in a transverse direction perpendicular to the left side or the right side, is smaller than the width of the second light diffuser in a transverse direction perpendicular to the upper side or the lower side.
US10522701B2	Solar power panel factory and process for manufacturing frame-less encapsulated photo-voltaic (PV) solar power panels by encapsulating solar cell modules within optically-transparent epoxy-resin material coating phenolic resin support sheets A solar panel factory system and process for manufacturing a frame-less epoxy-resin encapsulated solar panel by encapsulating solar cell modules within optically-transparent epoxy-resin material coating phenolic resin support sheets. During solar panel manufacture, an optically transparent epoxy-resin coating is applied over an array of photo-voltaic (PV) solar cell modules mounted on a sheet of phenolic resin, and supported in a layer of adhesive coating is applied as a liquid with a viscosity and a thickness such that the thickness of the layer of adhesive coating is substantially equal to the thickness of the PV solar cell modules, and cured to a sufficient hardness. The epoxy-resin coating applied over the array of PV solar cell modules, and the cured layer of adhesive coating, reinforce the strength of the sheet of phenolic resin, particularly around the perimeter of the sheet of phenolic resin.
US10522694B2	Methods of manufacturing semiconductor device A semiconductor device includes channel layers disposed over a substrate, a source/drain region disposed over the substrate, a gate dielectric layer disposed on and wrapping each of the channel layers, and a gate electrode layer disposed on the gate dielectric layer and wrapping each of the channel layers. Each of the channel layers includes a semiconductor wire made of a core region, and one or more shell regions. The core region has an approximately square-shape cross section and a first shell of the one or more shells forms a first shell region of an approximately rhombus-shape cross section around the core region and is connected to an adjacent first shell region corresponding to a neighboring semiconductor wire.
US10522693B2	Memory device and electronic device A memory device with excellent writing performance and excellent storing performance is provided. In the memory device, a first layer overlaps with a second layer. The first layer includes a first transistor including an oxide semiconductor as an active layer. The second layer includes a second transistor and a third transistor each including an oxide semiconductor as an active layer. The off-state current of a transistor formed in the first layer is lower than the off-state current of each of a transistor formed in the second layer. The field-effect mobility of the transistor formed in the second layer is higher than the field-effect mobility of the transistor formed in the first layer.
US10522689B2	Semiconductor device and method of manufacturing the same It is an object to manufacture a semiconductor device in which a transistor including an oxide semiconductor has normally-off characteristics, small fluctuation in electric characteristics, and high reliability. First, first heat treatment is performed on a substrate, a base insulating layer is formed over the substrate, an oxide semiconductor layer is formed over the base insulating layer, and the step of performing the first heat treatment to the step of forming the oxide semiconductor layer are performed without exposure to the air. Next, after the oxide semiconductor layer is formed, second heat treatment is performed. An insulating layer from which oxygen is released by heating is used as the base insulating layer.
US10522687B2	Wrap-around gate structures and methods of forming wrap-around gate structures A semiconductor device includes a channel structure that includes a first oxide layer, a second oxide layer, and a channel region between the first oxide layer and the second oxide layer. The semiconductor device includes a first gate structure proximate to at least three sides of the channel structure. The semiconductor device includes a second gate structure proximate to at least a fourth side of the channel structure.
US10522686B2	Vertical thin film transistor A semiconductor device includes a stack of layers stacked vertically and including a source layer, a drain layer and a channel layer between the source layer and the drain layer. A gate electrode is formed in a common plane with the channel layer and a gate dielectric is formed vertically between the gate electrode and the channel layer. A first contact contacts the stack of layers on a first side of the stack of layers, and a second contact formed on an opposite side vertically from the first contact.
US10522680B2	Finfet semiconductor device structure with capped source drain structures A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base and a first fin structure over the base. The semiconductor device structure includes an isolation layer over the base. The first fin structure is partially in the isolation layer. The semiconductor device structure includes a first gate structure over and across the first fin structure. The semiconductor device structure includes a first source structure and a first drain structure on the first fin structure and on two opposite sides of the first gate structure. The first source structure and the first drain structure are made of an N-type conductivity material. The semiconductor device structure includes a cap layer covering the first source structure and the first drain structure. The cap layer is doped with a Group IIIA element.
US10522679B2	Selective shallow trench isolation (STI) fill for stress engineering in semiconductor structures The present disclosure relates to semiconductor structures and, more particularly, to selective shallow trench isolation (STI) fill material for stress engineering in semiconductor structures and methods of manufacture. The structure includes a single diffusion break (SDB) region having at least one shallow trench isolation (STI) region with a stress fill material within a recess of the at least one STI region. The stress fill material imparts a stress on a gate structure adjacent to the at least one STI region.
US10522678B2	Vertical transistor pass gate device A semiconductor device including a fin structure present on a supporting substrate to provide a vertically orientated channel region. A first source/drain region having a first epitaxial material with a diamond shaped geometry is present at first end of the fin structure that is present on the supporting substrate. A second source/drain region having a second epitaxial material with said diamond shaped geometry that is present at the second end of the fin structure. A same geometry for the first and second epitaxial material of the first and second source/drain regions provides a symmetrical device.
US10522677B2	Field-effect transistor and method therefor A transistor includes a trench formed in a semiconductor substrate with the trench having a first sidewall and a second sidewall. A vertical field plate is formed in the trench and the vertical field plate is located between the first sidewall and the second sidewall. A gate electrode is formed in the trench with a first edge of the gate electrode proximate to the first sidewall and a second edge of the gate electrode proximate to the vertical field plate. A first dielectric material is formed in the trench between the first sidewall and the vertical field plate. A second dielectric material is formed in the trench between the vertical field plate and the second sidewall with the second dielectric material having a dielectric constant lower than that of the first dielectric material.
US10522675B2	Integrated circuit including field effect transistor structures with gate and field electrodes and methods for manufacturing and operating an integrated circuit An integrated circuit includes a first and a second field effect transistor structure. The first field effect transistor structure includes a first gate electrode structure and a first field electrode structure. The second field effect transistor structure includes a second gate electrode structure and a second field electrode structure. The first and the second gate electrode structures are electrically separated from each other. The first and the second field electrode structures are separated from each other.
US10522670B2	Semiconductor device with selectively etched surface passivation A semiconductor device includes a semiconductor substrate configured to include a channel, a gate supported by the semiconductor substrate to control current flow through the channel, a first dielectric layer supported by the semiconductor substrate and including an opening in which the gate is disposed, and a second dielectric layer disposed between the first dielectric layer and a surface of the semiconductor substrate in a first area over the channel. The second dielectric layer is patterned such that the first dielectric layer is disposed on the surface of the semiconductor substrate in a second area over the channel.
US10522661B2	Integrated strained stacked nanosheet FET Methods of forming a semiconductor device include forming stress liners in contact with both ends of a fin of alternating channel material and sacrificial material layers. The stress liners exert a stress on the fin. The sacrificial material is etched away from the fin, such that the layers of the channel material are suspended between the stress liners. A gate stack on the suspended layers of channel material.
US10522659B2	Array substrate and display panel including the same An array substrate for a display device is disclosed. The array substrate includes a substrate comprising a plurality of subpixels, at least one of which is a white subpixel. The array substrate also includes an insulating layer disposed on the substrate in each of the subpixels and a plurality of color filter layers disposed on the insulating layer, each of the color filter layers being disposed respectively in a corresponding one of the subpixels. At least two of the color filter layers have a same color and are respectively disposed in the white subpixel and in at least one of the subpixels adjacent to the white subpixel. The insulating layer has a slope at a boundary between the white subpixel and the at least one of the subpixels adjacent to the white subpixel.
US10522658B1	Vertical field effect transistor having improved uniformity A semiconductor device structure and method for fabricating the same. The semiconductor device structure includes a semiconductor fin and a liner in contact with end portions of the semiconductor fin. A first source/drain contacts the liner and sidewalls of the semiconductor fin. A gate structure is in contact with and surrounds the semiconductor fin. A second source/drain is formed above the first source/drain. The method includes forming, on a substrate, at least one semiconductor fin having a first spacer in contact with an upper portion of the semiconductor fin, and a second spacer in contact with the first spacer and a lower portion of the semiconductor fin. The semiconductor fin is patterned into a plurality of semiconductor fins. A liner is formed on exposed end portions of each semiconductor fin of the plurality of semiconductor fins.
US10522656B2	Forming epitaxial structures in fin field effect transistors A method of forming source/drain features in a FinFET device includes providing a fin formed over a substrate and a gate structure formed over a fin, forming a recess in the fin adjacent to the gate structure, forming a first epitaxial layer in the recess, forming a second epitaxial layer over the first epitaxial layer, and forming a third epitaxial layer over the second epitaxial layer. The second epitaxial layer may be doped with a first element, while one or both of the first and the third epitaxial layer includes a second element different from the first element. One or both of the first and the third epitaxial layer may be formed by a plasma deposition process.
US10522655B2	Differential SG/EG spacer integration with equivalent NFET/PFET spacer widths and dial raised source drain expitaxial silicon and triple-nitride spacer integration enabling high-voltage EG device on FDSOI A method of forming matched PFET/NFET spacers with differential widths for SG and EG structures and a method of forming differential width nitride spacers for SG NFET and SG PFET structures and PFET/NFET EG structures and respective resulting devices are provided. Embodiments include providing PFET SG and EG structures and NFET SG and EG structures; forming a first nitride layer over the substrate; forming an oxide liner; forming a second nitride layer on sidewalls of the PFET and NFET EG structures; removing horizontal portions of the first nitride layer and the oxide liner over the PFET SG and EG structures; forming RSD structures on opposite sides of each of the PFET SG and EG structures; removing horizontal portions of the first nitride layer and the oxide liner over the NFET SG and EG structures; and forming RSD structures on opposite sides of each of the NFET SG and EG structures.
US10522646B2	HEMT transistor of the normally off type including a trench containing a gate region and forming at least one step, and corresponding manufacturing method A HEMT transistor of the normally off type, including: a semiconductor heterostructure, which comprises at least one first layer and one second layer, the second layer being set on top of the first layer; a trench, which extends through the second layer and a portion of the first layer; a gate region of conductive material, which extends in the trench; and a dielectric region, which extends in the trench, coats the gate region, and contacts the semiconductor heterostructure. A part of the trench is delimited laterally by a lateral structure that forms at least one first step. The semiconductor heterostructure forms a first edge and a second edge of the first step, the first edge being formed by the first layer.
US10522645B2	Surface treatment and passivation for high electron mobility transistors A method includes forming a first III-V compound layer over a substrate; forming a second III-V compound layer over the first III-V compound layer, wherein the first and second III-V compound layers include different materials; forming a first crystalline oxide layer over the second III-V compound layer; and forming a first crystalline interfacial layer over the first crystalline oxide layer.
US10522644B1	Different upper and lower spacers for contact Various processes form different structures including exemplary apparatuses that include (among other components) a first layer having channel regions, source/drain structures in the first layer on opposite sides of the channel regions, a gate insulator on the channel region, and a gate stack on the gate insulator. The gate stack can include a gate conductor, and a stack insulator or a gate contact on the gate conductor. The gate stack has lower sidewalls adjacent to the source/drain structures and upper sidewalls distal to the source/drain structures. Further, lower spacers are between the source/drain contacts and the lower sidewalls of the gate stack; and upper spacers between the source/drain contacts and the upper sidewalls of the gate stack. In some structures, the upper spacers can partially overlap the lower spacers.
US10522642B2	Semiconductor device with air-spacer A method includes forming a gate structure on a substrate, forming a seal spacer covering a sidewall of the gate structure, forming a sacrificial spacer covering a sidewall of the seal spacer, forming source/drain regions sandwiching a channel region that is under the gate structure, and depositing a contact etch stop layer covering a sidewall of the sacrificial spacer. The method further includes removing the sacrificial spacer to form a trench, wherein the trench exposes a sidewall of the contact etch stop layer and the sidewall of the seal spacer, and depositing an inter-layer dielectric layer, wherein the inter-layer dielectric layer caps the trench, thereby defining an air gap inside the trench.
US10522640B2	Metal gate scheme for device and methods of forming Gate structures and methods of forming the gate structures are described. In some embodiments, a method includes forming source/drain regions in a substrate, and forming a gate structure between the source/drain regions. The gate structure includes a gate dielectric layer over the substrate, a work function tuning layer over the gate dielectric layer, a first metal over the work function tuning layer, an adhesion layer over the first metal, and a second metal over the adhesion layer. In some embodiments, the adhesion layer can include an alloy of the first and second metals, and may be formed by annealing the first and second metals. In other embodiments, the adhesion layer can include an oxide of at least one of the first and/or second metal, and may be formed at least in part by exposing the first metal to an oxygen-containing plasma or to a natural environment.
US10522637B2	Circuits using gate-all-around technology A semiconductor structure includes a first GAA transistor and a second GAA transistor. The first GAA transistor includes: a first diffusion region, a second diffusion region, and a first nanowire. The second GAA transistor includes: a third diffusion region, a fourth diffusion region, and a second nanowire. The first diffusion region, the second diffusion region, and the first nanowire are symmetrical with the third diffusion region, the fourth diffusion region, and the second nanowire respectively, the first GAA transistor is arranged to provide a first current to flow through the first nanowire, and the second GAA transistor is arranged to provide a second current to flow through the second nanowire.
US10522636B2	Fin field-effect transistor for input/output device integrated with nanosheet field-effect transistor A method of forming a semiconductor structure includes forming a nanosheet stack disposed over a first portion of a substrate and a fin channel material disposed over a second portion of the substrate, patterning the nanosheet stack disposed over the first portion of the substrate to form two or more nanosheet channels for at least one nanosheet field-effect transistor, patterning the fin channel material disposed over the second portion of the substrate to form one or more fins for at least one fin field-effect transistor, forming a first dielectric layer surrounding the nanosheet channels and the one or more fins, patterning a mask layer over the one or more fins, removing the first dielectric layer surrounding the nanosheet channels, removing the mask layer, forming a second dielectric layer surrounding the nanosheet channels and over the first dielectric layer surrounding the one or more fins, and forming a gate conductive layer over the second dielectric layer.
US10522629B2	Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication A method of forming a semiconductor structure includes forming an opening in a dielectric layer, forming a recess in an exposed part of a substrate, and forming a lattice-mismatched crystalline semiconductor material in the recess and opening.
US10522626B2	Silicon-on-insulator backside contacts In certain aspects, an apparatus comprises an SOI MOSFET having a diffusion region as a source or a drain on a back insulating layer, wherein the diffusion region has a front diffusion side and a back diffusion side opposite to the front diffusion side; a silicide layer on the front diffusion side having a back silicide side facing the diffusion region and a front silicide side opposite to the back silicide side; and a backside contact connected to the silicide layer, wherein at least a portion of the backside contact is in the back insulating layer.
US10522625B2	Multi-gate device and method of fabrication thereof A semiconductor device includes a fin extending from a substrate. The fin has a source/drain region and a channel region. The channel region includes a first semiconductor layer and a second semiconductor layer disposed over the first semiconductor layer and vertically separated from the first semiconductor layer by a spacing area. A high-k dielectric layer at least partially wraps around the first semiconductor layer and the second semiconductor layer. A metal layer is formed along opposing sidewalls of the high-k dielectric layer. The metal layer includes a first material. The spacing area is free of the first material.
US10522624B2	V-grooved vertical channel-type 3D semiconductor memory device and method for manufacturing the same A method of fabricating a vertical channel 3D semiconductor memory device is disclosed. In one aspect, the method comprises providing a stack of alternating layers of conductive material and dielectric material on a major surface of substrate, providing in the stack at least one trench, having sloped sidewalls sloping towards the major surface, extending at least below the lowest layer of conductive material, forming, in order, a programmable material, a channel liner, and a filler material on the sidewalls of the trench. Thereby, the method forms a memory string, and an electrode to the channel liner at opposite ends of the memory string.
US10522618B2	Isolation structure for active devices An isolation structure for active devices is provided. In some embodiments, the isolation structure is used in a transistor. The transistor includes a substrate having a first doping type. The transistor also includes a channel layer positioned over the substrate and comprising a first section and a second section. The transistor further includes an active layer positioned over the channel layer. The isolation structure includes a horizontal segment, a first vertical segment, and a second vertical segment. The horizontal segment is arranged below the second section of the channel layer and continuously extends between the first vertical segment and the second vertical segment. The isolation structure has a second doping type that is different than the first doping type.
US10522617B2	Integrated RF front end system Systems and methods are disclosed for integrating functional components of front-end modules for wireless radios. Front-end modules disclosed may be dual-band front-end modules for use in 802.11ac-compliant devices. In certain embodiments, integration of front-end module components on a single die is achieved by implementing a high-resistivity layer or substrate directly underneath, adjacent to, and/or supporting SiGe BiCMOS technology elements.
US10522598B2	Display device including a color column of pixels and a white column of pixels and driving method thereof A display device is disclosed. In one aspect, a plurality of unit columns of pixels are arranged in a first direction. At least one of the unit columns includes a color column of pixels including a plurality of color pixels each configured to display a plurality of colors other than white. The unit columns also include a white column of pixels including a plurality of white pixels arranged in a second direction crossing the first direction, wherein the color column includes first to third color pixels configured to respectively display first to third colors different from each other.
US10522594B2	Resistive memory with a plurality of resistive random access memory cells each comprising a transistor and a resistive element A method of forming a semiconductor structure includes forming a plurality of vertical field-effect transistors (VFETs) disposed on a substrate and forming a plurality of resistive elements disposed over top surfaces of the VFETs. Each pair of a given one of the plurality of VFETs and a corresponding resistive element disposed over the given VFET provides a resistive random access memory (ReRAM) cell. The VFETs are arranged in two or more columns and two or more rows, wherein each column of VFETs provides a bitline of the ReRAM cells sharing a bottom source/drain region and wherein each row of VFETs provides a wordline of the ReRAM cells sharing a gate. Top source/drain regions of the VFETs provide bottom contacts for the resistive elements disposed over the VFETs.
US10522589B2	Method of making a magnetoresistive element A magnetoresistive element comprises a novel Boron-absorbing cap multilayer provided on the top surface of an amorphous CoFeB (or CoB, FeB) ferromagnetic recording layer. As the magnetoresistive film is thermally annealed, a crystallization process occurs to form bcc CoFe grains having epitaxial growth with (100) plane parallel to the surface of the tunnel barrier layer as Boron elements migrate into the novel cap layer. Removing the top portion of the cap layer by means of sputtering etch or RIE etch processes followed by optional oxidization process, a thin thermally stable portion of cap layer is remained on top of the recording layer with low damping constant. Accordingly, a reduced write current is achieved for spin-transfer torque MRAM application.
US10522586B2	Apparatus for reducing optical cross-talk in image sensors According to one example, a device includes a semiconductor substrate. The device further includes a plurality of color filters disposed above the semiconductor substrate. The device further includes a plurality of micro-lenses disposed above the set of color filters, each micro-lens of the plurality of micro-lenses being configured to direct light radiation. The device further includes a structure that is configured to block light radiation that is traveling towards a region between adjacent micro-lenses. The structure and the color filters are level at respective top surfaces and bottom surfaces thereof.
US10522585B2	Method for manufacturing CMOS image sensor A semiconductor device includes a substrate, a conductive layer, a transparent layer, a transparent hard mask layer, a carrier, and a device layer. The substrate has a first surface and a second surface opposite to each other. The conductive layer is disposed on the first surface of the substrate. The transparent layer is disposed on the conductive layer. The transparent hard mask layer is disposed on the transparent layer, in which the substrate has an etch selectivity with respect to the transparent hard mask layer. The device layer is disposed between the carrier and the second surface of the substrate, in which various portions of the device layer are respectively exposed by various through holes which pass through the transparent hard mask layer, the transparent layer, the conductive layer, and the substrate.
US10522583B2	Photoelectric conversion element and optical sensor including the same A photoelectric conversion element and an optical sensor including the same are disclosed. The photoelectric conversion element may include a plurality of lattice stacks repeatedly stacked on top of each other on a substrate and configured to have an effective band gap. The plurality of lattice stacks may each include a first active layer and a second active layer on the first active layer. The first active layer may include a first two-dimensional material having a first band gap. The second active layer may include a second two-dimensional material having a second band gap not overlapping the first band gap. An effective band gap may be adjusted based on the first two-dimensional materials and thicknesses of the first active layer and the second active layer and a number of times of plurality of lattice stacks.
US10522575B2	Methods of making printable device wafers with sacrificial layers Methods of forming integrated circuit devices include forming a sacrificial layer on a handling substrate and forming a semiconductor active layer on the sacrificial layer. The semiconductor active layer and the sacrificial layer may be selectively etched in sequence to define an semiconductor-on-insulator (SOI) substrate, which includes a first portion of the semiconductor active layer. A multi-layer electrical interconnect network may be formed on the SOI substrate. This multi-layer electrical interconnect network may be encapsulated by an inorganic capping layer that contacts an upper surface of the first portion of the semiconductor active layer. The capping layer and the first portion of the semiconductor active layer may be selectively etched to thereby expose the sacrificial layer. The sacrificial layer may be selectively removed from between the first portion of the semiconductor active layer and the handling substrate to thereby define a suspended integrated circuit chip encapsulated by the capping layer.
US10522571B2	Array substrate and method of manufacturing the same Disclosed are an array substrate and a method of manufacturing the array substrate. The method of manufacturing an array substrate includes: forming a first metal layer on a substrate, and etching the first metal layer; forming an insulating layer on the substrate and the first metal layer; forming an active layer and an ohmic contact layer successively on the insulating layer; etching the active layer and the ohmic contact layer; forming a second metal layer on the ohmic contact layer and the insulating layer, and etching the second metal layer; forming a protective layer on the second metal layer and the insulating layer; forming a photoresist layer on the protective layer, and performing exposure and development; and forming a transparent conducting layer directly on the color filter, and etching the transparent conducting layer to form a pixel electrode layer.
US10522559B2	Systems including memory cells on opposing sides of a pillar Systems including a processor and a memory device in communication with the processor include an array of non-volatile memory cells configured in a NAND architecture. The array includes a plurality of series-coupled first non-volatile memory cells, each first non-volatile memory cell curving around a first curved side of a substantially vertical pillar and terminating at an isolation region, and a plurality of series-coupled second non-volatile memory cells, each second non-volatile memory cell curving around a second curved side of the substantially vertical pillar and terminating at the isolation region. Respective ones of the first non-volatile memory cells are respectively at same vertical levels as respective ones of the second non-volatile memory cells.
US10522558B2	Semiconductor device and method of manufacturing semiconductor device A semiconductor device having a nonvolatile memory cell arranged in a p-type well (active region) PW1 in a memory cell region 1A in a semiconductor substrate 1 and an MISFET arranged in a p-type well PW2 (active region) or an n-type well (active region) in a peripheral circuit region 2A is constructed as follows. The surface of an element isolation region STI1 surrounding the p-type well PW1 is set lower than the surface of an element isolation region STI2 surrounding the p-type well PW2 or the n-type well (H1
US10522555B2	Semiconductor devices including Si/Ge active regions with different Ge concentrations In semiconductor devices, some active regions may frequently have to be formed on the basis of a silicon/germanium (Si/Ge) mixture in order to appropriately adjust transistor characteristics, for instance, for P-type transistors. To this end, the present disclosure provides manufacturing techniques and respective devices in which at least two different types of active regions, including Si/Ge material, may be provided with a high degree of compatibility with conventional process strategies. Due to the provision of different germanium concentrations, increased flexibility in adjusting characteristics of transistor elements that require Si/Ge material in their active regions may be achieved.
US10522545B2	Integrated circuit device and method of manufacturing the same An integrated circuit device includes a substrate, first and second fin-type active areas which extend in a first direction on the substrate, first and second gate lines on the substrate that extend in a second direction that crosses the first direction, and first and second contact structures. The first and second gate lines intersect the first and second fin-type active areas, respectively. The first contact structure is on the first fin-type active area at a side of the first gate line and contacts the first gate line. The second contact structure is on the second fin-type active area at a side of the second gate line. The first contact structure includes a first lower contact including metal silicide and a first upper contact on the first lower contact. The second contact structure includes a second lower contact including metal silicide and a second upper contact on the second lower contact.
US10522542B1	Double rule integrated circuit layouts for a dual transmission gate Exemplary embodiments of an exemplary dual transmission gate and various exemplary integrated circuit layouts for the exemplary dual transmission gate are disclosed. These exemplary integrated circuit layouts represent double-height, also referred to as double rule, integrated circuit layouts. These double rule integrated circuit layouts include a first group of rows from among multiple rows of an electronic device design real estate and a second group of rows from among the multiple rows of the electronic device design real estate to accommodate a first metal layer of a semiconductor stack. The first group of rows can include a first pair of complementary metal-oxide-semiconductor field-effect (CMOS) transistors, such as a first p-type metal-oxide-semiconductor field-effect (PMOS) transistor and a first n-type metal-oxide-semiconductor field-effect (NMOS) transistor, and the second group of rows can include a second pair of CMOS transistors, such as a second PMOS transistor and a second NMOS transistor. These exemplary integrated circuit layouts disclose various configurations and arrangements of various geometric shapes that are situated within an oxide diffusion (OD) layer, a polysilicon layer, a metal diffusion (MD) layer, the first metal layer, and/or a second metal layer of a semiconductor stack. In the exemplary embodiments to follow, the various geometric shapes within the first metal layer are situated within the multiple rows of the electronic device design real estate and the various geometric shapes within the OD layer, the polysilicon layer, the MD layer, and/or the second metal layer are situated within multiple columns of the electronic device design real estate.
US10522539B2	Semiconductor devices and fabricating methods thereof Provided is a semiconductor device and a fabricating method thereof. The semiconductor device includes a first trench having a first depth to define a fin, a second trench formed directly adjacent the first trench having a second depth that is greater than the first depth, a field insulation layer filling a portion of the first trench and a portion of the second trench, and a protrusion structure protruding from a bottom of the first trench and being lower than a surface of the field insulation layer.
US10522523B2	Display apparatus and method of manufacturing the same A display apparatus includes: a display substrate; a light-emitting diode (“LED”) disposed on the display substrate and which emits light; a passivation layer disposed on the display substrate and surrounding the LED; a first conductive layer disposed on the LED and the passivation layer; and a capping layer disposed on the LED and which adjusts a proceeding path of light emitted from the LED, where the first conductive layer includes a first region which overlaps the capping layer and a second region which does not overlap the capping layer, and the first region and the second region of the first conductive layer have different light characteristics from each other.
US10522520B2	Micro-LED display panel A micro-LED display panel including a substrate, a plurality of micro-LEDs, and a plurality of reinforced structures is provided. The micro-LEDs are disposed at a side of the substrate, wherein each of the micro-LEDs comprises an epitaxial layer and an electrode layer electrically connected to the epitaxial layer, and the electrode layer are located between the epitaxial layers and the substrate. Each of the micro-LEDs is electrically connected to the substrate through the corresponding electrode layer. Each of electrode layers includes a first electrode and a second electrode. The reinforced structures are disposed between the micro-LEDs and the substrate respectively, and each of the reinforced structures is located between the corresponding the first electrode and the second electrode. A Young's modulus of each of reinforced structures is smaller than a Young's modulus of the corresponding electrode layer.
US10522518B2	Light source with tunable CRI A light-emitting device with at least two light-emitting dies encapsulated with two different types of the wavelength-converting materials is disclosed. Each of the wavelength-converting materials is configured to produce a visible light from a narrow band light near UV region produced by the light-emitting dies, but with different correlated color temperatures (CCT) and different spectral contents. The combination of the two visible light forms the desired visible white light. The Color rendering index of the light-emitting device is tunable by adjusting the supply current to the light-emitting dies. In another embodiment, a light module with tunable CRI for an illumination system is disclosed.
US10522514B2	3DIC structure and methods of forming A structure and a method of forming are provided. The structure includes a first dielectric layer overlying a first substrate. A first connection pad is disposed in a top surface of the first dielectric layer and contacts a first redistribution line. A first dummy pad is disposed in the top surface of the first dielectric layer, the first dummy pad contacting the first redistribution line. A second dielectric layer overlies a second substrate. A second connection pad and a second dummy pad are disposed in the top surface of the second dielectric layer, the second connection pad bonded to the first connection pad, and the first dummy pad positioned in a manner that is offset from the second dummy pad so that the first dummy pad and the second dummy pad do not contact each other.
US10522501B2	Semiconductor structure and method of forming the same A method includes encapsulating a device in an encapsulating material, planarizing the encapsulating material and the device, and forming a conductive feature over the encapsulating material and the device. The formation of the conductive feature includes depositing a first conductive material to from a first seed layer, depositing a second conductive material different from the first conductive material over the first seed layer to form a second seed layer, plating a metal region over the second seed layer, performing a first etching on the second seed layer, performing a second etching on the first seed layer, and after the first seed layer is etched, performing a third etching on the second seed layer and the metal region.
US10522495B2	Protrusion bump pads for bond-on-trace processing An embodiment apparatus includes a dielectric layer, a conductive trace in the dielectric layer, and a bump pad. The conductive trace includes a first portion having an exposed top surface, wherein the exposed top surface is recessed from a top surface of the dielectric layer. Furthermore, the bump pad is disposed over and is electrically connected to a second portion of the conductive trace.
US10522493B2	Paste thermosetting resin composition, semiconductor component, semiconductor mounted article, method for manufacturing semiconductor component, and method for manufacturing semiconductor mounted article Provided is a paste thermosetting resin composition containing solder powder, a thermosetting resin binder, an activator, and a thixotropy imparting agent. The solder powder has a melting point ranging from 100° C. to 240° C., inclusive. The thermosetting resin binder contains a main agent and a curing agent. The main agent contains a di- or higher functional oxetane compound.
US10522484B2	Wiring substrate A wiring substrate includes a substrate body, a post formed on an upper surface of the substrate body, a thin film capacitor, and a first insulation layer covering the thin film capacitor and the post. The thin film capacitor includes a reference hole extending through the thin film capacitor in a thickness-wise direction. The post is inserted through the reference hole.
US10522482B2	Semiconductor device manufacturing method comprising bonding an electrode terminal to a conductive pattern on an insulating substrate using ultrasonic bonding An object of the present invention is to obtain a semiconductor device having highly reliable bonding portions. The semiconductor device according to the present invention includes an insulating substrate on which a conductive pattern is formed, and an electrode terminal and a semiconductor element which are bonded to the conductive pattern, the electrode terminal and the conductive pattern are bonded by ultrasonic bonding on a bonding face, and the ultrasonic bonding is performed at a plurality of positions.
US10522480B2	Packaging devices and methods of manufacture thereof Packaging devices and methods of manufacture thereof for semiconductor devices are disclosed. In some embodiments, a method of manufacturing a packaging device includes forming an interconnect wiring over a substrate, and forming conductive balls over portions of the interconnect wiring. A molding material is deposited over the conductive balls and the substrate, and a portion of the molding material is removed from over scribe line regions of the substrate.
US10522478B2	Semiconductor device with circumferential structure and method of manufacturing A circumferential embedded structure is formed by laser irradiation in a semiconductor substrate, which is of a semiconductor material. The embedded structure includes a polycrystalline structure of the semiconductor material, and surrounds a central portion of a semiconductor die. The semiconductor die including the embedded structure is separated from the semiconductor substrate.
US10522475B2	Vertical interconnects for self shielded system in package (SiP) modules A system in package (SiP) is disclosed that uses an EMI shield to inhibit EMI or other electrical interference on the components within the SiP. A metal shield may be formed on an upper surface of an encapsulant encapsulating the SiP. The metal shield may be electrically coupled to a ground layer in a printed circuit board (PCB) to form the EMI shield around the SiP. The metal shield may be electrically coupled to the ground layer using one or more conductive structures located in the encapsulant. The conductive structures may be located on a perimeter of the components in the SiP. The conductive structures may provide a substantially vertical connection between the substrate and the shield on the upper surface of the encapsulant.
US10522471B2	Semiconductor package and method of fabricating the same Insulating layers of a redistribution layer of a semiconductor package may be formed as a polymer film having inorganic fillers formed therein. The inorganic fillers may trap reactive materials to inhibit and/or substantially prevent the metal conductors, such as chip pads of the semiconductor chip being packaged, from being damaged by the reactive material. As a result, the reliability and the durability of the semiconductor package may be improved.
US10522469B2	Split rail structures located in adjacent metal layers A first metal layer of a semiconductor device includes a plurality of first metal lines that each extend along a first axis, and a first rail structure that extends along the first axis. The first rail structure is physically separated from the first metal lines. A second metal layer is located over the first metal layer. The second metal layer includes a plurality of second metal lines that each extend along a second axis orthogonal to the first axis, and a second rail structure that extends along the first axis. The second rail structure is physically separated from the second metal lines. The second rail structure is located directly over the first rail structure. A plurality of vias is located between the first metal layer and the second metal layer. A subset of the vias electrically interconnects the first rail structure to the second rail structure.
US10522467B2	Ruthenium wiring and manufacturing method thereof There is provided a ruthenium wiring, including: a TiON film formed as a base film in a recess formed in a predetermined film on a surface of a substrate; and a ruthenium film formed on the TiON film so as to fill the recess.
US10522464B2	Interconnection structure and methods of fabrication the same A method includes receiving a substrate having a substrate feature; forming a first material layer over the substrate and in physical contact with the substrate feature; forming an etch mask over the first material layer; and applying a dynamic-angle (DA) plasma etching process to the first material layer through the etch mask to form a first material feature. Plasma flux of the DA plasma etching process has an angle of incidence with respect to a normal of the first material layer and the angle of incidence changes in a dynamic mode during the DA plasma etching process.
US10522463B2	Semiconductor structure A semiconductor structure is provided and includes a base substrate including a device region and a peripheral region surrounding the device region, the base substrate including a base interconnection structure formed in each of the device region and the peripheral region; a medium layer on the base substrate; a first interconnection structure through the medium layer and on the base interconnection structure in the device region; and a second interconnection structure through the medium layer and on the base interconnection structure in the peripheral region. The first interconnection structure includes: a first portion over the base interconnection structure, and a second portion partially on the first portion and partially on a portion of the medium layer.
US10522460B2	Memory device and method for manufacturing same A memory device includes a first conductive layer; a second conductive layer provided above the first conductive layer; a plurality of electrode layers stacked above the second conductive layer; a semiconductor pillar extending through the plurality of electrode layers and the second conductive layer, and connected to the first conductive layer; and a third conductive layer provided above the first conductive layer. The third conductive layer is positioned at a level substantially same as a level of the second conductive layer in an extension direction of the semiconductor pillar, and is made of a material same as a material of the second conductive layer. The third conductive layer is electrically isolated from the second conductive layer, and is electrically connected to the first conductive layer.
US10522459B2	Method for fabricating semiconductor device having buried metal line A method includes etching a semiconductor substrate to form a fin. An isolation structure is formed over the semiconductor substrate and around the fin. The isolation structure and the semiconductor substrate are etched to form a recess. A barrier layer is deposited over a bottom surface and a sidewall of the recess. A conductive layer is deposited over the barrier layer. The conductive layer is recessed to form a conductive line, in which a top surface of the conductive line is lower than a top surface of the isolation structure. A dielectric cap layer is formed over the conductive line. The isolation structure and the dielectric cap layer are recessed, such that the fin protrudes from the recessed isolation structure.
US10522449B2	Packages with Si-substrate-free interposer and method forming same A method includes forming a plurality of dielectric layers, forming a plurality of redistribution lines in the plurality of dielectric layers, etching the plurality of dielectric layers to form an opening, filling the opening to form a through-dielectric via penetrating through the plurality of dielectric layers, forming a dielectric layer over the through-dielectric via and the plurality of dielectric layers, forming a plurality of bond pads in the dielectric layer, bonding a device die to the dielectric layer and a first portion of the plurality of bond pads through hybrid bonding, and bonding a die stack to through-silicon vias in the device die.
US10522446B2	Semiconductor device and manufacturing method of the same In order to improve reliability of a semiconductor device, the semiconductor device includes a semiconductor chip, a die pad, a plurality of leads, and a sealing portion. The die pad and the leads are made of a metal material mainly containing copper. A plating layer is formed on a top surface of the die pad. The plating layer is formed by a silver plating layer, a gold plating layer, or a platinum plating layer. The semiconductor chip is mounted on the plating layer on the top surface of the die pad via a bonding material. The plating layer is covered by the bonding material not to be in contact with the sealing portion.
US10522442B2	Dissipating heat from an electronic device in a protective housing An enclosed digital power amplifier has features for accommodating thermal cycling. The digital power amplifier includes an amplifier board and a controller board, both of which are in a protective housing. The amplifier board includes electronic components mounted on a copper circuit layer that is disposed on a dielectric layer that is disposed on an aluminum substrate layer. The housing includes slotted mounting projections that extend from sidewalls to isolate fasteners from the aluminum substrate layer, and thereby accommodate expansion of the aluminum substrate layer while the digital power amplifier is secured to a surface by the fasteners. Bottom edges of the sidewalls contact a top outer edge of the amplifier board. The mounting projections contact side outer edges of the first circuit board. At least a portion of the aluminum substrate layer extends beyond the bottom edges of the sidewalls of the housing, forming an end wall, such that the housing does not inhibit thermally coupling the aluminum substrate layer to another surface such as a heat exchanger.
US10522440B2	Package structure and method of manufacturing the same A package structure and a method of manufacturing the same are provided. The package structure includes a die, a first encapsulant, a second encapsulant, a protection layer, a RDL structure and a connector. The first encapsulant is aside a first sidewall of the die, at least encapsulating a portion of the first sidewall of the die. The second encapsulant is aside a second sidewall of the die, encapsulating the second sidewall of the die. The protection layer is aside the first sidewall of the die and on the first encapsulant. The RDL structure is on a first surface of the die. The connector is electrically connected to the die through the RDL structure.
US10522426B1	Haze mask system for haze suppression This system and method minimize an effect of haze to signal-to-noise ratio and compensate for haze on the haze map. A first mask with a first aperture is disposed along the path of the light beam between a light source and a collector. A first actuator moves the first mask along a tangential direction. A second mask with a second aperture is disposed along the path of the light beam between the first mask and the collector. A second actuator moves the second mask along a radial direction perpendicular to the tangential direction. The first mask and the second mask are independently movable along the tangential direction and the radial direction using the first actuator and the second actuator.
US10522420B2	Source/drain features with an etch stop layer The present disclosure provides a semiconductor device. The semiconductor device includes a substrate having a first device region and a second device region, a first fin over the substrate in the first device region, a second fin over the substrate in the second device region, a first epitaxial feature over the first fin in the source/drain region of the first fin, a second epitaxial feature over the second fin in the source/drain region of the second fin, and a dielectric layer on the first and second epitaxial features. The first epitaxial feature is doped with a first dopant of a first conductivity and the second epitaxial feature is doped with a second dopant of a second conductivity different from the first conductivity. The dielectric layer is doped with the first dopant.
US10522412B2	Gate structures with various widths and method for forming the same Embodiments of a semiconductor device structure and a method for forming the same are provided. The semiconductor device structure includes a substrate and a first metal gate structure formed over the substrate. The first metal gate structure has a first width. The semiconductor device structure further includes a first contact formed adjacent to the first metal gate structure and a second metal gate structure formed over the substrate. The second metal gate structure has a second width smaller than the first width. The semiconductor device structure further includes an insulating layer formed over the second metal gate structure and a second contact self-aligned to the second metal gate structure.
US10522404B2	Fully self-aligned via A first metallization layer comprising a set of first conductive lines that extend along a first direction on a first insulating layer on a substrate. A second insulating layer is on the first insulating layer. A second metallization layer comprises a set of second conductive lines on a third insulating layer and on the second insulating layer above the first metallization layer. The set of second conductive lines extend along a second direction that crosses the first direction at an angle. A via between the first metallization layer and the second metallization layer. The via is self-aligned along the second direction to one of the first conductive lines.
US10522384B2	Electromagnetic wave treatment of a substrate at microwave frequencies using a wave resonator A processing system is disclosed, having a process chamber that houses a substrate for exposure of a surface of the substrate to a travelling electromagnetic (EM) wave. The processing system also includes an EM wave transmission antenna configured to launch the travelling EM wave into the process chamber for the travelling EM wave to propagate in a direction substantially parallel to the surface of the substrate. The processing system also includes a power coupling system configured to supply EM energy into the EM wave transmission antenna to generate the travelling EM wave at a prescribed output power and in a prescribed EM wave mode during treatment of the substrate. The EM wave is recycled in the processing system in order to increase the efficiency of the microwave power use and eliminate the complexity of the resistive load cooling.
US10522381B2	Aligner apparatus and methods Described herein are aligners and methods of aligning workpieces. A workpiece aligner apparatus comprises an aligner chuck including an arm having a first end and a second end, a first edge gripping element on the first end and a second edge gripping element on the second end, the first edge gripping element and the second edge gripping element spaced apart to hold a workpiece at edges thereof, and a central workpiece handling element located in a central region of the arm, wherein the central workpiece handling element has a height such that the central workpiece handling element extends higher than the first edge gripping element and second edge gripping element.
US10522379B2	Substrate transfer apparatus A substrate transfer apparatus includes: a chamber including a lower surface, an upper surface opposing the lower surface, and a side surface extending between the lower surface and the upper surface; and a fan filter unit disposed on the upper surface of the chamber and configured to introduce air into the chamber. The chamber includes an inclined surface extending from the upper surface to the side surface and positioned to a side of the fan filter unit.
US10522374B2	Electrostatic chuck, substrate processing apparatus, and method of manufacturing semiconductor device using the same An electrostatic chuck, a substrate processing apparatus, and a method of manufacturing a semiconductor device are provided. The electrostatic chuck comprises a chuck base, an insulation plate on the chuck base, a first heater comprising a cell heater in the insulation plate, and a heater controller configured to control the cell heater. The heater controller obtains a resistance of the cell heater and compares the resistance with a threshold value to control a heating power provided to the cell heater.
US10522363B2	Systems and methods for perforation and ohmic contact formation for GaN epitaxial lift-off using an etch stop layer Methods and systems for forming a device structure free of a substrate are described. Exemplary embodiments include a device structure comprising of device layers, a release layer, an etch stop layer, and a substrate. The device structure is exposed to photoenhanced wet etch environments to vertically and laterally etch the release layer to separate the device layers from the substrate. The device structure can include a contact layer, an etch stop layer, or both in some embodiments.
US10522357B2	Transistor, protection circuit, and method of manufacturing transistor Both an improvement of on-current and suppression of leakage current of a transistor are achieved. A transistor includes a drain, a source, a gate, and a gate insulating film. In the transistor, the gate insulating film is disposed between the source and the drain. In addition, in the transistor, the gate has a plurality of regions provided on a surface of the gate insulating film. In addition, in the gate, the plurality of regions provided on the gate insulating film have different work functions.
US10522353B2	Semiconductor epitaxy bordering isolation structure A method includes providing a semiconductor structure having an active region and an isolation structure adjacent to the active region, the active region having source and drain regions sandwiching a channel region for a transistor, the semiconductor structure further having a gate structure over the channel region. The method further includes etching a trench in one of the source and drain regions, wherein the trench exposes a portion of a sidewall of the isolation structure, epitaxially growing a first semiconductor layer in the trench, epitaxially growing a second semiconductor layer over the first semiconductor layer, changing a crystalline facet orientation of a portion of a top surface of the second semiconductor layer by an etching process, and epitaxially growing a third semiconductor layer over the second semiconductor layer after the changing of the crystalline facet orientation.
US10522347B2	Method for manufacturing sputtering target, method for forming oxide film, and transistor A method for manufacturing a sputtering target with which an oxide semiconductor film with a small amount of defects can be formed is provided. Alternatively, an oxide semiconductor film with a small amount of defects is formed. A method for manufacturing a sputtering target is provided, which includes the steps of: forming a polycrystalline In-M-Zn oxide (M represents a metal chosen among aluminum, titanium, gallium, yttrium, zirconium, lanthanum, cesium, neodymium, and hafnium) powder by mixing, sintering, and grinding indium oxide, an oxide of the metal, and zinc oxide; forming a mixture by mixing the polycrystalline In-M-Zn oxide powder and a zinc oxide powder; forming a compact by compacting the mixture; and sintering the compact.
US10522345B2	Lattice-mismatched semiconductor substrates with defect reduction A method includes receiving a semiconductor substrate including a first semiconductor material; etching a portion of the semiconductor substrate, thereby forming a recess, a bottom portion of the recess having a first sidewall and a second sidewall intersecting with each other, one of the first and second sidewalls exposing a (111) crystallographic plane of the semiconductor substrate; and epitaxially growing a second semiconductor material in the recess, the second semiconductor material having lattice mismatch to the first semiconductor material, dislocations in the second semiconductor material due to the lattice mismatch propagating from the first sidewall to the second sidewall in a direction parallel to a top surface of the semiconductor substrate.
US10522343B2	Method of enhancing high-k film nucleation rate and electrical mobility in a semiconductor device by microwave plasma treatment A method for forming a semiconductor device is provided in several embodiments. According to one embodiment, the method includes providing a substrate in a process chamber, flowing a process gas consisting of hydrogen (H2) and optionally a noble gas into the process chamber, forming plasma excited species from the process gas by a microwave plasma source. The method further includes exposing an interface layer on the substrate to the plasma excited species to form a modified interface layer, and depositing a high dielectric constant (high-k) film by atomic layer deposition (ALD) on the modified interface layer. In some embodiments, the modified interface layer has higher electrical mobility than the interface layer, and the high-k film nucleates at a higher rate on the modified interface layer rate than on the interface layer.
US10522334B2	Electron multiplier production method and electron multiplier An electron multiplier production method including a main body portion, and a channel provided in the main body portion to open at one end surface and the other end surface of the main body portion and emits secondary electrons includes a first step of preparing a main body member including the one end surface and the other end surface, a communicating hole for the channel through which the one end surface and the other end surface communicate being provided in the main body member, a second step of forming the channel by forming a deposition layer including at least a resistive layer on an outer surface of the main body member and an inner surface of the communicating hole using an atomic layer deposition method, and a third step of forming the main body portion by removing the deposition layer formed on the outer surface of the main body member.
US10522330B2	In-situ plasma cleaning of process chamber components Provided herein are approaches for in-situ plasma cleaning of one or more components of an ion implantation system. In one approach, the component may include a beam-line component having one or more conductive beam optics. The system further includes a power supply for supplying a first voltage and first current to the component during a processing mode and a second voltage and second current to the component during a cleaning mode. The second voltage and current may be applied to the conductive beam optics of the component, in parallel, to selectively (e.g., individually) generate plasma around one or more of the one or more conductive beam optics. The system may further include a flow controller for adjusting an injection rate of an etchant gas supplied to the component, and a vacuum pump for adjusting pressure of an environment of the component.
US10522327B2	Method of operating a charged particle beam specimen inspection system A charged particle beam specimen inspection system is described. The system includes an emitter for emitting at least one charged particle beam, a specimen support table configured for supporting the specimen, an objective lens for focusing the at least one charged particle beam, a charge control electrode provided between the objective lens and the specimen support table, wherein the charge control electrode has at least one aperture opening for the at least one charged particle beam, and a flood gun configured to emit further charged particles for charging of the specimen, wherein the charge control electrode has a flood gun aperture opening.
US10522325B2	Charged particle beam device and image processing method in charged particle beam device There is provided a charged particle beam device which includes a charged particle beam source, a charged particle beam optical system that irradiates a sample with a charged particle beam from the charged particle beam source, a detector that detects a secondary signal generated from the sample by irradiation with the charged particle beam, and an image processing unit that executes integration processing of image data obtained from the secondary signal and outputting an integrated image, and in which the image processing unit executes a normalization integration computation of outputting an integrated image in which a luminance value of the integrated image is always “1” in an integration process.
US10522322B2	System and method for generating and analyzing roughness measurements Systems and methods are disclosed that remove noise from roughness measurements to determine roughness of a feature in a pattern structure. In one embodiment, a method for determining roughness of a feature in a pattern structure includes generating, using an imaging device, a set of one or more images, each including measured linescan information that includes noise. The method also includes detecting edges of the features within the pattern structure of each image without filtering the images, generating a biased power spectral density (PSD) dataset representing feature geometry information corresponding to the edge detection measurements, evaluating a high-frequency portion of the biased PSD dataset to determine a noise model for predicting noise over all frequencies of the biased PSD dataset, and subtracting the noise predicted by the determined noise model from a biased roughness measure to obtain an unbiased roughness measure.
US10522321B2	Charged particle optical apparatus for through-the-lens detection of particles Disclosed is a charged particle optical apparatus. The charged particle optical apparatus has a liner electrode in a first vacuum zone. The liner electrode is used to generate an electrostatic objective lens field. The apparatus has a second electrode which surrounds at least a section of the primary particle beam path. The section extends in the first vacuum zone and downstream of the liner electrode. A third electrode is provided having a differential pressure aperture through which the particle beam path exits from the first vacuum zone. A particle detector is configured for detecting emitted particles, which are emitted from the object and which pass through the differential pressure aperture of the third electrode. The liner electrode, the second and third electrodes are operable at different potentials relative to each other.
US10522314B2	Magnetic trip device for circuit breaker A magnetic trip device comprises an actuator coil part having a plunger; an output plate configured to rotate in a first direction by the pressing of the plunger; a micro switch configured to output an electrical signal indicating a state of the circuit breaker; a switch driving lever mechanism configured to rotate to a first position for pressing the operation lever portion and a second position for releasing the operation lever portion; a driving lever bias spring for elastically pressing the switch driving lever mechanism; an automatic reset mechanism for pressing the plunger to the retracted position; a driving lever latch configured to rotate to a restraining position for preventing the switch driving lever mechanism from rotating to the first position, and a release position; and an avoiding portion formed on the output plate to avoid contacting with the switch driving lever mechanism.
US10522311B2	Relay A movable member is configured to switch, by rotation, between a first state and a second state. In the first state, the movable member presses a plurality of first movable contact pieces to bring first contacts into contact with first substrate side contact points. When the movable member is in the second state, the first contacts are separated from the first substrate side contact points. A coil block includes a coil and causes the movable member to rotate by electromagnetic force generated by energization of the coil. A rotation axis of the movable member is parallel to an axis of the coil. The plurality of first substrate side contact points is arranged side by side in an axial direction of the coil on a first base substrate. The plurality of first movable contact pieces is arranged side by side in the axial direction.
US10522307B1	SMD switch and touchpad module and computing device using same A surface mount device switch includes a pedestal, a flexible conducting element and a metal dome. The flexible conducting element is connected with the pedestal. There is a spacing distance between the flexible conducting element and a circuit board. The metal dome is located under a pedestal conducting part of the pedestal and the flexible conducting element. When the flexible conducting element is pushed by the metal dome, the flexible conducting element is deformable in the direction toward the circuit board. Since the collision between the metal dome and the flexible conducting element is alleviated, the noise is reduced. Consequently, the comfort of operating the touchpad module is enhanced. The present invention further provides a touchpad module and a computing device with the surface mount device switch.
US10522302B2	Power storage device, light-emitting device, and electronic device To provide a flexible, highly reliable power storage device or light-emitting device. The device includes a battery unit or a light-emitting unit and a member with rubber elasticity. The battery unit includes a secondary battery. The light-emitting unit includes a light-emitting element. The member with rubber elasticity is provided with a first projection and a second projection. The first projection and the second projection are arranged on a first surface of the battery unit or the light-emitting unit. The first projection and the second projection come in contact with each other when the power storage device is bent such that the first surface of the battery unit faces inward.
US10522298B2	Methods of manufacturing a hermetically sealed wet electrolytic capacitor and a hermetically sealed wet electrolytic capacitor Methods of manufacturing a hermetically sealed wet electrolytic capacitor and a hermetically sealed wet electrolytic capacitor are described. A method of manufacturing a wet electrolytic capacitor includes forming a cathode of the capacitor by forming a case comprising a metal substrate, the metal substrate having an alloyed surface, depositing a smooth film comprising palladium and copper as a tacking layer on the alloyed surface of the metal substrate, and depositing a rough, high surface area layer on the tacking layer to achieve a high capacitance cathode. A first terminal is electrically connected to the cathode. An anode is formed. A second terminal is electrically connected to the anode. An electrolytic solution is disposed within the case, and the case is hermetically sealed.
US10522296B2	Capacitor with charge time reducing additives and work function modifiers A capacitor, and method for making the capacitor, is provided with improved charging characteristics. The capacitor has an anode, a cathode comprising a conductive polymer layer and a work function modifier layer adjacent the conductive polymer layer and a dielectric layer between the anode and the cathode.
US10522295B2	System and method for electret surface potential restoration by a directional pulsating electric field A system is disclosed for restoring a surface field potential of an electret material. An oscillator generates an oscillating output, and a power amplifier amplifies the oscillating output. A step-up transformer generates a high voltage alternating current output from the amplified oscillating output, and a polarity controller generates one of a positive pulsating output and a negative pulsating output from the high voltage alternating current output.
US10522284B2	Coil fixing structure A coil fixing structure includes a substrate, which has a thickness in a vertical direction, and a coil, which is wound around an axis extending in a vertical direction and fixed to the substrate. The substrate includes a conductor portion and an insulating portion disposed on the conductor portion. The conductor portion includes a first land portion and a second land portion, which are exposed from an upper surface of the substrate. A first lead wire drawn from the coil has an end portion connected to the first land portion. A second lead wire drawn from the coil has an end portion connected to the second land portion. When viewed in a plan in the vertical direction, the first land portion and the second land portion are disposed to surround the coil.
US10522283B2	Common mode filter A common mode filter includes a core, and first and second wires wound around the core. Each of the first and second wires includes at least i−1th turn, ith turn, and i+1th turn. The ith turn of the first wire intersects with the ith turn of the second wire without intersecting each of the i−1th and i+1th turns of the second wire.
US10522281B2	Large-current inductor The large-current inductor includes a first core member having a first winding piece, a second winding piece, a first indentation, and a second indentation; a second core member having a third winding piece, a fourth winding piece, a third indentation, and a fourth indentation; a third core member attached and joined to first lateral sides of the first and second core members; and a fourth core member attached and joined to second lateral sides of the first and second core members. A first coil member winds around the first and third winding pieces, and has its ends embedded into the first and third indentations. A second coil member winds around the second and fourth winding pieces, and has its ends embedded into the second and fourth indentations. The inductor enhances efficiency of energy storage by mutual inductance, and limits large current flow by leakage inductance.
US10522278B2	Pneumatic solenoid valve Disclosed is a pneumatic solenoid valve comprising an air chamber with multiple air connections which can be connected via multiple switching positions of the valve by interconnecting the air chamber. The valve comprises a magnetic coil, a yoke arranged on the coil, and an armature arranged about the yoke and able to move relative to the yoke, all within the air chamber. When the coil is energized, the magnetic force generated rotates the armature about a single axis of rotation against a restoring force, until the magnetic force corresponds to the restoring force. When the armature rotates, the size of at least one overlapping region between the yoke and the armature changes, wherein an air gap is formed between the yoke and the armature. The distance of the air gap between the yoke and the armature remains substantially constant in the direction of rotation of the armature.
US10522267B2	Wire harness structure A wire harness structure includes a main harness that has a trunk harness routed on a vehicle, and has at least one branch harness having one end connected to the trunk harness as a branch and the other end electrically connected to an electrical device mounted on the vehicle; and a branch connection mechanism to which at least one additional electrical device mounted on the vehicle is electrically connected, and which is connected to the main harness in a retrofitting manner as a branch.
US10522259B2	Nuclear power generation system utilizing thermal expansion in metallic members to move a neutron reflector A nuclear power generation system being safe and easily controlled by load following. The nuclear power generation system has a nuclear reactor employing a load following control method. The reactor includes: a fuel assembly reactor core having metallic fuel containing at least one selected from uranium-235, uranium-238 and plutonium-239; a reactor vessel containing the reactor core; metallic sodium loaded into the reactor vessel and heated by the reactor core; and a neutron reflector for achieving criticality in the reactor core with effective multiplication factor of neutrons emitted from the reactor core being maintained at or above about 1. The neutron reflector is coupled to spring or spiral metallic members and utilizing heat deformation in the metallic members due to the temperature in coolant metallic sodium to control the fast neutron reflection efficiency of the neutron reflector.
US10522258B2	Sealing of a crack in a pool of a nuclear facility, using a robot The sealing of a crack in a pool of a nuclear facility, using a robot. The sealing, concerns in particular, that of a crack in a wall of a pool of a nuclear facility. In particular, it implements a mobile robot carrying an adhesive tape dispenser. At least the following are provided: controlling a plurality of suction systems, the dispenser being mechanically integral with a first suction system, and controlling the movement of the first system relative to the other systems of said plurality of systems.
US10522257B1	In-containment spent fuel storage to limit spent fuel pool water makeup A method and apparatus for extending the period a nuclear steam supply system spent fuel pool can be safely passively cooled by storing the spent fuel offloaded from the reactor, in the containment for one reactor operating cycle. During a refueling the spent fuel that is not to be returned to the reactor and the spent fuel that will be returned to the reactor are stored separately in shielded locations within the containment. After one operating cycle, the spent fuel stored within the containment that was not returned to the reactor just prior to the last operating cycle, is offloaded to the spent fuel pool and replaced by the newly offloaded spent fuel that is being retired.
US10522254B2	Methods and systems for predicting sensitivity of blood flow calculations to changes in anatomical geometry Embodiments include methods and systems for determining a sensitivity of a patient's blood flow characteristic to anatomical or geometrical uncertainty. For each of one or more of individuals, a sensitivity of a blood flow characteristic may be obtained for one or more uncertain parameters. An algorithm may be trained based on the sensitivities of the blood flow characteristic and one or more of the uncertain parameters for each of the plurality of individuals. A geometric model, a blood flow characteristic, and one or more of the uncertain parameters of at least part of the patient's vascular system may be obtained for a patient. The sensitivity of the patient's blood flow characteristic to one or more of the uncertain parameters may be calculated by executing the algorithm on the blood flow characteristic of at least part of the patient's vascular system, and one or more of the uncertain parameters.
US10522253B2	Machine-learnt prediction of uncertainty or sensitivity for hemodynamic quantification in medical imaging The uncertainty, sensitivity, and/or standard deviation for a patient-specific hemodynamic quantification is determined. The contribution of different information, such as the fit of the geometry at different locations, to the uncertainty or sensitivity is determined. Alternatively or additionally, the amount of contribution of information at one location (e.g., geometric fit at the one location) to uncertainty or sensitivity at other locations is determined. Rather than relying on time consuming statistical analysis for each patient, a machine-learnt classifier is trained to determine the uncertainty, sensitivity, and/or standard deviation for the patient.
US10522252B2	Opioid management system A system may include a data processor and a memory storing instructions. The instructions may result in operations when executed by the data processor. The operations may include determining, based on location data from a positioning system, a presence of a cartridge at a location. The cartridge may include a substance. A quantity of the substance may be determined based on content data from a content meter at the location. Diversion of the substance may be detected based on the cartridge being present at the location and/or the quantity of the substance. Related methods and articles of manufacture, including apparatuses and computer program products, are also disclosed.
US10522250B2	Systems for determining, and devices for indicating, viable life of replaceable components thereof and methods therefor A system capable of monitoring a replaceable component is provided. The system includes a controller for controlling operation of the system; programming instructions according to which the system is configured to: accept input of a viable life for the component, calculate an accumulated amount of distress experienced by the component based on each set of previously collected use data associated with each previous use of the component, and determine, based in part on the accumulated amount of distress, a used portion of the viable life that the component has experienced as a result of the previous use(s) thereof and an unused portion of the viable life; and a feedback device configured to provide to an operator of the system an indication of at least one of the unused and used portions of the viable life of the component. Methods of monitoring a replaceable component of a system are also provided.
US10522244B2	Bioinformatic processing systems and methods The present disclosure relates to systems and methods for facilitating trusted handling of genomic and/or other bioinformatic information. Certain embodiments may facilitate policy-based governance of access to and/or use of bioinformatic information, improved interaction with and/or use of distributed bioinformatic information, parallelization of various processes involving bioinformatic information, and/or reduced user involvement in bioinformatic workflow processes, and/or the like. Further embodiments may provide for memoization processes that may persistently store final and/or intermediate results of computations performed using genomic data for use in connection with future computations.
US10522232B2	Memory device with vpass step to reduce hot carrier injection type of program disturb Apparatuses and techniques are described for reducing an injection type of program disturb in a memory device. A voltage on a selected word line is increased in a first step from an initial level such as 0 V to an intermediate, pass level such as Vpass, and in a second step from Vpass to a peak program level of Vpgm. A voltage on an adjacent unselected word line can be increased from the initial level to Vpass and then temporarily increased to an elevated level of Vpass_el during the second step increase on the selected word line. This helps reduce the magnitude of a channel gradient between the selected word line and the adjacent word line. The increase to Vpass_el may be implemented for program loops in the later part of a program operation, when Vpgm and the risk of program disturb is relatively high.
US10522231B2	Semiconductor memory device According to one embodiment, a semiconductor memory device includes, a memory cell array, a first clock signal line, a second clock signal line to which first and second input/output buffer circuits are coupled in the order from one end toward the other end, a first buffer coupled to the one end of the second clock signal line, and a second buffer coupled to the other end of the second clock signal line. When a write operation is performed, a clock signal is input to the first and second input/output buffer circuits through the first buffer, and when a read operation is performed, a clock signal is input to the first and second input/output buffer circuits through the second buffer.
US10522222B2	Semiconductor device and error correction method A device with error correction is provided. The device includes a plurality of memory cells, and reference read write circuit, a plurality of sense amplifiers, and an error-correction code control block. The reference read write circuit is configured to generate a reference voltage in response to data stored in at least one of the plurality of memory cells. A plurality of sense amplifiers are each coupled to a respective memory cell of the plurality of memory cells. An error-correction code (ECC) control block may output an error signal when the ECC control block detects that it is unable to correct error data in one or more respective memory cells. The reference read write circuit may overwrite data in the at least one of the plurality of memory cells in response to the error signal.
US10522221B2	Storage array programming method and device for resistive random access memory A storage array programming method and device for a resistive random access memory (RAM) are proposed. The resistive RAM comprising a storage array, the storage array comprising a group of storage units to which data is to be written. The programming method comprises: reading the currently stored data in the group of storage units and comparing bit by bit the currently stored data with the data to be written to determine whether the currently stored data is consistent with the data to be written, and generating a data write state according to the determination result; determining the data write state, and by a set operation or a reset operation, writing the data to be written only to the storage units where the currently stored data is inconsistent with the data to be written; checking whether any storage unit having a write failure exists during the set operation or the reset operation; if so, then repeating the previous steps until the writing is completed. The programming method can avoid repetitive writing, thus not only reducing write interference with a unit to improve writing efficiency of the unit, but also reducing power consumption of writing.
US10522215B2	Reading circuit and method A reading circuit is provided in the invention. The reading circuit includes a sensitive amplifier circuit and a latch circuit. A sensitive amplifier circuit is coupled to a first bit line and a second bit line to connect with a storage device, and includes a first inverter and a second inverter. The first bit line is coupled to a source of a first transistor of the first inverter and the second bit line is coupled to a source of a second transistor of the second inverter. The latch circuit is coupled to the sensitive amplifier circuit and outputs an output signal generated by the sensitive amplifier circuit.
US10522212B2	Apparatuses and methods for shift decisions The present disclosure includes apparatuses and methods for shift decisions. An example apparatus includes a memory device. The memory device includes an array of memory cells and sensing circuitry coupled to the array via a plurality of sense lines. The sensing circuitry includes a sense amplifier and a compute component coupled to a sense line and configured to implement logical operations and a decision component configured to implement a shift of data based on a determined functionality of a memory cell in the array.
US10522206B2	Semiconductor device and system A semiconductor device may include a first buffer, a second buffer, a divider circuit and an internal signal generation circuit. The first buffer may buffer a first input signal and a second input signal to generate a first data strobe buffering signal and a first data strobe bar buffering signal. The second buffer may generate a second data strobe buffering signal based on the first input signal and a reference voltage. The divider circuit may divide the second data strobe buffering signal to generate a divided signal and a divided bar signal. The internal signal generation circuit may be configured to generate a first to fourth data latch timing signals having different phases based on the first data strobe buffering signal, the first data strobe bar buffering signal, the divided signal and the divided buffering signal.
US10522204B1	Memory signal phase difference calibration circuit and method A memory signal phase difference calibration circuit includes: a clock generator providing clocks allowing a physical layer (PHY) circuit of DDR SDRAM to generate a data input/output signal (DQ) and a data strobe signal (DQS) for accessing a storage circuit; a calibration control circuit outputting a phase control signal according to an adjustment range to adjust the phase of a target signal (DQ or DQS), and outputting a calibration control signal; an access control circuit reading storage data representing predetermined data from the storage circuit according to the calibration control signal; a comparison circuit comparing the predetermined data with the storage data to output a result allowing the calibration control circuit to alter the adjustment range accordingly; and a phase controller outputting a clock control signal according to the phase control signal to set the phase of a target clock used for the PHY circuit generating the target signal.
US10522203B2	Semiconductor device and system performing calibration operation A semiconductor device may include a calibration circuit and an output circuit. The calibration circuit may perform a calibration operation for setting a resistance value of the output circuit. The calibrations circuit may perform the calibration operation by being coupled, through a signal transmission line, to a reference resistor provided in another semiconductor device.
US10522202B2	Memory device and compensation method therein A circuit is disclosed that includes an inverter unit and a switch unit. The inverter unit is coupled to a memory cell column. The inverter unit is configured to invert, in response to a first control signal and a second control signal, a first signal and to output a second signal for the enabling or disabling of a bit line keeper circuit that is configured to maintain a bit line to a voltage. The first signal is generated by the memory cell column. The switch unit is configured to couple a reference voltage to an input of the inverter unit, in response to a third control signal. The inverter unit is further configured to be deactivated in response to the reference voltage, the first control signal, and the second control signal.
US10522197B2	Memory device, memory system, and method of controlling memory device In one embodiment, the method includes sensing, by a memory device, a temperature of the memory device; and generating, by the memory device, a response to a single received command. The response includes temperature information, and the temperature information provides information on the sensed temperature. In one embodiment, the single received command is a read status request command, the read status request command requests status information on the memory device, and the status information includes the temperature information.
US10522192B1	Coated slider to inhibit contamination accumulation A slider is provided with a conformal coating (e.g., an oxide) on the air-bearing surface (ABS) to provide a consistent surface energy to the ABS. The conformal coating may be formed by an atomic layer deposition (ALD) process. A consistent surface energy inhibits accumulation of contaminants on the slider ABS, such as at topographical transition areas.
US10522186B2	Apparatus, systems, and methods for integrating digital media content Disclosed herein are techniques for digital content integration. A computer-implemented method includes receiving a target digital content item that includes a plurality of frames, identifying a set of candidate host frames for inserting source digital content items from the plurality of frames based on one or more attributes of the target digital content item, determining a candidate score for each respective candidate host frame of the candidate host frames, and generating host time defining data including identifications and the candidate scores of the candidate host frames, where the candidate score indicates a degree of transition of the target digital content item at the candidate host frame. One or more candidate host frames are then selected based on the candidate scores for inserting one or more source digital content items into the target digital content item.
US10522181B2	High density optical recording medium having multiple recording layers Provided is an optical recording medium including two or more recording layers, and a light irradiation surface that is irradiated with light for recording an information signal on the two or more recording layers. Among the two or more recording layers, at least one layer other than a layer located on the deepest side from the light irradiation surface includes an oxide of a metal A, an oxide of a metal B, and an oxide of a metal C. The metal A is at least one kind among W, Mo, and Zr, the metal B is Mn, and the metal C is at least one kind among Cu, Ag, and Ni. Ratios of the metal A, the metal B, and the metal C satisfy a relationship of 0.46≤x1 (provided that, x1=a/(b+0.8c), a representing an atomic ratio [atom %] of the metal A with respect to the sum of the metal A, the metal B, and the metal C, b representing an atomic ratio [atom %] of the metal B with respect to the sum of the metal A, the metal B, and the metal C, and c representing an atomic ratio [atom %] of the metal C with respect to the sum of the metal A, the metal B, and the metal C.
US10522178B1	High damping shield with low magnetic moment in perpendicular magnetic recording (PMR) writer A PMR writer is disclosed with an all wrap around (AWA) shield design in which one or more of the leading shield, lead edge taper (LET), and side shields are comprised of a low moment high damping (LMHD) magnetic material having a damping constant ≥0.04 and a magnetic flux density (Bs) from 1 kilogauss (kG) to 8 kG. The LMHD magnetic material may be FeNiM, FeCoM, FeNM, or FeCoNiM where M is a 3d, 4d, or 5d transition metal. The LET layer has a tapered side adjoining the leading gap and with a thickness that decreases to zero at height h1 of 50 nm to 500 nm from the air bearing surface. The leading shield also has a backside at h1. Wide adjacent track erasure is minimized while area density capability is enhanced compared with conventional shields with Bs from 10-19 kG.
US10522175B1	Multi-access hard disc drive Aspects of the disclosure are directed to apparatuses and methods involving an apparatus operable for read/write access to data storage media. As may be consistent with one or more embodiments, a hard disc drive apparatus includes respective e-blocks mounted in different corners of an enclosure (e.g., base deck) having storage media therein. Each e-block has one or more actuator arms having a read/write head thereon and a voice coil that rotates the actuator arm about an axis. The respective e-blocks are operable for read/write access to different regions of the storage media (e.g., with a longer actuator arm utilized for accessing an inner region of disc media, and a shorter actuator arm utilized for accessing an outer region of disc media). The number, size and rotational limits of the respective e-blocks are utilized to facilitate the use of a compact enclosure design while achieving high-speed data access.
US10522167B1	Multichannel noise cancellation using deep neural network masking A system configured to improve beamforming by using deep neural networks (DNNs). The system can use one trained DNN to focus on a first person speaking an utterance (e.g., target user) and one or more trained DNNs to focus on noise source(s) (e.g., wireless loudspeaker(s), a second person speaking, other localized sources of noise, or the like). The DNNs may generate time-frequency mask data that indicates individual frequency bands that correspond to the particular source detected by the DNN. Using this mask data, a beamformer can generate beamformed audio data that is specific to a source of noise. The system may perform noise cancellation to isolate first beamformed audio data associated with the target user by removing second beamformed audio data associated with noise source(s).
US10522165B2	Method and apparatus for ultrasonic directional sound applicable to vehicles Methods and systems to produce audio output signals from audio input signals. In one embodiment, a first portion of the audio input signals can be pre-processed, with the output used to modulate ultrasonic carrier signals, thereby producing modulated ultrasonic signals. The modulated ultrasonic signals can be transformed into a first portion of the audio output signals, which is directional. Based on a second portion of the audio input signals, a standard audio speaker can output a second portion of the audio output signals. Another embodiment further produces distortion compensated signals based on the pre-processed signals. The distortion compensated signals can be subtracted from the second portion of the audio input signals to generate inputs for the standard audio speaker to output the second portion of the audio output signals. In yet another embodiment, noise can be added during pre-processing of the first portion of the audio input signals.
US10522164B2	Method and device for improving audio processing performance A method and a device for improving audio processing performance are provided. In some embodiments, the method includes: acquiring audio data in an audio call in a terminal; processing the audio data by utilizing an audio processing algorithm, to obtain a characteristic parameter of the audio data; analyzing the processing quality of the audio data according to the characteristic parameter of the audio data; and if the processing quality of the audio data does not reach a preset quality standard, optimizing the audio processing algorithm by utilizing optimization data matching the terminal.
US10522161B2	Device and method for bandwidth extension for audio signals An audio signal decoding apparatus is provided that includes a receiver that receives an encoded information, a memory, and a processor that demultiplexes the encoded information, including encoding parameters that are used for decoding a low frequency spectrum and index information that identifies a most, correlated portion from a low frequency spectrum for one or more high frequency subbands. The processor also replicates a high frequency subband spectrum based on the index information using a synthesized low frequency spectrum, the synthesized low frequency spectrum being obtained by decoding the encoding parameters. The processor further estimates a frequency of a harmonic component in the synthesized low frequency spectrum, adjusts a frequency of a harmonic component in the high frequency subband spectrum using the estimated harmonic frequency, and generates an output signal using the synthesized low frequency spectrum and the high frequency subband spectrum.
US10522148B2	Mobile wireless communications device with speech to text conversion and related methods A communications device and method are provided for converting speech to text and applying corrections to the text. The communications device may include at least one audio interface, such a microphone and/or speaker, and at least one communications subsystem, as well as a controller or processor operative to receive speech input using the at least one audio interface, convert the speech input to input text, correct the input text to corrected text, and send the corrected text over a network using the communications subsystem. The corrected text may involve the application of proposed modification, such as a grammatical correction or ambiguity resolution, to the input text. The application of the proposed modification may be based upon the receipt of an instruction to accept or reject the proposed correction or resolution. The instruction may be a spoken instruction.
US10522139B2	Electronic device and control method thereof According to one embodiment, an electronic device determines whether one or more devices should be controlled based on a second utterance input subsequent to a first utterance input from outside in accordance with the first utterance. The electronic device includes a management unit and a controller. The management unit prepares and manages a determination audio data item for determining whether the first utterance is a desired utterance by utterances input from outside at a plurality of times, and determines whether the first utterance is the desired utterance using the prepared and managed determination audio data item. The controller controls the one or more devices based on the second utterance.
US10522136B2	Method and device for training acoustic model, computer device and storage medium Embodiments of the present disclosure provide a method and a device for training an acoustic model, a computer device and a storage medium. The method includes obtaining supervised speech data and unsupervised speech data, in which, the supervised speech data is speech data with manual annotation and the unsupervised speech data is speech data with machine annotation; extracting speech features from the supervised speech data and the unsupervised speech data; and performing a multi-task learning having a supervised learning task and an unsupervised learning task on the speech features of the supervised speech data and the unsupervised speech data by using a deep learning network, to train and obtain the acoustic model.
US10522135B2	System and method for segmenting audio files for transcription A system and method for segmenting an audio file. The method includes analyzing an audio file, wherein the analyzing includes identifying speech recognition features within the audio file; generating metadata based on the audio file, wherein the metadata includes transcription characteristics of the audio file; and determining a segmenting interval for the audio file based on the speech recognition features and the metadata.
US10522134B1	Speech based user recognition Systems, methods, and devices for verifying a user are disclosed. A speech-controlled device captures a spoken command, and sends audio data corresponding thereto to a server. The server performs ASR on the audio data to determine ASR confidence data. The server, in parallel, performs user verification on the audio data to determine user verification confidence data. The server may modify the user verification confidence data using the ASR confidence data. In addition or alternatively, the server may modify the user verification confidence data using at least one of a location of the speech-controlled device within a building, a type of the speech-controlled device, or a geographic location of the speech-controlled device.
US10522129B2	Active acoustic and vibration noise canceling in waterproof camera A camera includes one or more microphone pairs. A first microphone (e.g., a main microphone) is ported to the outside of the camera and captures the desired external audio signal, but may also capture undesired vibrational noise. A second microphone has a similar structure to the first microphone, but is not ported to the outside of the camera. Instead, the second microphone is ported into an enclosed cavity (e.g., 1-2 cubic centimeters in volume). The second microphone may pick up the same vibration excitation and internal acoustic noise as the first microphone but very little of the desired external acoustic sounds around the camera. The unwanted noise can then be removed by subtracting the second audio signal from the second microphone from the main audio signal from the main microphone.
US10522126B1	Hum-cancelling system A hum-cancelling system includes two or more hum-cancelling coils configured in a distributed manner, connected in series with each other. The hum-cancelling coils form a series circuit that is electrically connected to at least one pickup. Each hum-cancelling coil includes a top plate, a bottom plate, and a coil of wire wrapped between the top plate and the bottom plate.
US10522123B2	Electronic apparatus and control method thereof An electronic apparatus is disclosed, which includes an input interface configured to receive an audio signal, a processor configured to process the received audio signal, and an output interface configured to output the processed audio signal, in which the processor is configured to obtain a scale of a first octave by applying a filter bank to the audio signal based on a sampling frequency of the audio signal; down-sample the audio signal; and obtain a scale of a second octave lower than the first octave by applying the filter bank to the down-sampled signal.
US10522121B1	Eccentrically-arranged automatic restoring striking structure The invention comprises a striking rod, a rotating shaft, a stand and an elastic element, wherein the rotating shaft comprises a shaft body where the striking rod is disposed, two side ends on two sides of the shaft body, and a protrusion arranged on the shaft body and opposite to the striking rod. The stand comprises a base and two columns arranged on two sides of the base. The two columns are respectively provided with a socket tube pivotally connected to the side end, and a locking hole. The locking hole is located below the socket tube and is offset towards a musical instrument. Two ends of the elastic element are respectively fixed to the locking hole and an engaging element. Since the socket tube is not on the same vertical line as the locking hole, an initial position of the striking rod is offset away from the musical instrument.
US10522116B2	Projection method with multiple rectangular planes at arbitrary positions to a variable projection center This invention provides a projection method with multiple rectangular planes at arbitrary positions to a variable projection center, including: obtaining a user viewpoint position; comparing a horizontal field of view angle between the user viewpoint position and each visual plane with a predetermined range, wherein if the horizontal field of view angle fails to be within the predetermined range, the user viewpoint position is updated to a new user viewpoint position, such that the horizontal field of view angle between the new user viewpoint position and each visual plane is just within the predetermined range; and respectively generating projection channel corresponding to each visual plane based on the user viewpoint position and performing projecting. The technical solution of the present invention can achieve the information interaction between the projection position of the CAVE system and the actual visual position of the user and the processing of the information.
US10522112B2	Systems and techniques for aggregation, display, and sharing of data Systems and techniques for aggregation, display, and sharing of data. One or more content rules define the content of a data package. Data objects are associated with the data package based on the content rules. Each data object is also associated with a respective source channel and a respective time when the data object was made available on the associated channel. The channels correspond to different third-party communication applications. Graphic items are displayed on timelines, where each timeline is associated with a respective channel and each graphic item represents one or more of the data objects made available on the channel. Each graphic item is displayed on the corresponding timeline at a position corresponding to the one or more times associated with the data objects represented by the graphic item.
US10522110B1	Apparatuses, systems, and methods for measuring and adjusting the luminance of a head-mounted display An ocular assembly for a head-mounted display may include an opaque enclosure that defines (1) an interior space, (2) an exterior space, (3) a display aperture that admits image light emitted by a display screen into the interior space, (4) a lens aperture, and (5) a lateral aperture that admits the light from the interior space into the exterior space. The ocular assembly may also include an opaque covering for the lateral aperture that is moveable between (1) a closed position that prevents the image light from passing from the interior space through the lateral aperture to the exterior space and (2) an open position that allows the image light to pass from the interior space through the lateral aperture to the exterior space. Various other apparatuses, methods, and systems are also disclosed.
US10522106B2	Methods and apparatus for active transparency modulation A viewing system is provided including an active transparency modulation film in the form of addressable arrays of electrochromic pixel structures. The viewing system may be used in, for instance, a head-mounted display (HMD) or head-up display (HUD). The film is located on one side of a viewing lens of the system and is selectively variable from opaque to transparent at certain regions on the lens to provide an opaque silhouetted image upon which a virtual image is projected. The viewing system including the film and pixel structure therefore provide improved viewing by minimizing the undesirable effects of image ghosting in a viewed scene.
US10522104B2	Liquid crystal panel driving circuit and liquid crystal display device Disclosed is a liquid crystal panel driving circuit and a liquid crystal display device. The driving circuit includes a power integrated circuit module, a timing control module, a compensation module, and a temperature sensor. In the driving circuit, the power integrated circuit module and the timing control module adjust a DC low voltage or a clock signal according to a compensating parameter and then output the adjusted DC low voltage or clock signal to a liquid crystal panel. In this way, a working voltage and a working temperature of a TFT in the liquid crystal panel can match each other, whereby the reliability of the liquid crystal panel is improved.
US10522102B2	Display panel and liquid crystal display with enhanced viewing-angle color deviation and improved display quality A display panel and a liquid crystal display (LCD) are disclosed. The display panel includes multiple basic pixel units arranged in an array. Each basic pixel unit includes a first pixel unit and a second pixel unit aligned vertically. When the first and second pixel units are under a same effective input signal, the selected sub-pixel unit of the first pixel unit has a greater voltage on its liquid crystal capacitor than that of the selected sub-pixel unit of the second pixel unit. The present invention provides different voltages on the sub-pixel units' liquid crystal capacitors, thereby improving LCD's viewing angle, color deviation, and display quality.
US10522100B2	Method of driving a display panel and display apparatus performing the same A method of driving a display panel includes compensating first pixel data corresponding to a first pixel of a plurality of pixels in the display panel based on at least one of a first decision, a second decision, or a third decision and generating a first data voltage corresponding to the compensated first pixel data. The first data voltage is applied to the first pixel through a data line. The first decision includes determining, based on a position of the first pixel, whether compensation for the first pixel data is required. The second decision includes determining, based on previous subpixel data and present subpixel data for the first pixel, whether the compensation for the first pixel data is required. The third decision includes determining whether the first pixel data complies with a compensation avoidance condition.
US10522097B2	Method and device for displaying image on liquid crystal panel Disclosed are a method and a device for displaying an image on a liquid crystal panel. The method includes: controlling a timing controller to load a pre-set image from a pre-programmed memory after the liquid crystal panel is powered on, wherein the liquid crystal panel comprises the timing controller, the timing controller is connected with the memory; judging whether the pre-set image is valid; and controlling the liquid crystal panel to display the pre-set image until an external source image is received when the pre-set image is valid. The disclosure solves the technical problem in the related art that a liquid crystal panel cannot display any image before an external system provides an external source image.
US10522095B2	Display device According to an aspect, a display device includes a display unit, an illumination unit, a measurement unit, and a control unit. When pixels that are expected to perform display output at identical luminance are adjacent to each other in adjacent partial regions, and when a difference in the intensity of the internal light between light emitting regions corresponding to the adjacent partial regions is equal to or larger than a predetermined threshold, the control unit performs correction to increase luminance of a predetermined number of pixels belonging to a first partial region corresponding to a first light emitting region the intensity of the internal light from which is lower among the adjacent partial regions. The predetermined number of pixels are located closer to a second partial region corresponding to a second light emitting region the intensity of the internal light from which is higher among the adjacent partial regions.
US10522094B1	Global illumination mode liquid crystal display for virtual reality Disclosed is a liquid crystal display device comprising a liquid crystal layer including a plurality of liquid crystals in a pixel area and a backlight unit coupled to the liquid crystal layer. A plurality of pixels are disposed in the pixel area. The backlight unit is configured to project light towards the entire pixel area of the liquid crystal layer during an illumination time period of a frame time, and not to project the light towards any of the pixel area of the liquid crystal layer during a non-illumination time period of the frame time. By enabling the backlight unit for the illumination time period less than the frame time, image streaking and latency can be reduced.
US10522091B2	Organic light-emitting diode display and operation method thereof An OLED display and an operation method thereof, which are capable of preventing malfunctions caused by the influence of external noise on an extended cable when a display panel is separated from a set part by a predetermined distance or longer, are discussed. The OLED display includes a timing controller embedded in the set part separated from the display module by a predetermined distance and configured to control a reset signal for cancelling a safety mode to be transmitted to the display module in order to prevent the safety mode from being abnormally maintained due to the influence of external noise on a cable used to connect the display module and the set part when the safety mode for displaying a black screen is executed, to thereby prevent the display from continuously executing the safety mode to consistently display the black screen.
US10522087B2	Display having gate driver bootstrapping circuitry with enhanced-efficiency A display may have gate driver circuitry that include a series of linked gate driver circuits each of which has an output and has an input coupled to the output of a preceding one of the gate driver circuits. Bootstrapping circuitry may be provided in the gate driver circuitry. Each gate driver circuit may have a bootstrapping circuit that includes transistors and a bootstrapping capacitor. Bootstrapping efficiency may be enhanced by configuring the bootstrapping capacitor to reduce parasitic capacitances. A transistor in each bootstrapping circuit may have first and second source-drain terminals, and a gate terminal that lies between the first and second source-drain terminals and that runs parallel to the first and second source-drain terminals. The bootstrapping capacitor may have a first electrode formed from the gate terminal and a second electrode that overlaps the first electrode and that lies between the first and second source-drain terminals.
US10522082B2	Organic light emitting display device and method for driving the same Disclosed is an OLED device which is capable of preventing a source voltage of a driving transistor so as to compensate for a deterioration of an organic light emitting diode from being out of a sensing voltage range of an analog-to-digital converter, and a method for driving the same, wherein a sensing timing is controlled in such a way that the source voltage of the driving transistor sensed for a sensing mode is included within the sensing voltage range. Accordingly, it is possible to prevent the source voltage of the driving transistor from being out of the sensing voltage range of the analog-to-digital converter.
US10522080B2	Display apparatus and driving method therefor In a data line drive/current measurement circuit, m measurement units are disposed in a plurality of semiconductor chips such that the m measurement units are distributed among the plurality of semiconductor chips. A display apparatus includes transistors such that one transistor is provided for two adjacent semiconductor chips. Inter-chip correction data indicating a variation among the semiconductor chips in terms of characteristics of elements in the measurement units is determined based on a result of a current measurement performed for the same transistor using measurement units disposed in different semiconductor chips. The inter-chip correction data is stored in a storage unit and is used in correcting an image signal. The inter-chip correction data may be determined based on a result of measuring a current flowing through a common cathode of organic EL elements for each semiconductor chip. Thus, a variation in the characteristic of the element among the semiconductor chips is compensated for and high image quality is achieved in displaying.
US10522079B2	Display panel, pixel driving circuit, and drving method thereof The present application provides a pixel driving circuit, which comprises a driving transistor, a first switch, a second switch, a third switch, a fourth switch, a first capacitor, a second capacitor, an initial-voltage-signal terminal, a data-voltage-signal terminal, and a driving-voltage-signal terminal. The driving transistor comprises a gate terminal, a source terminal, and a drain terminal. The first switch is disposed between the gate terminal and the drain terminal. The gate terminal is connected with the initial-voltage-signal terminal via the second switch. The source terminal is connected with the driving-voltage-signal terminal and the data-voltage-signal terminal via the third switch and the fourth switch, respectively. The first capacitor is connected between the gate terminal and a ground terminal. The second capacitor is connected between the gate terminal and the source terminal. The present application further provides a pixel driving method and a display panel.
US10522067B2	Apparatus and method for adjusting display characters of display device A display panel driver includes an image data generator, a brightness correction circuit performing a correction calculation on image data, a drive section driving the display panel in response to corrected image data; and a display timing generator outputting a timing control signal. The correction calculation by the brightness correction circuit is adjustable. When the display panel driver is placed into a test mode, the display timing generator is configured to output an internally-generated timing control signal and the image data generator outputs internally-generated evaluation image data. The evaluation image data are generated so that the evaluation images are switched from one to another in response to the internally-generated timing control signal.
US10522060B2	Cover window and display device using the same Disclosed are a cover window in which both a folding area and a non-folding area are formed using the same kind of material, thereby matching the indices of refraction thereof with each other, having the same heat resistance, and ensuring easy surface hard coating thereof, and a display device using the same. The cover window, having at least one folding area and a non-folding area, includes a hard portion located to correspond to the non-folding area, a soft portion located to correspond to the folding area, the soft portion being flexible, and a hard coating layer configured to cover the hard portion and the soft portion.
US10522058B2	Garment badge holder A garment generally includes a badge that can accessible from an interior of the garment and visible from an exterior of the garment. The garment includes a flap portion formed from a portion of the garment. The flap portion is folded over to form an edge that defines at least a portion of a hole formed in the garment. The garment also includes a generally transparent badge holder having a pocket operable to receive the badge. A fastener attaches the badge holder to the interior of the garment. The badge holder is attached to an interior surface of the garment so that the hole in the garment is disposed on a surface of the badge holder that is opposite the pocket.
US10522055B2	System for characterizing manual welding operations A system for characterizing manual welding exercises and providing valuable training to welders that includes components for generating, capturing, and processing data. The data generating component further includes a fixture, workpiece, at least one calibration devices each having at least two point markers integral therewith, and a welding tool. The data capturing component further includes an imaging system for capturing images of the point markers and the data processing component is operative to receive information from the data capturing component and perform various position and orientation calculations.
US10522051B2	Fire safety simulator The system has in one embodiment a representative structure having a predefined area having a plurality of changeable targets, each of the changeable targets having at least first and second positions. At least one aiming device has an activator for effecting a change of a selected changeable target between the first and second positions thereof when the activator is triggered while the aiming device is aimed at the selected changeable target. At least one signal device is activated by changes from respective first positions to respective second positions of at least some of the changeable targets.
US10522048B2	Community drone monitoring and information exchange A method may include receiving, using at least one processor, location information that includes a location of an unmanned aerial vehicle (UAV); querying, using the at least one processor, a policy database to retrieve a notification condition for a first property with respect to UAVs; calculating, using the at least one processor, a distance between the UAV and the first property using the received location information determining, using the at least one processor, if the distance of the UAV with respect to the first property is within a range defined in the notification condition for the first property; and transmitting, using the at least one processor, a notification to a party associated with the first property when the distance of the UAV with respect to the first property is within the range defined in the notification condition for the first property.
US10522034B2	Glare detection system and methods for automated vehicular control Aspects of the present disclosure describe systems, methods, and devices for automated vehicular control based on glare detected by an optical system of a vehicle. In some aspects, automated control includes controlling the operation of the vehicle itself, a vehicle subsystem, or a vehicle component based on a level of glare detected. According to some examples, controlling the operation of a vehicle includes instructing an automatically or manually operated vehicle to traverse a selected route based on levels of glare detected or expected along potentials routes to a destination. According to other examples, controlling operation of a vehicle subsystem or a vehicle component includes triggering automated responses by the subsystem or the component based on a level of glare detected or expected. In some additional aspects, glare data is shared between individual vehicles and with a remote data processing system for further analysis and action.
US10522027B1	Thermal management in smart doorbells Various smart doorbell arrangements are presented. Based on a measured temperature of the smart doorbell, operation of the smart doorbell device may be altered such that more heat or less heat is generated without affecting user-facing features. Based on another measured temperature, operation of the smart doorbell may be altered such that a chime that is electrically coupled to the smart doorbell device is not sounded in response to a doorbell actuation, but that a notification of the doorbell actuation is wirelessly transmitted by the smart doorbell device.
US10522026B2	Automation system user interface with three-dimensional display Systems and methods comprising a device including a processor coupled to a plurality of premises devices located at a premises. The device is configured to generate layout data comprising a layout of the premises including representations of premises devices on a floor plan configured to represent the premises. The layout data includes configuration data for each of the premises devices. The premises devices include at least one of a security device and a network device. The system includes a sensor user interface (SUI) application coupled to the device. The SUI application is remote to the device and configured to use the layout data to generate display elements comprising a three-dimensional (3D) representation of the floor plan and the premises devices. The floor plan layout visually and separately indicates a location and a state of the premises devices. The state includes current state and historical state.
US10522024B2	Safety device, system and method of use A safety device that is worn by a worker in a manufacturing facility is presented. The safety device includes a microprocessor, memory, an antenna and transceiver and a plurality of sensors that sense environmental conditions surrounding the worker such as light levels, noise levels, temperature, humidity, air quality and CO levels. The safety device also tracks the position of the worker and includes an accelerometer that detects trips and falls. The safety device also includes an event trigger which can be activated by the worker when a notable event or near miss occurs. The environmental information recorded by the safety device is used to both track accidents and near misses and is aggregated in a database for datamining purposes so as to predict future accidents and near misses. This information is also used to create correlations and better understand the root cause of accidents and near misses.
US10522020B2	Systems and methods for securing a tracking device to a monitored entity Systems and methods are discussed that are related to monitoring movement, and in particular to systems and methods for securing a monitoring device to a monitor target.
US10522019B1	Portable lighthouse assembly A portable lighthouse assembly for deterring intruders includes a lighthouse having a height less than 4.0 feet. A light emitter is rotatably positioned in the lighthouse to emit light outwardly therefrom. The light house is positionable in a yard to deter intruders when the light emitter is turned on. A motion sensor is coupled to the lighthouse to sense motion within a pre-determined perimeter of the lighthouse. The light emitter is turned on when the motion sensor senses motion. An alarm is coupled to the lighthouse to emit an audible alarm when the motion sensor senses motion. A camera is coupled to the lighthouse to capture images or video of an environment of the lighthouse. A microphone is coupled to the lighthouse to record audible sounds proximate the lighthouse.
US10522017B1	Remote trigger for security system Systems, methods, and techniques for mitigating retail theft include securing items at a receptacle of a retailer via an electronic lock, and providing a transceiver that is proximate to the secured items and that transmits a beacon which may be detected by a personal electronic device (PED) of a customer. Based on a wireless transmission between the PED and the transceiver, a customer's identity may be determined and the customer's risk profile may be accessed. A risk score corresponding to the customer accessing the secured item may be determined based on the customer's risk profile and optionally based upon a profile of the secured item. If the risk score is indicative of an acceptable risk, a trigger to remotely unlock the electronic lock may be sent, thereby remotely and automatically allowing qualified customers to access secured items. An item's removal may be detected and tracked.
US10522015B2	RFID-enhanced and location detection in a jewelry shopping experience Systems, methods and apparatus for in-store preview of jewelry items that comprise detecting that a RFID tag that is coupled to a jewelry item is within a threshold vicinity of a RFID reader. The information about the jewelry item is transmitting to an electronic device that is located proximately to the jewelry counter. Beacon technology is employed to communicate with a customer's mobile device. Pass application technology is employed to transmit records to and from a customer and local retailer.
US10522012B1	Verifying occupancy of a building A method for detecting occupancy of a building is described. In one embodiment, the method includes using a microphone to monitor for sounds at a building, detecting a sound via the microphone, and determining whether the sound is made by a human or made by an animal. In some cases, the microphone is a glass break sensor microphone.
US10522010B2	Method and apparatus for mobile cash transportation A device designed to validate and transport paper currency in a protected fashion. While being transported, the device monitors for tampering or break-in attempts and subsequently generates warning notifications, or sounds an alarm depending on configuration and the type of tampering detected. The transport case provides end-to-end cash accountability from a location where a bill is inserted into the case, to the bank or cash destination, where the transport case is delivered. Additionally, a docking station accessory is described in which the transport case can be securely fixed while at a point of sale.
US10522005B2	Software-based simulation of trigger symbol movement An embodiment may involve a software application executed on behalf of a client machine with a graphical display unit, the software application graphically displaying animations that simulate spinning a plurality of reels. A set of symbols may be selected, including first and second trigger symbols in a third position a fourth position, respectively, adjacent to one another. The embodiment may involve determining a third set of symbols identical to the second set of symbols except that: when the third and fourth positions are vertically adjacent on a particular reel, all symbols on the particular reel are wild, when the third and fourth positions are horizontally adjacent on a pair of adjacent reels, all symbols on the pair of adjacent reels are wild, (iii) when the third and fourth positions are diagonally adjacent to one another, a 2×2 grid of symbols are wild.
US10521981B2	Vehicle wash assessment One example aspect of the present disclosure relates to a method for scheduling a vehicle wash. The method can include receiving, at one or more computing devices, data indicative of an actual performance efficiency factor, wherein the data is collected from one or more sensors. The method can include determining, at the one or more computing devices, an expected performance efficiency factor based on a model. The method can include performing, at the one or more computing devices, a comparison of the actual performance efficiency factor with the expected performance efficiency factor. The method can include scheduling, at the one or more computing devices, the vehicle wash based on the comparison.
US10521975B2	Method and system for generating a service indicator There is disclosed a method of generating a service indicator for a tipper, the tipper comprising a tipper body pivotably moveable with respect to a frame with a hydraulic cylinder disposed therebetween and actuatable to pivot the tipper body to perform a tipping cycle. The method comprises monitoring at least one parameter relating to the movement of the tipper body with respect to the frame; identifying when a tipping cycle is performed based on the at least one monitored parameter; counting the number of tipping cycles performed; determining whether the number of tipping cycles performed has reached a service threshold; and generating a service indicator when it is determined that the service threshold has been reached.
US10521974B2	Method and apparatus for monitoring an autonomous vehicle An autonomic vehicle control system includes a vehicle spatial monitoring system including a plurality of spatial sensors disposed to monitor a spatial environment proximal to the autonomous vehicle. A controller is in communication with the spatial sensors of the vehicle spatial monitoring system, and the controller includes a processor and a memory device including an instruction set. Evaluating operation of the autonomous vehicle includes commanding operation of an actuator that is disposed to effect operation of the autonomous vehicle and simultaneously monitoring dynamic operation of the autonomous vehicle via a plurality of the spatial sensors. The commanded operation of the actuator is correlated with the dynamic operation of the autonomous vehicle, and a fault can be detected in the actuator based upon the correlation.
US10521972B2	Information terminal An information terminal which allows an increase in a manufacturing cost to be suppressed is disclosed. A ticket printer is held above a paper sheet processing device. A guide by which a ticket or the like ejected from a ticket ejection slot of the ticket printer is guided and an insertion slot of a paper sheet processing device are held in a state in which the guide and the insertion slot have a predetermined angle. A ticket or the like which is printed by the ticket printer is supplied from the ticket ejection slot of the ticket printer via the guide to an opening part of a bezel. On the other hand, a paper sheet which is inserted into the paper sheet processing device is supplied from the opening part of the bezel to the insertion slot of the paper sheet processing device.
US10521967B2	Digital content interaction and navigation in virtual and augmented reality Digital content interaction and navigation techniques and systems in virtual and augmented reality are described. In one example, techniques are employed to aid user interaction within a physical environment in which the user is disposed while viewing a virtual or augmented reality environment. In another example, techniques are described to support a world relative field of view and a fixed relative field of view. The world relative field of view is configured to follow motion of the user (e.g., movement of the user's head or mobile phone) within the environment to support navigation to different locations within the environment. The fixed relative field of view is configured to remain fixed during this navigation such that digital content disposed in this field of view remains at that relative location to a user's field of view.
US10521966B2	System and method for providing views of virtual content in an augmented reality environment A system configured for providing views of virtual content in an augmented reality environment may comprise one or more of a light source, an optical element, one or more physical processor, non-transitory electronic storage, and/or other components. The light source may be configured to emit light. The optical element being configured to reflect light emitted from the light source into one or more eyes of a user. The non-transitory electronic storage may be configured to store virtual content information defining virtual content. The virtual content may include one or more of an annular dock, one or more virtual objects, and/or other virtual content. The annular dock may comprise a set of sockets. The annular dock may be configured to simulate removable engagement of individual virtual objects to individual sockets. The light source may be controlled to generate views of the annular dock to be perceived as surrounding the user.
US10521963B1	Methods and systems for representing a pre-modeled object within virtual reality data An exemplary virtual reality system accesses first and second image datasets representative of first and second captured images depicting a real-world scene from first and second vantage points. The system recognizes a pre-modeled object within both the first and second captured images, and determines first and second confidence metrics representative of objective degrees to which the system accurately recognizes the pre-modeled object within the first and second captured images, respectively. The system further generates, a third image dataset representative of a rendered image based on the first and second image datasets. The rendered image includes a depiction of the pre-modeled object within the real-world scene from a third vantage point, and the generating comprises prioritizing, based on a determination that the second confidence metric is greater than the first confidence metric, the second image dataset over the first image dataset for the depiction of the pre-modeled object.
US10521962B1	Method and system for visualizing overlays in virtual environments Computer implemented methods and systems for populating overlays within a virtual environment. A server may obtain a virtual model of an overall region wherein the virtual model was generated based upon a plurality of images captured by a remote imaging vehicle. The server may then provide the virtual model to a user electronic device for rendering in a virtual environment. To support the rendering of the virtual environment, the server may identify properties and/or response vehicles located within the area modeled in the virtual environment and obtain one or more records that correspond to the modeled properties and/or response vehicles. The server may then populate an overlay for the properties and/or response vehicle with information included in the records.
US10521960B2	System and method for generating three-dimensional robotic inspection plan Provided are systems and methods for generating an autonomous 3D inspection plan for an unmanned robot. In an example, the method may include receiving a selection of a plurality of regions of interest with respect to a virtual asset displayed in virtual space, detecting a 3D position of the regions of interest within a coordinate frame of the virtual space, auto-generating a travel path about a physical asset corresponding to the virtual asset by generating a virtual 3D travel path with respect to the virtual asset based on the detected 3D positions of the selected regions of interest within the coordinate frame, aligning the virtual 3D travel path in the virtual space with a physical travel path in a physical space, and outputting a robotic inspection plan comprising the auto-generated physical travel path for the unmanned robot.
US10521955B2	Posture-guided method and device for combination modeling of cross-category three-dimensional models The disclosed provides a posture-guided cross-category method and device for combination modeling of cross-category 3D models, the method including: receiving a first posture model inputted by a user; calculating similarities between q first regions of the first posture model and q second regions of each of second posture models in a preset model database, respectively; where the model database includes a plurality of models partitioned into model components, and second posture models corresponding to the models; where the q first regions correspond to the q second regions one on one, where q is an integer greater than or equal to 2; selecting a corresponding plurality of model components of the q second regions of the second posture model according to the similarities; and combining the selected plurality of model components to generate a 3D model. The embodiment of the present application can combine cross-category models with large structural differences.
US10521951B2	3D digital painting A method of digital continuous and simultaneous three-dimensional painting and three-dimensional drawing with steps of providing a digital electronic display capable of presenting two pictures for a right eye and a left eye; providing means for creating a continuous 3D virtual canvas by digitally changing a value and sign of horizontal disparity between two images for the right eye and the left eye and their scaling on the digital electronic display corresponding to instant virtual distance between the user and an instant image within the virtual 3D canvas; providing at least one multi-axis input control device allowing digital painting or drawing on the digital electronic display; painting within virtual 3D canvas by providing simultaneous appearance of a similar stroke on the images for the right eye and the left eye on the digital electronic display.
US10521932B2	Digital paint generation based on digital paint properties Digital paint generation techniques and systems are described that are configured to bridge a perceived divide between functionality made available to users to create digital content and the users' understanding as to how this functionality is to be used. A variety of techniques and systems are described that support this expansion. In one example, interaction of color and physical digital paint properties with each other as part of generating digital paint is used to expand functionality of digital paint generation beyond conventional color selection techniques.
US10521931B2	Determine image capture position information based on a quasi-periodic pattern Examples disclosed herein relate to determining image capture position information based on a quasi-periodic pattern. For example, a processor may determine whether a target area is within a captured image based on the detection of a quasi-periodic pattern in a first detection area and in a second detection area of the captured image.
US10521930B1	Method and system for performing automatic camera calibration for a scanning system A system and method for performing automatic camera calibration is presented. The system communicates with a first camera and a second camera, wherein a transparent platform is disposed between the two cameras. When a 3D calibration pattern is disposed on the platform, the system receives a first set of calibration images from the first camera, and a second set of calibration images from the second camera. The system determines, based on the first set of calibration images, a first set of coordinates for corners of the polyhedron. The system further determines, based on the second set of calibration images, a second set of coordinates for the corners. The system determines, based on the coordinates, a spatial relationship between the first camera and the second camera. The system further uses a description of the spatial relationship to generate a 3D model of an object other than the 3D calibration pattern.
US10521917B2	Image processing apparatus and image processing method for object tracking Tracking a target object to be tracked included in a plurality of consecutively captured images is performed by an image processing apparatus. The image processing apparatus comprises an image acquisition unit and a tracking unit. The image tracking unit is configured to acquire an image. The tracking unit is configured to detect a target object to be tracked included in the image by matching and acquire over a plurality of the images an amount of movement of the target object to be tracked and a direction of the movement of the target object to be tracked. The tracking unit performs first matching by using a first template corresponding to the target object to be tracked, and performs second matching by using a second template, which is different in size or shape from the first template, in a case where a score of a result of the first matching is lower than a first threshold value.
US10521910B2	Colony contrast gathering An imaging system and method for microbial growth detection, counting or identification. One colony may be contrasted in an image that is not optimal for another type of colony. The system and method provides contrast from all available material through space (spatial differences), time (differences appearing over time for a given capture condition) and color space transformation using image input information over time to assess whether microbial growth has occurred for a given sample.
US10521897B2	Using photonic emission to develop electromagnetic emission models A method and apparatus related to developing electromagnetic emission and power models for a target device using photonic emissions thereof are provided. Data of photonic emissions of a target device during a first period of time with the target device in one or more modes is recorded. Data of electromagnetic emissions of the target device during the first period of time with the target device in the one or more modes is also recorded. The recorded data of the photonic emissions and the recorded data of the electromagnetic emissions are correlated to establish one or more electromagnetic emission models for the target device. The one or more electromagnetic emission models enable predictive analysis of emissions by the target device.
US10521895B2	Dynamic automatic focus tracking system The present invention provides a dynamic automatic focus tracking system, comprising an image capturing device for capturing an image of a workpiece in a target picture-taking region; a driving device for adjusting a spacing between the image capturing device and the workpiece; and a focal length adjustment module coupled to the image capturing device and the driving device to generate a control signal according to a figure feature and a predefined figure feature in the image of the workpiece and send the control signal to the driving device, thereby adjusting a position of the image capturing device with the driving device.
US10521894B2	Apparatus for presenting support images to a driver and method thereof An image recognition unit recognizes an object in each image captured by a plurality of imaging devices each imaging a partial overlapped imaging region surrounding a vehicle. An image synthesis unit generates a synthesized image by partially overlapping and joining converted images viewed from preset virtual viewpoints, when an imaging region including the recognized object is an overlapping region of which any one of two imaging devices performs imaging. The image synthesis unit synthesizes each converted image area in the overlapping image regions, using a preset blend ratio when an image of the converted images which are joined to partially overlap is generated. An image-setting unit sets the blend ratio of each converted image in the overlapping image regions for recognition results of an object, and a driving support image synthesized with the set blend ratio is output to a display apparatus.
US10521889B2	Enhanced vectorization of raster images Enhanced vectorization of raster images is described. An image vectorization module converts a raster image with bitmapped data to a vector image with vector elements based on mathematical formulas. In some embodiments, spatially-localized control of a vectorization operation is provided to a user. First, the user can adjust an intensity of a denoising operation differently at different areas of the raster image. Second, the user can adjust an automated segmentation by causing one segment to be split into two segments along a zone marked with an indicator tool, such as a brush. Third, the user can adjust an automated segmentation by causing two segments to be merged into a combined segment. The computation of the vector elements is based on the adjusted segmentation. In other embodiments, semantic information gleaned from the raster image is incorporated into the vector image to facilitate manipulation, such as joint selection of multiple vector elements.
US10521881B1	Error concealment for a head-mountable device In various implementations, a method includes obtaining a first frame that is characterized by a first resolution associated with a first memory allocation. In some implementations, the method includes down-converting the first frame from the first resolution to a second resolution that is lower than the first resolution initially defining the first frame in order to produce a reference frame. In some implementations, the second resolution is associated with a second memory allocation that is less than a target memory allocation derived from the first memory allocation. In some implementations, the method includes storing the reference frame in a non-transitory memory. In some implementations, the method includes obtaining a second frame that is characterized by the first resolution. In some implementations, the method includes performing an error correction operation on the second frame based on the reference frame stored in the non-transitory memory.
US10521869B2	Luggage management system Disclosed embodiments provide techniques for managing luggage within a premises such as an airport. A group identifier is established that includes multiple travelers. Each traveler in the group has one or more pieces of luggage that are being checked at a destination airport for a flight. When the travelers arrive, the luggage is reclaimed at the baggage claim area of the arrival airport. The group identifier is associated with each piece of luggage belonging to the group. Thus, any member of the group can properly remove luggage belonging to the group from the baggage area, thereby simplifying the airport exit procedure.
US10521864B1	Systems and methods for using tokenized icons to provide insurance policy quotes An insurance server for using a tokenized icon to provide an insurance quote or submit an insurance claim may include a processor programmed to receive an image from a user application, and data associated with the image, wherein at least a portion of the obtained data is associated as metadata with the tokenized icon. The processor may instruct the user application to use an icon associated with the tokenized icon as a first graphical object, and to modify, in response to an association of the first graphical object with a second graphical object in the user application, the metadata of the tokenized icon based upon data associated with the second graphical object. The processor may transmit the virtual quote or proposed insurance claim to the user application, the virtual quote or proposed insurance claim being based upon the modified metadata. As a result, the online customer experience may be enhanced.
US10521857B1	System and method for identity-based fraud detection A method for determining a likelihood of fraud associated with an input identity record is disclosed herein. The disclosed method contemplates determining characteristics of the input identity record by examining content of one or more fields of the input identity record. Historical identity records related to the input identity record may then be retrieved so as to define a set of linked identity records. The method further includes computing one or more network-based features of the set of linked identity records. A fraud score may then be generated based upon the characteristics of the input identity record and the one or more network-based features.
US10521846B2	Targeted advertisement selection for a wireless communication device (WCD) Systems, apparatus, and methods are disclosed for accurately identifying a mobile thing motion activity (MTMA; e.g., stationary, walking, running, biking, driving, etc.) associated with a mobile thing (MT) using sensor data from one or more sensors associated with a wireless communication device (WCD) transported by the MT, so as to enable targeted selection and communication of an advertisement that is suited for the identified MTMA. The one or more sensors produce sensor data indicative of physical movement of the WCD in three dimensional space and may include, for example, one or more of the following: an accelerometer, gyroscope, magnetometer, etc.
US10521843B2	Systems and methods for implementing electronic wardrobes A system or method is provided to implement electronic wardrobes for consumers. When a user makes a purchase, the system may determine whether the purchase includes wearable items, such as clothes or other wearable accessories. An electronic wardrobe may be created for the user to store the wearable items purchased by the user. The electronic wardrobe of the user may be broadcasted by the user's mobile device to other nearby consumers via Near Field Communication (NFC), such as low energy Bluetooth (BLE) communication. For example, if the user is wearing a shirt and a nearby consumer wishes to find out more about the shirt, the consumer may discover the user's electronic wardrobe via NFC to find information about the shirt, such as where the shirt was purchase, the make and model of the shirt, the price of the shirt, and the like.
US10521840B2	Virtual interactive marketplace The invention provides an interactive web based market place and a system for providing a web based market place. The web based market place includes a website. The market place is configured to: display products together with information regarding the respective products, which can be searched and viewed by a potential customer; monitor potential customer activity viewing a particular product; monitor online status of the seller of the particular product; provide the opportunity for the seller to initiate contact, via a portal, with the potential customer whilst the potential customer is viewing the seller's product on the web based market place by means of a live chat mechanism; and providing the means for the customer to interact live with the seller on the website.
US10521833B2	Method and system for determining level of influence in a social e-commerce environment A system and method for generating and publishing an indicator or score representative of influence, reliability, and/or trustworthiness of reviews and other forms of commentary is based upon actions of individuals over a communication network such as a social e-commerce environment.
US10521817B2	Augmented pre-paid cards, systems and methods Pre-paid transaction card systems and methods are described. A transaction system can include a transaction database to store transaction objects that represent characteristics of a pre-paid transaction card. A deal engine communicatively coupled with the transaction database can receive an image of a marker-less portion of the transaction card and derive a set of image descriptors from the marker-less portion. The deal engine can also identify transaction characteristics associated with the card from the transaction database using the image descriptors. In addition, the deal engine can construct a deal recommendation based on the transaction characteristics previously identified. The deal recommendation can be transmitted to a user, and in some cases, displayed to the user as an augmented reality image.
US10521801B2	Cyber life electronic networking and commerce operating exchange A cyber-life electronic commerce and system control device is disclosed having a three dimensional or other image of an area stored on a server. An operating exchange interfaces with the image to enable an individual to manipulate virtual control elements within the operating exchange. A visible light embedded communication system is used as the backbone to communicate commands from the operating exchange to a building operating system control item in order to alter the setting or status of a building operating system. The operating exchange may also be used by a consumer to virtually explore a cyber-retail location and to engage in commercial activities.
US10521799B1	System and method for creating automatic expiring transactions for a credit card A system and method are disclosed in which a user engaging in an online or in-person transaction with a merchant may create automatic expiring transactions for a credit card. The user provides the credit card information to an online interface or a point-of-sale device but specifies an expiration date that is on or before the actual expiration date of the credit card, known as an artificial expiration date. A token for the merchant is generated with the artificial expiration date. The issuing bank will honor the transaction with the artificial expiration date using the merchant-specific token, and the token may continue to be used with the online merchant until the artificial expiration date.
US10521795B2	Managing deferred account creation and software access The present disclosure is directed towards systems and methods for using a software as a service (“SaaS”) product. The systems and methods request, in response to receiving a request to purchase a software as a service product, a user identifier. Additionally, in response to receiving the user identifier, the systems and methods enable a completed purchase of the SaaS product with a provisional account associated with the user identifier. Furthermore, the systems and methods prevent use of the software as a service product through the provisional account and, in response to a completed purchase of the software as a service product, request a creation of a user credential. Upon receiving the user credential, the systems and methods convert the provisional account into a permanent account associated with the user identifier and user credential and enable use of the SaaS product through the permanent account.
US10521794B2	Authenticating remote transactions using a mobile device Embodiments of the invention can combine card not present transaction processing with PIN verification. A merchant or a consumer can initiate transactions using any suitable transaction initiation channel. One aspect of the invention helps facilitate payment card authentication across multiple wallet providers/merchants using an encrypted card PIN and a digital certificate. One aspect of the invention can incorporate the use of different transaction networks to perform authentication and authorization processing.
US10521792B2	Systems and methods for location based account integration and electronic authentication Systems and methods for an account integration system include establishing, by a service provider device, a first session with a service provider account associated with a user. After determining that a second session between a user device and the third party account of the user is active, a first validation is caused to access third party account information associated with the second session. The third party account information and the service provider account information are concurrently displayed by a display interface of the service provider device. A transaction request for a transaction associated with the service provider account and the third party account of the user is received. Information is sent to cause a second validation of the transaction request by a provider of the third party account. In response to the second validation of the transaction request, the requested transaction is processed.
US10521789B2	Payment system, electronic device and payment method thereof An electronic device for making a payment is provided. The electronic device includes a display configured to receive a user command, a transceiver configured to communicate with an external device, and a processor configured to request a token associated with a financial service from a payment server when a user requests the financial service and to generate data for providing the financial service by using the token and service information when the token and the service information associated with the financial service is received from the payment server.
US10521788B2	Method and system of capturing an image of a card A method and a system of capturing an image of a card having a magnetic stripe is provided. The method includes obtaining a first image by an imaging device of the card, obtaining a plurality of images of the card via color delta analysis, and obtaining a third image of the card by comparing the first and the plurality of images.
US10521786B2	Method of reducing fraud in on-line transactions The invention provides a method for verifying the identity of an internet user, or for detecting the misuse of an identity, during an on-line transaction. The method involves comparing the geographic location of the transaction to the geographic location of the user's cell phone or other mobile device, and taking a geographically close location relationship between the two as a positive indication of identity. Various additional factors are taken into account so as to reduce the incidence of false negatives, and to improve the reliability of positive identifications.
US10521785B1	Systems and devices controlled responsive to data bearing records A device (12, 312, 494) operates to cause financial transfers responsive to data read from data bearing records. The device includes a reader (20, 314) that is usable to read check data from financial checks. The reader is also usable to read record document data associated with goods provided to a purchaser. At least one circuit (54, 332) of the device is operative to cause a determination to be made that check data and/or record document data corresponds to stored data. Responsive to the determination, check data and record data are made available to a payee terminal (346).
US10521781B1	Wireless electronic check deposit scanning and cashing machine with webbased online account cash management computer application system Wireless Electronic Check Deposit Scanning and Cashing Machine (also known and referred to as WEDS) Web-based Online account cash Management computer application System (also known and referred to as OMS virtual/live teller)—collectively invented integrated as “WEDS.OMS” System. Method and Apparatus for Depositing and Cashing Ordinary paper and/or substitute checks and money orders online Wirelessly from home/office computer, laptop, Internet enabled mobile phone, pda (personal digital assistant) and/or any Internet enabled device. WEDS enables verification and transmittal of image, OMS is the navigation tool used to set commands and process requests, integrated with WEDS, working collectively as WEDS.OMS System.
US10521778B2	Systems and methods for allocating resources via information technology infrastructure A system to allocate resources via information technology infrastructure is described. A server includes processors to provide to a plurality of devices, an electronic benefits account transaction application programming interface (“API”) configured to receive transaction requests from a plurality of heterogeneous electronic funding sources. The server can receive a request to initiate a single transaction to fund an electronics benefit account. The server can transmit data in an alert format indicating a denial of the single request responsive to a comparison of a value to one or more threshold limits.
US10521777B2	Crypto digital currency (virtual payment cards) issued by central bank or other issuer for mobile and wearable devices Provided is a method for crypto digital currency transfers via a mobile and wearable device. The method may include receiving a transfer request with a transfer amount in crypto digital currency and user identification data associated with the user, retrieving payment data of the user associated with the identification data, generating an optical code encoding the payment data and the transfer amount. The method may continue with providing the optical code on a screen of the mobile and wearable device. On scanning of the optical code, a transfer receiving request is created. The method may continue with receiving the transfer receiving request to perform a payment transaction associated with the user, accessing a user account maintained by a currency issuance unit, and transferring the transfer amount in the crypto digital currency from the user account to a recipient account associated with the recipient identification data.
US10521776B2	UN currency (virtual payment cards) issued by central bank or other issuer for mobile and wearable devices Provided is a method for digital currency transfers via a mobile and wearable device. The method may include receiving a transfer request with a transfer amount in digital currency and user identification data associated with the user, retrieving payment data of the user associated with the identification data, generating an optical code encoding the payment data and the transfer amount. The method may continue with providing the optical code on a screen of the mobile and wearable device. On scanning of the optical code, a transfer receiving request is created. The method may continue with receiving a transfer receiving request to perform a payment transaction associated with the user, accessing a user account maintained by a currency issuance unit, and transferring the transfer amount in the digital currency from the user account to a recipient account associated with the recipient identification data.
US10521760B2	Automated collection points and method of operation A customer may collect a package from an automated collection point (ACP) operated by an entity having a central computer system, even when there is no functional communications link between the ACP and the central computer system. A first collection code is generated at the central computer system by means of an algorithm based on a data item particular to the package, such as a package identification code (package ID). The first collection code is sent to the customer who inputs it at the ACP, where it is validated independently using a corresponding algorithm based on a corresponding data item which is independently available to the ACP, preferably the same package ID which is carried by the package and scanned when the package is delivered.
US10521739B2	Method and system for displaying a condition status of a component of a linear asset system The invention provides a graphical user interface implemented on a computer including an information area for displaying to a user at the computer inspection status information in connection with one or more components of a linear asset infrastructure. The graphical user interface also includes a control component operable by the user at the computer to cause the graphical user interface to display additional information on the one or more components of the linear asset infrastructure.
US10521735B2	System for round trip engineering of decision metaphors A testing framework associated with a decision metaphor model tool reads table profile files to generate requests for a test of a decision metaphor. The testing framework sends the requests for the test to a decision engine and receives responses for the requests for comparison against expected values and possible errors. The testing framework also outputs an output file that includes a result of the test, where the output file is formatted in a computer-displayable and user-readable graphical format.
US10521730B1	Computing instance launch workflow A technology is described for determining a launch workflow for launching multiple computing instances on a physical host in a computing service environment using a predicted launch time. An example method may include receiving a launch plan to launch a plurality of computing instances on a physical host within a computing service environment. A first launch workflow and a second launch workflow may then be determined for the launch plan where the first launch workflow and the second launch workflow may specify different sequences of operations performed to launch the computing instance on the physical host. Predicted launch times for the first launch workflow and the second launch workflow may be obtained and the predicted launch times may be compared to determine a launch workflow used in executing the launch plan.
US10521728B2	Schema and method for deception detection A method for predicting subject trustworthiness includes using at least one classifier to predict truthfulness of subject responses to prompts during a local or remote interview, based on subject responses and response times, as well as interviewer impressions and response times, and, in embodiments, also biometric measurements of the interviewer. Data from the subject interview is normalized and analyzed relative to an experience database previously created using data obtained from test subjects. Classifier prediction algorithms incorporate assumptions that subject response times are indicators of truthfulness, that subjects will tend to be consistently truthful or deceitful, and that conscious and subconscious impressions of the interviewer are predictive of subject trustworthiness. Data regarding interviewer impressions can be derived from interviewer response times, interviewer questionnaire answers, and/or interviewer biometric data. Appropriate actions based on trustworthiness predictions can include denial of security clearance or further investigation relevant to the subject.
US10521726B2	Hybrid data architecture for use within a cognitive environment A method for receiving a plurality of types of data within a cognitive information processing system environment comprising: receiving data from a plurality of data sources, the plurality of data sources comprising a public data source and a private data source; accessing information from the plurality of data sources via a cognitive data management module; and, providing the information to an inference and learning system.
US10521725B2	Systems and methods for event prediction using schema networks A system for event prediction using schema networks includes a first antecedent entity state that represents a first entity at a first time; a first consequent entity state that represents the first entity at a second time; a second antecedent entity state that represents a second entity at the first time; and a first schema factor that couples the first and second antecedent entity states to the first consequent entity state; wherein the first schema factor is configured to predict the first consequent entity state from the first and second antecedent entity states.
US10521724B2	Numerical controller with swarf removal calculations Provided is a numerical controller that is capable of determining a proper timing of swarf discharge and allows an operator to change a swarf discharge method and examine appropriateness of the timing of the swarf discharge on an as needed basis, the numerical controller including a simulation unit that executes a simulation in which a workpiece is machined based on a machining program, a rendered workpiece volume calculation unit that calculates the volume of a rendered workpiece representing the shape of the workpiece rendered by the simulation, and a swarf accumulation amount prediction unit that predicts, based on the volume of the initial rendered workpiece when execution of the simulation is started and the volume of the rendered workpiece when execution of each block included in the machining program is completed, a swarf accumulation amount when the execution of the block is completed.
US10521721B2	Generating a solution for an optimization problem A method, system and computer program product for generating a solution to an optimization problem. A received structured set of data is analyzed with the prescriptive domains to identify one or more prescriptive domains that match the received structure set of data in data structure and/or semantic terms. A user selection of one of the presented possible prescriptive intentions from the intention templates in the identified one or more prescriptive domains that match the received structure set of data in data structure and/or semantic terms is received. A prescriptive model is then generated from the prescriptive domain containing the selected prescriptive intention. The prescriptive model is translated into a technical prescriptive model using a set of mapping rules. Furthermore, the technical prescriptive model is translated into an optimization model. The optimization model is solved and an output defining a solution from the solved optimization model is presented.
US10521714B2	Multi-compartment neurons with neural cores Embodiments of the invention provide a neural core circuit comprising a synaptic interconnect network including plural electronic synapses for interconnecting one or more source electronic neurons with one or more target electronic neurons. The interconnect network further includes multiple axon paths and multiple dendrite paths. Each synapse is at a cross-point junction of the interconnect network between a dendrite path and an axon path. The core circuit further comprises a routing module maintaining routing information. The routing module routes output from a source electronic neuron to one or more selected axon paths. Each synapse provides a configurable level of signal conduction from an axon path of a source electronic neuron to a dendrite path of a target electronic neuron.
US10521704B2	Method and apparatus for distributed edge learning A portable electronic device and method. The portable electronic device includes a first camera, a second camera, an electronic processor, and one or more sensors. The electronic processor is configured to detect, based on information obtained from the one or more sensors, an incident and select a camera responsive to the incident. The electronic processor is further configured to capture an image using the selected camera and determine, within the image, a subject of interest, wherein the subject of interest is at least one selected from the group consisting of a person, an object, and an entity. The electronic processor is also configured to initiate an edge learning process on the subject of interest to create a classifier for use in identifying the subject of interest and transmit the classifier to a second portable electronic device within a predetermined distance from the portable electronic device.
US10521698B2	Global visual vocabulary, systems and methods Systems and methods of generating a compact visual vocabulary are provided. Descriptor sets related to digital representations of objects are obtained, clustered and partitioned into cells of a descriptor space, and a representative descriptor and index are associated with each cell. Generated visual vocabularies could be stored in client-side devices and used to obtain content information related to objects of interest that are captured.
US10521696B2	Convolutional neural network system and operation method thereof An operation method of a convolutional neural network system includes executing convolution loops to determine a correlation between at least one kernel and an input feature map; determining a maximum position on the input feature map, the maximum position corresponding to a maximum value of an output feature produced based on the convolution loops; and processing first data of a first area of the input feature map through a convolution loop using the at least one kernel, the first area being associated with the maximum position. The processing of the first data includes skipping a convolution operation of second data of a second area of the input feature map, the second area being unassociated with the maximum position.
US10521689B2	Apparatus and method for detecting entities in an image An apparatus and a method are provided for detecting entities in a numerical image, wherein the apparatus includes a computing unit configured for detecting, based on a histogram vector determined on the basis of gradient and partitioning information, the presence of at least one of the entities in the image, a signaling unit in signal communication with the computing unit, and configured for being activated when the computing unit detects the presence of at least one of the entities in the image, memory containing partitioning information, and configured for allowing access to the partitioning information on the basis of the gradient information, wherein each piece of partitioning information identifies at least one of the partitioning elements that allow the computing unit to quantize the gradient information.
US10521682B1	Apparatus and method for controlling object detection The present disclosure relates to an apparatus and method for controlling object detection. The object detection control apparatus according to the present disclosure includes a determination device that determines a risk level, based on environmental information of a vehicle detected by first sensors, an object detection device that detects an object in the vehicle, based on information detected by a second sensor for detecting the object in the vehicle, an output device that outputs an alarm signal according to a set alarm condition when the object in the vehicle is detected, and a controller that controls an operation of the second sensor or the output device, based on the determined risk level.
US10521671B2	Methods and systems of spatiotemporal pattern recognition for video content development Providing enhanced video content includes processing at least one video feed through at least one spatiotemporal pattern recognition algorithm that uses machine learning to develop an understanding of a plurality of events and to determine at least one event type for each of the plurality of events. The event type includes an entry in a relationship library detailing a relationship between two visible features. Extracting and indexing a plurality of video cuts from the video feed is performed based on the at least one event type determined by the understanding that corresponds to an event in the plurality of events detectable in the video cuts. Lastly, automatically and under computer control, an enhanced video content data structure is generated using the extracted plurality of video cuts based on the indexing of the extracted plurality of video cuts.
US10521666B2	Computing device for enhancing communications A computing device for enhancing communications is disclosed. The computing device includes a memory configured to store data, a video camera configured to receive video input data, and a microphone configured to receive audio input data. The computing device also includes a processor that is configured to analyze the received video input data, the received audio input data, and the data stored in the memory. The computing device further includes a visual display device that is configured to output a visual display based on the processor analysis, and a speaker output device that is configured to output an audio signal based on the processor analysis.
US10521655B1	Generating and provisioning of additional content for biased portion(s) of a document Implementations described herein determine, for a given document generated by a given source, one or more portions of content (e.g., phrase(s), image(s), paragraph(s), etc.) of the given document that may be influenced by bias of the given source. Further, implementations determine one or more additional resources that are related to the given source and that are related to the portion(s) of content of the given document. Yet further, implementations utilize the additional resource(s) to determine additional content that provides context for the portion(s) that may be influenced by bias. A relationship, between the additional resource(s) and the portions of the given document, can be defined. Based on the relationship being defined, the additional content can be caused to be rendered at a client device in response to the client device accessing the given document.
US10521651B2	High definition camera and image recognition system for criminal identification A system for high definition (HD) image recognition of criminals is disclosed. The system includes a plurality of cameras, an image recognition server, investigator user devices, a computing device, a database, and a network. At least one processor of the image recognition server is configured to receive a plurality of photographs of a first individual, perform image processing of the plurality of photographs to extract a first set of physical features, store feature data regarding the first set of physical features in the database, receive suspect data regarding a suspected individual from a first investigator user device, match the suspect data with the feature data stored in the database, and transmit an alert to the computing device in the prison, wherein the alert activates a mobile application on each investigator user device to display match data identifying the suspected individual as the first individual based on the feature data.
US10521648B2	Body information analysis apparatus and method of auxiliary comparison of eyebrow shapes thereof A body information analysis apparatus (1) and a method of auxiliary comparison of eyebrow shapes thereof are provided. The method includes following steps of: capturing a face image (51-53); recognizing an eyebrow image (71-76) in the face image (51-53); generating a mirror eyebrow shape pattern (71′,73′) according to the eyebrow image (71-76); calculating a projection position of the mirror eyebrow shape pattern (71′,73′) based on a symmetrical auxiliary line (81,82) and a position of the eyebrow image (71-76); and, displaying the face image (51-53) and the mirror eyebrow shape pattern (71′,73′) at the projection position. Therefore, by displaying the eyebrow image (71-76) of the user and the suggested mirror eyebrow pattern (71′,73′) simultaneously, the user can do the eyebrow-shaping intuitively and accurately, and the technical threshold of eyebrow-shaping can be reduced significantly, and a probability of shaping eyebrows successfully can be increased as well.
US10521647B2	Body information analysis apparatus capable of indicating shading-areas A body information analysis apparatus capable of indicating shading-areas includes: an image capturing module (12) for capturing an external image; a processor (10) electrically connected to the imager capturing module (12), stored multiple face types and multiple indicating processes respectively corresponding to each of the face types, wherein the processor (10) determines a face type of a face when the face is recognized in the external image, and executes one of the multiple indicating processes corresponding to the determined face type, so as to indicate shading-areas on the face; and, a display module (111) electrically connected to the processor (10), for displaying the indicated shading-areas and the image of the face simultaneously.
US10521638B2	Fingerprint identification system The present invention provides a fingerprint identification system includes a charge pump circuit configured to generate a supply voltage, wherein the charge pump circuit receives a first clock signal; a pixel circuit, forming a touch capacitance, determining whether the pixel circuit is corresponding to a finger valley or a finger ridge according to the touch capacitance, wherein the pixel circuit receives a second clock signal and the supply voltage; and a clock generating circuit, configured to generate the first clock signal and the second clock signal; wherein the first clock signal is related to the second clock signal.
US10521624B2	Object device including an IC chip An information processing system, method for use with the system, information providing system, and method for use with the system, an information processing apparatus, method for use with the apparatus, a doll, an object, a program storage medium, and a program for authenticating users reliably are provided. A user acquires beforehand a doll called Pochara the Good Friend incorporating an IC chip that stores a user ID for authenticating the user. When the user mounts the doll on a platform connected to a personal computer, the user ID is read from the IC chip by a reader housed in the platform and transmitted over the Internet to a Pochara service server. The server has a Pochara database holding personal information about users of the service. The transmitted user ID is checked against the personal information in the database for authentication. This invention applies advantageously to servers offering services through networks.
US10521619B2	Method and RFID reader for obtaining a backscatter modulated receive signal The disclosed subject matter relates to a method for obtaining a backscatter modulated receive signal in an radio-frequency identification (RFID) system, comprising the steps: providing a carrier wave by a local oscillator; generating a transmit signal based on the carrier wave and an input signal; transmitting said transmit signal; receiving a backscatter modulated receive signal; and combining the receive signal with a cancel signal; wherein the method further comprises the step of determining a phase shift and an amplitude adjust from the corrected receive signal; wherein the determined phase shift is applied as a phase rotation when generating the transmit signal; and wherein the cancel signal is based on the un-shifted carrier wave and the determined amplitude adjust. The disclosed subject matter further relates to an RFID reader configured to perform said method.
US10521610B1	Delivering secure content in an unsecure environment The example embodiments are directed to an application and a system capable of identifying levels of secure data within electronic message content. In one example, the method includes at least one of: receiving an electronic message from a user device, the electronic message including message content and at least one recipient, determining that the message content includes a plurality of different levels of secure content corresponding to a plurality of different authentication levels, shielding each portion of the secure content, and providing an indicator indicating a level of authentication associated with each respective shielded portion of secure content from among the plurality of different levels of authentication, and transmitting the electronic message to the at least one recipient including the shielded secure content and the indications of the plurality of different levels of authentication.
US10521608B2	Automated secure identification of personal information A device may obtain information included in a corpus of documents relating to an organization. The device may identify a set of values indicating personal information for one or more individuals by using a set of natural language processing (NLP) techniques to analyze the information included in the corpus. The device may determine a set of relationships between one or more values, of the set of values indicating the personal information using one or more additional NLP techniques and/or one or more rules. The device may generate a set of user profiles for the one or more individuals based on the set of relationships between the one or more values indicating the personal information. The device may perform one or more actions associated with using the set of user profiles to service a request for information.
US10521601B2	System and method for data governance A system for determining information about a resource. The system includes a profiler to generate a targeted subset of users for at least one selected resource according to at least one of: a pre-defined goal and usage statistics of the resource with respect to the goal; an addresser to request from the subset of users information regarding the goal and a collector to collect and analyze the information and to update attributes of the resource according to the information.
US10521600B2	Reconfigurable system-on-chip security architecture Aspects of system-on-chip (SoC) security architecture that supports systematic and efficient implementation, validation, and in-field upgrade of security policies are described. In one example, an apparatus can include at least one intellectual property (IP) core, a centralized reconfigurable security policy engine (RSPE) and at least one security wrapper. The RSPE implements actionable constraint based on a security policy and at least one event frame. A security wrapper is associated with an IP core. The security wrapper is configured to communicate an event frame to the RSPE in response to an event.
US10521587B1	Detecting code obfuscation using recurrent neural networks A method includes generating an index representation of characters of code of a given file and mapping the index representation to a vector space providing contextual representation of the characters utilizing an embedding layer of a recurrent neural network (RNN). The method also includes identifying one or more code features in the mapped index representation utilizing at least one hidden layer of the RNN, detecting sequences of the identified code features in the mapped index representation utilizing a plurality of memory units of a recurrent layer of the RNN, and generating a classification result for the given file based on the detected sequences of code features utilizing one or more classification layers of the RNN. The method further comprises utilizing the classification result to determine if the given file contains code of a designated code type, and modifying access by a given client device to the given file responsive to the determination.
US10521581B1	Web client authentication and authorization Systems, methods, and apparatus for authenticating and authorizing clients. A client certificate is used to authenticate and authorize a client (or user). When the client certificate is received, the certificate is authenticated. If the certificate is valid, a username included in the certificate is used to authorize the client. This may be done based on privileges or permissions associated with the user name. Once the client or user is authenticated and authorized, operations requested by the client can be performed as long as permitted by the privileges or permissions.
US10521576B2	Electronic device and working mode selecting method thereof A method for an electronic device to restrict functionality according to working mode is provided. The method establishes a fingerprint database, wherein the fingerprint database stores at least one fingerprint of each authorized user for unlocking the electronic device, a finger type corresponding to each fingerprint stored in the fingerprint database, and a preset finger area corresponding to each finger type stored in the fingerprint database. A fingerprint of a user is obtained through a sensor. The fingerprint is matched against database for authorized status and size of fingerprint currently obtained is also analyzed and compared to a preset size of the type corresponding to the obtained fingerprint. The electronic device is unlocked for an authorized user and controlled to enter into an unrestricted working mode for an adult or into a restricted working mode for a child, according to the comparison.
US10521575B2	Authentication method and electronic device using the same An electronic device and an operating method thereof are provided. The electronic device includes a first processor, a second processor, a display, and a first sensor. The first processor receives an input through the first sensor while the display is in a deactivated state, and transmits the input to the second processor, when biometric data is detected in the input, and the second processor authenticates the biometric data included in the input, and activates the display if the authentication succeeds.
US10521572B2	Systems and methods for improving KBA identity authentication questions Certain implementations include systems and methods for improving knowledge-based-authentication (KBA) identity authentication questions. A method is provided that includes receiving a set of identity information associated with a subject; querying one or more databases; receiving personally identifiable information; determining, from the personally identifiable information, at least one subject characteristic; producing, with a predictive model and based on the personally identifiable information and on the at least one subject characteristic, at least one knowledge based authentication (KBA) identity proofing question having a personally identifiable correct answer; sending, for display on a first computing device associated with the subject, the at least one KBA identity proofing question; receiving, responsive to the sending, a response answer; and responsive to a match between the response answer and the personally identifiable correct answer, sending, for display on the first computing device associated with the subject, a first indication of authentication.
US10521571B2	Secure storage devices, with physical input device, for secure configuration in a configuration-ready mode A secure storage device includes a physical key input device, a secure memory and a controller. The controller arbitrates access by a host to securely configure the device based on the device's mode of operation. The controller determines whether the device is in a configuration-ready mode based on information within the device. Only when the device is in the configuration-ready mode, the device may be configured by the host. When a device is in a non-configuration-ready mode, the device is prevented from being configured by the host, but the device can be set to the configuration-ready mode, for example, by nullifying configuration data (e.g., PINs), by creating new encryption key(s), and by setting the mode to the configuration-ready mode. A null PIN is unusable to unlock the device after being locked. A new encryption key is unusable to decrypt data previously stored in the device, making such data unrecoverable.
US10521570B2	System and method for cursor-based application management A system and method of managing applications and event notifications using a cursor-based GUI, wherein the cursor-based GUI is located adjacent to the cursor and provides a user with the ability manage and monitor a plurality of dynamically updated applications, commands and event notifications via a persistent and centralized interface. Since the cursor-based GUI is persistent in nature, the plurality of applications, commands and event notifications can be accessed regardless of the user's computer environment. The user can manage user authentication requirements and other configuration information for the cursor-based GUI.
US10521566B2	Method and apparatus of DRM systems for protecting enterprise confidentiality One aspect of the present invention discloses a client device for content security. The device includes: an application execution unit configured to control content in response to a content control command requested in a user level; a DRM agent configured to communicate with a DRM server and the application execution unit in the user level, to detect the content control command, to receive an encryption/decryption key and security policy for content from the DRM server, to provide the received encryption/decryption key and security policy to a client kernel module, and to transmit an encryption/decryption request; and the client kernel module configured to receive the encryption/decryption key and the security policy, to store the encryption/decryption key and security policy in a secure box of a kernel level, and to perform encryption or decryption on the content based on the encryption/decryption key and security policy in response to the encryption/decryption request.
US10521564B2	Operating a device for forwarding protected content to a client unit The invention relates to a method of operating a device for forwarding protected content to a client unit, the device comprising at least one decryption module for decrypting protected content received in the device and at least one re-encryption module for re-encrypting the content to generate re-encrypted content to be sent to the client unit. The method comprises the steps of: (i) the decryption module authenticates the re-encryption module using authentication data transmitted from the re-encryption module to the decryption module, and (ii) the decryption module forwards decrypted content to the re-encryption module upon having successfully authenticated the re-encryption module. Moreover, the invention relates to a corresponding device.
US10521560B2	Method and system for remote medication management, audit and compliance system A remote medication management system for monitoring remote access to medication interfaced with a medication dispensing apparatus includes: a container database configured to store container records related to physical containers stored in the medication dispensing apparatus, each including inventory data entries related to medication stored therein, each inventory data entry including a medication identifier; an input device configured to receive a specific medication identifier; a detection module configured to detect access to a specific physical container stored in the medication dispensing apparatus; a querying module configured to identify a specific container record related to the accessed specific physical container; a determination module configured to determine that the specific medication identifier is not included in any of the inventory data entries included in the identified specific container record; and a memory configured to store a data entry in an event log related to the access to the specific physical container.
US10521558B2	Systems and methods for delivering remedy frequencies A method of providing a remedy is described. The method includes: (i) receiving, from a client device, answers to one or more of sets of questions that are relevant to one or more ailments and/or one or more unique expressions of the ailments; (ii) grading the answers using one or more remedy appropriateness values to produce graded answers, and wherein an remedy appropriateness value quantifies clinical importance of a remedy with respect to a question that is answered; (iii) scoring one or more remedies based on the graded answers to arrive at one or more remedy scores and identifying one or more top remedies that have high remedy scores; (iv) choosing, from a library of frequency files, one or more frequency files that correspond to one or more of the top remedies; and (v) presenting the frequency file as a remedy to the client device.
US10521556B2	Cloud-based clinical distribution systems and methods of use Example systems and methods for cloud-based clinical content distribution and/or messaging are disclosed and described herein. An example apparatus includes an edge device to mediate between a local information system associated with a local cloud system and a remote cloud system. The example edge device analyzes the healthcare information by matching the healthcare information to a first characteristic or a second characteristic. When the healthcare information matches the first characteristic, the edge device uploads the healthcare information to the remote cloud system and allocates a first computing task to the remote cloud system for the healthcare information. When the healthcare information matches the second characteristic, the edge device stores the healthcare information at the local cloud system and allocates a second computing task to the local cloud system for the healthcare information.
US10521552B2	Method and computing device for implementing multiple matching strategies A method, computer system and computer program product are provided to associate a record of a person and pre-existing records utilizing multiple matching strategies. The implementation of a plurality of matching strategies includes identifying link(s) between the record of the person and pre-existing records based upon an analysis pursuant to the respective matching strategy of demographic attributes of the person and respective individuals associated with the pre-existing records. The implementation of the plurality of matching strategies also includes associating the record of the person and a set of pre-existing records based upon the respective matching strategy. A relationship is then defined between the person and respective individuals associated with one or more sets of pre-existing records as defined by at least one of the plurality of matching strategies.
US10521545B2	Placement constraint method for multiple patterning of cell-based chip design A method for outputting a first number of subsets of a layer pattern comprising a plurality of cells arranged in a row includes selecting subsets of cells from the plurality of cells, constructing a graph representation for each subset of cells, identifying graph representations that are not colorable with a first number of labels, identifying subsets of cells that correspond to the identified graph representations, changing a distance between cells in each of the identified subset of cells, wherein the changed distances are greater than the first spacing, labeling the graph representations with the first number of labels, and outputting subsets of the layer pattern to a machine readable storage medium for manufacturing a set of masks that is used to form a single, patterned layer. Each subset of the layer pattern represents a separate mask pattern and includes features of the layer pattern corresponding to a label in the labeled graph representations.
US10521542B2	Computer-readable recording medium storing electrical design support program, electrical design support method, and information processing apparatus A non-transitory, computer-readable recording medium having stored therein a program for causing a computer to execute a process including: parts to be placed on a periphery of a printed-circuit board are placed in a first state, extracting first information for indicating an electrical-connection relationship between the printed-circuit board and the parts based on shape information for indicating shapes of the parts, placement information for indicating placement positions of the parts, and material information for indicating materials of the parts; when the parts are placed in a second state different from the first state, extracting second information for indicating an electrical-connection relationship between the printed-circuit board and the parts based on the shape information, placement information for indicating placement positions of the parts, and material information for indicating materials of the parts; extracting parts of the parts having a different electrical-connection relationship between the first information and the second information; and outputting a display signal to highlight the extracted parts.
US10521539B2	Optimization of integrated circuit mask design A method, a non-transitory computer-readable medium, and an apparatus for optimizing a design layout of an integrated circuit (IC) includes: selecting layout regions from a full-chip design layout for the IC; determining pixel images for the layout regions by performing pixel-based mask optimization for the layout regions, in which each pixel image corresponds to a respective layout region; determining a backpropagation (BP) artificial neural network (ANN) model using the pixel images and the layout regions; and determining a full-chip pixel image for the full-chip design layout using the BP ANN model, in which the BP ANN model uses the full-chip design layout as input.
US10521536B2	RTL verification using computational complexity-based property ranking and scheduling A method or apparatus comprising a verification system using a processor to utilize a first set of verification engines to solve easy properties of an integrated circuit design, such as RTL, running a machine-learning algorithm for a hardness ranking analysis on a plurality of properties based on data from the first set of verification engines, and ranking the plurality of properties by a hardness of verification. The method or apparatus further to order the plurality of properties based on the hardness of verification.
US10521534B2	Simulation circuit apparatus and method for simulating electrical load for use in testing power control device A simulation device for simulating a peripheral circuit arrangement that can be connected to a control device, wherein the simulation device can be electrically connected to the control device, and the simulation device has a first control element for influencing a first simulation current that can be passed from a first load terminal of the control device to a first control element output of the first control element. The first control element contains a first multistage converter that includes a first converter output, which is electrically connected to a terminal on the converter side of a first inductive component at whose terminal on the control device side the first control element output is implemented. A direction of flow of the first simulation current is reversible, and the simulation device also includes a computing unit for execution of model code.
US10521529B2	Simulation method for mixed-signal circuit system and related electronic device A simulation method for a mixed-signal circuit system includes: detecting a plurality of registers and a clock signal included in the mixed-signal circuit system; performing a timing analysis converting operation upon a circuit block coupled between any two register of the plurality of registers to obtain a converted circuit system; and performing a Static Timing Analysis operation upon the converted circuit system; wherein when the circuit block is convertible into a combinational circuit block, the timing analysis converting operation includes: converting the circuit block to the combinational circuit block, wherein the combinational circuit block is logic gate-level.
US10521520B2	Highly scalable cluster engine for hosting simulations of objects interacting within a space A highly scalable cluster of computing nodes simulates large numbers of objects interacting in a space defined by an octree of cubical elements. Each cube of the octree is enclosed within a corresponding padding sphere. Interacting objects are quickly identified by determining which of the padding spheres are candidate spheres that satisfy an interaction criterion, considering candidate objects located in the cubes that correspond to the candidate spheres, and determining which of the candidate objects meet the interaction criterion. The computing workload can be efficiently parallelized among nodes of the cluster by assigning the objects to the nodes in approximately equal numbers, each node being responsible for managing the objects assigned thereto. Inter-node data traffic can be minimized by reassigning frequently interacting objects to the same node. The cluster can be scaled simply by adding more nodes to the cluster, and redistributing the objects equally among the nodes.
US10521516B2	Criterion for sequential update A method for designing a 3D modeled object can implement a modeling graph having nodes that represent geometrical objects and arcs that each represent a relationship, wherein procedural relationships are represented by unidirectional arcs, wherein the relationships linking the geometrical objects further include live relationships that are represented by bidirectional arcs, and wherein the provided modeling graph respects a criterion that all the arcs of each strong component of the modeling graph are bidirectional. Upon adding a relationship linking two of the geometrical objects that are included in the data defining the 3D modeled object before the addition, the method selects two geometrical objects to be linked by the relationship to be added, the selection being performed according to the criterion.
US10521513B2	Language generation from flow diagrams A computer-implemented method for language generation of a flow diagram, which receives a flow diagram. A plurality of geometric shapes within the flow diagram is identified. A plurality of text elements within the flow diagram is identified. The plurality of text elements and corresponding geometric shapes are associated. The association between the plurality of geometric shapes are identified. A diagram matrix based on the associations between the plurality of geometric shapes is generated. A linear language representation of the diagram matrix is generated.
US10521501B2	Apparatus and method for editing table in terminal An apparatus and a method for editing a table in a terminal which can edit a table intuitively and easily are provided. The apparatus includes a display unit that simultaneously displays a row number adjusting UI and a column number adjusting UI in a table editing mode, and a controller that performs a control so that a plurality of handlers are displayed on the table when the table displayed in a specific application is selected, a conversion to the table editing mode is performed when a specific handler among the plurality of handlers is selected, and respective UIs that can adjust the number of rows and the number of columns of the table in the table editing mode are simultaneously displayed.
US10521500B2	Image processing device and image processing method for creating a PDF file including stroke data in a text format An image processing device includes a handwriting renderer, an image renderer, an external image renderer, a serializer, a creator, a recognizer, and a concatenation unit. The handwriting renderer is configured to render a stroke on a first layer. The image renderer is configured to render an image on a second layer lower than the first layer. The external image renderer is configured to render an external image on a third layer lower than the second layer. The serializer is configured to convert the stroke rendered on the first layer and the images rendered on the second and third layers into text data. The creator is configured to create document data corresponding to one page based on the text data. The recognizer is configured to acquire a character string from the stroke. The concatenation unit is configured to concatenate adjacent characters on the string with an unnecessary space therebetween being deleted.
US10521499B2	Method and device for editing data Embodiments of the invention provide a method and a device for editing data. According to at least one embodiment, the method includes the steps of receiving a document launch instruction issued by a user, and reading a preset set of files according to the received document launch instruction. The preset set of files includes an inventory file and a HTML data file, wherein the inventory file is used to describe a launch identification of a user interface to which the HTML data file corresponds, and the HTML data file includes identification information of data to be edited. The method further includes displaying on a user interface the launch identification of the user interface to which the HTML data file corresponds according to the inventory file, receiving an operation of the user for triggering the launch identification, and displaying the user interface to which the HTML data file corresponds. The user interface includes an operation identification of the data to be edited. Further, the method includes receiving an operation of the user for triggering the operation identification, calling a preset editing interface, loading the data to be edited according to the identification information of the data to be edited, and presenting to the user an editing user interface for the data to be edited.
US10521497B2	Maintaining semantic information in document conversion The present disclosure is directed toward systems and methods for maintaining semantic information in a document from a web page. For example, one or more embodiments described herein encode unique colors into an HTML DOM associated with a web page prior to passing the HTML DOM through an existing rendering engine. In response to receiving a color-coded graphical objects representative of the HTML DOM, systems and method described herein apply the original semantic attributes of the web page into the graphical objects based on the unique color encoding.
US10521494B2	Content to layout template mapping and transformation Content can be displayed in different manners on different devices (e.g., having different display sizes) using different layout templates. The techniques discussed herein automatically select a layout template for the content for a particular display device, and transform the content to that layout template for display. Generally, the content is categorized into multiple different categories, and the layout template is also categorized into the same categories. For each of the categories, a mapping of part of the content to a layout element of the layout template is selected. A content display for the layout template is generated by porting (and possibly transforming) the parts of the content into the mapped-to element (as indicated by the selected edges) of the layout. In one or more embodiments, the content display can then be displayed or communicated to another device for display.
US10521488B1	Dynamic partitioning A matrix computation unit includes a systolic array of cells arranged along a first and second dimension, in which the systolic array of cells includes a first multiple of cells, each cell of the first multiple of cells including: a weight register configured to store a weight input; multiple activation registers, each activation register of the multiple activation registers configured to store a corresponding activation input; multiplexer circuitry communicatively coupled to the multiple activation registers and configured to select, from the multiple activation registers, one of the activation inputs as a selected activation input; and multiplication circuitry communicatively coupled to the weight register and to the multiplexer, in which the multiplication circuitry is configured to output a product of the weight input and the selected activation input.
US10521486B2	Method and apparatus for using proxies to interact with webpage analytics An overlay may be displayed over a webpage for displaying different analytics, such as displayed with heatmaps. The webpage is parsed to identify webpage objects. Proxy objects are generated for the identified webpage objects and displayed on Z-index layers above the overlay. The proxy objects are configured to detect and react to events on behalf of associated webpage objects. A mobile device proxy server may send mobile device requests on behalf of a desktop computing device and modify received webpages so the desktop computing device renders the webpages in substantially a same manner as a mobile device.
US10521480B2	Informative communication history An approach for retrieving and storing telephone numbers along with related contextual information associated with inbound/outbound communications to/from a device. The approach includes a method that includes combining, by at least one processing device, identification information of an entity and a related communication mechanism used to initiate a communication to a device. The method further includes providing, by the at least one processing device, a soft record that includes the identification information and the related communication mechanism.
US10521475B2	Travel-related cognitive profiles A method, system and computer-usable medium for performing cognitive computing operations comprising receiving streams of data from a plurality of data sources; processing the streams of data from the plurality of data sources, the processing the streams of data from the plurality of data sources performing data enriching for incorporation into a cognitive graph; defining a travel-related cognitive persona within the cognitive graph, the travel-related cognitive persona corresponding to an archetype user model, the travel-related cognitive persona comprising a set of nodes in the cognitive graph; associating a user with the travel-related cognitive persona; defining a travel-related cognitive profile within the cognitive graph, the travel-related cognitive profile comprising an instance of the travel-related cognitive persona that references personal data associated with the user; associating the user with the travel-related cognitive profile; and, performing a cognitive computing operation based upon the travel-related cognitive profile associated with the user.
US10521466B2	Data driven natural language event detection and classification Systems and processes for operating a digital assistant are provided. In accordance with one or more examples, a method includes, at a user device with one or more processors and memory, receiving unstructured natural language information from at least one user. The method also includes, in response to receiving the unstructured natural language information, determining whether event information is present in the unstructured natural language information. The method further includes, in accordance with a determination that event information is present within the unstructured natural language information, determining whether an agreement on an event is present in the unstructured natural language information. The method further includes, in accordance with a determination that an agreement on an event is present, determining an event type of the event and providing an event description based on the event type.
US10521460B2	Filtering data lineage diagrams Managing lineage information includes processing a specification of a directed graph to associate nodes with information for processing requests for a representation of data lineage. The processing includes: identifying a first set of one or more nodes of the directed graph corresponding to normalizing data elements being stored in a data store and de-normalizing data elements being retrieved from the data store; and associating a first plurality of nodes connected to the first set of one or more nodes and a second plurality of nodes connected to the first set of one or more nodes with at least one tag identifier having a plurality of possible tag values, where the number of possible tag values is at least as large as the number of data elements being normalized, and where nodes representing different data elements in a de-normalized record are associated with different values of the tag identifier.
US10521459B2	Filtering data lineage diagrams Managing lineage information includes processing a request for a representation of data lineage for a first node of a number of nodes. The processing includes determining an association between the first node and at least a first tag identifier of a number of tag identifiers, and determining a first subset of at least one and fewer than all of a number of possible tag values for the first tag identifier, and traversing nodes along a first lineage path of directed links from the first node to determine a data lineage for the first node. Determining the data lineage includes, for each traversed node determining whether to add the traversed node to the data lineage or to exclude the traversed node from the data lineage based at least in part on any tag identifiers or tag values associated with the traversed node.
US10521453B1	Selective DNS synchronization Systems and methods described herein provide selective synchronization of DNS records. A synchronization data store is synchronized by: obtaining a complete set of domain name system (DNS) records for a first data center; and copying the complete set of DNS records to the synchronization data store. After the synchronization data store is initialized, at a particular time interval, a snapshot of the complete set of DNS records is repeatedly collected. Differences between the copied complete set of DNS records of the synchronization data store and the snapshot of the complete set of DNS records are identified. The synchronization data store is updated with the differences and a determination is made as to whether the differences should be implemented at a second data center. When the differences should be implemented at the second data center, the differences are propagated to the second data center, otherwise they are not.
US10521447B2	Container application execution using image metadata An example system and method includes a processor to receive an image ID corresponding to a container image of a container to be run. The processor is to also send the image ID to a registry. The processor is also to receive an image metadata corresponding to the image ID from the registry. The processor is to store the image metadata on a local file system. The processor is to generate a container comprising an application. The processor is to execute the application using the image metadata.
US10521444B2	Data retrieval based on field size Example embodiments for accessing data are described. In an example embodiment, a request is received for a data record including multiple data fields. Based on location information for each field from a metadata file, each field of a first portion of the multiple fields is retrieved from a local data store, with each of the fields of the first portion having a corresponding size less than a threshold size. Each retrieved field of the first portion may be presented to a user, along with a field indicator for at least one field of a second portion of the multiple fields, with each of the fields of the second portion having a corresponding size at least as large as the threshold size. In response to a selection of the field indicator, at least one field of the second portion may be retrieved and presented to the user.
US10521440B2	High performance data profiler for big data A method for profiling a dataset includes: querying, by a data profiler executed on a distributed computing system, a metadata storage to obtain table information; allocating, by the data profiler, system resources based on the obtained table information; profiling, by the data profiler, the dataset to obtain profiling results, wherein profiling the dataset includes shuffling and repartitioning data blocks of the dataset with respect to a plurality of nodes of the distributed computing system, and computing aggregates based on the shuffled and repartitioned data blocks; and outputting, by the data profiler, the profiling results.
US10521429B2	Interactive graphical system for estimating body measurements Utilizing graphical elements representing human bodies to estimate physical measurements of a user is described. In at least one example, a service provider can access a database storing a plurality of data items. The service provider can cause a set of data items of the plurality of data items to be presented to the user. Data items in the set of data items are associated with at least one graphical element representing a human body with individual magnitudes corresponding to individual dimensions of a plurality of dimensions. The service provider can receive data indicating a selection of a data item associated with a first magnitude associated with a first dimension and a second magnitude associated with a second dimension. The service provider can estimate physical measurements associated with the user based partly on a first magnitude and/or the second magnitude.
US10521427B2	Managing data queries In one aspect, in general, a method of generating a dataflow graph representing a database query includes receiving a query plan from a plan generator, the query plan representing operations for executing a database query on at least one input representing a source of data, producing a dataflow graph from the query plan, wherein the dataflow graph includes at least one node that represents at least one operation represented by the query plan, and includes at least one link that represents at least one dataflow associated with the query plan, and altering one or more components of the dataflow graph based on at least one characteristic of the at least one input representing the source of data.
US10521426B2	Query plan generation for split table query operations A system for generating a query plan is provided. In some implementations, the system performs operations comprising: determining that a first query operation is a full table query operation, the full table query operation comprising a query operation operating on a database table as a whole; determining that a second query operation is a split table query operation, the split table query operation comprising a plurality of parallel query operations each operating on a portion of the database table; and inserting, based on the first query operation being a full table query operation and the second query operation being a split table query operation, a switch operation between the first and the second query operation, the switch operation being configured to distribute data output by the first query operation to the plurality of parallel query operations comprising the second query operation. Related methods and articles of manufacture are also described.
US10521425B2	Generating faster and efficient database query execution plans A computer-implemented method of generating faster and more efficient database query execution plans includes receiving a database query, generating an optimized query execution plan, and initiating execution of the optimized plan. Database can include table columns with associated column dictionaries. Database query can have statements with conditions. Generating the optimized query execution plan involves comparing contents of a column dictionary semantics of the statements, omitting statements which will always be TRUE and omitting conditions which will always be FALSE. Related apparatus, systems, techniques, methods and articles are also described.
US10521412B2	Complex multi-layer token apportionment stack for token assignment within multiple-tiered data structures A token apportionment stack may include multiple layers. A data structure layer of the token apportionment stack may access configuration memory to determine nodes and node attributes for a multiple-tier data structure. The data structure layer may send a message to a token assignment later of the token apportionment stack that indicates the determined nodes and attributes. Responsive to the message, the token assignment layer may assign tokens to a first node and recursively assign an apportionment of the assigned tokens to a second node. The token assignment layer may send a message with the assignments to the data structure layer. An interface interaction layer of the token apportionment stack may receive and handle query regarding token assignment by accessing token assignment data stored at the data structure layer.
US10521411B2	Systems, methods, and data structures for high-speed searching or filtering of large datasets An inline tree data structure and one or more auxiliary data structure encode a multitude of data records of a dataset; data fields of the dataset define a tree hierarchy. The inline tree comprises one binary string for each data record that are all the same length, are arranged in an ordered sequence that corresponds to the tree hierarchy, and include an indicator string indicating position in the tree hierarchy of each data record relative to an immediately adjacent data record. A search program is guided through the dataset by interrogating each indicator string in the inline tree data structure so as to reduce unnecessary interrogation of data field values.
US10521403B1	System and method of providing fault-tolerant file replication Systems and methods are provided for fault-tolerant file replication. A request including an operation and a file identifier is received. It is determined if the operation is of a predetermined type of operations. If the operation is of a predetermined type of operation, a target local replica file is identified. It is determined whether the target local replica file is a primary replica. If the target local replica file is the primary replica, the operation included in the request is executed. Otherwise, one or more of the set of storage devices on which remote replica files associated with the file identifier are stored are identified. In turn, the remote replica file that is the primary replica is identified. The request is transmitted to storage device on which the identified remote replica file that is the primary replica is stored.
US10521398B1	Tracking version families in a file system A technique for facilitating file system operations in a data storage system provides multiple version family databases. Each version family database identifies members of a respective version family, i.e., a respective set of files in a file system that are related by file snapping. When a snap of a file is created, the file system updates a version family database for the version family that includes the file, such that the version family database identifies both the file and the snap.
US10521391B1	Chip to chip interface with scalable bandwidth A system and method for efficiently transporting data across lanes. A computing system includes an interconnect with lanes for transporting data between a source and a destination. When a source receives an indication of a bandwidth requirement change from a first data rate to a second data rate, the transmitter in the source sends messages to the receiver in the destination. The messages indicate that the data rate is going to change and reconfiguration of one or more lanes will be performed. The transmitter selects one or more lanes for transporting data at the second data rate. The transmitter maintains data transport at the first data rate while reconfiguring the selected one or more lanes to the second data rate. After completing the reconfiguration, the transmitter transports data at the second data rate on the selected one or more lanes while preventing data transport on any unselected lanes.
US10521390B2	Systems and method for mapping FIFOs to processor address space An apparatus for a microprocessor computer system and method for configuring the same where said microprocessor computer system comprises a processor core and at least one hardware buffer FIFO with memory-mapped head and tail that handles data movement among the processor cores, networks, raw data input and outputs, and memory. The method for configuring said microprocessor computer system comprises utilizing a FIFO auxiliary processor to process said data traversing said hardware FIFO; utilizing said hardware FIFOs to efficiently pipe data through functional blocks; and utilizing a FIFO controller to perform DMA operations that include non-unit-stride access patterns and transfers among processor cores, networks, raw data input and outputs, memory, and other memory-mapped hardware FIFOs.
US10521384B2	Mobile hardware fob with device ecosystem for modular I/O extension devices A fob device includes a portable housing below a size needed to accommodate an input/output component for providing access to a functionality of the fob device that would not otherwise be accessible. The fob device also includes a mobile processor, a wireless interface, a volatile memory, a rechargeable battery, a charging interface, and storage medium having instructions that when executed causes the fob to receive a pairing request from a modular extension device that can provide access to the full functionality of the fob device that would not otherwise be accessible, pair with the modular extension device, and provide interfaces to the modular extension device that are customized based on a form factor of the modular extension device.
US10521383B1	Handling operation collisions in a non-volatile memory A first operation identifier is assigned to a first operation directed to a memory component, the first operation identifier having an entry in a first data structure that associates the first operation identifier with a first plurality of buffer identifiers. It is determined whether the first operation collides with a prior operation assigned a second operation identifier, the second operation identifier having an entry in the first data structure that associates the second operation identifier with a second plurality of buffer identifiers. It is determined whether the first operation is a read or a write operation. In response to determining that the first operation collides with the prior operation and that the first operation is a read operation, the first plurality of buffer identifiers are updated with a buffer identifier included in the second plurality of buffer identifiers.
US10521377B1	Reducing read transactions to peripheral devices A first write transaction is received by a device that includes a transaction identifier and a memory location identifier. The memory location identifies a register or a memory location of a device. A value from the register or memory location is read. A second write transaction is sent to a block of host memory. The second write transaction includes the value and the transaction identifier.
US10521375B2	Controller for a memory system A controller for a memory system is disclosed. The controller includes logic configured to execute host requests and memory management operations. The memory management operations have a plurality of memory command cycles. The logic is configured to suspend the memory management operation upon completion of a memory command cycle in the plurality of memory command cycles before a final stage when a host read request is received during execution of the memory management operation, and configured to continue the memory management operation when a host request other than a read request is received during execution of the memory management operation.
US10521371B2	Cache system and associated method Embodiments of the present disclosure provide a cache system and associated method. The cache system includes a first pipeline module including a first plurality of sequential processing phases for executing a plurality of operations. The first plurality of operations is executed in response to Input/Output (I/O) requests of a first plurality of types for the persistent storage device, and each of the first plurality of operations is a common operation for the I/O requests of at least two of the first plurality of types. The cache system also includes a control module configured to: determine a first type of a first pending processing I/O request for the persistent storage device, and in response to the first type being one of the first plurality of types, cause the first pipeline module to be executed to process the first pending processing I/O request.
US10521370B2	Chipset with near-data processing engine A chipset with a near-data processing (NDP) engine, which uses the NDP engine to perform a command transformation and thereby to generate an input and output (I/O) command to operate a peripheral device connected to the chipset. The chipset further has a traffic control module. A Remote Direct Memory Access (RDMA) packet comes from a remote computer system and is received by the chipset to operate the peripheral device. The traffic control module directs the RDMA packet to the NDP engine to be transformed into the I/O command. The NDP engine is provided to cope with the RDMA packet.
US10521363B2	Fully-digital multiple pin value detector apparatus and sampling methods useful in conjunction therewith An Integrated circuit (IC) device accommodating a circuit and associated control module, being operative to determine an apparatus characteristic in accordance with one out of few selectable characteristics. The circuit is operative in conjunction with more than three of a plurality of external passive circuits corresponding to the plurality of apparatus characteristics, and includes (N≥1) digital I/O pins. The control module is operative to: (i) in response to a series of triggering signals, generate samples of the digital I/O pin's state that correspond to a plurality of different sequences of states when each of the plurality of external circuits is respectively applied to the pin and (ii) determining, from the samples, which of the plurality of different sequences of states has occurred that corresponds to the individual external circuit that has been applied to the pin; and (iii) determining an individual apparatus characteristic which corresponds to the determined sequence.
US10521362B2	Method and device for storage management Embodiments of the present disclosure provide a method and device for storage management. The method comprises receiving at a storage management device a configuration request for a storage space managed by the storage management device, the configuration request indicating a capacity of the storage space and a target size of a chunk in the storage space; and based on the capacity and the target size, dividing the storage space into a metadata region storing a chunk status indicator indicating whether the chunk is assigned with data and a data region including the chunk with the target size. Embodiments of the present disclosure also provide a corresponding device.
US10521357B1	Computing in parallel processing environments A computing system comprises one or more cores. Each core comprises a processor. In some implementations, each processor is coupled to a communication network among the cores. In some implementations, a switch in each core includes switching circuitry to forward data received over data paths from other cores to the processor and to switches of other cores, and to forward data received from the processor to switches of other cores.
US10521355B2	Method, system, and apparatus for stress testing memory translation tables Disclosed is a system, method and/or computer product that includes generating translation requests that are identical but have different expected results, transmitting the translation requests from a MMU tester to a non-core MMU disposed on a processor chip, where the non-core MMU is external to a processing core of the processor chip, and where the MMU tester is disposed on a computing component external to the processor chip. The method also includes receiving memory translation results from the non-core MMU at the MMU tester, comparing the results to determine if there is a flaw in the non-core MMU.
US10521344B1	Servicing input/output (‘I/O’) operations directed to a dataset that is synchronized across a plurality of storage systems Servicing I/O operations directed to a dataset that is synchronized across a plurality of storage systems, including: receiving, by a follower storage system, a request to modify the dataset; sending, from the follower storage system to a leader storage system, a logical description of the modification to the dataset; receiving, from the leader storage system, information describing the modification to the dataset; processing, by the follower storage system, the request to modify the dataset; receiving, from the leader storage system, an indication that the leader storage system has processed the request to modify the dataset; and acknowledging, by the follower storage system, completion of the request to modify the dataset.
US10521327B2	Non-coupled software lockstep Systems and methods of detecting a difference in behavior of processes are provided. Differences may be detected by comparing operating system programmatic procedure invocations made by the processes.
US10521322B2	Modeling and testing of interactions between components of a software system A first set of information is identified, collected by a first agent during monitoring of a first software component. A second set of information is identified, that was collected by a second agent during monitoring of a second software component. It can be determined that the first and second sets of information each include characteristics of a particular transaction involving the first and second software components. A model is generated of the particular transaction based at least in part on the first and second sets of information. The model includes a representation of the involvement of the first and second software components within the particular transaction. In some aspects, characteristics included in the first and second set of information can include timing information for use, for example, in generating a model representing ordering of software components' involvement in one or more transactions.
US10521313B2	Uninterrupted data availability during failure in redundant micro-controller system Technical solutions are described for providing a redundant processor. An example processing unit includes a source processor coupled with a system communication bus via a first communication line; a backup processor coupled with the system communication bus via a second communication line; and an inter-microprocessor communication channel for communication between the source processor and the backup processor. The backup processor monitors for a failure of the source processor by monitoring the first communication line for communication messages being transmitted by the source processor. The backup processor determines a failure of the source processor in response to an absence of the communication messages on the first communication line for a predetermined duration. The backup processor, in response to a failure of the source processor, takes over control of communication of the processing unit by sending a status update on the inter-microprocessor communication channel.
US10521306B2	Methods, systems and devices for restarting data processing units Systems and methods are disclosed for maintaining a status of a respective data processing unit (DPU) of a plurality of data processing units, each coupled to non-volatile memory. In some embodiments a first DPU is configured to execute one or more persistent processes, wherein the one or more processes persist in the non-volatile memory over power cycles, generate a first broadcast message upon completion of a first persistent process, transmit the first broadcast message to a set of DPUs associated with monitoring the first DPU, receive a second broadcast message from a second DPU of the set of DPUs and assign a value indicating an active status for the second DPU in a status table to track the status of each DPU of the set of DPUs.
US10521300B2	Client provided request prioritization hints A computing device includes an interface configured to interface and communicate with a dispersed storage network (DSN), a memory that stores operational instructions, and a processing module operably coupled to the interface and memory such that the processing module, when operable within the computing device based on the operational instructions, is configured to perform various operations. For example, the computing device generates a prioritized request that includes at least one of a task for execution or a priority level based on information stored within a storage unit (SU) of a plurality of storage units (SUs) implemented within the DSN. Note that the information corresponds to a data object that is related to a set of encoded data slices (EDSs) that are distributedly stored within the DSN. The computing device then transmits the prioritized request to the SU and receives, from the SU, a response to the prioritized request.
US10521288B2	Collaborative application testing A method, computer program product, and computer system for performing, at a computing device, an analysis of a web application. A response is annotated by the web application with coverage data based upon, at least in part, the analysis, wherein the coverage data indicates which actions have been performed on the web application and which actions have not been performed on the web application according to results of the analysis. The response that includes the coverage data is shared with one or more users.
US10521277B2	Systems and methods for safely subscribing to locks using hardware extensions Transactional Lock Elision allows hardware transactions to execute unmodified critical sections protected by the same lock concurrently, by subscribing to the lock and verifying that it is available before committing the transaction. A “lazy subscription” optimization, which delays lock subscription, can potentially cause behavior that cannot occur when the critical sections are executed under the lock. Hardware extensions may provide mechanisms to ensure that lazy subscriptions are safe (e.g., that they result in correct behavior). Prior to executing a critical section transactionally, its lock and subscription code may be identified (e.g., by writing their locations to special registers). Prior to committing the transaction, the thread executing the critical section may verify that the correct lock was correctly subscribed to. If not, or if locations identified by the special registers have been modified, the transaction may be aborted. Nested critical sections associated with different lock types may invoke different subscription code.
US10521270B2	Workload management with delegated correction of execution issues for improving a functioning of computing machines A method and system for improving a functioning of critical execution computing machines by reducing an impact of an execution issue on execution of critical work units by respective critical execution computing machines. A promoted critical execution computing machine receives global correction information relating to the critical work units and to the critical execution computing machines. The execution issue impacts execution of the critical work units by each critical execution computing machine. One critical work unit had been promoted to become a promoted critical work unit that is to be executed by the promoted critical execution computing machine. The promoted critical execution computing machine: collects local correction information, receives peer correction information, determines one or more correction actions according to the global correction information, the local correction information, and the peer correction information, and causes an application of the corresponding correction actions onto the critical execution computing machines.
US10521259B2	Device and method for monitoring resources in full virtualization system The present invention relates to a device and a method for monitoring resources in a full virtualization system, the device and method generating a file table by parsing file information, generating a memory table when a memory is allocated, and then determining whether to execute a command by a process unit with reference to the file table and the memory table when the command is generated from a guest operating system or an application such that a virtual machine monitor is requested to execute the command.
US10521258B2	Managing test services in a distributed production service environment Systems and methods are described for a storage processing service that processes multiple storage commands. The storage processing service uses tags from test storage commands to determine whether a test storage service is to be instantiated that reflects a corresponding production service. Test storage commands with the same tag are tested on that test service. Additionally, the storage processing service determines a strategy for testing processes on production services when the storage system is overloaded. In one embodiment, the test service manager can determine to stop testing processes for a period of time, and issue a shed command that queues or sheds test storage commands. Advantageously, a shed command, while active at a storage processing service, may alleviate the overload on production services. The test service manager can continue to monitor the storage system to determine whether the overload continues to exist.
US10521247B2	Dynamic relocation of graphical digital content Techniques are disclosed for advantageously relocating graphical digital content on a screen of a client device. The technique can include displaying a dynamic content at a particular location on the screen of a client device (e.g., inline with an article displayed on a webpage). Upon determination that a relocation condition exists (e.g., a viewability of the inline dynamic content drops below a particular threshold), the dynamic content can be relocated to another location on the screen. In some instances, rather than being relocated to a static, previously determined position, the dynamic content can be dynamically relocated, based on the location of the other content.
US10521244B2	Information handling system configuration parameter history management A method and information handling system comprising receiving, at the management information handling system, legacy client information handling system configuration parameter values of the legacy client information handling system, information handling system configuration parameter values comprising motherboard configuration parameter values and component configuration parameter values, storing the legacy client information handling system configuration parameter values in a memory device, and identifying, via a processor at the management information handling system, replacement client information handling system performance enhancements relative to legacy client information handling system performance constraints. Executing, via an application processor, instructions of a system configuration management system to determine replacement client information handling system configuration parameter values based on the replacement client information handling system performance enhancements.
US10521242B2	Application containers with updatable application programming interface layers In some examples, a method includes, receiving, by a supervisor component, a request to execute particular functionality of an application and, responsive to receiving the request, identifying, by an application container for maintaining installable sub-packages of the application, a minimum version of a library specified in an application definition of the application. The method may also include, responsive to determining that the application container does not include the minimum version of the library: retrieving an instance of the library with a version that is greater than or equal to the minimum version; installing the instance of the library in the container runtime of the application container; and executing the application using the instance of the library in the container.
US10521240B2	Digital device and method of processing screensaver thereof A digital device and a method of processing screensaver the same are disclosed in this disclosure. According to the present invention, a digital device includes a manager configured to manage a window of the digital device and to generate and transmit first status data to a controller depending on whether the digital device is in a first status, a resource processor configured to manage and assign resources of the digital device, to receive status data and size data from launched applications and to configure and temporarily store application data for screensaver processing, and the controller configured to launching of one or more applications, to transmit a request to execute the screensaver to the resource processor if the first status data is received from the manger, to transmit a control command to a screensaver application based on a response of the resource processor according to the request, and to control the screensaver, wherein the resource processor returns a response to the request to execute the screensaver based on resource data about resource assignment and use of the digital device and the temporarily stored application data according to the request of the controller.
US10521227B2	Distributed double-precision floating-point addition The present embodiments relate to circuitry that efficiently performs double-precision floating-point addition operations, single-precision floating-point addition operations, and fixed-point addition operations. Such circuitry may be implemented in specialized processing blocks. If desired, each specialized processing block may efficiently perform a single-precision floating-point addition operation, and multiple specialized processing blocks may be coupled together to perform a double-precision floating-point addition operation. In some embodiments, four specialized processing blocks that are arranged in a one-way cascade chain may compute the sum of two double-precision floating-point number. If desired, two specialized processing blocks that are arranged in a two-way cascade chain may compute the sum of two double-precision floating-point numbers.
US10521225B2	Matrix multiplication at memory bandwidth Techniques related to matrix multiplication at memory bandwidth are disclosed. Computing device(s) perform multiplication of a first matrix with a second matrix to generate a third matrix. A first register stores contiguous element values of the first matrix. Furthermore, a second register stores a first set of contiguous element values of the second matrix, and a third register stores a second set of contiguous element values of the second matrix. The first set and the second set correspond to a first row and a second row, respectively, of the second matrix. The first row and the second row are contiguous rows. A single instruction is executed to cause at least a partial computation of contiguous element values of the third matrix. The single instruction causes multiplication of element values stored in the first register with element values stored in the second and third registers and grouped accumulation of the products.
US10521223B1	Systems and methods of a metadata orchestrator augmenting application development Systems and methods that augment an entity's building and deployment of multiple applications using a metadata library component and a metadata orchestrator that controls details of the configurations of data stores, metadata which may include linkage rules of the metadata structures and that leverages the metadata across individual application development and completed application silos are discussed.
US10521218B2	Enhanced techniques for updating software Techniques for enabling a device that is configured to be repeatedly booted into a predefined “mission ready” functional state by loading hibernation data into a memory to utilize the hibernation data to generate the updated hibernation data based on system updates. Updates can be received during hibernation and the “mission ready” functional state can be repeatedly entered even after the system updates have been installed. The system updates may alter device drivers, an operating system and/or its corresponding registry and libraries, and/or an application. After receiving system updates, the device may enter an operating state using the system updates. A write filter can be used to protect certain sections of memory to avoid conflicts between the original system files and updated files.
US10521216B2	Unified extensible firmware interface updates A method of executing processor-specific code to include board-specific optimizations in a Unified Extensible Firmware Interface (UEFI) may include executing first instructions that are specific to a processor, where the first instructions may be executed within a UEFI firmware routine. The method may also include detecting a portion of the first instructions that requires information to be processed or provided by second instructions, where the second instructions may be specific to a circuit board on which the processor is installed. The method may further include sending, through an intermediate dispatch function, a request for the information to be processed or provided by the second instructions, where the intermediate dispatch function can decouple the first instructions from the second instructions.
US10521215B2	Technologies for customized crowd-sourced features, automated safety and quality assurance with a technical computing environment Technologies for customized crowd-sourced update and validation include a computing device having a technical computing environment (TCE)-based engine that receives user information from one or more user devices, executes a TCE model with the user information to generate behavior data of the TCE model, and generates a software update for the TCE model based on the behavior data. The TCE model may be a model for an autonomous system such as a self-driving vehicle, and the software update may be a safety update for the autonomous vehicle. The user information may include sensor data, such as distance detection sensor data. The computing device may transmit an incentive such as a software update, feature update, or safety software update to the user devices. The computing device may also receive information associated with the TCE model from one or more developer devices. Other embodiments are described and claimed.
US10521214B2	Methods and systems for upgrade and synchronization of securely installed applications on a computing device Embodiments of the present disclosure provide for upgrades and synchronization of applications installed on a device, such as a mobile device. In one embodiment, a device may include applications purchased and downloaded via a content management system. The device maintains a list or database of applications that are authorized for each device. This list is also replicated in a remote cache that is maintained by an archive host. The device may then synchronize and upgrade these applications across multiple platforms, such as one or more computers that can be coupled to the device or the archive host. The archive host allows for files of the application be provided back to the device. Upon installation, the device can then confirm the authorization and identity of the newly installed application.
US10521211B2	Systems and methods for exporting, publishing, browsing and installing on-demand applications in a multi-tenant database environment In accordance with embodiments, there are provided mechanisms and methods for creating, exporting, viewing and testing, and importing custom applications in a multitenant database environment. These mechanisms and methods can enable embodiments to provide a vehicle for sharing applications across organizational boundaries. The ability to share applications across organizational boundaries can enable tenants in a multi-tenant database system, for example, to easily and efficiently import and export, and thus share, applications with other tenants in the multi-tenant environment.
US10521202B2	Customizable project and help building interfaces for deployable software Systems and methods for providing a project building interface are described herein. In an embodiment, a server computer displays, through a graphical user interface, one or more options for defining aspects of a project. The server computer receives, through selection of the one or more first options in the graphical user interface, first user input defining particular aspects of a particular project. The server computer displays through the graphical user interface, one or more second options for defining a guide. The server computer receives, through selection of the one or more second options in the graphical user interface, second user input defining a particular guide for the particular project. The server computer receives through the graphical user interface, a request to store the particular project. The server computer stores the particular aspects of the particular project and the particular guide. When the server computer receives a request to view the particular project, the server computer displays the particular guide with the particular project.
US10521175B2	System and method of data processing for a printing operation Systems and methods relating to preparing data for use in a printing operation are provided. One method includes receiving selected records from a first data source. The selected records have been subjected to a first record characteristic updating step and the selected records comprise mail information useful for delivery of printed materials. The method further includes updating the selected records with a second record characteristic updating step. A time at which the second record characteristic updating step is performed is determined in relation to a print production schedule for the printed materials. The method further includes creating a postal pre-sort file based upon the updated selected records for use in the printing operation. The printing operation is performed on a printing device based on the pre-sorted records.
US10521162B1	Searching for and notifying a user to pick-up a printed document Method(s) and apparatus(es) relate to notification to pick-up a printed document (“document”). In a method, stored are: at least one operation image of the document, and operation metadata and a user identity associated with a scanning or printing. A scan of at least one page of the document is received by the printer to generate at least one scanned image and scan metadata. The scan metadata is compared with data entries in a printer log to obtain a match to the operation metadata. The at least one operation image stored in relation to the operation metadata matching the scan metadata is retrieved. The at least one scanned image is compared to the at least one operation image. Responsive to determining the at least one scanned image matches the at least one operation image, sent from the printer is a confidential notification for the user identity to pick up the document.
US10521149B2	Memory poisoning support for free page hinting Systems and methods for virtualization technology that enhances memory page hinting to better support data integrity verification. An example method may comprise: determining, by a processing device executing a hypervisor, an integrity mark of a guest operating system, the integrity mark being associated with content of one or more memory pages; detecting, by the hypervisor, that a memory page is released by the guest operating system; verifying, by the hypervisor, content of the memory page in view of the integrity mark of the guest operating system; and evicting, by the hypervisor, the content of the memory page in response to the verifying.
US10521146B1	UFS based idle time garbage collection management Disclosed in some examples are systems, methods, NAND memory devices, and machine readable mediums for intelligent SLC cache migration processes that move data written to SLC cache to MLC storage based upon a set of rules that are evaluated using the state of the NAND device. In some examples, the SLC cache migration process may utilize a number of NAND operational parameters to determine when to move the data written to SLC cache to MLC, how much data to move from SLC to MLC, and the parameters for moving the data.
US10521144B2	Data block storage by splitting file content and file headers for independent storage Provided are a data block storage method, a data query method and a data modification method. The data block storage method splits file content of a data block to be stored, to generate at least two pieces of file content of the split data block. The file content of the data block to be split comprises at least one character set which is the smallest unit of the file content indicating the meaning of the data block to be split, the character set comprises a plurality of characters, each piece of file content of the split data block comprises a portion of the characters of the same character set. Even if another person obtains a portion of the data content after splitting, it would not be possible to parse effective content; and the split file content is stored in at least two independent storage systems, improving data security.
US10521140B2	Memory device with dynamic program-verify voltage calibration A memory system includes a memory array including a plurality of memory cells; and a controller coupled to the memory array, the controller configured to: determine a target profile including distribution targets, wherein each of the distribution targets represent a program-verify target corresponding to a logic value for the memory cells, determine a feedback measure based on implementing a processing level for processing data, and dynamically generate an updated target based on adjusting the program-verify target according to the feedback measure.
US10521139B2	Copy source to target management in a data storage system Copy source to target operations may be selectively and preemptively undertaken in advance of source destage operations. In another aspect, logic detects sequential writes including large block writes to point-in-time copy sources. In response, destage tasks on the associated point-in-time copy targets are started which include in one embodiment, stride-aligned copy source to target operations which copy unmodified data from the point-in-time copy sources to the point-in-time copy targets in alignment with the strides of the target. As a result, when write data of write operations is destaged to the point-in-time copy sources, such source destages do not need to wait for copy source to target operations since they have already been performed. In addition, the copy source to target operations may be stride-aligned with respect to the stride boundaries of the point-in-time copy targets. Other features and aspects may be realized, depending upon the particular application.
US10521134B2	Memory system A memory system has a first memory which comprises a nonvolatile memory data region, and a second memory which stores data before storing in a third memory, the data not being written back on the third memory in a lower-level with access priority lower than access priority of the first memory, among data inside the nonvolatile memory data region, wherein the second memory has a bit error rate lower than a bit error rate of the first memory.
US10521133B2	Method and apparatus for real-time blank page detection in data transmission A device for reading data from a first memory to a second memory based on real-time blank page detection includes a memory controller for reading a page of data from the first memory, a buffer for buffering a portion of the page data, a blank page pre-detection unit for generating a pre-detection result that indicates whether the page is a blank page based on a pre-determined part of the page data, a data processing unit for processing all of the page data to identify a page type, and a control unit for signaling the memory controller to read the page of data from the first memory and enabling the data processing unit based on the pre-detection result.
US10521131B2	Storage apparatus and storage control apparatus A storage apparatus of the present disclosure includes a plurality of storing units having different life times, and a processor configured to manage a data block to be stored in the plurality of storing units. The processor is configured to determine or infer an access characteristic for the data block, and store the data block in a storing unit in accordance with the determined or inferred access characteristic, among the plurality of storing units having the different life times. This enables to extend the life times of the storing units.
US10521121B2	Apparatus, system and method for throttling a rate at which commands are accepted in a storage device Provided are an apparatus, system and method for apparatus, system and method for throttling an acceptance rate for adding host Input/Output (I/O) commands to a buffer in a non-volatile memory storage device. Information is maintained on an input rate at which I/O commands are being added to the buffer and information is maintained on an output rate at which I/O commands are processed from the buffer to apply to execute against the non-volatile memory. A determination is made of a current level of available space in the buffer and an acceptance rate at which I/O commands are added to the buffer from the host system to process based on the input rate, the output rate, the current level of available space, and an available space threshold for the buffer to maintain the buffer at the available space threshold. I/O commands are added to the buffer to process based on the acceptance rate. The I/O commands are accessed from the buffer to process to execute against the non-volatile memory.

1 2 3 4 5 6 7 8 9 10