Document	Document Title
US10581778B2	Method and system for filtering communication An e-mail relay provides message filtering services to an e-mail network. The e-mail relay monitors incoming communication and intercepts e-mail messages. The e-mail relay compares attributes of the messages to data derived from SPAM messages, which are stored in a SPAM database. The e-mail relay restricts the delivery of messages based on the comparison such as by restricting the delivery of messages having attributes close to those of SPAM messages from the SPAM database. The SPAM database is constructed by responding to user or administrator indications as to whether received messages are SPAM messages.
US10581775B2	Automatic usage control of instant messages in computing systems Instant message servers configured for automatic instant message usage control in an instant message system are disclosed herein. In one example, an instant message server can be configured to determine an IM usage time of the user during the one or more IM sessions based on numbers of the detected occurrences of the IM events and weight factors corresponding to each type of the IM events. The weight factors correlate the numbers of occurrences of each type of the IM events to a corresponding IM usage period for each occurrence. The instant message server can then perform a comparison of the determined IM usage time of the user with a preset threshold and when the IM usage time of the user exceeds the threshold based on the comparison, automatically adjust the IM service provided to the user by the instant message server.
US10581773B2	Voice enabled social artifacts A user is prompted to select a social site for generating a voice enabled social artifact. A user selection of the social site is received. Responsive to receiving the user selection, information associated with an account of the user on the social site is obtained. The user is prompted to select a social artifact associated with the social site for voice enablement. A user selection of the social artifact is received. The selected social artifact is configured for voice enablement. The selected social artifact is displayed on the social site with an indication that the selected social artifact is voice enabled.
US10581772B2	Information processing method, information processing apparatus, and recording medium having program recorded thereon In an information processing method, display of a question and acquisition of an answer from a user to the question are repeated to narrow down information the user desires to make a search. A question regarding a target of the search is displayed in a first mode on a display included in a terminal. An answer inputted from the user to the question is acquired through the terminal. When the question is displayed, first information regarding a situation of a narrowing-down progress is displayed above the question in a second mode, and second information regarding a guide for answering the question is displayed below the question in a third mode.
US10581770B2	Method and system for communication in instant messaging application Embodiments of the present application provide a method and system for for performing an allocation operation. During operation, the system may receive an object allocation request from a computing device associated with an allocation source. The system may determine the allocation source, one or more allocation targets, one or more notification targets, and a quantity of objects to be allocated based on the object allocation request. The system may extract objects to be allocated corresponding to the quantity of objects to be allocated from an object set corresponding to the allocation source. The system may then allocate the objects to be allocated to the allocation targets. The system may notify the notification targets of messages related to the allocation operation.
US10581767B1	Systems and methods for email journaling A computer-implemented method for email journaling may include (1) maintaining, by a journaling mail server, a cache that associates together an update sequence number that indicates a version of an email distribution list and email addresses that are both designated as targets for journaling and included within the version of the email distribution list identified by the update sequence number, (2) receiving, by the server, an email that includes, within at least one header field, a candidate update sequence number and an email distribution list identifier, (3) determining that the update sequence number in the cache is a match for the candidate update sequence number in the header field, and (4) identifying, based on the match between the update sequence number and the candidate update sequence number, the email addresses specified in the cache as the targets for journaling. Various other methods, systems, and computer-readable media are also disclosed.
US10581762B2	Packet scheduling in a switch for reducing cache-miss rate at a destination network node A network switch includes switch circuitry and multiple ports. The ports are configured to communicate with a communication network. The switch circuitry is configured to receive via the ports multiple packets, which are destined to a destination network node and which specify attributes used by the destination network node as cache keys for on-demand fetching of context items into a cache memory of the destination network node, to control a rate of fetching the context items into the cache memory at the destination network node, by ordering the received packets in a sequence, based on the attributes of the respective packets, using an ordering criterion that aims to place packets that access a common context item in proximity to one another in the sequence, and to forward the received packets to the destination network node, via the ports, in accordance with the ordered sequence.
US10581755B2	Provisioning network services in a software defined data center A novel method for dynamic network service allocation that maps generic services into specific configurations of service resources in a network is provided. An application that is assigned to be performed by computing resources in the network is associated with a set of generic services, and the method maps the set of generic services to the service resources based on the assignment of the application to the computing resources. The mapping of generic services is further based on a level of service that is chosen for the application, where the set of generic services are mapped to different sets of network resources according to different levels of services.
US10581752B2	Generating automatic bandwidth adjustment policies per label-switched path A device may identify a plurality of first values associated with network traffic of a label-switched path of a plurality of label-switched paths. The device may determine an adjustment policy based on the plurality of first values. The adjustment policy may include one or more factors associated with a plurality of second values. The plurality of second values may be determined based on the plurality of first values. The device may implement the adjustment policy in association with the label-switched path. A bandwidth reservation of the label-switched path may be adjusted based on the adjustment policy. The adjustment policy may be implemented for fewer than all of the plurality of label-switched paths.
US10581749B2	Automatic discovery of maximum transmission unit size for a software defined network The technology disclosed herein enables the automatic discovery of MTU size across a software defined network (SDN). In a particular embodiment, a method provides, in a management plane of the SDN, receiving a first MTU request from a first endpoint of the SDN that indicates a second endpoint of the SDN to which the first endpoint will transfer first data. The method further provides tracing a first path through the SDN for the first data between the first endpoint and the second endpoint, determining the smallest MTU along the first path, and setting a first MTU to a value less than or equal to the smallest MTU along the first path. The method also includes providing the first MTU to the first endpoint.
US10581747B2	System and method for low-overhead interoperability between 4G and 5G networks Techniques described herein may allow for the seamless and efficient use of multiple radio access technologies (“RATs”), such as 4G and 5G RATs. A virtualized base station may be used, which processes traffic sent to and/or received from a user equipment (“UE”) via 4G and 5G RATs. The virtualized base station may include separate protocol stacks for the separate RATs. One RAT may be the “master” RAT, and the protocol stack for the master RAT may communicate with a core network via a General Packet Radio (“GPRS”) Tunneling Protocol (“GTP”) tunnel. In the downlink direction, the virtual base station may determine via which RAT traffic, received from the core network, should be sent to the UE by identifying quality of service class indicators (“QCIs”) associated with the downlink traffic.
US10581746B2	Selecting a connection in a network A machine, such as a router (or other network appliance capable of filtering incoming packets), determines whether a packet is from a location that is likely to be capable of establishing an acceptable connection quality. If it is determined that an acceptable connection quality is unlikely to be obtained, the machine blocks the packet so that the connection is not established. If it is determined that the acceptable connection quality is likely to be obtained, the packet is received and the connection is allowed. As a consequence of blocking packets from locations that are expected to have a poor connection, connections are not established with servers that will provide poor service and a poor user experience.
US10581743B2	Group rate limiters for multicast data packets In example implementations, a method is provided. The method detects, by a processor, a change in incoming data packet relative to a previously received data packet. In response to the change, group rate limiters are enabled to the incoming data packets for each one of a plurality of different data packet groups. The group rate limiters stop the incoming data packet when the data packet is assigned to one of the plurality of different data packet groups that has reached a respective group rate limiter. A hardware controller is programmed to forward respective data packets in each one of the plurality of different data packet groups.
US10581741B2	Method and system for interest groups in a content centric network One embodiment provides a system for facilitating efficient communication of an interest group packet indicating a collection of interests. During operation, the system receives, by an intermediate node, a first packet which has a name and indicates a set of member interests, wherein a member interest has a name, wherein a name is a hierarchically structured variable length identifier that includes contiguous name components ordered from a most general level to a most specific level. In response to obtaining a content object which satisfies a member interest, the system removes the indicated member interest from the first packet. The system adds an entry in a pending interest table for the first packet, wherein the entry indicates the name for the first packet, the name for each member interest, and an indicator of whether each member interest is satisfied. The system transmits the first packet to another node.
US10581734B2	Methods, systems, and fabrics implementing a distributed network operating system Methods, systems, and computer programs are presented for managing network switching. A network device operating system (ndOS) program includes instructions for exchanging switching policy regarding switching network packets in a plurality of ndOS devices having ndOS programs. The first ndOS program is executed in a first ndOS device, and the switching policy is exchanged with other ndOS programs via multicast messages. Further, the ndOS program includes instructions for exchanging resource control messages with the other ndOS devices to implement service level agreements in the switching fabric, where the ndOS switching devices cooperate to enforce the service level agreements. Further yet, the ndOS program includes instructions for receiving changes to the switching policy, and instructions for propagating the received changes to the switching policy via message exchange between the ndOS programs. The ndOS devices are managed as a single logical switch that spans the plurality of ndOS devices.
US10581730B2	Packet processing using service chains Example methods are provided for a host to perform packet processing using a service chain in a software-defined networking (SDN) environment. The method may comprise establishing a datapath between a first virtualized computing instance and a second virtualized computing instance in the service chain, the datapath bypassing a forwarding element to which the first virtualized computing instance and the second virtualized computing instance are connected. The method may also comprise: the first virtualized computing instance obtaining a packet that requires processing by the service chain, and performing packet processing according to a first service. The method may further comprise: the second virtualized computing instance obtaining the processed packet via the datapath, and performing packet processing according to a second service.
US10581724B2	Managing network packet communication simultaneously through wired and wireless network interfaces A client information handling system application selectively communicates network packets simultaneously through plural network interfaces by leveraging network address translation at the network layer of the network packets. Network packets are distributed across the plural network interfaces to achieve desired network communication goals, such as bandwidth, data rates, quality of service, reliability and SAR requirements.
US10581717B2	Automated virtual network function test controller A device can receive a test package for testing. The test package can include at least one virtual network function (VNF) for testing. The device can configure the testing for the test package based on the VNF included in the test package or a vendor associated with the VNF. The device can execute the testing for the test package based on configuring the testing for the test package. The testing can include onboarding testing and post-onboarding testing. The device can generate a report based on a result of the executing the testing for the test package. The device can provide output identifying the report.
US10581705B2	Smart service catalogs based deployment of applications Techniques for smart service catalogs based deployment of applications in a cloud computing environment are disclosed. In one embodiment, resource information required to deploy an instance of an application is retrieved from a blueprint associated with a client. Further, available resource information may be obtained from a resource reservation associated with the client. A maximum number of instances of the application that can be deployed corresponding to the client is determined based on the resource information required to deploy the instance of the application and the available resource information. A service catalog including the maximum number of instances of the application that can be deployed based on the blueprint is generated. The service catalog is used to enable deployment of at least one instance of the application corresponding to the client.
US10581704B2	Cloud system for supporting big data process and operation method thereof A cloud system for a big data process, and an operation method thereof. A cloud operation method of processing big data includes: receiving a cluster rule; monitoring a cluster resource and a cluster task; adding a cluster resource based on the cluster rule and a cluster resource monitoring value; and replicating a cluster based on a cluster rule and a cluster task monitoring value, wherein the cluster rule may include at least one of a resource assignment threshold value, a resource amount to be assigned, a task threshold value, and a number of replicated clusters.
US10581699B2	Method for generating data and wireless control apparatus A method for generating data according to an embodiment of the present invention includes receiving communication-status information regarding a plurality of wireless relays therefrom and generating data for displaying communication statuses included in the communication-status information on a position of a display, the position corresponding to the plurality of wireless relays.
US10581697B2	SDN controlled PoE management system A Software Defined Networking (SDN) controlled Power over Ethernet (PoE) management system includes a plurality of Power Sourcing Equipment (PSE) networking devices that are each configured to provide both power and data over a network connection to a powered device. An SDN controller device that is coupled to each of the plurality of PSE networking devices. The SDN controller device detects each of the plurality of PSE networking devices. The SDN controller may then receive, from each of the plurality of PSE networking devices, a first SDN communication that includes Power over Ethernet (PoE) information for that PSE networking device. The SDN controller device may then generate a management graphical user interface that is configured to display any of the PoE information that was received in the first SDN communications from each of the plurality of PSE networking devices.
US10581695B2	Test system and method for benchmark testing a device under test A test system for benchmark testing a device under test is described. The test system comprises a device under test having hardware components, an operating system and at least one over-the-top traffic unit. The test system also has at least one network unit providing a network for the benchmark testing. The test system further comprises at least one control unit controlling the benchmark testing. In addition, the test system has at least one measurement unit configured to acquire benchmark data of the device under test. The control unit is configured to control the measurement unit and the over-the-top traffic unit. Further, a method for benchmark testing a device under test is described.
US10581689B2	Third-party network computational resource utilization A computing system disposed within a computational instance of a remote network management platform remotely manages a managed network that uses computational resources of a third-party network to deploy operations. The computing system may obtain a utilization policy that identifies (i) particular computational resources of the third-party network used to deploy a particular operation and (ii) a time period during which the particular computational resources can be used. The computing system may be configured to: obtain a utilization report that identifies (i) the computational resources used to deploy the operations and (ii) times at which the computational resources were used; determine that the particular computational resources deployed the particular operation outside the time period identified by the utilization policy; generate a report indicating that the particular computational resources deployed the particular operation outside the time period; and provide the report to the managed network.
US10581681B2	Information processing apparatus and control method thereof, control method of system, and storage medium An information processing apparatus includes a memory device that stores a set of instructions, and at least one processor that executes the instructions. When executed, the instructions cause the information processing apparatus to perform operations including effecting control, if operating in a first mode where network settings thereof are performed in cooperation with an external terminal, to activate an access point for wireless communication using an SSID satisfying a predetermined format, and activate a service for accepting settings relating to the network, changing settings relating to the network thereof, at least following the service having received connection information from an external terminal, based on the connection information, and effecting control, if operating in a second mode different from the first mode, to activate an access point using an SSID not satisfying the predetermined format, with the service not accepting connection information from an external device.
US10581678B1	Wireless system for setting parameters A wireless system for setting parameters includes at least one electronic device and a parameter-setting device. The electronic device has a first wireless transmission module, a processor, and a desirable device to be set. The processor is electrically connected to the first wireless transmission module and the desirable device. The parameter-setting device has a second wireless transmission module. The parameter-setting device is wirelessly connected to the processor and the desirable device through the first wireless transmission module and the second wireless transmission module. When the desirable device is shut down, the parameter-setting device transmits specification parameters to the first wireless transmission module through the second wireless transmission module to store the specification parameters into the first wireless transmission module. When the desirable device starts, the desirable device drives the processor to read the specification parameters and operates according to the specification parameters.
US10581675B1	Metadata-based application and infrastructure deployment A system for deploying an application using an infrastructure identified based on metadata associated with source code of the application. The system extracts code metadata during compile time and build time of the application source code. Application configuration parameters are identified from the metadata and matched to an application configuration pattern selected from multiple application configuration patterns stored in a repository. A learning process is applied wherein feedback data is used to create new application configuration patterns and update existing patterns. An infrastructure script is generated using infrastructure parameters identified using the selected application configuration pattern. The infrastructure script is executed to provision an infrastructure for deployment of the application.
US10581673B2	Abstracting wireless device to virtual Ethernet interface A wireless interface system includes a wireless network interface, with a virtual Ethernet interface, that is configured to transmit and receive signals over a wireless channel using a predetermined wireless technology protocol. A method for abstracting a wireless interface protocol to an Ethernet protocol includes detecting, with a wireless network interface, access by a wireless device using the wireless interface protocol. A virtual Ethernet interface is created having an associated Ethernet interface ID. The wireless device ID is associated with the Ethernet interface ID in a table in memory. A payload from the wireless device is transmitted over the wireless technology protocol. The payload is transmitted to the virtual Ethernet interface using the Ethernet protocol.
US10581669B2	Restoring control-plane connectivity with a network management entity Example methods are provided for a first host to restore control-plane connectivity with a network management entity. The method may comprise: detecting a loss of control-plane connectivity between the first host and the network management entity; and determining connectivity status information associated with one or more second hosts. The method may also comprise, based on the connectivity status information, selecting, from the one or more second hosts, a proxy host having data-plane connectivity with the first host and control-plane connectivity with the network management entity. The method may further comprise restoring control-plane connectivity between the first host with the network management entity via the proxy host such that the first host is able to send control information to, or receive control information from, the network management entity via the proxy host.
US10581662B2	Interleaving aspects in signal space diversity overlapped with non-orthogonal colliding transmissions Interleaving aspects in the case of Signal Space Diversity (SSD) are considered here, in particular when the SSD transmission is expected to be overlapped by a colliding non-orthogonal Ultra Reliable & Low Latency Communication (URLLC). The interleaver's depth when interleaving I and Q components of a rotated modulated symbol is chosen such that a gap of at least an expected maximum size, measured in transmission units, of a possible colliding wireless signal, is generated between a respective In and Qn component of a same symbol n.
US10581659B2	System and method for communications with reduced peak to average power ratio A method for transmitting data includes modulating data bits with a constellation to produce modulated data symbols, precoding the modulated data symbols to obtain ns groups of precoded samples, where ns is equal to a number of non-zero terms in a sparse code associated with the transmitting device, mapping the ns groups of precoded samples to groups of subcarriers in accordance with the sparse code associated with the transmitting device, to obtain a plurality of subcarrier-mapped samples, transforming the plurality of subcarrier-mapped samples into encoded data symbols, and transmitting the encoded data symbols.
US10581653B2	Reception device, reception method, recording medium for receiving signals A local oscillator outputs a local oscillation signal. A orthogonal detector subjects a received signal to orthogonal detection by using the local oscillation signal so as to output an I-phase baseband signal and a Q-phase baseband signal. A first HPF and a second HPF reduce a direct current component of each of the I-phase baseband signal and the Q-phase baseband signal. A demodulator demodulates the I-phase baseband signal and the Q-phase baseband signal output from the first HPF and the second HPF. A distribution detector detects an unevenness in a distribution of the I-phase baseband signal and the Q-phase baseband signal with the reduced direct current component. When the distribution detector detects an unevenness in the distribution, the distribution detector changes a status of the first HPF and the second HPF.
US10581641B2	Device and method for improving the reception quality of messages in a CAN bus system A user station for a bus system and a method for improving a reception quality of messages in a user station of a bus system are provided. The user station includes an estimation device for estimating a channel impulse response when and/or after only one further user station of the bus system transmits a message to the bus system, or for determining necessary functions of filters directly from a signal received by the user station, and a correction device for correcting a signal received by the user station based on the channel impulse response estimated by the estimation device.
US10581637B2	Computational node adaptive correction system A system and method for adaptively identifying and correcting issues in a computing system, such as a distributed node computing system, are described. The method includes receiving node data from a group of nodes, the node data describing one or more operational characteristics of a node. The operational characteristics may include CPU load, memory load, latency, or other operational data that describes node performance. Reachability data for the group of nodes is generated by trying to contact each node. Code version data is generated for each node that identifies which version of code applications in the node are running. The nodes are grouped into clusters using density-based clustering to identify outliers. A correlation is determined between the reachability, code version, and outlier data to identify problems and issue corrective actions.
US10581636B1	Network tunneling for virtual machines across a wide-area network Disclosed are systems and methods for exchanging network traffic between a client and a virtual machine running on a physical server. The described system provides a virtual network interface controller (NIC) that emulates access to a physical local area network of the physical server. The described system further includes server-side and client side components of a packet injection layer that exchanges guest network packets between the client and the virtual machine using a communication channel without injecting the guest network packets into the physical local network of the server.
US10581633B2	Automation device for the redundant control of a bus subscriber An automation device for the redundant control of a bus subscriber, including: a bus interface for communication with the bus subscriber; a first communication interface for communication with a first controller via a first communication network; a second communication interface for communication with the second controller via a second communication network; and a processor. The processor transmits bus data received from the bus interface to the first communication interface and to the second communication interface. The first communication interface transmits the received bus data to the first controller, the second communication interface transmits the received bus data to the second controller, and the first communication interface and the second communication interface are communicatively separated. The processor also transmits first communication data received via the first communication interface and second communication data received via the second communication interface to the bus subscriber via the bus interface.
US10581623B2	Data packet processing method and apparatus A data packet processing method and apparatus is disclosed. According to the method, a storage apparatus disposed on a network side stores a correspondence between an identifier and data flow characteristic information. When configuring a policy for a data packet including a first identifier, a network-side device requests the storage apparatus for data flow characteristic information corresponding to the first identifier. A PCEF receives a data packet that is sent by UE, matches the data packet against the data flow characteristic information, and when the data packet matches the data flow characteristic information, executes a policy on the data packet according to policy information corresponding to the first identifier. According to the method provided in embodiments of the present disclosure, transmitting a considerable amount of data flow characteristic information on an interface of an SCEF is avoided, and load on the SCEF is relieved.
US10581621B2	Enhanced chaincode analytics provenance in a blockchain A blockchain of transactions may be referenced for various purposes and may be later accessed by interested parties for ledger verification and information retrieval. One example method of operation may include one or more of storing original data in a blockchain, storing transformed data based on the original data in the blockchain, storing chaincode on the blockchain used to transform the original data to the transformed data, and retrieving a transaction from the blockchain with the transformed data and the chaincode.
US10581618B2	System, method and apparatus for providing enrollment of devices in a network In one example, an enrollment device, such as a smart phone with an enrollment application executing thereon, obtains in situ enrollment information from at least one or more target device of a plurality of target devices in a network. The enrollment device provides the in situ enrollment information that is obtained from the at least one target device, to a security management device, such as a public key certificate generator (e.g., a certification authority) for the network, to facilitate target device configuration certificate generation for the at least one target device. The security management device uses the in situ enrollment information and other device specific information as well as operational information that is desired for a device, and issues a configuration certificate for the at least one target device. A system and methods are also set forth.
US10581603B2	Method and system for secure delegated access to encrypted data in big data computing clusters Provided is a process including: encrypting each of a plurality of data encryption keys with a first public cryptographic key to form encrypted data encryption keys; obtaining a second public cryptographic key; generating a transformation key based on the first public-private cryptographic key pair and the second public cryptographic key; and transforming the encrypted data encryption keys with proxy re-encryption based on the transformation key; and obtaining the second private cryptographic key and the transformed encrypted data encryption keys.
US10581598B2	Management device and management method According to one embodiment, a management device includes a management tree storage and one or more processors. The management tree storage stores therein a binary tree including a plurality of nodes that are assigned with respective node keys. The processors update at least one of the node keys. The processors selects at least one of a first subtree and a second subtree, the first subtree and the second subtree being subtrees including leaf nodes of the binary tree, the leaf nodes corresponding to respective communication devices included in a group, the first subtree including only leaf nodes with the respective node keys assigned thereto not having been updated, the second subtree including only leaf nodes with the respective node keys assigned thereto having been updated. The processors transmit a group key encrypted using a node key assigned to a root node of the selected subtree.
US10581597B2	Method, apparatus, and system for processing two-dimensional barcodes This specification describes techniques for processing service requests. One example method includes receiving an electronic credential request from a client, retrieving an electronic credential that corresponds to the user identifier, generating server signature information, and transmitting the server signature information and the electronic credential to the client. The server signature information includes the electronic credential and a user public key of the client. The electronic credential and the user public are signed using a server private key. The server signature information is configured to be cryptographically verified by the client and configured to enable the client to generate a two-dimensional barcode based on the electronic credential. The electronic credential included in the two-dimensional barcode is configured to be verified by a credential verification device. The credential verification end device is configured to generate the electronic credential based on the user identifier.
US10581596B2	Technologies for managing errors in a remotely accessible memory pool Technologies for managing errors in a remotely accessible memory pool include a memory sled. The memory sled includes a memory pool having one or more byte-addressable memory devices and a memory pool controller coupled to the memory pool. The memory sled is to write test data to a byte-addressable memory region in the memory pool. The memory region is to be accessed by a remote compute sled. The memory sled is also to read data from the memory region to which the test data was written, compare the read data to the test data to determine whether a threshold number of errors are present in the read data, and send, in response to a determination that the threshold number of errors are present in the read data, a notification to the remote compute sled that the memory region is faulty.
US10581595B2	Generating public/private key pairs to deploy public keys at computing devices to verify digital signatures Provided are a computer program product, system, and method for generating public/private key pairs to deploy public keys at computing devices to verify digital signatures. A plurality of public-private key pairs are generated to store in a key store. A set of public keys of the public-private key pairs is distributed to the computing systems to use to verify purported digitally signed challenges. One of the public-private key pairs is selected to use a private key of the selected one of the public-private key pairs as a current private key to use to digitally sign challenges from the computing systems. A determination is made to retire the current private key. Another one of the public-private key pairs is selected and the current private key is set to a private key of the selected another one of the public-private key pairs to use to digitally sign challenges from the computing systems.
US10581590B2	Flexible architecture and instruction for advanced encryption standard (AES) A flexible aes instruction set for a general purpose processor is provided. The instruction set includes instructions to perform a “one round” pass for aes encryption or decryption and also includes instructions to perform key generation. An immediate may be used to indicate round number and key size for key generation for 128/192/256 bit keys. The flexible aes instruction set enables full use of pipelining capabilities because it does not require tracking of implicit registers.
US10581587B1	Deskewing method for a physical layer interface on a multi-chip module Systems, apparatuses, and methods for implementing a deskewing method for a physical layer interface on a multi-chip module are disclosed. A circuit connected to a plurality of communication lanes trains each lane to synchronize a local clock of the lane with a corresponding global clock at a beginning of a timing window. Next, the circuit symbol rotates each lane by a single step responsive to determining that all of the plurality of lanes have an incorrect symbol alignment. Responsive to determining that some but not all of the plurality of lanes have a correct symbol alignment, the circuit symbol rotates lanes which have an incorrect symbol alignment by a single step. When the end of the timing window has been reached, the circuit symbol rotates lanes which have a correct symbol alignment and adjusts a phase of a corresponding global clock to compensate for missed symbol rotations.
US10581582B2	Wireless communication method and wireless communication device for configuring broadband link The present invention relates to a wireless communication method and a wireless communication terminal for wideband link setup, and more particularly, a wireless communication method and a wireless communication terminal for increasing data communication efficiency by extending a data transmission bandwidth of a terminal. To this end, provided are a wireless communication terminal, the terminal comprising: a transceiver configured to transmit and receive a wireless signal; and a processor configured to control an operation of the wireless communication terminal, wherein the processor is configured to: obtain basic primary channel information of a basic service set (BSS) with which the terminal is associated, obtain alternative primary channel information set for the terminal, wherein the alternative primary channel is set among at least one of secondary channels of the BSS, and perform communication using at least one of the basic primary channel and the alternative primary channel, and a wireless communication method using the same.
US10581579B2	Method and apparatus for transmitting ACK/NACK for NB-IoT in wireless communication system A method and apparatus for transmitting an acknowledgement/non-acknowledgment (ACK/NACK) in a wireless communication system is provided. A narrowband internet-of-things (NB-IoT) user equipment (UE) receives an indication of resources for ACK/NACK transmission from a network, and transmits the ACK/NACK to the network by using the resource for ACK/NACK transmission.
US10581574B2	Data transmission method, and apparatus A data transmission method and an apparatus are provided. In this solution, one contention resource group may be divided into a plurality of terminal device groups, and terminal devices with a same DMRS may exist in two different terminal device groups. Even when terminal devices with a same DMRS exist in two different terminal device groups, interference can still be avoided. Therefore, according to embodiments of the present invention, a quantity of connected terminal devices in one contention resource group is increased while good communication quality is obtained.
US10581568B2	Network discovery and synchronization for NR-SS Network discovery and synchronization for new radio (NR) shared spectrum (NR-SS) is discussed for a wireless network having a super frame configuration on a shared spectrum shared between a plurality of network operators. A base station may obtain a discovery preamble from a plurality of network entities within the wireless network, wherein each of the plurality of network entities belongs to one or more of the plurality of network operators and shares the super frame configuration. The base station detects the timing of the super frame configuration using the discovery preamble and may then synchronize the base station to the super frame configuration according to the detected timing.
US10581564B1	Pre-placed messages Embodiments for a communication enhancement module for a first communicating device are disclosed. The communication enhancement module includes instructions thereon. The instructions cause the communication enhancement module to receive an activation message from a data terminal of the first communicating device. The activation message is sent from a communication enhancement module of a second communicating device. In response to receiving the activation message, a set of pre-placed messages is identified to which the activation message is assigned. A set of messages is generated corresponding to the set of pre-placed messages. Each message in the set of messages conforms to a communication protocol used by the second communicating device for messages sent to the first communicating device. The set of messages indicate that the set of messages originated at the second communicating device. The set of messages is sent to a main processing module of the first communicating device.
US10581556B1	Uplink multiple access method based on frozen bit patterns of polar codes An uplink multiple access method based on the user-specific frozen bit patterns of polar codes assigned to users and relevant transmitter-receiver embodiments. The method includes encoding the information bits with a polar encoder by using the binary-valued, user-specific frozen bit patterns in frozen bit locations during encoding operation. The method further includes mapping of coded bits with symbols to be transmitted and baseband-to-RF processing performed on the symbol sequence. The generated signals of each user are transmitted by using the same time-frequency resources. The method further includes to receive the superposed signal of multiple users transmitted by means of relevant uplink radio channels. The method further includes an RF-to-baseband conversion on the received signal and detecting and decoding each user data by using an interference cancellation multiuser detector and a polar decoder that uses binary-valued pattern sequences assigned to the users in the frozen bit locations.
US10581553B2	Signal detection by means of supplemental information A method of communicating information from a sensor concerning a received signal, comprising: responsive to receiving by at least one detecting sensor, during a defined time interval, data indicative of an entire data of a frequency band received by it during the defined time interval, comprising at least one signal emitted at least one emitter, and to detecting of the emitted signal by the at least one detecting sensor, sending from the sensor assistance information corresponding to the detected emitted signal during the defined time interval, to at least one non-detecting sensor. This information can be utilized by the non-detecting sensor to perform an action with respect to data indicative of an entire data of the frequency band received by the non-detecting sensor during a corresponding defined time interval, the action corresponding to at least one emitted signal received by the non-detecting sensor during the corresponding defined time interval.
US10581535B2	Method for providing chip-to-chip wireless communication and electronic device thereof A device and a method for reducing an influence of interference between signals using an aperture array in chip-to-chip wireless communication are provided. The device includes a transmitter including at least one transmission antenna for transmitting a signal, a receiver including at least one reception antenna for receiving the signal, a guide structure including at least one opening for guiding a path of the signal, and the at least one transmission antenna, the at least one reception antenna, and the at least one opening are arranged to correspond to one another.
US10581528B2	Method for transmitting data asynchronously from an electronic device to an electronic watch A method for transmitting data from an electronic device to an electronic watch is provided, including emitting a first sequence of light signals with a first light source of the device at a light-intensity level among at least four light-intensity levels, the emitted first sequence corresponding to a code of data to be transmitted; emitting a second sequence of light signals at two light-intensity levels corresponding to clock phases, simultaneously to the emitted first sequence, with a second light source of the device; detecting successive light-intensity levels with a first phototransistor of a watch, to reconstitute a sequence of data; detecting a succession of the two light-intensity levels with a second phototransistor of the watch, to reconstitute the clock phases, the first and the second sequences emitted at two distinct wavelengths; and decoding the sequence of data by a sequence of the clock phases to reconstitute the data.
US10581525B2	Method and apparatus for omnidirectional optical communication An omnidirectional optical communication system. The omnidirectional optical communication system includes a multifaceted structure, a laser transmitter with a steerable mechanism, an optical detector receiver, and an angle-of-arrival system. In one aspect, the laser transmitter with a steerable mechanism, the optical detector receiver, and the angle-of-arrival system are housed in within the multifaceted structure, which enables omnidirectional optical communication. In another aspect, the omnidirectional optical communication system is used in a spacecraft for inter-spacecraft omnidirectional optical communication. In yet another aspect, the omnidirectional optical communication system is used in terrestrial applications for gigabit communications in WiFi, inter smartphones, internet of things and smart cities. In yet another aspect, the omnidirectional optical communication system further includes a global positioning system.
US10581515B2	Method for calibrating and commissioning communication satellites using LEO satellites Generally, system and method for calibration an in-orbit satellite are provided. The method may comprise transmitting, by a Geosynchronous (GEO) satellite, a GEO satellite signal and receiving, by a Low Earth Orbiting (LEO) satellite, the GEO satellite signal when the LEO satellite crosses a predetermined transmission footprint of the GEO satellite at a predetermined LEO satellite location. The method may comprise determining, by a base station, a GEO satellite location at which the GEO satellite signal is received by the LEO satellite. The method may comprise comparing, by the base station, the transmitted GEO satellite signal and the received GEO satellite signal and further determining, by the base station, based on at least one of the comparison thereof, the predetermined LEO satellite location and the GEO satellite location, a GEO satellite transmission performance at a specific geographical location on ground.
US10581512B2	Method and system for replacing relay, d2d user equipment and control node A method for replacing a relay, comprising: a first D2D UE receives D2D relay node replacement indication information transmitted by a control node; and the first D2D UE communicates, according to the D2D relay node replacement indication information, through a new D2D relay node. Also disclosed are another method and system for replacing a relay node, a D2D UE and a control node.
US10581498B2	Network node, user equipment and methods therein to enable the UE to determine a precoder codebook A method performed by a base station of enabling a User Equipment (UE) to determine a precoder codebook in a wireless communication system is provided. The base station transmits, to the UE, information regarding precoder parameters enabling the UE to determine the precoder codebook. The precoder parameters are associated with a plurality of antenna ports of the base station. The precoder parameters relate to a first dimension and a second dimension of the precoder codebook. The plurality of antenna ports comprises a number of antenna ports that is a function of a number of antenna ports in the first dimension, and a number of antenna ports in the second dimension.
US10581493B2	Methods and apparatus for multi-destination wireless transmissions Methods and apparatus for multi-destination wireless transmissions as disclosed. An example multi-destination transmitter includes a direction determiner to determine directions for wireless transmission of data to destination devices and a transmission handler to: select a subset of the destination devices that are associated with different ones of a plurality of antennas as indicated by the directions determined by the direction determiner; and transmit the data to the subset of the destination devices via the plurality of antennas.
US10581478B1	Radio-frequency front end with power amplifier detuning to reduce output degradation Radio-frequency front-end circuitry includes an output terminal, a receive amplifier controllably coupled to the output terminal, at least one transmit amplifier controllably inductively coupled to the output terminal, and at least one impedance element controllably coupled between ground and one of the at least one transmit amplifier to reduce degradation of output of the radio-frequency front-end circuitry when the at least one transmit amplifier is not in use. In differential signaling, there is an impedance element between ground and each pole of the differential signal. A second transmit amplifier may generate second transmit signals and harmonics of the second transmit signals, and the second transmit amplifier may be switchably connected to the output of a first transmit amplifier so that output of the second transmit amplifier is filtered by the one of the first transmit amplifier. The transmit amplifiers may include a WiFi power amplifier and a BLUETOOTH® power amplifier.
US10581466B2	Front-end architecture having split diplexer for carrier aggregation and MIMO support Front-end architecture having split diplexers for carrier aggregation and MIMO support. In some embodiments, a multiplexing architecture can include an assembly of filters configured to support carrier aggregation with one or more antennas. The assembly of filters can include a first diplexer configured to support a mid-band and a first high-band. The assembly of filters can further include a second diplexer configured to support the mid-band and a second high-band. The multiplexing architecture can further include a switch assembly implemented between the assembly of filters and respective one or more nodes associated with the one or more antennas.
US10581461B2	Method and apparatus for sequence determination, device and storage medium The present disclosure provides a method and an apparatus for sequence determination, a device and a storage medium. The method for sequence determination includes: mapping a first bit sequence having a length of K bits to a specified position based on M_index to obtain a second bit sequence; applying Polar encoding to the second bit sequence to obtain a Polar encoded bit sequence; and selecting T bits based on the Polar encoded bit sequence as a bit sequence to be transmitted, where K and T are both non-negative integers and K≤T.
US10581457B2	Shift coefficient and lifting factor design for NR LDPC code Concepts and schemes pertaining to shift coefficient and lifting factor design for NR LDPC code are described. A processor of an apparatus may generate a quasi-cyclic-low-density parity-check (QC-LDPC) code and encode data using the selected codebook. In generating the QC-LDPC code, the processor may define a plurality of sets of lifting factors, generate a respective table of shift values for each lifting factor of the plurality of sets of lifting factors, and generate the QC-LDPC code using a base matrix and the shift coefficient table.
US10581442B2	Apparatus for correcting linearity of a digital-to-analog converter Described is an apparatus which comprises: a digital-to-analog converter (DAC) having a DAC cell with p-type and n-type current sources and an adjustable strength current source which is operable to correct non-linearity of the DAC cell caused by both the p-type and n-type current sources; and measurement logic, coupled to the DAC, having a reference DAC cell with p-type and n-type current sources, wherein the measurement logic is to monitor an integrated error contributed by both the p-type and n-type current sources of the DAC cell, and wherein the measurement logic is to adjust the strength of the adjustable strength current source according to the integrated error and currents of the p-type and n-type current sources of the reference DAC cell.
US10581434B1	Memory device processing An example apparatus includes a memory device comprising a plurality of banks of memory cells. A particular bank of memory cells among the plurality of banks includes a system processor resident on a particular bank of the plurality of banks.
US10581432B2	Level shift circuit and method for level shifting A level shift circuit which comprises a voltage applying part configured to apply predetermined voltage to a first node intermittently. An input part receives an input signal and applies reference voltage to a second node when a signal level of the input signal is equal to a first voltage level. A switching part connects the second node and the first node with each other during the voltage applying part does not apply the predetermined voltage to the first node. The switching part cuts off the connection between the second node and the first node during the voltage applying part applies the predetermined voltage to the first node. An inverter provides a phase-inverted signal of the signal given to the first node as an output signal.
US10581425B2	Semiconductor device A semiconductor device includes a power semiconductor switching element, a comparator circuit, a filter circuit and an erroneous-detection prevention circuit. The comparator circuit compares a value of an output voltage of the switching element with a threshold and outputs a comparison result as a determination signal. The filter circuit outputs the determination signal to the control circuit after a delay time required for the output voltage of the switching element to reach a predetermined voltage value for determining that the switching element is in a normal ON state after the switching element is turned on. The erroneous-detection prevention circuit changes a turn-on time of the switching element, the delay time, or a voltage value of the determination signal when a voltage of the power supply drops in a case where the switching element is normally turned on.
US10581417B2	Skew sensor with enhanced reliability A skew control loop circuit for controlling a skew between a plurality of digital signals, and a semiconductor device, and a method of operation, for the same, may be provided. The skew control loop circuit comprises a skew detector for detecting a phase difference between the digital signals, a skew control circuit adapted for controlling an operation of the skew control loop circuit. The skew control circuit is operable in a first operating mode and in a second operating mode. The skew control loop circuit comprises also an enable input of the skew detector, wherein the enable input is adapted for receiving an enable input signal, generated by the skew control circuit, wherein the enable input is adapted for selectively enable or disable a phase detection operation of the skew detector, and wherein the enable input signal is only active during the first operating mode.
US10581412B1	Pulsed level shifter circuitry Techniques are disclosed relating to level-shifting circuitry and time borrowing across voltage domains. In disclosed embodiments, an apparatus includes pulse circuitry, latch circuitry, pull circuitry, and feedback circuitry. The pulse circuitry is configured to generate a pulse signal in response to an active clock edge. The latch circuitry is configured to store a value of an input signal, where the input signal has a first voltage level. The pull circuitry is configured to drive, during the pulse signal, an output of the latch circuitry to match a logical value of the input signal at a second, different voltage level. This may allow the input signal to change during the pulse, enabling time borrowing. The feedback circuitry is configured to maintain the output of the latch circuitry at the second voltage level after the pulse signal.
US10581402B1	Integrated quartz MEMS tuning fork resonator/oscillator A piezoelectric quartz tuning fork resonator having a pair of tines formed from a common quartz plate, with a middle electrode and two outer electrodes being disposed at or on top and bottom surfaces of each of the pair of tines and interconnected such that the outer electrodes at or on the top and bottom surfaces of a first one of the pair of tines are connected in common with the middle electrodes on the top and bottom surfaces of a second one of the pair of tines and further interconnected such that the outer electrodes at or on the top and bottom surfaces of the second one of the pair of tines are connected in common with the middle electrodes on the top and bottom surfaces of the first one of the pair of tines.
US10581401B2	Module device A module device includes electrode lands and signal wires on an upper surface defining one main surface of a module substrate. A filter chip is mounted on the module substrate. The filter chip includes first bumps connected to a signal potential, second bumps connected to a ground potential, and a third bump not electrically connected to a functional electrode portion. In a mount region, the third bump which is a floating bump is electrically connected to the signal wire.
US10581399B2	Impedance matching component The present invention is directed to an impedance matching network for use at a predetermined frequency. The network includes: a low impedance port having a first impedance substantially equal to an impedance of an RF amplifier port; a first distributive transmission line network coupled to the low impedance port, the first distributive transmission line network including a plurality of first transmission lines, each first transmission line being characterized by a first characteristic impedance and a first electric line length at the predetermined frequency to form a first quasi-lumped reactive element so that the plurality of first transmission lines form a first quasi-lumped element impedance matching stage; at least one second distributive transmission line network coupled to the first distributive transmission line network and a high impedance port, the second distributive transmission line network including a plurality of second transmission lines, each second transmission line being characterized by a second characteristic impedance and a second electric line length at the predetermined frequency to form a second quasi-lumped reactive element so that the plurality of second transmission lines form at least one second quasi-lumped element impedance matching stage; and a high impedance port coupled to the at least one second quasi-lumped element impedance matching stage, the high impedance port having a second impedance substantially equal to a system impedance.
US10581395B2	Variable gain amplifier A variable gain amplifier (1) includes: a signal transmission circuit (10, 20) including amplifying transistor units (111 to 11N, and 211 to 21N) connected in parallel between a signal input port (2P, 2N) and a signal output port (3P, 3N); a load circuit (40) connected between a supply line of power supply voltage (VDD) and an output end of the signal transmission circuit (10, 20); a signal short circuit (30) including a short-circuit transistor unit (31) connected between the supply line of the power supply voltage (VDD) and an input end of the signal transmission circuit (10, 20), a constant-current source circuit (42), and a transistor control circuit (46). The transistor control circuit (46) selects transistor units to be turned on, from among the amplifying transistor units (111 to 11N, and 211 to 21N) and the short-circuit transistor unit (31), and supplies control voltages for turning on the selected transistor units.
US10581390B2	On-chip resistor divider compensation with a 2VRMS input A new compensation system for an audio input reduces noise by matching feedback ratios in the positive and negative paths. A variable resistance network allows for fine control of resistance trimming in one of the signal paths, which allows for compensation between tolerance of resistors that are external to an integrated circuit and those that are internal to the integrated circuit.
US10581387B2	RF switch with split tunable matching network An improved architecture for a radio frequency (RF) power amplifier, impedance matching network, and selector switch. One aspect of embodiments of the invention is splitting the functionality of a final stage impedance matching network (IMN) into two parts, comprising a base set of off-chip IMN components and an on-chip IMN tuning component. The on-chip IMN tuning component may be a digitally tunable capacitor (DTC). In one embodiment, an integrated circuit having a power amplifier, an on-chip IMN tuner, and a selector switch is configured to be coupled to an off-chip set of IMN components. In another embodiment, an integrated circuit having an on-chip IMN tuner and a selector switch is configured to be coupled through an off-chip set of IMN components to a separate integrated circuit having an RF power amplifier.
US10581383B2	Dual-feedback amplifier limiter A method and apparatus for a dual-feedback, amplifier limiter for providing a conditioned radio-frequency signal. The dual-feedback, amplifier limiter includes an input that receives a radio-frequency signal and a stacked amplifier including an input node coupled to the input, an output node, a first transistor configured as a common-base amplifier, and a second transistor configured as a common-emitter amplifier. The dual-feedback, amplifier limiter further includes an output coupled to the output node of the stacked amplifier. The output provides the conditioned radio-frequency signal. The dual-feedback, amplifier limiter further includes a radio-frequency feedback circuit coupled to the stacked amplifier. The radio-frequency feedback circuit includes a passive radio-frequency dependent reactive element in series with a radio-frequency feedback circuit resistor. The dual-feedback, amplifier limiter further includes an envelope control feedback circuit coupled to the stacked amplifier and including a current mirror and a reactive element loop filter.
US10581374B2	Solar energy system for use with tufted geosynthetics A solar energy system for use with tufted geosynthetics on a substantially flat surface having a racking structure with bases and attachments for frictional seating to a tufted geosynthetic ground cover system, a bifacial solar panel mounted to the racking system and electrically connected to a connection box for communicating electrical current to an electricity power conditioner of an electrical current grid generated upon exposure of the solar panel to ambient light. A method of using a solar energy system with tufted geosynthetics cover system is disclosed.
US10581368B2	Surge suppression circuit and inverter drive motor system The present invention relates to a surge suppression circuit connected between an output end of an inverter INV and a cable 100 to drive a motor M that is connected to the output end of the inverter INV via the cable 100, and relates to a motor drive system in which the surge suppression circuit is used. The surge suppression circuit 300 includes an inductance L and a resistor R connected in parallel with the inductance L. The resistor R is set so as to match, or so as to be less than, an impedance of zero-phase component of the cable 100. A surge suppression circuit and an inverter drive motor system are enabled to be applied to a low-voltage small-capacity inverter with no DC voltage neutral terminal, and enabled to reduce the zero-component of the surge voltage according to the connection to the output end of the inverter.
US10581362B2	Power supply system, transportation device, and power transmission method A power supply system includes a first energy storage, a second energy storage, a power transmission circuit, and circuitry. The first energy storage outputs first output power to an electric load. The second energy storage outputs second output power to the electric load. The circuitry is configured to acquire a demand power to be supplied to the electric load. The circuitry is configured to acquire a remaining capacity value indicating remaining capacity in the second energy storage. The circuitry is configured to control the power transmission circuit to change a ratio of the first output power to the second output power to supply the demand power in accordance with the demand power and the remaining capacity value.
US10581354B2	Method for detecting a fault in a generator unit A method for detecting a fault in a generator unit that has an electrical machine including a rotor winding and a stator winding and a rectifier connected thereto, via which the electrical machine is connected to an electrical system of a motor vehicle. Whether or not the fault exists is determined as a function of an excitation current traversing the rotor winding of the electrical machine and as a function of a setpoint value of the excitation current.
US10581353B2	Motor drive control device and motor drive control method A motor drive control device includes a PWM circuit configured to generate an excitation current for a motor, a measurement circuit configured to measure a charge duty of the excitation current, an arithmetic circuit configured to obtain a characteristic line from the change of the measured duty and calculate a predetermined division point of an excitation current waveform from the characteristic line, and a setting circuit configured to set a level of the excitation current at the division point.
US10581347B2	Manually operated piezoelectric energy harvesting electronic circuitry An electrical energy harvesting device for harvesting electrical energy from a pulsed impact loading event. The device including: a piezoelectric element configured to be loaded and unloaded to a first load level by the pulsed impact loading event; and a first inductor coupled to the piezoelectric element configured to be loaded and unloaded to a second load level by the pulsed impact loading event, wherein the piezoelectric element and the first inductor together operate as a first inductor/capacitor (LC) resonant circuit having a first resonance frequency and wherein the loading of the first inductor lags in time the loading of the piezoelectric element.
US10581346B2	Motor using vibrator, and electronic apparatus A motor capable of holding a vibrator without increasing a dimension thereof in a traveling direction (driving direction) and without having looseness. The motor includes a vibrator and a holding unit that holds the vibrator, and moves the vibrator and a sliding member in frictional contact with the vibrator relative to each other by vibrating the vibrator. A pressurizing unit pressurizes the vibrator against the friction member, and holding springs generate a holding force for causing the holding unit to hold the vibrator. The holding unit is not disposed between the pressurizing unit and the vibrator. A holding direction of the holding force generated by the holding springs and a pressurizing direction of a pressurizing force generated by the pressurizing unit are substantially parallel to each other.
US10581344B2	Miniature kinetic energy harvester for generating electrical energy from mechanical vibrations The invention relates to a miniature kinetic energy harvester for generating electrical energy, comprising a support, a first element having walls surrounding at least one cavity, at least one spring mounted between the first element and the support, the spring being arranged so that the first element may be brought into oscillation relative to the support according to at least one direction of oscillation, a transducer arranged between the first element and the support for converting oscillation of the first element relative to the support into an electrical signal, at least one second element housed within the cavity and mounted to freely move within the cavity relative to the first element so as to impact the walls of the cavity when the harvester is subjected to vibrations.
US10581337B2	Power converter A diode rectifier rectifies an AC voltage output from a neutral-grounding three-phase AC power supply to a DC voltage. A smoothing capacitor smoothes the DC voltage rectified by the diode rectifier. An inverter converts the DC voltage smoothed by the smoothing capacitor into a desired AC voltage. A bidirectional switch and a Y capacitor are connected in series between one end of the smoothing capacitor and the ground. A detector detects a voltage across both ends of the smoothing capacitor. A controller drives the bidirectional switch in response to an output of the detector.
US10581329B2	Synchronous rectification type DC/DC converter A control circuit for a DC/DC converter including P-channel and N-channel transistors. The control circuit includes: a pulse generator that generates first and second pulse signals for designating turning on/off of the P-channel and N-channel transistors such that a state of the DC/DC converter or a load approaches a target value; first and second drivers that drive the P-channel and N-channel transistors based on the first and second pulse signals; first to fourth lines individually connected to an upper side power supply terminal of the first driver, a lower side power supply terminal of the second driver, a lower side power supply terminal of the first driver, and an upper side power supply terminal of the second driver; and first and second regulators that stabilize voltages of the third and fourth lines to first and second given voltage values. A coupling capacitor is connected between the third and fourth lines.
US10581327B2	Symmetrical power stages for high power integrated circuits A circuit assembly for a power converter includes power stage blocks and heat-dissipating substrate. A power stage block includes a power stage IC die, an output inductor that is connected to a switch node of the power stage IC die, and capacitors that form an output capacitor of the power stage block. The output capacitors of the power stage blocks are symmetrically arranged. The output inductors can be placed on the same side of the substrate as the power stage IC dies, or on a side of the substrate that is opposite to the side where the power stage IC dies are disposed. A power stage block may generate two output phases of the power converter.
US10581326B2	Power converters and compensation circuits thereof In an embodiment, a circuit includes a Direct Current (DC)-DC buck-boost converter and a controller. The controller includes an error amplifier configured to receive a feedback signal responsive to an output signal of the buck-boost converter. The error amplifier is configured to compare the feedback signal and a reference signal to generate an error signal. The controller includes a modulator circuit that is configured to receive the error signal and compare the error signal with a periodic ramp signal to generate a modulated signal. The controller further includes a digital logic block to generate switching signals in response to the modulated signal that is fed to the buck-boost converter to control the output signal of the buck-boost converter. The controller includes a capacitance multiplier circuit coupled to the output of the error amplifier to configure a dominant pole so as to compensate the buck-boost converter.
US10581324B2	Voltage charge pump with segmented boost capacitors A voltage charge pump circuit with boost capacitor segments and boost delay chain structures are provided. The voltage charge pump circuit comprising a plurality of boost capacitor segments each of which is individually controlled by a respective signal line of a boost delay chain structure.
US10581323B2	Voltage charge pump with segmented boost capacitors A voltage charge pump circuit with boost capacitor segments and boost delay chain structures are provided. The voltage charge pump circuit comprising a plurality of boost capacitor segments each of which is individually controlled by a respective signal line of a boost delay chain structure.
US10581321B1	Flyback converter with multiplier signal control circuit and method A multiplier signal, and multiplier circuits and methods are provided to improve the total harmonic distortion (THD) and power factor (PF) for a flyback type power factor correction (PFC) circuit. The multiplier signal has a “pulled-up” waveshape that is configured to compensate for the “push-down” effect of varying off times of an electronic switch of the PFC on a line current of the PFC. The multiplier circuit is configured to reduce the multiplier signal during a first operational mode of the multiplier circuit and is further configured to maintain a typical multiplier signal during a second operational mode. The first operational mode occurs before a first phase angle and after a second phase angle during each half-cycle of a power source coupled to the PFC circuit. The second operational mode occurs between the first and second phase angles during each half-cycle.
US10581315B2	System and method providing over current protection based on duty cycle information for power converter System and method for protecting a power converter. An example system controller for protecting a power converter includes a signal generator, a comparator, and a modulation and drive component. The signal generator is configured to generate a threshold signal. The comparator is configured to receive the threshold signal and a current sensing signal and generate a comparison signal based on at least information associated with the threshold signal and the current sensing signal, the current sensing signal indicating a magnitude of a primary current flowing through a primary winding of a power converter. The modulation and drive component is coupled to the signal generator.
US10581314B2	Overcurrent protection circuit and liquid crystal display An overcurrent protection circuit and a liquid crystal display are provided. The overcurrent protection circuit includes a first field effect transistor, a capacitor, a voltage comparator, and a logic control module, wherein a gate of the first field effect transistor is coupled to a supply voltage, a source of the first field effect transistor is coupled to a direct voltage, a positive input terminal of the voltage comparator is electrically connected to a drain of the first field effect transistor, a negative input terminal of the voltage comparator is coupled to a reference voltage, an output terminal of the voltage comparator, and an output terminal of the voltage comparator is connected to an input terminal of a logic control module.
US10581298B2	Robot arm apparatus and actuator A robot arm apparatus includes a base structure, a first arm, a first actuator, and an assisting device. The first arm is pivotable relative to the base structure about a first pivot axis. The first actuator is configured to pivotally actuate the first arm relative to the base structure. The assisting device is configured to apply an assist rotational force to the first arm to assist the first actuator.
US10581297B2	Sealless downhole system with magnetically supported rotor A fluid rotor is configured to move or be rotated by a working fluid. A fluid stator surrounds the fluid rotor. The fluid stator is spaced from the fluid rotor and defines a first annular fluid gap in-between that is in fluid communication with an outside environment exterior the downhole-type pump. A radial magnetic bearing includes a first portion coupled to the fluid rotor and a second portion coupled to the fluid stator. The first portion is spaced from the second portion defining a second annular fluid gap in-between that is in fluid communication with the outside environment exterior the downhole-type pump.
US10581291B2	Stator for an electric machine, and method for manufacturing same Disclosed are a stator (10) for an electric machine (12) and a method for manufacturing a stator of said type which comprises a stator body (34) that has radial stator teeth (14); each stator tooth (14) accommodates exactly one coil section (18) of an electric winding (16); the winding (16) consists of exactly two separate winding strands (24, 25) which are wound from exactly two separate winding wires (22) and each of which has three phases (26) comprising at least two coil sections (18, 17) each.
US10581288B2	Rotor and rotary electrical machine A rotor includes: a rotary member; permanent magnets in a plurality of columns which are arranged along the circumferential direction of the rotary member and each of which is divided into a plurality of permanent magnets in a rotary axis direction X of the rotary member; and a sheath tube which is fitted to the outer circumferential side of the permanent magnets, which covers the permanent magnets and which is formed of a fiber-reinforced plastic, and the sheath tube is divided, in the rotary axis direction X of the rotary member, by a division number which exceeds the division number of the permanent magnets.
US10581286B2	Permanent-magnet-embedded electric motor and compressor A rotor of a permanent-magnet-embedded electric motor includes an annular rotor core having a plurality of magnet insertion holes formed in a circumferential direction, and permanent magnets inserted into the magnet insertion holes, respectively. The rotor core is formed by alternately stacking a first core block and a second core block in an axial direction of the rotor core, the first core block not having slits between each of the magnet insertion holes and a circumferential surface of the rotor core, and the second core block having the slits between each of the magnet insertion holes and the circumferential surface of the rotor core. One of the slits and one end of the permanent magnet are arrayed in a radial direction, and the other slit and the other end of the permanent magnet are arrayed in the radial direction.
US10581285B2	Rotor assembly of an electric motor A rotor assembly of an electric motor generally comprises a center shaft configured to rotate about a longitudinal axis and a plurality of spacers extending radially outward from the center shaft, the spacers fixedly attached to the center shaft. A plurality of axially stacked annular laminations are coaxially aligned with the center shaft and radially supported on an inner circumferential surface by the plurality of spacers. Each of the plurality of spacers has, at each axial end of the stacked annular laminations, first and second axial restraining elements extending in an outward radial direction beyond the inner circumferential surface of the plurality of stacked annular laminations. The plurality of stacked annular laminations are compressed between the first axial restraining element and the second axial restraining element, such that an axial compression force is applied to the plurality of stacked laminations.
US10581281B2	In situ coil parameter measurements and foreign objects detection A foreign object detection method and apparatus for performing same. A wireless power transmitter has a matching network and transmit coil. The method includes, stimulating the transmit coil with electrical signals at a plurality of frequencies, measuring a response of the transmit coil to the electrical signals, determining a quality factor and/or resonant frequency of the transmit coil based upon the measured response, and analyzing the quality factor and/or resonant frequency to determine whether a foreign object is coupled to an electromagnetic field generated by the transmit coil.
US10581279B2	Radio frequency and optical based power for remote component conditioning using thermoelectrics A thermoelectric conditioning arrangement may comprise a first antenna/splitter configured to transmit a power & control signal, a second antenna/splitter configured to receive the power & control signal, a waveguide coupled between the first antenna/splitter and the second antenna/splitter, wherein the power & control signal is guided from the first antenna/splitter to the second antenna/splitter via the waveguide, a power converter configured to receive the power & control signal from the second antenna/splitter and generate a direct current (DC) signal, and a thermoelectric cooler (TEC) configured to receive the DC signal from the power converter.
US10581262B2	Quick charging method, mobile terminal, and power adapter Methods and devices are provided for quick charging. In the method, after a mobile terminal recognizes a type of a power adapter, the mobile terminal transmits indication information to the power adapter. The indication information is configured to indicate that the mobile terminal has recognized the type of the power adapter and instruct the power adapter to activate a quick charging process. The power adapter then negotiates with the mobile terminal via the quick charging process to determine charging parameters, and charges a battery of the mobile terminal in a multi-stage constant current mode.
US10581256B2	Control method and electronic device based on battery leakage state Various embodiments relating to an electronic device and a method based on a battery leakage state have been described. According to an example embodiment, an electronic device includes a display; a communication circuit; a battery; a current sensor configured to measure a charge current used for charging the battery; and a processor, wherein the processor may be configured to measure a charge current using the current sensor, to determine a leakage state of the battery based on at least a part of the charge current, and to provide a notification corresponding to the leakage state through the display and/or perform a specified function corresponding to the leakage state based on at least a part of the leakage state.
US10581234B2	Residual current devices A residual current device (RCD) comprises test circuitry which issues intermittent first test pulses each simulating a residual current fault for which a corresponding fault signal is generated. In the case of a fault in which a corresponding fault signal is not received in respect of a first pulse, the RCD attempts to force the load contacts open. The test circuitry further issues intermittent second test pulses at a frequency less than that of the first test pulses, each second test pulse simulating a residual current for which a corresponding fault signal is generated. The duration of each corresponding fault signal is greater than the response time of the load contacts to allow the load contacts to open. If the test circuitry detects that the load contacts do not open, the RCD attempts to force the load contacts open.
US10581225B1	Optical devices with bandwidth enhancing structures A light-emitting device includes a substrate having a first surface and an opposing second surface, and an epitaxial structure having a first surface and an opposing second surface. The second surface of the epitaxial structure is positioned in proximity with the first surface of the substrate. The light-emitting device includes a first metal layer having a first surface and an opposing second surface. The light-emitting device further includes at least one light confinement structure configured to confine light produced within the epitaxial structure. The at least one light confinement structure provides a low-refraction index boundary that confines the light in a mesa structure that is at least partially surrounded by the at least one light confinement structure. The at least one light confinement structure can also be arranged to create separate confinement regions to serve as bandwidth enhancement coupled cavities for the active region of the light-emitting device.
US10581214B2	High power lockout switch for laser device with threaded actuator A lockout system for a laser device of a type having a laser emitter operable to emit a laser beam at a plurality of intensity levels includes a lockout switch operable to be placed in either a first state or a second state, wherein the laser device is configured to prevent actuation of the laser emitter at an intensity level above a preselected threshold intensity level when the lockout switch is in the first state and to permit actuation of the laser emitter at an intensity level above the preselected threshold intensity level when the lockout switch is in the second state. A lockout key operable to transition the lockout switch between the first state and the second state. In a further aspect, a laser sight device incorporating the lockout system herein is provided.
US10581211B2	Busway stab assemblies and related systems and methods A plug-in device for use with a busway system comprising a busway housing defining a longitudinal axis includes a stab base housing having first and second opposite sides, one or more stab conductors extending out of and away from the stab base housing at each of the first and second sides of the stab base housing, and a first alignment tab on the first side of the housing and a second alignment tab on the second side of the housing. The stab base housing is configured to be received through an opening at a bottom portion of the busway housing and positioned in a first position and then rotated from the first position to a second position. The first and second alignment tabs are configured to allow rotation from the first position to the second position in only one rotational direction.
US10581199B2	Guided cable plugging in a network Methods, systems and computer program products are provided for facilitating cable plugging in a network by wirelessly reading, by a hand-held mobile device, connector identifying information directly from a tag associated with a cable connector at one end of a cable to be plugged in the network. The hand-held mobile device uses the connector identifying information to ascertain guidance for where to properly plug the cable connector in the network, and based on ascertaining the guidance, an action is performed to assist in properly plugging the cable connector in the network.
US10581190B1	Contact for an electrical connector A contact includes a main body having a top, a bottom, a first side and a second side. The contact includes a terminating end extending from the main body and a mating beam extending from the main body opposite the terminating end. The mating beam has a root at the main body and a tip opposite the root. The mating beam has an elongated coupling base between the root and the tip. The elongated coupling base has a bottom surface configured to face a mating contact being generally parallel to the mating contact between the root and the tip.
US10581189B2	Cable-to-board connector The present invention relates to cable-to-board connectors for fine pitch, high speed connector assemblies. The exemplary connector assembly includes an insulative housing, a plurality of first contacts disposed in the housing wherein at least a portion of the contacts are adapted to terminate at a conductive trace on a printed circuit board and a first cable comprising a plurality of first wires. Each of the first contacts has a first mating portion for making electrical contact with a corresponding contact of a mating connector; and a first terminal portion extending along a housing bottom wherein the first terminal portion is adapted to terminate at a conductive trace on a printed circuit board. In the exemplary cable assembly, each first wire of the first cable is terminated at the first terminal portion of a different first contact.
US10581187B2	Plug receiver with contact springs for a circuit board Various embodiments include a plug receptacle for an electrical plug-in connection for receiving a plug with electrical plug conductor comprising a contact region for electrical connection to the plug receptacle comprising: a housing with an insertion region into which the plug can be releasably inserted; an electrical plug receptacle conductor rigidly arranged in the housing; and an electrical connecting conductor floating in the housing configured to electrically connect the plug receptacle conductor to the plug conductor. The electrical connecting conductor exerts a connecting force onto the contact region of the plug conductor once inserted into the plug receptacle. The connecting force runs substantially orthogonally in relation to said contact region.
US10581176B2	Thin-film sensor antenna A sensor antenna including a thin film material constructed in the shape of an antenna having a response, the material including a sheet resistance capable of being modified by an external stimulus where the antenna response varies over a range of sheet resistance values; method of making a sensor antenna; system including a sensor antenna; and method for operating a thin film sensor antenna including providing a thin film sensor antenna; exposing the sensor antenna to an external stimulus, simultaneously sensing the external stimulus while varying the sensor antenna response, measuring the change in the sensor antenna response, and correlating the measured response to a known change in the stimulus are disclosed.
US10581158B2	Electronically beam-steerable, low-sidelobe composite right-left-handed (CRLH) metamaterial array antenna A high-gain, low-sidelobe, beam-steerable antenna includes a liquid-crystal loaded composite right- and left-handed (CRLH) metamaterial array. The metamaterial array includes a pair of first and second rows of unit cells, to propagate a radiation pattern along a first axis. One row can operate in left-hand mode, and the other row can operate in right-hand mode. Each unit cell in the metamaterial array includes a volume of liquid crystal and at least one isolated ground patch. The isolated ground patch being is as a virtual ground connection capable of generating a potential difference for tuning the dielectric value of the liquid crystal. The first and second rows are oriented end-to-end along the first axis and separated from each other by a first distance. The antenna includes a phase variable liquid-crystal loaded lens that is controllable to be phase variable along a second axis orthogonal to the first axis.
US10581155B1	Active interference cancellation Antenna structures and methods of operating the same are described. One apparatus includes a processing device that executes an active interference cancellation (AIC) algorithm and radio frequency front-end (RFFE) circuitry coupled to the processing device. The RFFE circuitry includes two RF couplers, a fixed-delay filter, and an interference compensation circuit part of an electrical path between the two RF couplers. The AIC algorithm is operable to control the interference compensation circuit to adjust a phase, an amplitude or both of a copy of a first RF signal transmitted on a first antenna to remove corresponding interference in a second RF signal received at a second antenna that is caused by the first RF signal. The processing device triggers a re-calibration in the AIC algorithm when the digital values, received from a power detector circuit, indicate a change in impedance that exceeds a threshold.
US10581144B2	Hearing device incorporating conformal folded antenna A hearing device adapted to be worn by a wearer comprises a shell configured for placement on an exterior surface of an ear of the wearer. The shell comprises a first end, a second end, a bottom, a top, and opposing sides, wherein the bottom, top, and opposing sides extend between the first and second ends. Circuitry is provided within the shell comprising at least a microphone, signal processing circuitry, radio circuitry, and a power source. A folded antenna is coupled to the radio circuitry and extends longitudinally along one of the bottom and the top and along the opposing sides between the first and second ends. The folded antenna encompasses at least some of the circuitry and forms an elongated gap between the opposing sides. The elongated gap faces the other of the bottom and the top.
US10581141B2	RF antenna arrangement configured to be a part of a lid to an apparatus An RF antenna arrangement has the same or slightly larger footprint as the RF shield for radio chips on a printed circuit board. The apparatus includes a printed circuit board, a digital processor, a radio chip(s), a radio frequency shield, a lid, and an RF antenna arrangement(s). The lid has the same or slightly larger footprint as the RF shield, which enables the lid to fit on the RF shield. The RF antenna is formed as an integral part of the lid. The apparatus also includes an RF transmission coaxial cable(s) having a first end physically and electrically connected to the RF antenna arrangement(s) and the surface of the lid, and a second end electrically coupled to an RF connector. By forming the antenna arrangement(s) from the lid, this invention solves the space constraint problems of antenna placements for wireless device applications. Additionally, this invention is cost-effective and simple to manufacture.
US10581124B2	Battery assembly controller which monitors voltages of secondary batteries and semiconductor integrated circuit used for the battery assembly controller A battery assembly controller controls terminal voltages of a plurality of series-connected secondary batteries to be equal. The controller includes a discharge circuit selectively reducing the terminal voltages of the secondary batteries; and a monitoring circuit directly connected to positive and negative electrodes of the secondary batteries to monitor the terminal voltages of the secondary batteries.
US10581121B2	Balance correction control apparatus, balance correction system and electric storage system Provided is a balance correction control apparatus to control a balance correction apparatus designed to correct a balance between voltages of a first electric storage cell and a second electric storage cell connected in series based on a target setting for an SOC of each of the first electric storage cell and the second electric storage cell. The balance correction control apparatus includes a cell characteristic obtaining unit operable to obtain at least one cell characteristic selected from the group consisting of a degree of deterioration, a cell capacity and a temperature of each of the first electric storage cell and the second electric storage cell, and a target setting determining unit operable to determine the target setting for the SOC of each of the first electric storage cell and the second electric storage cell based on the at least one cell characteristic obtained by the cell characteristic obtaining unit.
US10581114B2	Battery-equipped device Provided is a battery-equipped device including a substrate, a device disposed on the substrate, an all-solid-state battery disposed such that the planar shape conforms to the periphery of the device on the substrate and at least partially having a complementary outer edge shape that conforms to the entire or a part of the outer edge shape of the device, and interconnections connecting the device and the all-solid-state battery. The all-solid-state battery includes a positive electrode layer containing an oriented polycrystalline positive-electrode active material composed of lithium transition metal oxide particles oriented in a certain direction, a solid electrolyte layer composed of a lithium-ion conductive material, and a negative electrode layer containing a negative-electrode active material. The present invention can provide a battery-equipped device that can significantly increase the degree of freedom of design and can output necessary electric power in a minimum space.
US10581113B2	All-solid battery including a solid electrolyte and a layer of polymer material A process for producing all-solid, thin-layer batteries that do not lead to the appearance of phases at the interface between electrolyte layers to be assembled. Such a process for producing a battery may occur at low temperature without causing inter-diffusion phenomena at the interfaces with the electrodes.
US10581111B2	Ceramic lithium retention device A ceramic lithium battery sub-cell is provided. The ceramic lithium battery sub-cell includes a cathode region, an anode region, and a separator interconnecting the cathode region and the anode region. The separator is a ceramic electrolyte free of penetrating apertures. The ceramic lithium battery sub-cell also includes a cathode current collector positioned on a surface of the cathode region, and an anode current collector positioned on a surface of the anode region. The anode region is filled with a first porous electrolyte encapsulated by the separator, the anode current collector and at its periphery by a second porous electrolyte. The porosity of the second porous electrolyte is less than the porosity of the first porous electrolyte.
US10581109B2	Fabrication method of all solid-state thin-film battery A method of forming an all solid-state thin-film battery that can be scaled down and be integrated into a CMOS process is provided. The method includes a lift-off process in which battery material layers formed upon a patterned sacrificial material are removed from a bottom electrode, while battery material layers that are formed directly on a surface of the bottom electrode remain after performing the lift-off process. In some embodiments, a solid-state lithium based battery can be formed that includes a thin lithiated cathode material layer (thickness of less than 200 nm) composed of LiCoO2. Such a solid-state lithium based battery exhibits enhanced battery performance in terms of charge rate and specific charge capacity.
US10581107B2	Secondary battery and manufacturing method thereof To provide a secondary battery that can be mounted on a substrate and can easily select a voltage to be output in manufacture and a manufacturing method thereof. A secondary battery in which small cells with substantially the same form are stacked and whose voltage to be output is easily selected in manufacture by changing the number of stacked layers is manufactured. In the cell, an electrolytic solution including a spacer and a polymer is used to keep at least a certain distance between the positive electrode active material layer and the negative electrode active material layer with the spacer. Furthermore, the electrolytic solution is made to gelate by the polymer to be an electrolytic solution that can be formed in the form of a sheet. Furthermore, the positive electrode active material layer and the negative electrode active material layer are formed using a printing method typified by screen printing.
US10581099B2	Use of neural network and EIS signal analysis to quantify H2 crossover in-situ in operating PEM cells Methods for detecting a hydrogen leak and quantifying a rate of the same in a polymer electrolyte membrane fuel cell stack are provided, as well as a fuel cell diagnostic apparatus that diagnoses a hydrogen leak in a fuel cell stack.
US10581090B2	Fuel cell system containing humidity sensor and method of operating thereof Various systems and methods disclosed herein may include a fuel cell system that may dynamically respond to changes in steam concentration in the fuel cell system. The fuel cell system may include a fuel cell stack that produces an anode exhaust stream, an anode recycle blower that receives the anode exhaust stream and outputs an anode recycle stream, and a humidity sensor configured to measure the steam concentration of the anode recycle stream. The fuel cell system may also include a master controller configured to receive steam concentration measurement from the humidity sensor and control the operation of the anode recycle blower and/or other components based on the steam concentration measurement.
US10581089B2	Open flow field fuel cell Provided is a polymer electrolyte membrane fuel cell stack, comprising a first bipolar plate, a second bipolar plate, an electrochemical package comprising a cathode, an anode, and a polymer membrane interposed between the cathode and the anode, an anode compartment disposed between the first bipolar plate and the anode, the anode compartment comprising at least one inlet and at least one outlet, a cathode compartment disposed between the second bipolar plate and the cathode, the cathode compartment comprising at least one inlet and at least one outlet, and wherein the geometric area of the anode compartment is larger than the geometric area of the anode. Also provided is a polymer electrolyte membrane fuel cell stack, comprising a first bipolar plate, a second bipolar plate, an electrochemical package comprising a cathode, an anode, and a polymer membrane interposed between the cathode and the anode, an anode compartment disposed between the first bipolar plate and the anode, the anode compartment comprising at least one inlet and at least one outlet, a cathode compartment disposed between the second bipolar plate and the cathode, the cathode compartment comprising at least one inlet and at least one outlet, and wherein the geometric area of the cathode compartment is larger than the geometric area of the cathode.
US10581088B2	Fuel cell gas diffusion layer made up of a carbon substrate grafted with an aromatic grouping The present invention relates to a gas diffusion layer for a fuel cell, made of a carbon substrate grafted with at least one aromatic group having formula (II): wherein: the asterisk * designates a carbon atom with no hydrogen and no Ri group, with i=1 to 5, and covalently bonded to the carbon substrate; at least two of the R1, R2, R3, R4, and R5 groups are different from a hydrogen atom; at least two of the R1, R2, R3, R4, and R5 groups are hydrophobic groups or hydrophilic groups or a hydrophobic group and a hydrophilic group.
US10581086B2	Cathode formulation for survivor locator light A Water Activated Battery characterized by a) At least one anode selected from the group consisting of magnesium, aluminum, zinc and alloys thereof; b) A cathode comprising at least one basic copper salt comprising Cu(OH)2combined with a copper salt CuX (with (n−1) the molar ratio between the CuX and the Cu(OH)2in the basic copper salt), such that a discharge reaction in saline versus a Mg anode could be written nMg+Cu(OH)2.(n−1)CuX=Mg(OH)2+(n−1)MgX+nCu) on a skeletal frame, the cathode further comprising a non-hygroscopic soluble, ionically conductive material; c) at least one cavity separating said cathode and said at least one anode; and d) at least one aperture leading to said at least one cavity for the ingress of an electrolyte-forming, aqueous liquid.
US10581084B2	Method of activating catalyst for fuel cell A method of activating a catalyst for a fuel cell in order to perform catalyst activation in a cathode electrode of the fuel cell includes a first process in which hydrogen is supplied into an anode electrode, the side of an air supply line of the cathode electrode is sealed, and the side of an air exhaust line of the cathode electrode is opened to an atmosphere, a second process in which the side of the air exhaust line of the cathode electrode is sealed after the first process, and a third process in which catalyst activation is performed in the cathode electrode after the second process.
US10581072B2	Anode active material and a lithium secondary battery including the same An anode active material for a lithium secondary battery, the anode active material including a metal silicide core, a silicon shell disposed on the core, and a metal nitride disposed on a surface of the silicon shell opposite the core.
US10581061B2	System and method for metal-air anode renovation A method for renovation of a consumed anode in a metal-air cell without dismantling the cell comprises circulating electrolyte through the cell to evacuate used slurry from the cell, circulating electrolyte with fresh slurry into the cell and allowing sedimentation of the fresh slurry inside the cell to form an anode and compacting the slurry to reduce the gaps between its particles. A meta-air cell enabling renovation of a consumed anode without dismantling the cell defining first outer face of the cell, air cathode layer adjacent the porous wall, separator wall disposed on the inner face of the air cathode layer, cell space volume to contain electrolyte and metal granules slurry, current collector layer to form an anode, made of current conductive material disposed in the space and flexible wall defining a second outer face of the cell wherein the flexible wall is adapted to be pushed towards inside of the cell subject to pressure applied to its outer face, thereby to reduce the volume of the space.
US10581058B2	Welding assembly for liquid-injection hole of secondary battery A welding assembly for a liquid-injection hole of a secondary battery, including a top cover of a case, a liquid-injection hole, a sealing cover-plate and a stress release structure, wherein the liquid-injection hole is disposed in the top cover and includes a assembling recess and a through-hole arranged sequentially from top to bottom of the top cover, the assembling recess and the through-hole present a stepped transition and the radial dimension of the assembling recess is larger than that of the through-hole. The sealing cover-plate is accommodated in the assembling recess and the stress release structure is provided at one or both sides of the welding portion and capable of releasing stress from the welding portion. The welding assembly provides a stress release structure nearby the welding portion, and when the welding portion is full-strength welded, the stress-release structure can effectively release stress nearby the welding seam.
US10581056B2	Systems, methods, and devices for pre-charge control of a battery module The present subject matter relates to a battery module for use in a vehicle. The battery module may include a housing, a plurality of battery cells disposed within the housing, and solid state pre-charge control circuitry that pre-charges a direct current (DC) bus that may be coupled between the battery module and an electronic component of the vehicle. Furthermore, the solid state pre-charge control circuitry may include solid state electronic components as well as passive electronic components.
US10581046B2	Laminar textile material for a battery electrode The invention relates to a laminar textile material for covering a pasty active mass on a battery electrode. The invention further relates to a battery electrode having such a material, to a battery, and to a method for producing battery electrodes. Potential improvements of lead batteries are disclosed that are more practical than previously known solutions, and that stabilize the pasty active mass on the battery electrodes. A laminar textile material is disclosed to this end, comprising glass fibers and fibers made of a thermoplastic, e.g. polyester.
US10581045B2	Separator for electrochemical element having improved electrolyte wettability and electrochemical element comprising same separator The present invention relates to a separator for an electrochemical element having improved electrolyte wettability and an electrochemical element comprising the separator, in which a layer containing at least two binder polymers having different slopes on the frequency-storage modulus curve is formed on a surface of the separator, and with one of the binder polymers being concentratedly distributed on the surface of the separator, the separator and the electrode can be securely attached, and with the other binder polymer being permeated and coated onto a porous polymer substrate, electrolyte wettability can be enhanced.
US10581037B2	Low-profile battery construct with engineered interfaces A battery structure includes an anode packaging material having a first textured surface and an anode metal formed on the first textured surface. A separator is formed on the anode metal. A cathode packaging material includes a second textured surface. A cathode metal is formed on the second textured surface. An active cathode paste is formed on the cathode metal and brought into contact with the separator such that any gap is filled with electrolyte.
US10581032B2	Lithium battery packaging material A lithium battery packaging material of the present invention includes a laminate in which a substrate layer, a first adhesive layer, a metal foil layer, a corrosion prevention treatment layer, a second adhesive layer, and a sealant layer are laminated in this order. In the packaging material, the corrosion prevention treatment layer contains an rare-earth oxide, and 1 to 100 parts by mass of phosphoric acid or phosphate relative to 100 parts by mass of the rare-earth oxide, the second adhesive layer includes an adhesive composition containing an acid modified polyolefin resin and a polyfunctional isocyanate compound, and, in an infrared absorption spectrum of the second adhesive layer, a ratio (Y/X) between absorption (X) derived from C—H bending vibration of CH3 and absorption (Y) derived from N—H bending vibration of a biuret bond is 0.3 or less.
US10581031B2	Organic EL display device An organic EL display device includes a thin film transistor; a first insulating layer covering the thin film transistor; a first conductive layer on the first insulating layer; a second insulating layer on the first conductive layer; a second conductive layer on the second insulating layer; a pixel capacitor formed of the first conductive layer, the second insulating layer and the second conductive layer; a third insulating layer provided on the second conductive layer and including an opening in a region overlapping a part of the second conductive layer as seen in a plan view; and an organic layer covering the opening of the third insulating layer and including a light emitting layer. The first insulating layer includes a first groove in a region overlapping the third insulating layer as seen in a plan view, and a part of the pixel capacitor is located inside the first groove.
US10581019B2	Organic EL element having reduced electric power consumption by optimizing film thicknesses thereof and method of manufacturing same An organic electroluminescence element includes an anode, a light-emitting layer disposed over the anode, a functional layer disposed on the light-emitting layer in contact with the light-emitting layer and including a first metal, a light-transmitting conductive layer disposed on the functional layer in contact with the functional layer and composed of a metallic oxide, and a cathode disposed on the light-transmitting conductive layer in contact with the light-transmitting conductive layer and composed of a metal. The functional layer has a film thickness of 15 to 35 nm. A surface of the anode on the light-emitting layer side and an interface between the cathode and the light-transmitting conductive layer are spaced from each other by not less than 150 nm.
US10581016B2	Package structure, packaging method and electronic device The beneficial effects of the present application are as follows: the modified epoxy resin is doped with the modified epoxy resin in the buffer layer, the modified epoxy resin is reacted with the first barrier layer under UV irradiation, so that the modified epoxy resin is adhered to the first barrier layer to adhere the buffer layer and the first barrier layer and solve the technical problem that the organic layer and the inorganic layer are easily peeled off in the prior art. The present application also provides a packaging method and an electronic device.
US10581013B2	Display module and display apparatus having the same A bottom chassis of a display module is provided. The bottom chassis includes a bead part formed by depressing some portions of the bottom chassis toward a rear side, and a reinforcing panel attached to a front surface of the bottom chassis and spaced apart from the bead part.
US10581012B2	Organic light-emitting diode and method for manufacturing the same, display substrate and method for manufacturing the same, and display device The present disclosure provides an organic light-emitting diode and a method for manufacturing the same, a display substrate and a method for manufacturing the same, and a display device. The organic light-emitting diode comprises a first electrode, a second electrode, and an organic light-emitting layer arranged between the first electrode and the second electrode, in which the second electrode is arranged close to the light-emitting side of the organic light-emitting diode, the first electrode includes a reflective conductive layer, and a surface of the reflective conductive layer close to the second electrode has an uneven structure.
US10581009B2	Organic light-emitting component and method for producing an organic light-emitting component The invention relates to an organic light-emitting device comprising an organic stack of layers between two electrodes. The organic stack of layers comprises a first light-emitting layer and the first light-emitting layer comprises an emitter material adapted to generate electromagnetic radiation during operation of the device. Taken together, the transition dipole moments of the radiation generating transition of the molecules of the emitter material have an anisotropic orientation inside the first light-emitting layer, and it applies that is less than ⅓, where θ is the angle between the respective transition dipole moment of the radiation generating transition of the molecules of the emitter material and a layer normal of the first light-emitting layer.
US10581007B2	Crosslinked emissive layer containing quantum dots for light-emitting device and method for making same A light-emitting device includes an anode; a cathode; and an emissive layer disposed between the anode and the cathode, the emissive layer including quantum dots dispersed in a crosslinked matrix formed from one or more crosslinkable charge transport materials. A method of forming the emissive layer of a light-emitting device includes depositing a mixture including quantum dots and one or more crosslinkable charge transport materials on a layer; and subjecting at least a portion of the mixture to UV activation to form an emissive layer including quantum dots dispersed in a crosslinked matrix.
US10580987B2	Photolithographic patterning of organic electronic devices A method of patterning an organic device includes depositing a first organic functional layer over a device substrate to form a first intermediate structure, the first organic functional layer having a first function such as hole transport or electron transport. The first intermediate structure is coated with a fluoropolymer and treated in a processing agent comprising a fluorinated solvent in which the fluoropolymer is soluble to form a processed intermediate structure. A second organic functional layer is deposited over at least a portion of the first organic functional layer, the second organic functional layer also having the first function.
US10580986B2	Vapor deposition apparatus with electromagnets generating magnetic field in reverse orientation A vapor deposition apparatus is configured to attract a vapor deposition mask by an electromagnet. The electromagnet includes a first electromagnet for generating a magnetic field in a first orientation, and a second electromagnet for generating a magnetic field in a second orientation, which is a reverse orientation to the first orientation. As a result, a generated magnetic field is weakened by operating the first and second electromagnets at the same time when a current is turned on, and an intended magnetic field can be obtained by thereafter turning off the second electromagnet. As a result, an influence of electromagnetic induction is reduced, reducing failure of elements and the like formed on a substrate for vapor deposition and degradation in properties of the elements. Meanwhile, by turning off the operation of the second electromagnet after the current is turned on, a normal attraction force can be obtained.
US10580985B2	Deposition mask, method for manufacturing thereof, and method for manufacturing organic EL display device A deposition mask and a manufacturing method thereof capable of performing vapor deposition at a desired place, without causing any gap between the deposition mask and a substrate for vapor deposition having a surface of irregularity, even when depositing a vapor deposition material only at a predetermined place on a bottom part of the substrate for vapor deposition, are provided. The manufacturing method includes preparing a dummy substrate having irregularity corresponding to a surface shape of the substrate for vapor deposition (step S1), coating a liquid resin material on an uneven surface of the dummy substrate to form a resin coating layer (step S2), and raising the temperature of the resin coating layer and baking the resin coating layer to obtain a baked resin film (step S3). The manufacturing method further includes forming a desired opening pattern on the baked resin film attached to the dummy substrate to obtain a resin film having the desired opening pattern (step S4), and subsequently peeling off the resin film from the dummy substrate to obtain a deposition mask (step S6).
US10580981B1	Method for manufacture of a CEM device A method for the manufacture of a correlated electron material device which method comprises forming a conductive substrate and forming a layer of a correlated electron material on the conductive substrate, wherein the forming of the correlated electron material layer comprises: forming a layer of a metal rich transition or other metal compound; and annealing the layer of the metal rich transition or other metal compound in an atmosphere containing a gaseous precursor for an electron-back donating extrinsic ligand capable of occupying an anion vacancy within the transition or other metal compound; wherein the annealing provides that an anion vacancy within the transition or other metal compound is occupied by an electron back-donating extrinsic ligand; and wherein the annealing is carried out at a predetermined temperature and for a predetermined time whereby to activate electron back-donation from a transition or other metal cation to the electron back-donating extrinsic ligand occupying the anion vacancy.
US10580978B2	Current compliance layers and memory arrays comprising thereof Provided are novel compositions of current compliance layers (CCLs) as well as novel methods of fabricating such CCLs and novel architectures of arranging CCLs and memory cells in memory arrays. A CCL may comprise one of sulfur (S), selenium (Se), and tellurium (Te). The CCL may further comprise one of germanium (Ge) and silicon (Si). CCLs may be fabricated as amorphous structure and remain amorphous when heated to 400° C. or 450° C. and above. In some embodiments, CCLs have crystallization temperatures of greater than 400° C. and, in some embodiments, glass transition temperatures of greater than 400° C. CCLs may be fabricated using atomic layer deposition (ALD) as a nanolaminate of layers having different compositions. The composition, number, and arrangement of the layers in the nanolaminate is specifically selected to yield a desired composition of CCL.
US10580973B2	Spin-transfer torque memory (STTM) devices having magnetic contacts Techniques are disclosed for forming integrated circuit structures including a magnetic tunnel junction (MTJ), such as spin-transfer torque memory (STTM) devices, having magnetic contacts. The techniques include incorporating an additional magnetic layer (e.g., a layer that is similar or identical to that of the magnetic contact layer) such that the additional magnetic layer is coupled antiferromagnetically (or in a substantially antiparallel manner). The additional magnetic layer can help balance the magnetic field of the magnetic contact layer to limit parasitic fringing fields that would otherwise be caused by the magnetic contact layer. The additional magnetic layer may be antiferromagnetically coupled to the magnetic contact layer by, for example, including a nonmagnetic spacer layer between the two magnetic layers, thereby creating a synthetic antiferromagnet (SAF). The techniques can benefit, for example, magnetic contacts having magnetic directions that are substantially in-line or substantially in-plane with the layers of the MTJ stack.
US10580972B2	Electronic device and method for fabricating the same The disclosed technology includes an electronic device. The electronic device includes a semiconductor memory, and the semiconductor memory includes a variable resistance element that exhibits different resistance states for storing different data and is structured to include a planar shape including two curved potions of different curvatures.
US10580969B2	Electronic device An electronic device may include a semiconductor memory, and the semiconductor memory may include a first magnetic layer; a second magnetic layer; and a spacer layer interposed between the first magnetic layer and the second magnetic layer, wherein the spacer layer includes a first layer, a second layer and an intermediate layer interposed between the first layer and the second layer, and wherein each of the first layer and the second layer includes an oxide, or a nitride, or a combination of an oxide and a nitride, the intermediate layer includes a multilayer structure including [Ru/x]n or [x/Ru]n, x includes a metal, an oxide, or a nitride, or a combination of a metal, an oxide and a nitride, and n represents an integer of 1 or greater.
US10580961B2	Method for determining a threshold voltage for obtaining a batch of sensing chips with increased sensitivity and method for increasing sensitivity of the batch of sensing chips A method for determining a threshold voltage for a batch of sensing chips includes steps of: a) selecting at least three of micro-machined transceivers; b) conducting for each of the at least three of the micro-machined transceivers the following sub-steps of: b1) introducing a blank liquid into a micro-channel via an inlet port, b2) applying an alternate voltage to a micro-machined transmitter for a period of time, and b3) measuring an amplitude of an electric signal from a micro-machined receiver to obtain a maximum value and a minimum value; c) measuring a mid-value; and d) determining the threshold voltage. Also disclosed is a method for increasing sensitivity of the batch of sensing chips based on the threshold voltage.
US10580950B2	Light emitting device Disclosed herein is a light emitting device manufactured by separating a growth substrate in a wafer level. The light emitting device includes: a base; a light emitting structure disposed on the base; and a plurality of second contact electrodes disposed between the base and the light emitting structure, wherein the base includes at least two bulk electrodes electrically connected to the light emitting structure and an insulation support disposed between the bulk electrodes and enclosing the bulk electrodes, the insulation support and the bulk electrodes each including concave parts and convex parts engaged with each other on surfaces facing each other, and the convex parts including a section in which a width thereof is changed in a protrusion direction.
US10580949B2	Light emitting module A light emitting module according to an embodiment includes a first insulation film and a second insulation film with a light transmissivity, a plurality of first double-sided light emitting elements disposed between the first insulation film and the second insulation film, and each including a pair of electrodes on one surface, a plurality of second double-sided light emitting elements disposed between the first insulation film and the second insulation film adjacent to the respective first double-sided light emitting elements, each including a pair of electrodes on one surface, and emitting different light from the first double-sided light emitting element.
US10580948B2	Light source module A light source module including a substrate, an LED package, an optical cover, and at least one packing layer is provided. The LED package is disposed on the substrate and includes an encapsulant. The optical cover is disposed above the LED package. The at least one packing layer is filled between the LED package and the optical cover.
US10580946B2	Light emitting device having a dam surrounding a light emitting region A light emitting device includes: a base substrate; a plurality of unit regions provided on the base substrate; a barrier disposed at a boundary of the unit regions to surround each of the unit regions; a dam disposed in each of the unit regions to be spaced apart from the barrier; a first electrode provided in each of unit light emitting regions surrounded by the dam; a second electrode disposed in each of the unit light emitting regions, the second electrode of which at least one region is provided opposite to the first electrode; and one or more LEDs provided in each of the unit light emitting regions, the one or more LEDs being electrically connected between the first electrode and the second electrode.
US10580944B2	Wavelength conversion member, light-emitting device, and method for manufacturing wavelength conversion member Provided is a wavelength conversion member that can increase the light extraction efficiency to improve the luminous efficiency. A wavelength conversion member 10 includes: a phosphor layer 1 containing a glass matrix and inorganic phosphor powder dispersed in the glass matrix; a glass layer 2 disposed on a surface of the phosphor layer 1 and having a refractive index equal to or smaller than a refractive index of the inorganic phosphor powder; and a microscopically uneven layer 3 disposed on a surface of the glass layer 2 and having a refractive index equal to or smaller than the refractive index of the glass layer 2.
US10580941B2	Optoelectronic semiconductor component An optoelectronic semiconductor component comprising a connection carrier with a mounting face and an electrically insulating base member. An optoelectronic semiconductor chip is arranged on the mounting face of the connection carrier. A radiation-transmissive body having four side faces is provided. The radiation-transmissive body surrounds the semiconductor chip in such a way that the radiation-transmissive body envelops outer faces of the optoelectronic semiconductor chip not facing the connection carrier in form-fitting manner. The radiation-transmissive body comprises at least one side face which extends at least in places at an angle of between 60° and 70° to the mounting face. The base member has a thickness which amounts to at most 250 μm.
US10580938B2	Light-emitting diode chip, and method for manufacturing a light-emitting diode chip A light-emitting diode chip and a method for manufacturing a light-emitting diode chip are disclosed. In an embodiment a light-emitting diode chip includes an epitaxial semiconductor layer sequence having an active zone configured to generate electromagnetic radiation during operation and a passivation layer comprising statically fixed electrical charge carriers, wherein the passivation layer is located on a side surface of the semiconductor layer sequence covering at least the active zone.
US10580930B2	Graphene light emitting transistor and method for the fabrication thereof, active graphene light emitting display apparatus The present application provides a graphene light emitting transistor, including: a gate electrode disposed on a substrate; a gate insulating layer disposed on the substrate and the gate electrode; a source electrode and a drain electrode disposed on the gate insulating layer, wherein the source electrode and the drain electrode are formed by graphene; a graphene oxide layer disposed on the gate insulating layer and located between the source electrode and the drain electrode; a graphene quantum dot layer disposed on the graphene oxide layer, the source electrode and the drain electrode; and a water and oxygen resistant layer disposed on the graphene quantum dot layer. The present application also provides a method of fabricating the graphene light emitting transistor and an active graphene light emitting display apparatus having the graphene light emitting transistor.
US10580926B2	Multi-junction solar cell A multi-junction solar cell comprising a high-crystalline silicon solar cell and a high-crystalline germanium solar cell. The high-crystalline silicon solar including a first p-doped layer and a n+ layer and the high-crystalline germanium solar cell including a second p layer and a heavily doped layer. The multi-junction solar cell can also be comprised of a heavily doped silicon layer on a non-light receiving back surface of the high-crystalline germanium solar cell and a tunnel junction between the high-crystalline silicon solar cell and the high-crystalline germanium solar cell.
US10580924B2	Graphene devices for terahertz detection and emission Devices and methods for Terahertz (THz) sensing/detection, imaging, spectroscopy, and communication are provided. A graphene-based field effect transistor (FET) can have a quality factor of greater than 400 and a responsivity of at least 400 Volts per Watt. A FET sensor can include a substrate, a gate disposed on the substrate, an insulation layer disposed on the gate and the substrate, a source terminal and a drain terminal disposed on the substrate, and a graphene layer disposed on the insulation layer.
US10580923B2	Optical semiconductor device and optical transceiver A disclosed optical semiconductor device includes a first semiconductor layer having a first refractive index and a first optical absorption coefficient; and a second semiconductor layer formed on the first semiconductor layer, the second semiconductor layer having a second refractive index and a second optical absorption coefficient. The second refractive index is larger than the first refractive index, and the second optical absorption coefficient is larger than the first optical absorption coefficient. The first semiconductor layer includes a first region of p-type, a second region of n-type, a third region of p-type or n-type between the first region and the second region, a fourth region of i-type between the first region and the third region, and a fifth region of i-type between the second region and the third region. The second semiconductor layer is formed on the first region, the fourth region, and the third region.
US10580922B2	Method of providing a boron doped region in a substrate and a solar cell using such a substrate Method of providing a boron doped region (8, 8a, 8b) in a silicon substrate (1), includes the steps of: (a) depositing a boron doping source (6) over a first surface (2) of the substrate (1); (b) annealing the substrate (1) for diffusing boron from the boron doping source (6) into the first surface (2), thereby yielding a boron doped region; (c) removing the boron doping source (6) from at least part of the first surface (2); (d) depositing undoped silicon oxide (10) over the first surface (2); and (e) annealing the substrate (1) for lowering a peak concentration of boron in the boron doped region (8, 8a) through boron absorption by the undoped silicon oxide. The silicon oxide (10) acts as a boron absorber to obtain the desired concentration of the boron doped region (8).
US10580906B1	Semiconductor device comprising a PN junction diode A semiconductor device comprising a pn junction diode and a method of making the same. The device includes a semiconductor substrate having a first conductivity type. The device also includes a buried oxide layer located in the substrate. The device further includes a semiconductor region having a second conductivity type extending beneath the buried oxide layer to form a pn junction with a semiconductor region having the first conductivity type. The pn junction is located beneath the buried oxide layer and extends substantially orthogonally with respect to a major surface of the substrate. The device also includes a field plate electrode comprising a semiconductor region located above the buried oxide layer for modifying an electric field at the pn junction by application of a potential to the field plate electrode.
US10580899B2	Nanowire structures having non-discrete source and drain regions Nanowire structures having non-discrete source and drain regions are described. For example, a semiconductor device includes a plurality of vertically stacked nanowires disposed above a substrate. Each of the nanowires includes a discrete channel region disposed in the nanowire. A gate electrode stack surrounds the plurality of vertically stacked nanowires. A pair of non-discrete source and drain regions is disposed on either side of, and adjoining, the discrete channel regions of the plurality of vertically stacked nanowires.
US10580896B2	Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer An SOI wafer contains a compressively stressed buried insulator structure. In one example, the stressed buried insulator (BOX) may be formed on a host wafer by forming silicon oxide, silicon nitride and silicon oxide layers so that the silicon nitride layer is compressively stressed. Wafer bonding provides the surface silicon layer over the stressed insulator layer. Preferred implementations of the invention form MOS transistors by etching isolation trenches into a preferred SOI substrate having a stressed BOX structure to define transistor active areas on the surface of the SOI substrate. Most preferably the trenches are formed deep enough to penetrate through the stressed BOX structure and some distance into the underlying silicon portion of the substrate. The overlying silicon active regions will have tensile stress induced due to elastic edge relaxation.
US10580889B2	Semiconductor device and method of manufacturing thereof, and power conversion apparatus A first semiconductor layer of a first conductivity type, a first semiconductor region of a second conductivity type provided in an upper layer part thereof, a second semiconductor region of the first conductivity type provided in the upper layer part thereof, a gate trench penetrating through the first and second semiconductor regions in a thickness direction and a bottom surface thereof reaching inside of the first semiconductor layer, a gate insulating film in the gate trench, a gate electrode embedded in the gate trench, a second semiconductor layer of the second conductivity type provided so as to extend, from the bottom surface of the gate trench, a third semiconductor layer of the second conductivity type extending to a position deeper than the bottom surface of the gate trench, and a fourth semiconductor layer of the first conductivity type interposed between the second semiconductor layer and the third semiconductor layer in the position deeper than the bottom surface of the gate trench.
US10580882B2	Low band gap semiconductor devices having reduced gate induced drain leakage (GIDL) Embodiments of the present invention are directed to low band gap channel semiconductor devices. In an example, a device includes a first semiconductor material formed above a substrate, the first semiconductor material having a first band gap. A gate dielectric layer is on a surface of the first semiconductor material. A gate electrode is on the gate dielectric layer. A pair of source/drain regions is on opposite sides of the gate electrode. A channel is disposed in the first semiconductor material between the pair of source/drain regions and beneath the gate electrode. The pair of source/drain regions includes a second semiconductor material having a second band gap, and a third semiconductor material having a third band gap. The second semiconductor material is between the first semiconductor material and the third semiconductor material, and the second band gap is greater than the first bandgap.
US10580877B2	Semiconductor device and method for manufacturing the same A semiconductor device of the present invention includes a gate electrode buried in a gate trench of a first conductivity-type semiconductor layer, a first conductivity-type source region, a second conductivity-type channel region, and a first conductivity-type drain region formed in the semiconductor layer, a second trench selectively formed in a source portion defined in a manner containing the source region in the surface of the semiconductor layer, a trench buried portion buried in the second trench, a second conductivity-type channel contact region selectively disposed at a position higher than that of a bottom portion of the second trench in the source portion, and electrically connected with the channel region, and a surface metal layer disposed on the source portion, and electrically connected to the source region and the channel contact region.
US10580875B2	Middle of line structures The present disclosure generally relates to semiconductor structures and, more particularly, to middle of line structures and methods of manufacture. The structure includes: a plurality of gate structures comprising source and/or drain metallization features; spacers on sidewalls of the gate structures and composed of a first material and a second material; and contacts in electrical contact with the source and/or drain metallization features, and separated from the gate structures by the spacers.
US10580868B2	Super-junction corner and termination structure with improved breakdown and robustness A superjunction power semiconductor device includes a termination region with superjunction structures having higher breakdown voltage than the breakdown voltage of the active cell region. In one embodiment, the termination region includes superjunction structures having lower column charge as compared to the superjunction structures formed in the active cell region. In other embodiments, a superjunction power semiconductor device incorporating superjunction structures with slanted sidewalls where the grading of the superjunction columns in the termination region is reduced as compared to the column grading in the active cell region. The power semiconductor device is made more robust by ensuring any breakdown occurs in the core region as opposed to the termination region. Furthermore, the manufacturing process window for the power semiconductor device is enhanced to improve the manufacturing yield of the power semiconductor device.
US10580866B1	Semiconductor device including source/drain dopant diffusion blocking superlattices to reduce contact resistance A semiconductor device may include a semiconductor layer, spaced apart source and drain regions in the semiconductor layer with a channel region extending therebetween, and at least one dopant diffusion blocking superlattice dividing at least one of the source and drain regions into a lower region and an upper region with the upper region having a same conductivity and higher dopant concentration than the lower region. The at least one dopant diffusion blocking superlattice comprising a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The semiconductor device may further include a gate on the channel region.
US10580865B2	Transistor with a sub-fin dielectric region under a gate Embodiments of the present disclosure describe a semiconductor multi-gate transistor having a semi-conductor fin extending from a substrate and including a sub-fin region and an active region. The sub-fin region may include a dielectric material region under the gate to provide improved isolation. The dielectric material region may be formed during a replacement gate process by replacing a portion of a sub-fin region under the gate with the dielectric material region, followed by fabrication of a replacement gate structure. The sub-fin region may be comprised of group III-V semiconductor materials in various combinations and concentrations. The active region may be comprised of a different group III-V semiconductor material. The dielectric material region may be comprised of amorphous silicon. Other embodiments may be described and/or claimed.
US10580864B2	Method of forming semiconductor device The present invention provides a semiconductor device, including a substrate, a first semiconductor layer, a plurality of first sub recess, a plurality of insulation structures and a first top semiconductor layer. The substrate has a first region disposed within an STI. The first semiconductor layer is disposed in the first region. The first sub recesses are disposed in the first semiconductor layer. The insulation structures are disposed on the first semiconductor layer. The first top semiconductor layer forms a plurality of fin structures, which are embedded in the first sub recesses, arranged alternatively with the insulation structures and protruding over the insulation structures.
US10580861B2	Trench semiconductor device layout configurations A trench semiconductor device includes a layer of semiconductor material, an exterior trench pattern formed in the layer of semiconductor material, and an interior trench pattern formed in the layer of semiconductor material, at least partially surrounded by the exterior trench pattern. The exterior trench pattern includes a plurality of exterior trench portions that are each lined with dielectric material and filled with conductive material, and the interior trench pattern includes a plurality of interior trench portions that are each lined with dielectric material and filled with conductive material.
US10580858B2	Preventing threshold voltage variability in stacked nanosheets Embodiments are directed to a method of forming a stacked nanosheet and resulting structures having equal thickness work function metal layers. A nanosheet stack is formed on a substrate. The nanosheet stack includes a first sacrificial layer formed on a first nanosheet. A hard mask is formed on the first sacrificial layer and the first sacrificial layer is removed to form a cavity between the hard mask and the first nanosheet. A work function layer is formed to fill the cavity between the hard mask and the first nanosheet.
US10580857B2	Method to form high performance fin profile for 12LP and above A shallow trench isolation (STI) structure is formed from a conventional STI trench structure of a first dielectric material extending into the substrate. The conventional STI structure undergoes further processing: removing a first portion of the dielectric material and adjacent portions of the semiconductor substrate to create a first recess, and then removing another portion of the dielectric material to create a second recess in just the dielectric material. A nitride spacer layer is formed above the remaining dielectric material and on the sidewalls of the substrate. A second dielectric material is formed on the spacer layer and fills the remainder of first and second recesses to a lever above the substrate. A nitride capping layer and another dielectric layer are disposed above the second material, thereby substantially encasing the STI structure in nitride. This provides a taller STI structure that results in a better fin profile during a subsequent fin reveal process.
US10580854B2	High thermal budget compatible punch through stop integration using doped glass A method of forming a punch through stop region in a fin structure is disclosed. The method may include forming a doped glass layer on a fin structure and forming a masking layer on the doped glass layer. The method may further include removing a portion of the masking layer from an active portion of the fin structure, and removing an exposed portion the doped glass layer that is present on the active portion of the fin structure. A remaining portion of the doped glass layer is present on the isolation portion of the fin structure. Dopant from the doped glass layer may then be diffused into the isolation portion of the fin structure to form the punch through stop region between the active portion of the fin structure and a supporting substrate.
US10580846B2	Display apparatus including conductive pattern in substrate and method of manufacturing the same A display apparatus includes a display region and a peripheral region adjacent to the display region. The display apparatus further includes a first flexible substrate (FFS), a driving circuit (DC), a conductive pattern (CP), a conductive line, a light-emitting device, and a support substrate. The FFS includes a first surface and a second surface opposite the first surface. The second surface includes, in the peripheral region, a cavity extending into the FFS. The DC is on the first surface and includes at least one transistor. The CP is in the cavity and is partially exposed by the cavity. The conductive line electrically connects the CP to the DC. The light-emitting device is in the display region and is electrically connected to the DC. The support substrate is on the second surface. In a view normal to the second surface, the support substrate is spaced apart from the CP.
US10580839B2	Self-luminous display pixel A self-luminous display pixel is provided, including: a self-luminous circuit including a self-luminous device, the self-luminous device including a bottom electrode layer; wherein the bottom electrode layer includes a light blocking layer; and the self-luminous display pixel further includes an optical fingerprint sensing circuit, the optical fingerprint sensing circuit includes a first TFT device and a photosensitive device, and a channel layer of the first TFT device is disposed right under a portion of the bottom electrode layer. A fingerprint sensing function can be realized by the self-luminous display pixel, and an overall structure of the self-luminous display pixel can be optimized.
US10580838B2	Display apparatus A display apparatus includes a first polarizer, a second polarizer facing the first polarizer, an organic light emitting element overlapping the first polarizer and the second polarizer, a first electrode and a second electrode between the first polarizer and the second polarizer and facing each other, and a liquid crystal layer between the first electrode and the second electrode.
US10580835B2	Display panel A display panel includes: an active area and a peripheral area adjacent to the active area, wherein the active area includes a display area including a plurality of emitting pixels and a non-display area including a plurality of non-emitting pixels, an emitting pixel of the plurality of emitting pixels includes a light-emitting element, and a non-emitting pixel of the non-emitting pixels does not include any light-emitting element or includes a pseudo-light-emitting element that is not capable of emitting light.
US10580834B2	Display device having organic layer between first electrodes and second electrode and insulating film covering side face of first electrodes, method of manufacturing the same, and electronic apparatus A disclosed display device includes first electrodes, a second electrode, an organic layer arranged between the first electrodes and the second electrode, and an insulating film configured to cover at least a side face of each of the first electrodes. The insulating film includes a first insulating layer configured to cover at least a part of the side face of each of the first electrodes, and a second insulating layer configured to cover the side face. The first insulating layer is arranged between the side face and the second insulating layer, and includes a first part and a second part whose density is lower than a density of the first part.
US10580832B2	High resolution low power consumption OLED display with extended lifetime Full-color pixel arrangements for use in devices such as OLED displays are provided, in which multiple sub-pixels are configured to emit different colors of light, with each sub-pixel having a different optical path length than some or all of the other sub-pixels within the pixel.
US10580831B2	Imaging device, manufacturing device, and manufacturing method The present technology relates to an imaging device, a manufacturing device, and a manufacturing method capable of preventing a substance such as hydrogen from entering and preventing change in performance. The imaging device includes an organic photoelectric conversion film, an upper electrode provided in an upper portion of the organic photoelectric conversion film, a lower electrode provided in a lower portion of the organic photoelectric conversion film, and a metal thin film provided between the organic photoelectric conversion film and the upper electrode or between the organic photoelectric conversion film and the lower electrode. The metal thin film is provided between the organic photoelectric conversion film and the upper electrode. The upper electrode is formed of an oxide semiconductor, a metal oxide, and the metal thin film. The present technology can be applied to a vertical spectral imaging device.
US10580829B2	Fabricating a vertical ReRAM array structure having reduced metal resistance Embodiments of the invention include resulting structures and a method for fabricating a vertical ReRAM array structure. The embodiments of the invention include forming alternating layers over a metal layer of a structure, wherein a layer of the alternating layers comprises a low resistivity material, masking one or more portions of a topmost layer of the alternating layers, and etching one or more portions of the alternating layers down to the metal layer. Embodiments of the invention also include depositing a lateral electrode layer over the etched one or more portions of the alternating layers, performing an etch back on the lateral electrode layer, and forming a vertical electrode layer over the structures.
US10580827B1	Adjustable stabilizer/polarizer method for MRAM with enhanced stability and efficient switching A magnetoresistive random-access memory (MRAM) is disclosed. The MRAM bit cell consists of a magnetic tunnel junction stack having a significantly improved performance of the magnetic storage layer. The MRAM device utilizes a polarizer layer with a magnetic vector that can switch between a stabilizing magnetic direction and a programming magnetic direction.
US10580825B2	Method of manufacturing display device Including Photoluminescence measurement Disclosed are a method of manufacturing display device, an epitaxial wafer and a display device that includes a display substrate, a first sub pixel unit and a second sub pixel unit. The first sub pixel unit and the second sub pixel unit belong to same color type. The first sub pixel unit and the second sub pixel unit are formed from an epitaxial structure on the epitaxial wafer. The first sub pixel unit and the second sub pixel unit are formed and transferred to the display substrate from the epitaxial wafer. A first light emitting area of the first sub pixel unit and a second light emitting area of the second sub pixel unit are related to at least the photoluminescence measurement result of the epitaxial wafer.
US10580816B2	Solid-state imaging device, camera module, and electronic apparatus The present technology relates to a solid-state imaging device capable of preventing defects in the appearance thereof, a camera module, and an electronic apparatus. The solid-state imaging device to be provided includes: a semiconductor substrate having pixels formed therein, the pixels each including a photoelectric conversion element; and on-chip lenses formed above the semiconductor substrate, the on-chip lenses corresponding to the pixels. The area in which the on-chip lenses are formed is extended to a peripheral area outside an imaging area formed with the pixels. The present technology can be applied to solid-state imaging devices, such as CMOS image sensors.
US10580814B2	Solid-state imaging device having light shielding films, method of manufacturing the same, and electronic apparatus The present technology relates to a solid-state imaging device that can further reduce the influence the film stress generated in an upper electrode has on a photoelectric conversion film, a method of manufacturing the solid-state imaging device, and an electronic apparatus. A solid-state imaging device includes: a photoelectric conversion film formed on the upper side of a semiconductor substrate; and two or more light shielding films formed at positions higher than the photoelectric conversion film with respect to the semiconductor substrate. The present technology can be applied to solid-state imaging devices, electronic apparatuses, and the like, for example.
US10580802B2	Display device and method of manufacturing the same A display device includes a substrate defining a display area having a plurality of pixels therein and a non-display area; a gate electrode in the display area; a panel identification layer in a panel identification area of the non-display area; a gate insulation layer on the gate electrode; a first passivation layer on the gate insulation layer; a planarization layer on the first passivation layer; and a second passivation layer on the planarization layer, wherein the second passivation layer and the planarization layer are absent in a portion of the panel identification area such that a portion of the first passivation layer is not covered by the second passivation layer and the planarization layer.
US10580798B2	Semiconductor device A semiconductor device that can retain data for a long time is provided. The semiconductor device includes a first transistor and a second transistor. The first transistor contains an oxide semiconductor in a channel formation region. The second transistor includes a first gate and a second gate. A gate of the first transistor is connected to a first electrode of the first transistor. The first electrode of the first transistor is connected to the second gate. A negative potential is applied to a second electrode of the first transistor. The first electrode and the second electrode of the first transistor include a first end portion and a second end portion, respectively. The first end portion and the second end portion face each other. The first end portion includes a first arc and the second end portion includes a second arc when seen from the top. The radius of curvature of the second arc is larger than that of the first arc.
US10580787B2	Three-dimensional memory device containing dummy antenna diodes At least one diode, lower-level metal interconnect structures embedded within lower-level dielectric material layers, and a doped semiconductor material layer are formed over a semiconductor substrate. An electrically conductive path is provided between the at least one diode and the doped semiconductor material layer. An alternating stack of insulating layers and spacer material layers and memory stack structures extending therethrough are formed above the doped semiconductor material layer. A backside trench is formed through the alternating stack. The electrically conductive path is employed during plasma etch processes employed to form the memory stack structures and the backside trench to provide a discharge path for accumulated electrical charges. The electrically conductive path is subsequently disconnected by removing a conductive component underlying the backside trench. The spacer material layers can be replaced with electrically conductive layers employing the backside trench.
US10580786B2	Semiconductor memory device and method for manufacturing the same According to one embodiment, a semiconductor memory device includes a stacked body including a plurality of electrode members and a plurality of insulating members, each of the electrode members and each of the insulating members being stacked alternately in a first direction on the substrate. The semiconductor memory device also includes a memory hole that extends in the stacked body in the first direction and a semiconductor member that is disposed to extend in the memory hole in the first direction. The semiconductor memory device also includes a memory member that is disposed between the semiconductor member and the plurality of electrode members. The plurality of electrode members including a first electrode member and a second electrode member, a thickness of the memory member at the position of the first electrode member being greater than a thickness of the memory member at the position of the second electrode member.
US10580785B2	Semiconductor device and manufacturing method for semiconductor device A semiconductor device of the present invention includes: an element isolation part which is disposed between fins and whose height is lower than the height of each fin; a memory gate electrode placed over the fins and the element isolation part with a memory gate insulating film having a charge storage part in between; and a control gate electrode disposed in line with the memory gate electrode. The height of the element isolation part below the memory gate electrode is higher than the height of the element isolation part below the control gate electrode. A mismatch between electron injection and hole injection is improved, rewriting operation speed is accelerated, and reliability is enhanced by making the height of the element isolation part below the memory gate electrode higher than the height of the element isolation part below the control gate electrode as mentioned above.
US10580782B2	Methods of forming an array of elevationally-extending strings of memory cells individually comprising a programmable charge-storage transistor A method of forming an array of elevationally-extending strings of memory cells comprises forming a stack comprising alternating insulative tiers and wordline tiers. A select gate tier is above an upper of the insulative tiers. Channel openings extend through the alternating tiers and the select gate tier. Charge-storage material is formed within the channel openings elevationally along the alternating tiers and the select gate tier. Sacrificial material is formed within the channel openings laterally over the charge-storage material that is laterally over the select gate tier and that is laterally over the alternating tiers. Elevationally-outer portions of each of the charge-storage material and the sacrificial material that are within the channel openings are etched. After such etching, the sacrificial material is removed from the channel openings. After such removing, insulative charge-passage material then channel material are formed within the channel openings laterally over the charge-storage material that is laterally over the wordline tiers. The wordline tiers are formed to comprise control-gate material having terminal ends corresponding to control-gate regions of individual memory cells and to have a charge-blocking region of the individual memory cells laterally between the charge-storage material and individual of the control-gate regions.
US10580761B2	Systems in packages including wide-band phased-array antennas and methods of assembling same A system-in-package includes a package substrate that at least partially surrounds an embedded radio-frequency integrated circuit chip and a processor chip mated to a redistribution layer. A wide-band phased-array antenna module is mated to the package substrate with direct interconnects from the radio-frequency integrated circuit chip to antenna patches within the antenna module. Additionally, fan-out antenna pads are also coupled to the radio-frequency integrated circuit chip.
US10580760B2	Light emitting device A light emitting device includes: a first light emitting element configured to emit light of a first peak wavelength; a second light emitting element configured to emit light of a second peak wavelength that is different from the first peak wavelength; a first light reflecting member disposed in contact with at least one lateral surface of the first light emitting element, the first light reflecting member having an upper surface from which an upper surface of the first light emitting element is exposed; a wavelength conversion member covering the upper surface of the first light emitting element; and a second light reflecting member disposed on the upper surface of the first light reflecting member, the second light reflecting member being located between the second light emitting element and the wavelength conversion member in a plan view.
US10580752B2	Method for bonding substrates together, and substrate bonding device A production of voids between substrates is prevented when the substrates are bonded together, and the substrates are bonded together at a high positional precision while suppressing a strain. A method for bonding a first substrate and a second substrate includes a step of performing hydrophilization treatment to cause water or an OH containing substance to adhere to bonding surface of the first substrate and the bonding surface of the second substrate, a step of disposing the first substrate and the second substrate with the respective bonding surfaces facing each other, and bowing the first substrate in such a way that a central portion of the bonding surface protrudes toward the second substrate side relative to an outer circumferential portion of the bonding surface, a step of abutting the bonding surface of the first substrate with the bonding surface of the second substrate at the respective central portions, and a step of abutting the bonding surface of the first substrate with the bonding surface of the second substrate across the entirety of the bonding surfaces, decreasing a distance between the outer circumferential portion of the first substrate and an outer circumferential portion of the second substrate with the respective central portions abutting each other at a pressure that maintains a non-bonded condition.
US10580730B2	Managed integrated circuit power supply distribution An integrated circuit (IC) can be configured to provide a managed power distribution to circuits within a plurality of regions of the IC. Each region of the plurality of regions can include a corresponding set of circuits that are electrically connected to a corresponding virtual power island (VPI) within said each region. A global power distribution structure within the IC can be configured to be electrically interconnected to an off-chip voltage supply. The IC can also include a plurality of sets of vertical interconnects (VIs), each set of VIs electrically interconnected to a VPI within a corresponding region. Each set of VIs can also be connected to the global power distribution structure, and can be used to provide a specifically managed voltage through a VPI to a set of circuits within a corresponding region of the IC.
US10580726B2	Semiconductor devices and semiconductor packages including the same, and methods of manufacturing the semiconductor devices A semiconductor device and a method of manufacturing the same, the device including a through-hole electrode structure extending through a substrate; a redistribution layer on the through-hole electrode structure; and a conductive pad, the conductive pad including a penetrating portion extending through the redistribution layer; and a protrusion portion on the penetrating portion, the protrusion portion protruding from an upper surface of the redistribution layer, wherein a central region of an upper surface of the protrusion portion is flat and not closer to the substrate than an edge region of the upper surface of the protrusion portion.
US10580724B2	Applicant screening Systems and methods for screening applicants are disclosed herein. A method of screening applicants is performed by a screening server. The server begins by receiving a selection of screening services and an applicant profile that identifies an applicant. The screening continues by generating screening results specified by the selection of screening services based on the applicant profile. A property manager is then notified that the screening results are available for the applicant based upon the applicant profile. The screening results are then provided to the property manager based upon the applicant profile. Based on these screening results, the screener or property manager can make a decision about the applicant and communicate a decision action to the applicant.
US10580722B1	High voltage flip-chip on lead (FOL) package Described herein is a technology or a method for fabricating a flip-chip on lead (FOL) semiconductor package. A lead frame includes an edge on surface that has a geometric shape that provides a radial and uniform distribution of electric fields. By placing the formed geometric shape along an active die of a semiconductor chip, the electric fields that are present in between the lead frame and the semiconductor chip are uniformly concentrated.
US10580718B2	Interconnect structure having spacer disposed on sidewall of conductive layer, manufacturing method thereof, and semiconductor structure An interconnect structure including a conductive layer, a spacer, a dielectric layer, and a contact is provided. The conductive layer is disposed on a substrate. The spacer is disposed on a sidewall of the conductive layer. The dielectric layer covers the conductive layer and the spacer. The contact is disposed in the dielectric layer and located on the conductive layer.
US10580717B2	Multiple-chip package with multiple thermal interface materials A multiple chip package is described with multiple thermal interface materials. In one example, a package has a substrate, a first semiconductor die coupled to the substrate, a second semiconductor die coupled to the substrate, a heat spreader coupled to the die, wherein the first die has a first distance to the heat spreader and the second die has a second distance to the heat spreader, a first filled thermal interface material (TIM) between the first die and the heat spreader to mechanically and thermally couple the heat spreader to the die, and a second filled TIM between the second die and the heat spreader to mechanically and thermally couple the heat spreader to the second die.
US10580715B2	Stress buffer layer in embedded package The disclosed principles provide a stress buffer layer between an IC die and heat spreader used to dissipate heat from the die. The stress buffer layer comprises distributed pairs of conductive pads and a corresponding set of conductive posts formed on the conductive pads. In one embodiment, the stress buffer layer may comprise conductive pads laterally distributed over non-electrically conducting surfaces of an embedded IC die to thermally conduct heat from the IC die. In addition, such a stress buffer layer may comprise conductive posts laterally distributed and formed directly on each of the conductive pads. Each of the conductive posts thermally conduct heat from respective conductive pads. In addition, each conductive post may have a lateral width less than a lateral width of its corresponding conductive pad. A heat spreader is then formed over the conductive posts which thermally conducts heat from the conductive posts through the heat spreader.
US10580712B2	Wiring board for mounting optical element Disclosed is a wiring board on which an optical element is mounted in a state of being sealed by a transparent plate, lens or the like while preventing or reducing the occurrence of condensation or freezing on a surface of the transparent plate, lens or the like. In one embodiment, the wiring board includes: a board body formed with opposed front and back surfaces by stacking of a plurality of ceramic layers (insulating layers); and a plurality of optical element-mounting pads disposed on a bottom surface of a cavity open to the front surface of the board body. The wiring board further includes a heater circuit arranged at the front surface of the board body or an interface of the ceramic layers of the board body along a peripheral side in plan view.
US10580701B1	Methods of making a self-aligned gate contact structure and source/drain metallization structures on integrated circuit products A method of forming a gate structure in a gate cavity laterally defined by a sidewall spacer and recessing the sidewall spacer so as to form a recessed sidewall spacer with a recessed upper surface is disclosed. In this example, the method also includes performing at least one etching process to form a tapered upper surface on the exposed portion of the gate structure above the recessed upper surface of the spacer and forming a gate cap above the tapered upper surface of the gate structure and above the recessed upper surface of the recessed sidewall spacer.
US10580698B2	Wafer processing method A wafer processing method includes a modified layer forming step of forming a modified layer along a planned dividing line within a wafer and a dividing step of dividing the wafer along the planned dividing line with the modified layer as a starting point by applying a force to the wafer. The modified layer forming step includes a forward path modified layer forming step, a backward path modified layer forming step, and a phase shift mask reversing step of reversing a phase shift mask so as to reverse phase distribution of a laser beam applied to the wafer in an X-axis direction after the forward path modified layer forming step and before the backward path modified layer forming step, or after the backward path modified layer forming step and before the forward path modified layer forming step.
US10580694B2	Contact structure and method of forming the same A method for manufacturing a semiconductor device includes providing a substrate structure including a substrate, an active region on the substrate, an electrode in the active region, and an interlayer dielectric layer covering the active region and the electrode. The method also includes etching the interlayer dielectric layer to form a contact hole exposing the electrode, forming a conductive adhesion layer on a bottom and sidewalls of the contact hole, and forming a contact member on the conductive adhesion layer filling the contact hole. The conductive adhesion layer at the bottom and sidewalls of the contact hole prevents the electrode from being oxidized while forming the contact member, thereby effectively reducing the contact resistance and the barrier height of the semiconductor device.
US10580693B2	Contact conductive feature formation and structure Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In an embodiment, a barrier layer is formed along a sidewall. A portion of the barrier layer along the sidewall is etched back by a wet etching process. After etching back the portion of the barrier layer, an underlying dielectric welding layer is exposed. A conductive material is formed along the barrier layer.
US10580687B2	Methods of forming one or more covered voids in a semiconductor substrate Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.
US10580685B2	Integrated single diffusion break A methodology for forming a fin field effect transistor (FinFET) includes the co-integration of various isolation structures, including gate cut and shallow diffusion break isolation structures that are formed with common masking and etching steps. Following an additional patterning step to provide segmentation for source/drain conductive contacts, a single deposition step is used to form an isolation dielectric layer within each of gate cut openings, shallow diffusion break openings and cavities over shallow trench isolation between device active areas.
US10580684B2	Self-aligned single diffusion break for fully depleted silicon-on-insulator and method for producing the same A method of forming an SDB that is self-aligned to a dummy gate and the resulting device are provided. Embodiments include providing a plurality of gates over a SOI layer above a BOX layer, each gate having a pair of sidewall spacers and a cap layer, and a raised S/D epitaxial regions over the SOI layer between each gate; removing a gate of the plurality of gates and a portion of the SOI layer exposed by the removing of the gate, and a portion of the BOX layer underneath the SOI layer, the removing forms a trench; forming a liner of a first dielectric material over and along sidewalls of the trench; and filling the trench with a second dielectric material.
US10580681B2	Robotic apparatus and method for transport of a workpiece A robotic apparatus for transporting a workpiece includes a first arm that pivots about a first axis and a second arm that is pivotably connected to the first arm. The second arm has a surface upon which the workpiece can be received. A first drive unit of the robotic apparatus drives the first arm member to pivot about the first axis. The robotic apparatus includes a controller that controls the first drive unit to move the surface of the second arm member to transport the workpiece. The control unit also controls the first drive unit such that the surface is not moved at an acceleration value that exceeds a predetermined acceleration limit during the transport of the workpiece.
US10580676B2	Robot system and carrying method A robot system includes a robot including a first hand, a second hand, an arm mechanism, and an elevator. The first hand is to hold a substrate. The second hand is to hold the substrate. The arm mechanism supports the first hand and the second hand to provide a height difference between the first hand and the second hand in a height direction of the robot. The elevator is to move the arm mechanism in the height direction within a moving range larger than the height difference. Both the first hand and the second hand put the substrate in the holder. Circuitry is configured to control the robot to move the arm mechanism in the height direction by the elevator to pass the substrate from the first hand to the second hand via the holder.
US10580673B2	Semiconductor metrology and defect classification using electron microscopy In some embodiments, a first plurality of electron-microscope images for respective instances of a semiconductor structure is obtained from a first source. The electron-microscope images of the first plurality show different values of one or more semiconductor-fabrication parameters. A model is trained that specifies a relationship between the first plurality of electron-microscope images and the values of the one or more semiconductor-fabrication parameters. A second plurality of electron-microscope images for respective instances of the semiconductor structure on one or more semiconductor wafers is collected. The one or more semiconductor wafers are distinct from the first source. Values of the one or more semiconductor-fabrication parameters for the second plurality of electron-microscope images are predicted using the model.
US10580660B2	Gas phase etching system and method A method and system for the dry removal of a material on a microelectronic workpiece are described. The method includes receiving a workpiece having a surface exposing a target layer to be at least partially removed, placing the workpiece on a workpiece holder in a dry, non-plasma etch chamber, and selectively removing at least a portion of the target layer from the workpiece. The selective removal includes operating the dry, non-plasma etch chamber to perform the following: exposing the surface of the workpiece to a chemical environment at a first setpoint temperature in the range of 35 degrees C. to 100 degrees C. to chemically alter a surface region of the target layer, and then, elevating the temperature of the workpiece to a second setpoint temperature at or above 100 degrees C. to remove the chemically treated surface region of the target layer.
US10580649B2	Tools and methods for producing nanoantenna electronic devices The present disclosure advances the art by providing a method and system for forming electronic devices. In particular, and by example only, methods are described for forming devices for harvesting energy in the terahertz frequency range on flexible substrates, wherein the methods provide favorable accuracy in registration of the various device elements and facilitate low-cost R2R manufacturing.
US10580646B2	Epitaxial substrate for semiconductor elements, semiconductor element, and manufacturing method for epitaxial substrates for semiconductor elements An epitaxial substrate for semiconductor elements is provided which suppresses the occurrence of current collapse. The epitaxial substrate for the semiconductor elements includes: a semi-insulating free-standing substrate formed of GaN doped with Zn; a buffer layer adjacent to the free-standing substrate; a channel layer adjacent to the buffer layer; and a barrier layer provided on an opposite side of the buffer layer with the channel layer therebetween, wherein the buffer layer is a diffusion suppressing layer formed of AlpGa1-pN (0.7≤p≤1) and suppresses diffusion of Zn from the free-standing substrate into the channel layer.
US10580643B2	Fluorination during ALD high-k, fluorination post high-k and use of a post fluorination anneal to engineer fluorine bonding and incorporation Embodiments of the present disclosure generally relate to methods for forming a high-k gate dielectric in a transistor. The high-k gate dielectric may be formed by introducing a fluorine containing gas into a processing chamber during the deposition of the high-k gate dielectric in the processing chamber. In one embodiment, the high-k gate dielectric is formed by an ALD process in a processing chamber, and a fluorine containing gas is introduced into the processing chamber during one or more stages of the ALD process. Fluorine ions, molecules or radicals from the fluorine containing gas (may be activated by a plasma) can fill the oxygen vacancies in the high-k dielectric.
US10580624B2	Plasma source and methods for depositing thin film coatings using plasma enhanced chemical vapor deposition The present invention provides novel plasma sources useful in the thin film coating arts and methods of using the same. More specifically, the present invention provides novel linear and two dimensional plasma sources that produce linear and two dimensional plasmas, respectively, that are useful for plasma-enhanced chemical vapor deposition. The present invention also provides methods of making thin film coatings and methods of increasing the coating efficiencies of such methods.
US10580619B2	Circuit assembly for providing high-frequency energy, and system for generating an electric discharge A circuit assembly (12) includes a direct voltage supply (13) providing a direct voltage (Ucc), a step-up converter circuit (16), and a control unit (17). The step-up converter circuit (16) contains a series circuit consisting of an inductor (18) and a controllable switch (19), wherein the inductor (18) is connected between a pole (21) of the direct voltage supply (13) and a first electrode (D) of the switch (19). The control unit (17) controls the switch (19) with a high-frequency to generate high-frequency energy with a periodic pulse-like output voltage (UDS) at the first electrode (D) of the switch (19), said output voltage having a peak value larger than the value of the direct voltage (Ucc). The high-frequency energy is directly output without transformation at an output connection (24) designed to directly connect to an electrode (8) of the vacuum chamber (2).
US10580616B2	System and method for in-situ beamline film stabilization or removal in the AEF region An ion implantation system has an ion source configured form an ion beam and an angular energy filter (AEF) having an AEF region. A gas source passivates and/or etches a film residing on the AEF by a reaction of the film with a gas. The gas can be an oxidizing gas or a fluorine-containing gas. The gas source can selectively supply the gas to the AEF region concurrent with a formation of the ion beam. The AEF is heated to assist in the passivation and/or etching of the film by the gas. The heat can originate from the ion beam, and/or from an auxiliary heater associated with the AEF. A manifold distributor can be operably coupled to the gas source and configured to supply the gas to one or more AEF electrodes.
US10580615B2	System and method for performing failure analysis using virtual three-dimensional imaging Disclosed are a system and method, wherein, during manufacturing of integrated circuit chips on a semiconductor wafer, an in-line optical inspection is performed to acquire a two-dimensional (2D) image of an area of the semiconductor wafer and to confirm and classify a defect in the area. The 2D image is then converted into a virtual three-dimensional (3D) image. To ensure that the 3D image is accurate, techniques are employed to determine the topography of the surface shown in the 2D image based on material-specific image intensity information and, optionally, to filter out any edge effects that result in anomalies within the 3D image. The resulting 3D image is usable for performing an in-line failure analysis to determine a root cause of a defect. Such an in-line failure analysis can be performed significantly faster than any off-line failure analysis and, thus, allows for essentially real-time advanced process control (APC).
US10580613B2	Sample stage Sample stage, e.g. for use in a scanning electron microscope. The sample stage includes a base, a sample carrier, and an actuator assembly arranged for moving the sample carrier in at least one direction substantially parallel to the base. The actuator assembly is arranged so as not to contribute to the mechanical stiffness of the sample stage from the sample carrier to the base.
US10580612B2	Electron emission source and X-ray generator using the same An electron emission source includes a cathode electrode having a recess region formed in an upper portion thereof and the yarn emitter having a tip shape and provided in the recess region of the cathode electrode. The yarn emitter is spaced from an inner surface of the recess region of the cathode electrode.
US10580609B2	Electron emission source and method for fabricating the same Provided is an electron emission source including a substrate, a fixed structure provided on the substrate, and an electron emission yarn provided between the substrate and the fixed structure. The fixed structure includes a first portion having a first width and a second portion having a second width greater than the first width, and the electron emission yarn extends on a first sidewall of the first portion of the fixed structure from between the fixed structure and the substrate.
US10580607B2	Electronic protection device An electronic protection device for a LV electric line including at least a phase conductor and a neutral conductor, comprising: input terminals and output terminals, at which said electronic protection device is electrically connected respectively with an electric power source and with an electric load through said phase and neutral conductors; a control unit comprising a controller including data processing resources; one or more pairs of main contacts electrically connected with corresponding one or more input and output terminals and adapted to be mutually coupled or separated; one or more pairs of auxiliary contacts electrically connected with corresponding one or more input terminals and with said control unit and adapted to be mutually coupled or separated; a handle movable in a first position corresponding to a closed state of said electronic protection device, in a second position corresponding to a tripped state of said electronic protection device or in a third position corresponding to an open state of said electronic protection device; an operating mechanism adapted to operate said main contacts, said auxiliary contacts and said handle; a tripping unit adapted to actuate said operating mechanism in response to an activation by said control unit. Said main contacts and said auxiliary contacts are coupled when said electronic protection device is in said closed state with said handle in said first position. Said main contacts are separated and said auxiliary contacts are coupled when said electronic protection device is in said tripped state with said handle in said second position. Said main contacts and said auxiliary contacts are separated when said electronic protection device is in said open state with said handle in said third position.
US10580594B2	Electronic device An electronic device is provided, which includes a substrate, a protruding pattern, a first conductive pattern, an insulating layer, and a second conductive pattern. The protruding pattern is disposed on the substrate. The first conductive pattern is disposed on the substrate and covers the protruding pattern. The insulating layer is disposed on the first conductive pattern. The insulating layer includes an opening overlapping at least a portion of the protruding pattern. The second conductive pattern is disposed on the insulating layer. The second conductive pattern is connected to the first conductive pattern through the opening.
US10580576B2	Dielectric powder and multilayer ceramic electronic component using the same A multilayer ceramic electronic component includes: a body part including dielectric layers and internal electrodes disposed to face each other with respective dielectric layers interposed therebetween; and external electrodes disposed on an outer surface of the body part and electrically connected to the internal electrodes. The dielectric layer includes grains including: a semiconductive or conductive grain core region containing a base material represented by ABO3, where A is at least one of Ba, Sr, and Ca, and B is at least one of Ti, Zr, and Hf, and a doping material including a rare earth element; and an insulating grain shell region enclosing the grain core region.
US10580575B2	Dielectric composition and multilayer ceramic capacitor containing the same A multilayer ceramic capacitor includes: a ceramic body including dielectric layers and first and second internal electrodes disposed to face each other with respective dielectric layers interposed therebetween; and first and second external electrodes disposed on an external surface of the ceramic body, wherein the dielectric layer contains a barium titanate-based powder particle having a core-shell structure including a core and a shell around the core, the shell having a structure in which titanium is partially substituted with an element having the same oxidation number as that of the titanium in the barium titanate-based powder particle and having an ionic radius different from that of the titanium in the barium titanate-based powder particle, and the shell covers at least 30% of a surface of the core.
US10580569B2	Electronic component including planar transformer An electronic component 100 includes: a circuit board module 104 which is composed of a plurality of layers, and in which a primary circuit 120 and secondary circuits 122, 124 are each formed using wring patterns of a first layer L1 to an eighth layer L8; and a magnetic core 106 which magnetically couples the primary circuit 120 and the secondary circuits 122, 124. The circuit board module 104 includes: cutout portions 104b which are formed in a cutout shape from side edge portions toward an inner side and which position the magnetic core 106 at a predetermined attachment position in a state of housing the magnetic core 106; and widened portions 104c which continue from the cutout portions 104b and are formed in a cutout shape from the side edge portions toward the inner side of the circuit board module 104, and which are formed on sides of the magnetic core 106 so as to be larger than a width W1 for housing of the cutout portions 104b.
US10580567B2	Coil component and method of manufacturing the same A coil component includes: a body including a magnetic material and a coil of which both ends are externally exposed; intermetallic compounds disposed on the exposed both ends of the coil; and external electrodes disposed on the body to cover the intermetallic compounds. The external electrodes include: conductive resin layers disposed on outer surfaces of the body to contact the exposed both ends of the coil and including base resins, a plurality of metal particles disposed in the base resins, and conductive connecting parts surrounding the plurality of metal particles and contacting the intermetallic compounds. The coil component further includes electrode layers disposed on the conductive resin layers and contacting the conductive connecting parts.
US10580563B2	Coil component A coil component includes: a coil part; and a body formed around the coil part and containing a magnetic material. The body contains a first magnetic powder particle having a first insulating film formed on a surface thereof, and a second magnetic powder particle having a second insulating film formed on a surface thereof, and an average thickness of the first insulating film is thicker than that of the second insulating film.
US10580560B2	Coil module A coil module including a magnetic body having a first body portion extended in a first axial direction and a second body portion extended in a second axial direction different from the first axial direction; and a transmitting coil including a first coil wound around a portion of the first body portion and a second coil wound around a portion of the second body portion.
US10580559B2	Coil component A coil component may include a body including a plurality of insulating layers having coil patterns disposed on the plurality of insulating layers. The coil pattern may include a coil portion, a leading portion disposed on one side of the insulating layer, and a connection portion connecting the coil portion and the leading portion, a pattern line of the coil portion may have an arc shape, and the connection portion may be formed in a tangent line direction of the coil portion from one end of the leading portion.
US10580547B2	Scintillator panel and radiation detector Provided is a scintillator panel which can be more easily and conveniently manufactured at a low cost and which has a high luminance and a high sharpness. The scintillator panel according to the present invention includes: a substrate; barrier ribs placed on the substrate; and a phosphor packed into cells separated by the barrier ribs, the phosphor having a porosity of 20% or less and having a grain boundary.
US10580541B2	Apparatus and system for simulating maintenance of reactor core protection system A system for simulating maintenance of a reactor core protection system that has at least two or more channels, includes: a simulation signal generation unit for generating a simulation state signal including a normal state or an abnormal state, a communication unit connected to each of the channels of the reactor core protection system to transmit the state signal to the channel, and a control unit for receiving a result signal output from the channel in response to the input simulation state signal and confirming whether the reactor core protection system normally determines a reactor core state by analyzing the result signal.
US10580533B2	Image-based food analysis for medical condition warnings A method of performing image based analysis of food. The method includes receiving, with an electronic processor, image data captured by an image capture device, analyzing the image data to identify a food represented in the image data, and determining a characteristic of the food identified in the image data. The method further includes accessing medical information of a user, determining a level of risk associated with the user ingesting the food identified in the image data based on the medical information of the user, and outputting a notification, where the notification providing information related to the level of risk associated with the user ingesting the food identified in the image data.
US10580525B2	Secure cabinet for dispensing items A secure cabinet that can secure and distribute products. The cabinet can have a user interface that receives information about a user and the user's identity can then be authenticated. The cabinet can accept a user's request to dispense a product and, if the user is approved, the cabinet can dispense a quantity of product to the approved user.
US10580519B2	System and method of automatically displaying patient information Methods, systems, and products improve healthcare of patients. An electronic patient chart is retrieved and displayed at a patient room computer system. The electronic patient chart is also displayed at a remotely-located primary computer system, such as a nurse's station or other monitoring party. The patient room computer system is linked to the remotely-located primary computer system such that updates to the electronic patient chart received at the patient room computer system are also updated at the primary computer system to permit monitoring.
US10580518B2	Method and apparatus for performing similarity searching A system and method for performing similarity searching is disclosed wherein programmable logic devices such as field programmable gate arrays (FPGAs) can be used to implement Bloom filters for identifying possible matches between a query and data. The Bloom filters can be implemented in a parallel architecture where the different parallel Bloom filters share access to the same memory units. Further, a hash table may be generated to map a set of strings to keys. In other examples, the hash table may be used to map a set of substrings to a position in a larger string.
US10580515B2	Systems and methods for generating biomarker signatures The systems and methods described herein include a technique for generating both reproducible and interpretable gene signatures. The technique involves resampling a data set and choosing genes having a high frequency of emergence. In particular, the systems and methods described herein include repeated sampling of data sets, ranking genes based on frequency of occurrence in gene signatures generated through the repeated sampling process, and iteratively selecting the best gene signature.
US10580514B2	Periodically updating a log likelihood ratio (LLR) table in a flash memory controller Log likelihood ratio (LLR) values that are computed in a flash memory controller during read retries change over time as the number of program-and-erase cycles (PECs) that the flash memory die has been subjected to increases. Therefore, in cases where an LLR table is used to provide pre-defined, fixed LLR values to the error-correcting code (ECC) decoding logic of the controller, decoding success and the resulting BER will degrade over time as the number of PECs to which the die has been subjected increases. In accordance with embodiments, a storage system, a flash memory controller for use in the storage system and method are provided that periodically measure the LLR values and update the LLR table with new LLR values. Periodically measuring the LLR values and updating the LLR table with new LLR values ensures high decoding success and a low BER over the life of the flash memory die.
US10580504B2	Non-volatile memory with countermeasure for program disturb including spike during boosting Program disturb is a condition that includes the unintended programming of a memory cell while performing a programming process for other memory cells. Such unintended programming can cause an error in the data being stored. In some cases, program disturb can result from electrons trapped in the channel being accelerated from one side of a selected word line to another side of the selected word line and redirected into the selected word line. To prevent such program disturb, it is proposed to open the channel from one side of a selected word line to the other side of the selected word line after a sensing operation for program verify and prior to a subsequent programming voltage being applied.
US10580494B2	Semiconductor memory device A semiconductor memory device comprises a memory string that includes a plurality of memory cells electrically connected in series, the memory cells including first to fourth memory cells, first to fourth word lines that are electrically connected to gates of the first to fourth memory cells, respectively, a voltage generation circuit configured to generate a first voltage, a first circuit configured to output the first voltage to one of first and second wires, a second circuit configured to connect the first and second wires to the first and second word lines, respectively, and a third circuit configured to connect the first and second wires to the third and fourth word lines, respectively.
US10580484B2	Semiconductor integrated circuit device There is provided a semiconductor integrated circuit device that can generate a unique ID with the suppression of overhead. When a unique ID is generated, the potential of a word line of a memory cell in an SRAM is raised above the power supply voltage of the SRAM, and then lowered below the power supply voltage of the SRAM. When the potential of the word line is above the power supply voltage of the SRAM, the same data is supplied to both the bit lines of the memory cell. Thereby, the memory cell in the SRAM is put into an undefined state and then changed so as to hold data according to characteristics of elements or the like configuring the memory cell. In the manufacture of the SRAM, there occur variations in characteristics of elements or the like configuring the memory cell. Accordingly, the memory cell in the SRAM holds data according to variations occurring in the manufacture.
US10580482B2	Memory device comprising electrically floating body transistor A semiconductor memory instance is provided that includes an array of memory cells. The array includes a plurality of semiconductor memory cells arranged in at least one column and at least one row. Each of the semiconductor memory cells includes a floating body region configured to be charged to a level indicative of a state of the memory cell. Further includes are a plurality of buried well regions, wherein each of the buried well regions can be individually selected, and a decoder circuit to select at least one of the buried well regions.
US10580476B2	Simulating a single data rate (SDR) mode on a dual data rate (DDR) memory controller for calibrating DDR memory coarse alignment A double data rate (DDR) memory controller writes a test pattern to a location in a DDR memory for a coarse calibration test, delayed by a first number of cycles set in a tunable write delay setting. The DDR memory controller simulates a single data rate (SDR) mode for the coarse calibration test by only comparing every other read beat of the test pattern read from the DDR memory, delayed by a second number of cycles set in tunable read delay setting, wherein every other read beat is latched for a full cycle. The DDR memory controller, responsive to every other read beat of the test pattern matching an expected result, sets the first number of cycles and the second number of cycles as coarse calibration settings for a DRAM.
US10580475B2	Apparatuses and methods for calculating row hammer refresh addresses in a semiconductor device An example apparatus according to an aspect of the present disclosure includes an address scrambler circuit including a sub-wordline scrambler circuit configured to receive a first subset of bits of a row hammer hit address. The sub-wordline scrambler circuit is configured to perform a first set of logical operations on the first subset of bits to provide a second subset of bits, and to perform a second set of logical operations on the first subset of bits and the second subset of bits to provide a third subset of bits of an row hammer refresh address.
US10580474B2	Semiconductor devices A semiconductor device may include a refresh control circuit which may generate test addresses that are counted based on a refresh signal and a detection clock signal and may senses logic levels of internal data corresponding to the test addresses to generate a sense signal. The semiconductor device may include a memory circuit may include a plurality of word lines which are selected by the test addresses and may output the internal data stored in memory cells connected to the word lines. The semiconductor device may include an address storage circuit may divide each of the test addresses into a main group and a sub-group to store the main groups and the sub-groups of the test addresses. The address storage circuit may store the sub-groups which are inputted at a point of time that the sense signal is generated, regarding the stored main groups having the same level combination.
US10580472B2	Magnetic memory device According to one embodiment, a magnetic memory device includes a conductive layer, a first magnetic layer, a second magnetic layer, a first nonmagnetic layer, and a controller. The conductive layer includes a first portion, a second portion, and a third portion. The first magnetic layer is separated from the third portion. The first nonmagnetic layer is provided between the first magnetic layer and the second magnetic layer that is electrically connected with the third portion. The first nonmagnetic layer is curved. The controller is electrically connected to the first portion and the second portion. The controller implements a first operation and a second operation. The controller in the first operation supplies a first current to the conductive layer from the first portion toward the second portion. The controller in the second operation supplies a second current to the conductive layer from the second portion toward the first portion.
US10580471B2	Storage element and storage apparatus A storage element includes a layer structure including a storage layer having a direction of magnetization which changes according to information, a magnetization fixed layer having a fixed direction of magnetization, and an intermediate layer disposed therebetween, which intermediate layer contains a nonmagnetic material. The magnetization fixed layer has at least two ferromagnetic layers having a direction of magnetization tilted from a direction perpendicular to a film surface, which are laminated and magnetically coupled interposing a coupling layer therebetween. This configuration may effectively prevent divergence of magnetization reversal time due to directions of magnetization of the storage layer and the magnetization fixed layer being substantially parallel or antiparallel, reduce write errors, and enable writing operation in a short time.
US10580461B2	Semiconductor memory device and layout scheme of global lines over pass transistors A semiconductor memory device includes a plurality of pass transistors disposed along a first direction over a substrate, and configured to transfer operating voltages to a memory cell array; and a plurality of global lines formed in a first wire layer over the pass transistors, extending in a second direction intersecting with the first direction, and configured to transfer the operating voltages to the corresponding pass transistors respectively. The global lines are disposed in first direction pitches of some pass transistors among the pass transistors.
US10580460B2	Electronic device having circuit board including third conductors insulated from first and second conductors An electronic device includes a housing having a first opening, an electric component in the housing, and a circuit board attached to the housing, having as outer surface, covering the first opening, and at least partially exposed to an outside of the housing. The circuit board includes first conductors exposed to the outside of the housing, and a second conductor that extends along the outer surface and is insulated from the plurality of first conductors. The electronic device further includes a connector mounted in the outer surface. The connector includes contactors electrically connected to the first conductors, and a support base having a second opening and supporting the contactors so as to be elastically deformable. The circuit board includes third conductors at positions overlapping the contactors. The third conductors are insulated from the first conductors and the second conductor, and provide gas sealing or electromagnetic shielding effects.
US10580447B2	Magnetic recording medium with controlled surface characteristics A magnetic recording medium has a recording surface having an average surface roughness SRa of 3.0 nm or less, the number of projections having a height of 7.5 nm or more included in a unit region (where the unit region is a square region with each side having a length of 30 μm) of the recording surface is 256 or more, and the number of projections having a height of 15 nm or more included in the unit region of the recording surface is 0 or more and 104 or less.
US10580440B2	Devices including a diffusion barrier layer Devices having an air bearing surface (ABS), the devices including a write pole; a near field transducer (NFT) that includes a peg and a disc, wherein the peg is at the ABS of the device; a heat sink positioned adjacent the disc of the NFT; a dielectric gap positioned adjacent the peg of the NFT at the ABS of the device; and a conformal diffusion barrier layer positioned between the write pole and the dielectric gap, the disc, and the heat sink, wherein the conformal diffusion barrier layer forms at least one angle that is not greater than 135°.
US10580438B1	Multichannel tape head module having thermal device for controlling span between transducers In one embodiment, an apparatus includes a module having an array of transducers and a heating element positioned proximate to the array of transducers. The heating element has opposite ends and a center portion therebetween, where the heating element is configured to produce more heat per unit length along the opposite ends than in the center portion.
US10580417B2	Method and apparatus for binaural rendering audio signal using variable order filtering in frequency domain The present invention relates to a method and an apparatus for binaural rendering an audio signal using variable order filtering in frequency domain. To this end, provided are a method for processing an audio signal including: receiving an input audio signal; receiving a set of truncated subband filter coefficients for filtering each subband signal of the input audio signal, the set of truncated subband filter coefficients being constituted by one or more FFT filter coefficients generated by performing FFT by a predetermined block size; generating at least one subframe for each subband; generating at least one filtered subframe for each subband; performing inverse FFT on the filtered subframe for each subband; and generating a filtered subband signal by overlap-adding the transformed subframe for each subband and an apparatus for processing an audio signal using the same.
US10580409B2	Application integration with a digital assistant Systems and processes for application integration with a digital assistant are provided. In accordance with one example, a method includes, at an electronic device having one or more processors and memory, receiving a natural-language user input; identifying, with the one or more processors, an intent object of a set of intent objects and a parameter associated with the intent, where the intent object and the parameter are derived from the natural-language user input. The method further includes identifying a software application associated with the intent object of the set of intent objects; and providing the intent object and the parameter to the software application.
US10580405B1	Voice control of remote device A system configured to enable remote control to allow a first user to provide assistance to a second user. The system may receive a command from the second user granting remote control to the first user, enabling the first user to initiate a voice command on behalf of the second user. In some examples, the system may enable the remote control by treating a voice command originating from the first user as though it originated from the second user instead. For example, the system may receive the voice command from a first device associated with the first user but may route the voice command as though it was received by a second device associated with the second user.
US10580399B1	Adaptation enhancement for a road noise cancellation system A road noise cancellation (RNC) system may include a signal analysis controller for detecting non-stationary, transient events based on sensor signals having a spectral or temporal character significantly different from steady-state road or cabin noise. Upon detection of such non-stationary events, the RNC system may modify the sensor signals to mask the non-stationary event, thereby preventing the RNC system's adaptive filters from mis-adapting because of transient, non-stationary events. Alternatively, the RNC system may pause or slow or pause adaptation of its controllable filters for the duration of a frame that includes the non-stationary event.
US10580398B2	Parallel compensation in active noise reduction devices The technology described in this document can be embodied in a method that includes receiving an input signal representing audio captured by a microphone of an active noise reduction (ANR) headphone, and processing, by a first compensator, a first frequency range of the input signal to generate a first signal for an acoustic transducer of the ANR headphone. The method also includes processing, by a second compensator disposed in parallel to the first compensator, a second frequency range of the input signal to generate a second signal for the acoustic transducer. The first frequency range includes frequencies higher than the frequencies in the second frequency range. The method also includes detecting, by one or more processing devices, that the second signal satisfies a threshold condition, and attenuating the second signal responsive to determining that the second signal satisfies the threshold condition.
US10580393B2	Apparatus for analyzing musical performance, performance analysis method, automatic playback method, and automatic player system An apparatus for analyzing musical performance includes a controller. The controller is configured to detect a cue gesture of a performer who plays a piece of music. The controller is also configured to calculate a distribution of likelihood of observation and estimate the playback position depending on the distribution of the likelihood of observation. The calculating of the distribution of the likelihood of observation includes decreasing the likelihood of observation during a period prior to a reference point specified on a time axis for the piece of music in a case where the cue gesture is detected.
US10580390B2	Keyboard instrument A keyboard instrument including a hammer unit which includes a plurality of hammer members each of which has an effort point provided on one end side, a load point provided on an other end side, and a fulcrum provided between the effort point and the load point, and a hammer holder which rotatably holds the plurality of hammer members, and a keyboard chassis which includes a restriction member for restricting rotations of the plurality of hammer members performed in response to key depression operations within a restriction range and in which the hammer unit is mounted, in which the hammer holder has a plurality of contact points on the effort point side which comes in contact with portions of the plurality of hammer members on the effort point side when the hammer unit is in a vertically inverted state.
US10580379B2	Display panel and driving method therefor, and display apparatus A display panel and a driving method therefor and a display apparatus are provided. The display panel includes a plurality of gate lines and a plurality of data lines, which intersect with each other, each of the data lines has an input terminal, and input terminals of the data lines are provided at a first side of the display panel, the driving method comprises: sequentially applying a gate signal to each of the gate lines, and applying data signals to the data lines through the input terminals while any of the gate lines is applied with a gate signal, wherein the gate signal satisfies conditions that Ta(i)≤Ta(i+1) and Ta(1)
US10580372B2	Method for driving pixel unit A pixel unit and a driving method thereof, a liquid crystal panel and a display device are provided. The pixel unit includes a pixel electrode, a control circuit, a light sensing circuit, a data line and a gate line. A control end of the control circuit is connected to the gate line, a first end of the control circuit is connected to the date line, a second end of the control circuit is connected to a first end of the light sensing circuit, and a second end of the light sensing circuit is connected to the pixel electrode. The control circuit is configured to control, under control of the gate line, the data line to be connected to the first end of the light sensing circuit.
US10580362B2	Display device A display device includes: first pixels in a first pixel region and connected to first scan lines; second pixels in a second pixel region that is located at a side of the first pixel region and has a width smaller than a width of the first pixel region, and connected to second scan lines; third pixels in a third pixel region that is spaced apart from the second pixel region and has a width smaller than the width of the first pixel region, and connected to third scan lines; a load matching unit in a peripheral region at an outside of the second pixel region and the third pixel region, and configured to match loads of the second scan lines and the third scan lines to that of the first scan lines; and a protection unit connected between the second and third pixels and the load matching unit.
US10580354B2	Signal compensator, signal compensation method and signal compensation system for determining and compensating signal from signal generator to display panel A signal compensator includes an abnormality identification unit and a signal compensation unit. The abnormality identification unit is configured to determine whether or not a waveform of a signal generated by a signal generator is abnormal, when the waveform of the signal is normal, output the signal to a display panel, and when the waveform of the signal is abnormal, stop outputting the signal to the display panel and send an instruction to the signal compensation unit. The signal compensation unit is configured to perform signal compensation on the display panel in accordance with the instruction received from the abnormality identification unit.
US10580353B2	Night vision compatible display The disclosure relates to an emissive display configured to operate in a day mode and a night mode. The emissive display comprises a day pixel configured to operate in the day mode. The emissive display also comprises a night pixel configured to operate in the night mode, wherein the night pixel is not operational in the day mode. The emissive display also comprises a common pixel configured to operate in both the day mode and the night mode. The emissive display also comprises a detector configured to selectively change an operating mode of the display between the day mode and the night mode based on a detected indication.
US10580347B2	Timing controller, display device including timing controller, and method of driving timing controller A timing controller includes an interface unit configured to receive first image signals corresponding to a first region of a display panel, the first region including a second region which has image signals changed as compared to the second frame and a surrounding region which surrounds the second region, and a first region coordinate signal containing information about the first region during the first frame period from a host, an image processor configured to generate image-processed second image signals corresponding to the second region of the display panel by image-processing the first image signals of the interface unit, and a buffer unit configured to receive a second region signal corresponding to the second region and the image-processed second image signals of the image processor, generate image-processed entire image signals based on the image-processed second image signals, and transmit the image-processed entire image signals to a data driver.
US10580343B2	Display data transmission method and apparatus, display panel drive method and apparatus A display data transmission method and apparatus, and a display panel drive method and apparatus are provided. The display data transmission method is provided for transmitting display data to a display panel having a plurality of pixels. The display data transmission method comprises: calculating transmission data comprising an initial value and a plurality of sequential values, each value corresponding to a pixel of the plurality of pixels of the display panel; each of the sequential values being a difference value between a gray scale value of the corresponding pixel and a gray scale value of an adjacent previous pixel; and transmitting the transmission data to the display panel.
US10580340B2	System and method for driving display This application provides a system for driving a display, includes: a display panel; a data drive module, electrically connected to the display panel; and a signal control module, electrically connected to the data drive module. The signal control module includes: a color correspondence module, configured to receive image data of first bits, and convert the image data of first bits into image data of second bits; a data processing module, configured to divide the second bits into third bits and fourth bits; and a data construction module, according to a table lookup result, image data of which the number of frames and the number of bits are the same as those of data of the fourth bits, and sequentially providing the image data to the data drive module, so as to generate a corresponding data power supply for controlling the display panel to perform image display.
US10580334B2	Peripheral femtoprojector optical systems In some designs, an eye-mounted display includes multiple femtoprojectors contained inside a contact lens. Femtoprojectors that project to peripheral regions of the retina can have lower resolution. In some designs, these peripheral femtoprojector optical system includes an optically transparent core with two ends. The image source is located at one end, and a lens element is located at the other end. The end with the image source is the same size or larger than the end with the lens element. The core may be a cylinder or a frustum, for example. The sidewall structure extending between the two ends is designed to reduce stray rays from the image source. For example, the sidewall structure may absorb stray rays or may redirect rays so that they do not exit the core or so that they do not enter the pupil of the eye.
US10580328B2	Safety collar for an electrical cable An identification tag for an electrical cable. The identification tag may provide enhanced safety between the cable and another component, and may include a collar and a tab. The collar may include a bore for receiving a part of the cable. The bore may extend between first and second ends of the collar. The collar may also include an abutment surface for limiting the insertion of the cable end through the bore. The collar may further include an outer surface having a profile such that an outer diameter of the collar is smaller at the second end than at the first end and the outer diameter of the collar decreases gradually from the first end to the second end. The tab may be connected to and extend from the collar, wherein the tab may include identification symbols for identifying the cable.
US10580325B2	System and method for performing a computerized simulation of a medical procedure Embodiments of the invention are directed to a method of performing computerized simulations of image-guided procedures. The method may comprise receiving medical image data of a specific patient. A patient-specific digital image-based model of an anatomical structure of the specific patient may be generated based on the medical image data. A computerized simulation of an image-guided procedure may be performed using the digital image-based model. Medical image data, the image-based model and a simulated medical tool model may be simultaneously displayed.
US10580324B2	Medical sensors for clinical and training applications The present invention is directed to systems for interfacing between sensors and sensor simulators and clinical monitors and devices. The present invention is used to incorporate sensors and sensor simulators into training and clinical demonstrations. A system in accordance with the present invention includes a hardware component configured to transmit an output signal associated with a typical clinical sensor such as sensors for end-tidal CO2, pulse oximetry, temperature, blood pressure, near-infrared spectroscopy (NIRS) sensors, and CPR sensors to a clinical monitor or similar device. The system of the present invention also provides a software component to produce and transmit or to receive and make use of the simulated or actual sensor; the system also provides a hardware component to interface the software component to the clinical monitor, defibrillator, and/or sensor.
US10580322B1	Educational system and method for teaching mechanical failure The educational system for teaching mechanical failure includes first and second specimen pieces. The first and second specimen pieces are adapted to be magnetically joined to one another at a selected magnitude of magnetic force. A linear force measuring device, such as a load cell, is secured to the first specimen piece and a support frame. A linear actuator is secured to the support frame and the second specimen piece to selectively apply a separation force to the first and second specimen pieces. In use, a user may increase a magnitude of the separation force until the first and second specimen pieces separate from one another. The measured separation force when the first and second specimen pieces separate from one another is representative of a required force to cause mechanical failure.
US10580319B2	Interactive multimedia story creation application A software application for teaching literacy through customized stories with gamification elements. Existing or new stories are created and customized for particular audiences and include text, animations, images, and sounds to produce an interactive multimedia story for presentation on a computing device with a display and audio output. Reading comprehension questions and games are provided to accompany the stories and the reader of the stories can earn rewards based on performance. The reader's performance is analyzed and reported to track progress.
US10580308B2	Connected instrument procedure placekeeping system A connected instrument procedure placekeeping system includes a navigation database, a flight deck display, a flight deck processor, and an electronic device. The flight deck processor is in operable communication with the navigation database and the flight deck display and selectively retrieves flight plan data from the navigation database. The flight deck processor causes the flight deck display to render images of an instrument procedure. The electronic device is in operable communication with the flight deck processor and simultaneously renders an image of a published representation of the instrument procedure. One of either the flight deck processor or the electronic device is responsive to user input signals to highlight a waypoint and its associated constraint and the other of the electronic device or the flight deck processor simultaneously highlights the waypoint and its associated constraint for ease of comparison.
US10580303B2	Collision avoidance device A collision avoidance device includes an electronic control unit configured to: calculate a deflection angle that is a change angle of a direction of a host vehicle turning in a direction of a blinker in a turn-on state based on a direction of the host vehicle when the host vehicle switches the blinker into the turn-on state; and execute a collision avoidance control for avoiding a collision between the host vehicle and an obstacle in a case where the electronic control unit determines that there is a collision possibility between the host vehicle and the obstacle based on a path of the host vehicle on an intersection and a position of the obstacle, wherein the electronic control unit is configured not to execute the collision avoidance control when the deflection angle is equal to or greater than a deflection angle threshold.
US10580294B2	Photographic system for use on school buses A photographic system for use on school buses allowing traffic authorities to issue citations for violations of school bus traffic laws which require drivers to stop when a school bus turns on its flashers. Doppler devices are activated when the flashers are turned on. The Doppler devices detect for vehicle motion and speed facilitating a camera to take a series of snapshots. The snapshots along with locational and time data are sent to the authorities. The photographic system is designed to improve awareness and safety around school buses when loading and unloading school children.
US10580289B2	Sensor integrated circuits and methods for safety critical applications A sensor integrated circuit includes at least two processing channels responsive to the same or different analog input signals to generate respective processed signals. The two processing channels are non-homogenous and, in some embodiments have different processing accuracies. A checker circuit receives the first and second processed signals and is configured to detect a fault in the sensor integrated circuit when the first and second processed signals differ from each other by more than a predetermined amount.
US10580283B1	Secure enterprise emergency notification and managed crisis communications A computer-implemented system includes the following. A recipient-information-receiving interface is configured to receive up-to-date recipient information for recipients located worldwide. Each information-receiving interface of a plurality of information-receiving interfaces is configured to receive emergency information from a particular external source at a particular worldwide location. The emergency information includes one or more of electronic, textual, audio, and visual information. Processors are configured to aggregate the emergency information received from the plurality of information-receiving interfaces and generate aggregated information for transmission to recipients identified by the up-to-date recipient information. A plurality of information-transmitting interfaces are configured to transmit encrypted aggregated information to recipients identified by the up-to-date recipient information. The encrypted aggregated information includes live video streaming.
US10580282B2	Ear based contextual environment and biometric pattern recognition system and method A method includes providing ear-based contextual environment and biometric pattern recognition using an earpiece including an earpiece housing, an intelligent control disposed within the earpiece housing, a speaker operatively connected to the intelligent control, a microphone operatively connected to the processor. The method includes sensing at least one physiological parameter of a user of the earpiece with at least one biometric sensor operatively connected to the intelligent control, sensing at least one environmental parameter with at least one environmental sensor operatively connected to the intelligent control, performing pattern recognition analysis at the intelligent control of the earpiece using the at least one environmental parameter and the at least one physiological parameter as input to identify an alert condition, and generating an audible alert to the user using the speaker when the pattern recognition analysis indicates presence of the alert condition.
US10580271B1	Wireless security tracking for weapons An example method may include monitoring at least one tag enabled device, identifying a condition exists which requires a notification, notifying at least one registered device of the condition, responsive to a predetermined period of time lapsing, creating an emergency condition and notifying an emergency service provider.
US10580269B2	Navigational devices and methods The present invention provides a wearable navigation forearm-band device for intuitive navigation of a user to his destination, the device including at least four tactile stimulus providers, each adapted to impact on different areas of a forearm of a user to provide a specific direction of movement of the user, wherein the device is adapted to receive commands from a communication apparatus to activate said vibration indicators response to a position of the user.
US10580264B1	Systems and methods for providing automatic teller machine security Computer implemented systems and methods are provided for an automatic teller machine. In some embodiments, an automatic teller machine may comprise a display, a physical barrier configured to intersect a line of sight from a location adjacent the automatic teller machine to the display, one or more memory devices storing instructions, and one or more processors. The one or more processors may be configured to determine that a user is operating the automatic teller machine. The one or more processors may be further configured to alter a degree of opacity of the physical barrier, based on the determining.
US10580259B2	Systems, methods and gaming machines having logic based on sporting events A gaming system may include a gaming machine having a monetary input device, a wager input device, and a processor. The processor may establish a credit balance based on the monetary value, decrease the credit balance by the selected wager, and present the wagering game at an interface. A game server may transmit content for the wagering game to the gaming machine. The game server may determine prize payouts during game play by detecting sporting event outcomes occurring during live sporting games. Each detected sporting event outcome may correspond to a previously determined prize value. The prize values may be determined based on a data analysis of the probable occurrence of each sporting event outcome in previously completed sporting events.
US10580253B2	Gaming machine, control method for a gaming machine, and program for gaming machine A gaming machine provides a game feature. The gaming machine includes an operation unit, a display unit, a memory device and a game control unit. The operation unit receives an operation input of the player. The display unit is configured to display a game screen including computer generated graphics. The memory device stores a game execution program including computer instructions for generating the game feature. The game control unit executes the game execution program to provide the game feature and is coupled to the operation unit, the display unit and the memory device. The game control unit includes a processor programmed to display a game feature structure on the game screen on the display unit. The game feature structure includes a wheel having a plurality of wedges. Each wedge has an associated indicia. The indicia are from a set of indicia which includes a plurality of prize symbols.
US10580250B2	System and method for selective power and secure communications via an electronic gaming machine interface A gaming system includes a secure communication board having a Universal Serial Bus (USB) interface and/or a wireless interface accessible externally to players and administrators of the gaming system. The secure communication board selectively provides power and communication between a coupled or proximate mobile device and the gaming system. The secure communication board includes a microcontroller to selectively control both power and communication flow through the secure communication board to the external interfaces. The microcontroller is responsive to the physical state of gaming system components and gaming system processor events and control signals. A wagering game event, user authentication, and/or specific states of one or more physical security switches of the gaming system may be required to provide power and data via the external interfaces.
US10580241B2	Method for causing a change of operating mode The disclosure relates to a method including the steps of: detection of a presence of an access authorization verification apparatus in surroundings of an access control apparatus by first communication means of the access control apparatus, and prompting, when the presence of the access authorisation verification apparatus in the surroundings of the access control apparatus is detected, of a change of operating mode for second communication means of the access control apparatus. In addition, the disclosure relates to an access control apparatus, a computer program, a recording apparatus, a system and a use for an access authorisation verification apparatus.
US10580238B1	Method for providing enhanced telematics service and telematics server using the same A method for providing a telematics service based on a vehicle model is provided. The method includes steps of: (a) acquiring, by a telematics server, when a log-in request including information on a specific user and information on a specific vehicle is acquired from a telematics application installed on a specific telematics device, specific specification information on the specific vehicle; (b-i) acquiring a specific configuration, in which a first to a k-th telematics service items per telematics service category are set, in which serviceable telematics service items are set for each telematics service category as corresponding to each piece of hierarchy information on specifications of multiple vehicles; (b-ii) transmitting the specific configuration to the specific telematics device; and (b-iii) displaying, by the specific telematics device, a menu of a first telematics service to a k-th telematics service, to thereby allow the specific user to use the telematics service.
US10580236B2	Key fob A key for locking and unlocking a car is disclosed, which is configured to send a first signal which, when the car is locked and the first signal is received, causes the car to unlock, and to send a second signal which, when the car is unlocked and neither the first signal nor the second signal is received, causes the car lock, and the key sends the first signal only upon a signal from a user to unlock the car. The car recognizes a first wireless transmission which, when the car is locked and the first signal is received, causes the car to unlock, and recognizes a second wireless transmission such that, when the car is unlocked and neither the first nor the second signal is received, causes the car to lock, and the first signal is received only upon a user giving a signal to unlock the car.
US10580228B2	Fault detection system and method for vehicle system prognosis A fault detection system including one or more sensors onboard a vehicle, the one or more sensors being configured to detect a predetermined characteristic of the vehicle and generate a plurality of sensor signals corresponding to the predetermined characteristic, and a processor onboard the vehicle and in communication with the one or more sensors, the processor being configured to generate an analysis model for the predetermined characteristic, the analysis model being trained by the processor with a training data set of fast Fourier transform vectors that are generated from the plurality of sensor signals obtained under normal operating conditions of the predetermined characteristic, and determine a health of a vehicle component corresponding to the predetermined characteristic with the analysis model.
US10580226B2	System and method for generating vehicle data report with tool measurement A computing system can register a measurement tool. The computing system can determine a selected vehicle for a vehicle data report and a selected measurement tool to perform a first tool measurement that excludes determining data from a vehicle data message. The computing system can determine a selected vehicle component for the first tool measurement by the selected measurement tool. The computing system can determine a spatial identifier for the first tool measurement. The computing system can determine the first tool measurement performed by the selected measurement tool. A radio transceiver of the computing system can receive radio signals carrying the first tool measurement from the selected measurement tool. The first tool measurement received by the radio transceiver can be provided to one or more processors of the computing system. The computing system can generate and output the vehicle data report that includes the first tool measurement.
US10580219B2	System and method to digitally replace objects in images or video A method includes receiving, at a computer system, video data of a video frame of video content. The method includes identifying, at the computer system, a first representation of a first object in the video frame to be replaced with a second representation of a second object based on absence of a visible feature in the first representation. The method includes manipulating, at the computer system, a three-dimensional model of the second object to generate the second representation. The second representation includes the visible feature. The method also includes generating, at the computer system, a modified version of the video frame that includes the second representation in place of the first representation.
US10580214B2	Imaging device and imaging method for augmented reality apparatus The present disclosure provides in some embodiments an imaging device and an imaging method for an AR apparatus. The imaging method includes steps of: achieving, by the AR apparatus, to be in communication with a terminal device; receiving, by the AR apparatus, image data from the terminal device; and displaying, by the AR apparatus, the image data.
US10580212B2	Method and representation system for the multisensory representation of an object In a method and system for the multisensory representation of an object, multidimensional digital model data of the object are provided to a processor. An actual three-dimensional object model is produced on the basis of at least part of the multidimensional digital model data of the object. The position of the object is recorded subsequently. At least part of the multidimensional digital model data of the object is displayed by an AR display device depending on the position of the object model.
US10580210B2	Method and device for refocusing at least one plenoptic video A method for refocusing, on at least one common point of interest, the rendering of one set of plenoptic video data provided by one plenoptic device belonging to a set of plenoptic devices capturing simultaneously a same scene. According to the present disclosure, said method comprises: obtaining (21) a common 3D reference system used for spatially locating said plenoptic device that has provided said set of plenoptic video data and at least one other device of said set of plenoptic devices, from said at least one common point of interest, determining (22) common refocusing plane parameters in said common 3D reference system, refocusing (23) the rendering of said set of plenoptic video data by converting (231) said common refocusing plane parameters into a rendering refocusing plane of a 3D reference system associated with said plenoptic device.
US10580208B2	Ceiling map building method, ceiling map building device, and ceiling map building program A ceiling map building method includes estimating a scale of each ceiling image based on information related to the ceiling image and information related to another ceiling image including a same object as included in the ceiling image, the scale being represented as a ratio of an amount of movement of the object between the two ceiling images to an amount of movement of the camera (6) between the positions thereof when the two ceiling images were respectively captured (ST16), and building a ceiling map (2) (ST2) by converting the ceiling images in accordance with the respective scales so as to have sizes suitable for the ceiling map and combining the converted ceiling images (ST84).
US10580187B2	System and method for rendering of an animated avatar There are provided systems and methods for rendering of an animated avatar. An embodiment of the method includes: determining a first rendering time of a first clip as approximately equivalent to a predetermined acceptable rendering latency, a first playing time of the first clip determined as approximately the first rendering time multiplied by a multiplicative factor; rendering the first clip; determining a subsequent rendering time for each of one or more subsequent clips, each subsequent rendering time is determined to be approximately equivalent to the predetermined acceptable rendering latency plus the total playing time of the preceding clips, each subsequent playing time is determined to be approximately the rendering time of the respective subsequent clip multiplied by the multiplicative factor; and rendering the one or more subsequent clips.
US10580184B2	Methods for rendering effects in 360 video A method implemented in a computing device for inserting an effect into a 360 video where the computing device receives the effect from a user. The method receives a target region from the user, the target region corresponding to a location within the 360 video for inserting the effect; for each frame in the 360 video. The method then inserts the effect on a surface of a spherical model based on the target region and generates at least two projection frames containing the effect from the spherical model. The method then stitches the projection frames to generate a panoramic representation of the effect, and blends the panoramic representation of the effect with an original source panorama to generate a modified 360 video frame with the effect.
US10580170B2	Spectral reconstruction This disclosure relates to processing colour images to reconstruct hyperspectral images from the colour images. An image processor determines an output hyperspectral image by determining for each point of the output hyperspectral image a combination of multiple hyperspectral prototype components to correspond the output hyperspectral image to the input image. Each of the multiple hyperspectral prototype components comprises multiple component values associated with respective wavelengths and each of the multiple component values is based on multiple points of training image data associated with the wavelength of that component value. Since the component values are based on multiple points of the training image, relationships between points in the training image, such as texture, can be used to reconstruct the hyperspectral image data, which leads to a more robust and more accurate reconstruction.
US10580159B2	Coarse orientation detection in image data A framework for coarse orientation detection in image data. In accordance with one aspect, the framework trains a learning structure to recognize a coarse orientation of the anatomical structure of interest based on training images. The framework may then pass one or more current images through the trained learning structure to generate a coarse orientation of the anatomical structure of interest. The framework then outputs the generated coarse orientation of the anatomical structure of interest.
US10580153B2	Optical navigation and positioning system An optical navigation system comprising a camera oriented to face towards a plurality of markers located at spaced apart locations from the camera, calculating means adapted to calculate an angle subtended between pairs of markers, the subtended angles being calculated by monitoring the pixel locations of the markers in a series of images captured by the camera, the optical navigation system additionally comprising means for creating a three-dimensional model whereby the location of the camera relative to the markers is determined by triangulating the subtended angles in the three-dimensional model.
US10580149B1	Camera-level image processing Devices, systems and methods are disclosed for performing image processing at a camera-level. For example, a camera service may run on top of a camera hardware abstraction layer (HAL) and may be configured to perform image processing such as applying a blurring algorithm, applying a color filter and/or other video effects. An application may pass metadata to the camera service via an application programming interface (API) and the camera service may use the metadata to determine parameters for the image processing. The camera service may apply the blurring algorithm for a first period of time before transitioning to unblurred image data over a second period of time.
US10580148B2	Graphical coordinate system transform for video frames A computing device is provided, which is configured with a processor configured to compute feature points in a new frame and a prior frame of a series of successive video frames, compute optical flow vectors between these frames, and determine a homography transform between these frames based upon the feature points and optical flow vectors. The processor is further configured to apply the homography transform to the graphical element coordinate system in the prior frame to generate an updated graphical element coordinate system in the new frame, and generate a six degree of freedom camera pose transform therebetween based on the homography transform and a camera pose of the graphical element coordinate system in the prior frame. The processor is further configured to render an updated graphical element in the new frame relative to the updated graphical element coordinate system using the six degree of freedom camera pose transform.
US10580135B2	System and method for splicing images The present disclosure relates to systems and methods for image splicing. The systems and methods may acquire a first image and a second image, determine a plurality of first feature points in a first region of the first image, determine a plurality of second feature points in a second region of the second image, then match the plurality of first feature points with the plurality of second feature points to generate a plurality of point pairs. Based on the plurality of point pairs, a third region on the first image and a fourth region on the second image may be determined. Finally, a third image may be generated based on the first image and the second image, wherein the third region of the first image may overlap with the fourth region of the second image in the third image.
US10580132B2	Medical image processing apparatus, control method therefor, and non-transitory storage medium storing program A medical image processing apparatus acquires a virtual non-contrast image generated by using a first medical image acquired by image-capturing a subject containing a contrast agent with a first energy and a second medical image acquired by image-capturing the subject with a second energy, identifies a removal-subject region included in the acquired virtual non-contrast image, identifies a region of the first medical image or the second medical image, the region corresponding to the identified removal-subject region, and changes luminance values of the identified region identified to a value lower than the luminance value.
US10580115B2	Scaling content on touch-based systems Methods and systems may provide for detecting a manual addition of first content to an interactive display and defining a content boundary around the first content. Additionally, a first automatic rescaling of the first content within the content boundary may be conducted in response to one or more of a manual modification of the first content or a trigger related to a characteristic of the first content. In one example, a manual reposition request is detected with respect to the first content, the first content is moved to a new position on the interactive display based on the reposition request, and a second automatic rescaling of the first content is conducted based on a state of second content that is adjacent to the new position.
US10580113B2	Loading data into a tile buffer in graphics processing systems A tile-based graphics processing system comprises a graphics processing pipeline comprising a plurality of processing stages, including at least a rasteriser that rasterises input primitives to generate graphics fragments to be processed, and a renderer that processes fragments generated by the rasteriser to generate rendered fragment data, and a tile buffer configured to store data locally to the graphics processing pipeline. The graphics processing system is operable to cause data for use when performing graphics processing operations for each tile of a set of plural tiles of a plurality of tiles to be loaded into the tile buffer before causing graphics processing operations to be performed for any of the tiles of the set of plural tiles.
US10580108B2	Method and apparatus for best effort quality of service (QoS) scheduling in a graphics processing architecture An apparatus and method for best effort quality of service scheduling in a graphics processing architecture. For example, one embodiment of an apparatus comprises: a graphics processing unit (GPU) to perform graphics processing operations for a plurality of guests; a plurality of buffers to store one or more graphics commands associated with each guest to be executed by the GPU; and a scheduler to evaluate commands in the buffers of a first guest to estimate a cost of executing the commands, the scheduler to select all or a subset of the buffers of the first guest for execution on the GPU based on a determination that the selected buffers can be executed by the GPU within a remaining time slice allocated to the first guest.
US10580102B1	Apparatus and methods for computerized object identification Apparatus and methods for identification of a coded pattern visible to a computerized imaging apparatus while invisible or inconspicuous to human eyes. A pattern and/or marking may serve to indicate identity of an object, and/or the relative position of the pattern to a viewer. While some solutions exist for identifying patterns (for example, QR codes), they may be visually obtrusive to a human observer due to visual clutter. In exemplary implementations, apparatus and methods are capable of generating patterns with sufficient structure to be used for either discrimination or some aspect of localization, while incorporating spectral properties that are more aesthetically acceptable such as being: a) imperceptible or subtle to the human observer and/or b) aligned to an existing acceptable visual form, such as a logo. In one variant, a viewer comprises an imaging system comprised as a processor and laser scanner, or camera, or moving photodiode.
US10580100B2	Data payment and authentication via a shared data structure The disclosed embodiments relate generally to complex data stream control and entitlement. Specifically, the disclosed embodiments provide systems and methods for ensuring that only authenticated/verified participants receive data streams. A third party, e.g., a party other than the data provider or the data recipient, who is nevertheless associated with both the data provider and the data recipient, may be involved in controlling whether data streams from the data provider can reach the data recipient. Thus, a third party may logically sit between the data provider and the data recipient, and may decide whether the data recipient should receive data streams. The disclosed embodiments implement data generation, flow, control and permissioning between multiple entities via digital assets accessed and manipulated on a shared data structure.
US10580078B2	System and method for assessing healthcare risks A system and method for receiving demographic data on a patient and data on at least one pharmacy service prescribed for the patient; assigning a unique drug class to each pharmacy service; using the unique drug classes for ordering the pharmacy services according to a predetermined hierarchy of classes; and providing a risk score for the patient using the ordered pharmacy services.
US10580075B1	Application facilitated claims damage estimation Systems and methods provide for an automated system for analyzing damage to process claims associated with an insured item, such as a vehicle. An enhanced claims processing server may analyze damage associated with the insured item using photos/video transmitted to the server from a user device (e.g., a mobile device). The enhanced claims processing server may submit a signal that locks one or more portions of an application on the mobile device used to submit the photos/videos. The mobile device may receive feedback from the server regarding the acceptability of submitted photos/video. The photos may further be annotated using, for example, a touch screen display. An estimate, such as a cost estimate, may be determined for the damage associated with the insured item based on the photos and/or annotations.
US10580074B1	Generating graphical presentations for in-vehicle displays A vehicle is engineered in which a piece of hardware, an in-vehicle display, is installed and through which an insured may interface with various insurance modules. The in-vehicle display presents various pieces of graphical user interface to assist the insured in operating the vehicle depending on driving exigencies and circumstances, so as to improve vehicle technologies.
US10580064B2	User interface for identifying top attributes In various example embodiments, a system and method for identifying top attributes are presented. Text content from an electronic document describing a product is extracted. A plurality of attributes associated with the product are identified using the extracted text content. A descriptor word proximate to each of the plurality of attributes in the extracted text content is detected. A weight is assigned to each descriptor word proximate to each of the plurality of attributes. The plurality of attributes are ranked based on the weight of the descriptor word proximate to each of the plurality of attributes. A predetermined number of top ranked attributes from the plurality of attributes are caused to be presented. Further, an image associated with each of the top ranked attributes is determined, the image being designated as a visual representation of the corresponding top ranked attribute. The image is caused to be displayed in association with the product on a user interface.
US10580061B2	Information distribution system and electronic device An information distribution system includes an electronic device; and a server system including at least one information distribution apparatus that communicates with the electronic device via a network. The electronic device includes an information requester configured to transmit, to the server system, a request to distribute information, the request being transmitted together with identification information of the electronic device; and an information displayer configured to display, on a display device, the information transmitted from the server system. The server system includes a contract information acquirer configured to acquire contract information relating to a contract for a service provided to the electronic device; an information generator configured to identify the contract information of the electronic device based on the identification information, and generate the information according to the contract information; and an information distributor configured to distribute the information generated by the information generator, to the electronic device.
US10580060B2	Requisition system for supply/maintenance of safety items A requisition system for safety items such as first aid kits, blood borne pathogen kits, automatic external defibrillators, fire extinguishers, smoke detectors and carbon monoxide detectors automatically generates a list of supplies for such items. The requisition system operates on a mobile electronic device. The user or customer can efficiently undertake an inventory of the replaceable supplies for the safety items and generate a requisition for such safety items. The requisition system provides for an automatic notification alert to the user and also provides an alert notification button to initiate an inventory of replaceable supplies. A requisition of the replaceable supplies is automatically communicated to the supplier. The requisition system also automatically generates a requisition of supplies so that a first aid kit or other safety item fully complies with applicable current safety standards. The requisition system also is operable to implement an automatic replenishment of supplies.
US10580058B2	Methods and systems for providing personal shopping services A method and system for providing personal shopping assistance via a computing device includes hosting a database of information regarding a customer, hosting a database of information regarding a personal shopper, and associating the customer with the personal shopper. The personal shopper is provided the ability to recommend at least one of a product or a service relevant to the customer and receiving an indication of the purchase of the recommended product or service by the customer. An incentive system may provide a reward to the personal shopper based upon the purchased product or service, including a commission or other reward. The system may be implemented on a desktop and/or mobile device as desired to provide flexibility in implementation.
US10580052B2	Systems and methods for controlling shelf display units and for graphically presenting information on shelf display units Systems and methods for controlling shelf display units and for graphically presenting information on shelf display units are disclosed. A system includes one or more display units configured to be coupled to shelves of a modular shelving system, one or more processors communicatively coupled to the one or more display units, one or more memory components communicatively coupled to the one or more processors, and machine readable instructions stored in the one or more memory components. When executed by the one or more processors, the machine readable instructions cause the system to determine a product identifier corresponding to a product, identify one or more display units to update in response to determining the product identifier corresponding to the product, and update a graphical output of the one or more display units identified to be updated in response to identifying the one or more display units to update.
US10580028B1	Systems and methods for rewards integration as a funding account Systems, methods, and apparatuses for processing a rewards transaction including an accounts database storing information associated with accounts held by a financial institution including a payment account associated with a customer, a rewards account database storing information associated with reward accounts, including a rewards account associated with the customer, and a processing circuit. The processing circuit is structured to receive transaction details that define a rewards transaction associated with the rewards account, receive a rewards transaction request associated with the rewards account, the rewards transaction request including a rewards amount and recipient details, debit an amount of points from the rewards account maintained by the financial institution and associated with the customer, where the amount of points are less than or equal to the rewards amount, and complete the rewards transaction without converting the rewards amount to currency.
US10580026B2	In store upselling The present disclosure relates to identifying a product or service in a store and offering to sell products and services that the customer can purchase in that store. Methods and apparatus consistent with the present disclosure allow retail stores to provide real-time information to their customers about products and/or services that may complement another product that a customer is interested in purchasing. A portable electronic device, such as a cell phone, may receive wirelessly transmitted communications from wireless transmitters that are associated with products and services that the customer approaches, touches, or scans.
US10580017B2	Using ontological distance to measure unexpectedness of correlation A method, system and computer program product for evaluating the interestingness of correlated data. The fields of a dataset are classified by tagging the fields in terms of real world concepts. A correlation analysis on the dataset is performed to generate a correlation coefficient for each pair of fields of correlated data items. An “ontological distance” between the tagged concepts for each pair of fields of correlated data items represented as nodes in the ontology is determined. A score is generated indicating an interestingness of correlation for each pair of fields of correlated data items based on the correlation coefficient and the ontological distance between the tagged concepts for each pair of fields of correlated data items. By utilizing the ontological distance with the correlation analysis to determine the interestingness of correlation, correlations that may not be obvious to users and unexpectedly correlated may be identified.
US10580014B2	System and method for payment card industry compliance A system for providing Payment Card Industry (PCI) compliance for a contact center is disclosed. The system includes a monitoring module configured to monitor a communication session between an agent and a customer. At least one image associated with the agent's computer screen is captured during the communication session. An analysis module is configured to compare the at least one image with at least one predefined image. A control module is configured to control a recording of information associated with the communication session based on the comparison.
US10580012B2	Article-suggestion system for automatically resolving customer-service requests The disclosed embodiments relate to a system that suggests helpful articles to resolve a customer request. During operation, the system receives the customer request, wherein the customer request is associated with a product or a service used by the customer. Next, the system feeds a set of words from the customer request through a model to generate a request vector comprising numerical values representing words in the customer request. The system then compares the request vector against article vectors representing articles in a set of help center articles to determine whether the customer request matches one or more help center articles. If the customer request matches one or more help center articles, the system presents the one or more help center articles to the customer to facilitate automatically resolving the customer request.
US10580007B2	Method and apparatus for money transfer A method of staging a transaction includes receiving transaction information including a transaction type, sender and recipient information, and compliance data. A staging record is generated responsive to the transaction information, including a retrieval key for fulfillment of the transaction, where the transaction proceeds if the retrieval key leads to the staging record and the compliance data are consistent with applicable rules.
US10580006B2	System and method of managing data injection into an executing data processing system A system and method of modifying an execution of a processing system during runtime are provided. The method uses a computing device having at least one processor and at least one memory device and includes receiving an indication of data or instructions being available for modifying the execution of the processing system during runtime, determining at least one data element associated with the indication of data or instructions, generating metadata based on at least one of the indication and the determined at least one data element, and periodically executing a job, the job reads the metadata and modifies a workflow of the processing system based on the metadata.
US10579993B2	Information processing device, information processing method, and program There is provided an information processing device including a storage unit configured to store applications, application information corresponding to each of the applications, and state management information in which the application information is stored in association with a priority level, and a control unit configured to control a valid state and an invalid state of the application by managing the application information stored in the state management information based on a process command.
US10579991B2	Transaction card mode related to locating a transaction card A transaction card may determine to initiate a mode associated with the transaction card. The mode may be related to locating the transaction card. The mode may be associated with outputting a first signal. The transaction card may determine a manner in which to configure the mode based on a set of parameters. The set of parameters may include a power level of the transaction card, or a strength of a second signal associated with a connection between the transaction card and a device associated with the transaction card. The transaction card may initiate the mode after configuring the mode. The transaction card may determine to terminate the mode based on an indication that the transaction card has been located.
US10579982B2	Identifying money laundering in micro-commerce A processor-implemented method, system, and/or computer program product detects illicit activities in micro-commerce transactions. An historic transaction pattern of known legitimate past micro-commerce transactions by a cohort is identified. A current transaction pattern for a current set of multiple micro-commerce transactions is also identified. The current transaction pattern and the historic transaction pattern are compared. In response to determining that the current transaction pattern deviates from the historic transaction pattern beyond a predetermined level, a determination is made that the current set of multiple micro-commerce transactions are being used for money laundering.
US10579973B2	System for efficient processing of transaction requests related to an account in a database One embodiment provides a system that facilitates efficient processing of requests related to a database. During operation, the system receives, by a server, a request to transfer an amount in to an account of a user, wherein the account is visible to the user and corresponds to a record in a database. The system selects one of a plurality of shadow accounts that correspond to the account, wherein a shadow account is not visible to the user. The system locks the selected shadow account, which prevents any changes to be made to the corresponding record in the database. The system modifies a balance of the selected shadow account by adding the amount to be transferred in to a current balance of the selected shadow account.
US10579963B2	Self-adaptive inventory and fixture tracking An embodiment of a semiconductor package apparatus may include technology to associate an asset to a fixture with a device positioned proximate to the fixture, and determine a location of the fixture based on a location of the device. Other embodiments are disclosed and claimed. Non-limiting example applications may include shipping, logistics, warehouse asset tracking, retail, etc.
US10579959B2	Intelligent routing of radio-frequency identification data Methods, systems, and computer-readable media are provided for routing radio-frequency identification (RFID) location data from an RFID tag reader to a record-keeping unit. A first tagging entry is received from a first record-keeping unit. The information associated with the first tagging entry is stored in a data store. A first set of location data is received, indicating that the RFID tag of the first item has been read by an RFID tag reader. It is algorithmically determined that the received location data corresponds to the first tagging entry received from the first record-keeping unit. The first set of location data is communicated to the first record-keeping unit.
US10579958B2	Dispenser and associated tracking application Systems, methods, and apparatuses are provided for storing, dispensing, and facilitating replenishment of a dispenser. The dispenser may store and dispense one or more types of consumable items. Additionally, the dispenser may include one or more sensors for sensing a storage status of the dispenser (e.g., the quantity consumable items remaining in the dispenser). Further still, the dispenser may communicate storage status updates to a remote device on which a related application can be executed, for updating a current storage status, and presenting a notification to a user of the remote device, suggesting the purchase of additional consumable items to replenish the dispenser. The related application may further present the user with other types of purchasing-related information, such as cross merchandise opportunities, a retailer located nearest to the user/mobile device where the additional consumable items can be purchased from, as well as other shopping-related features and/or functionalities.
US10579954B2	Node-enabled preparation related to medical treatment for a patient using a hierarchical node network Methods and systems are described for initiating a pre-staged preparation related to a medical treatment to be provided to a patient at a healthcare facility using a hierarchical node network having an ID node, a master node, and a server. The ID node is associated with the patient and can communicate directly with the master node. The master node can directly communicate with the server and separately communicate with the ID node. The master node and ID node associate when the master node detects a signal broadcast from the ID node as the patient approaches the healthcare facility. The master node receives medical status information from the ID node and transmits the information to the server. The server determines the location of the ID node, and then initiates the pre-staged preparation related to the patient based upon the determined location of the ID node and the medical status information.
US10579953B2	System and method of determining freight/load distribution for multiple vehicles Systems and methods of vehicle freight/load distribution are provided to assist in determining optimal freight distribution. Although it is standard practice to fill each vehicle to its maximum limit, due to the non-linear nature of engine fueling maps (that is, fueling maps vary non-linearly as a function of torque and speed), the optimal distribution may not be obtained by the standard practice. Finding a solution for the optimal freight distribution may also need to account for the cost of fueling and operator costs, particularly if the situation involves multiple vehicles not filled to capacity. The benefit is increased freight efficiency in transporting cargo from source to destination amongst a fleet of vehicles.
US10579941B2	Systems and methods for recommending pages Systems, methods, and non-transitory computer-readable media can generate layered training data for determining embeddings for entities that are accessible through the social networking system, wherein the layered training data includes layers of data that are organized by a hierarchy, and wherein each layer of data corresponds to entities of a same type. A respective embedding for each entity in a set of entities can be determined, wherein the embeddings are trained iteratively using each layer of data in the layered training data. One or more candidate entities that are related to a first entity can be determined based at least in part on the respective embeddings for the candidate entities and the first entity. At least a first candidate entity from the one or more candidate entities can be provided as a recommendation to a user that formed a connection with the first entity.
US10579940B2	Joint embedding of corpus pairs for domain mapping Techniques for outside-in mapping for corpus pairs are provided. In one example, a computer-implemented method comprises: inputting first keywords associated with a first domain corpus; extracting a first keyword of the first keywords; inputting second keywords associated with a second domain corpus; generating an embedded representation of the first keyword via a trained model and generating an embedded representation of the second keywords via the trained model; and scoring a joint embedding affinity associated with a joint embedding. The scoring the joint embedding affinity comprises: transforming the embedded representation of the first keyword and the embedded representation of the second keywords via the trained model; determining an affinity value based on comparing the first keyword to the second keywords; and based on the affinity value, aggregating the joint embedding of the embedded representation of the first keyword and the embedded representation of the second keywords within the second domain corpus.
US10579934B2	Data classification device, non-transitory computer readable medium, and data classification method A data classification device includes an estimation unit that estimates, for each of one or more classes provided for learning data pieces in a feature-amount-data space that includes multiple learning data pieces, probability densities of learning data pieces belonging to the class and learning data pieces not belonging to the class around a judgment target data piece in the feature-amount-data space, a calculation unit that calculates, based on the probability densities, an index indicating how much the judgment target data piece is likely to belong to the class, and a judgment unit that judges which class the judgment target data piece belongs to by using the index. Based on distribution of positive data pieces belonging to the class and negative data pieces not belonging to the class around the judgment target data piece, the estimation unit determines a size of a region used for the estimation.
US10579928B2	Log-based predictive maintenance using multiple-instance learning A method of building a model for predicting failure of a machine, including parsing (41) daily machine event logs of one or more machines to extract data for a plurality of features, parsing (42) service notifications for the one or more machine to extract failure information data, creating (43) bags from the daily machine event log data and failure information data for multiple instance learning by grouping daily event log data into the bags based on a predetermined predictive interval, labeling each bag with a with a known failure as positive, and bags without known failures as negative, where a bag is a set of feature vectors and an associated label, where each feature vector is an n-tuple of features, transforming (44) the multiple instance learning bags into a standard classification task form, selecting (45) a subset of features from the plurality of features, and training (46) a failure prediction model using the selected subset of features.
US10579926B2	Method and device for multi-agent path planning A method and device determines an optimization solution for an optimization problem. The method includes receiving the optimization problem having cost functions and variables where the cost functions have a relationship with the variables and receiving a landmark indicating a point that an agent is to visit while moving, a cost being associated with ignoring the landmark. The method includes generating a first message for the cost functions for the corresponding variable based upon the relationship and a second message for each of the variables for the corresponding cost function based upon the relationship. The method includes generating a disagreement variable for each corresponding pair of variables and cost functions measuring a disagreement value between the first and second beliefs. The method includes repeating steps (c), (d), and (e) until a consensus is formed between the first and second messages until the optimization solution is determined based upon the consensus.
US10579925B2	Method and system for predicting outcomes based on spatio/spectro-temporal data This invention involves use of temporal or spatio/spector-temporal data (SSTD) for early classification of outputs that are results of spatio-temporal patterns of data. Classification models are based on spiking neural networks (SNN) suitable to learn and classify SSTD. The invention may predict early events in many applications, i.e. engineering, bioinformatics, neuroinformatics, predicting response to treatment of neurological and brain disease, ecology, environment, medicine, and economics, among others. The invention involves a method and system for personalized modelling of SSTD and early prediction of events based on evolving spiking neural network reservoir architecture (eSNNr). The system includes a spike-time encoding module to encode continuous value input information into spike trains, a recurrent 3D SNNr and an eSSN as an output classification module.
US10579916B2	Low power magnetic secure transmission system In accordance with aspects of the present invention, a magnetic secured transmission system is presented. A magnetic secure transmission (MST) system can include a full-bridge driver that includes four transistors configured to regulate current through a coil; and a driving controller coupled to drive the full-bridge driver at a high frequency. In some embodiments, the transistors in the full bridge regulator are driven with a high frequency pulsed-wave modulated (PWM) signal to control the current through the coil. A method of magnetic secured transmission (MST) of MST data according to some embodiments includes receiving the MST data; generating coil data in response to the MST data; driving transistors in a full bridge at a high frequency to drive current through a coil according to the coil data.
US10579915B2	Method and device for initializing two-dimensional code A two-dimensional code initialization method includes: receiving information about any two-dimensional code, and determining, according to a preset correspondence between a name of a goods batch and information about the two-dimensional code, a name of a goods batch corresponding to the information about the two-dimensional code; determining, according to the name of the goods batch corresponding to the information about the two-dimensional code, information about a plurality of two-dimensional codes corresponding to the name of the goods batch; and associating the information about the plurality of two-dimensional codes with a URL in which goods information is written and that corresponds to the name of the goods batch corresponding to the information about the two-dimensional code.
US10579908B2	Machine-learning based technique for fast image enhancement Systems and methods described herein may relate to image transformation utilizing a plurality of deep neural networks. An example method includes receiving, at a mobile device, a plurality of image processing parameters. The method also includes causing an image sensor of the mobile device to capture an initial image and receiving, at a coefficient prediction neural network at the mobile device, an input image based on the initial image. The method further includes determining, using the coefficient prediction neural network, an image transformation model based on the input image and at least a portion of the plurality of image processing parameters. The method additionally includes receiving, at a rendering neural network at the mobile device, the initial image and the image transformation model. Yet further, the method includes generating, by the rendering neural network, a rendered image based on the initial image, according to the image transformation model.
US10579903B1	Dynamic montage reconstruction Provided herein are various systems and methods for storing, accessing, and utilizing information regarding medical image montages. Further provided herein are various systems and methods of using an exam type data structure to map exam types in various formats to master exam types that may be associated with customized rules or other features. Further provided herein are various systems and methods for customizing display of items associated with medical exams based on one or more categories (for example) associated with respective items.
US10579900B2	Simple programming method and device based on image recognition The disclosure discloses a method and device for image recognition. The method comprises: placing instruction blocks in a required order; acquiring an encoded instruction block image that represents the instruction block pattern and the placement order; recognizing a single instruction block image from the encoded instruction block image; comparing the single instruction block image with a standard instruction block image to obtain the matching degree of the instruction block; determining, according to the matching degree, standard instruction blocks corresponding to respective instruction block images; sorting the instruction block images according to the coordinates in the encoded instruction block image; parsing the instruction block images according to the sorting order to obtain instructions. The method for image recognition can help children learning concepts such as manipulation, use and programming of intelligent programmable devices more easily.
US10579889B2	Verification with error tolerance for secure product identifiers The invention relates to a system of automatic correction where certain errors are accepted while others are recognized as errors. This applies specifically to non-machine readable inputs or to optical character recognition when reading or transcribing codes. When entering certain characters, this system would allow certain similar character combinations and number of errors from that set while still maintaining integrity of identification codes.
US10579887B2	Identification using mobile device signatures and cameras A mesh of existing infrastructures is usable to identify user identities and communications devices with physical objects (e.g., transportation vehicles, apparel, etc.). A system can receive image data representative of images of physical objects captured (e.g., by a camera) at locations. The system can also receive signal data representative of signals from communications devices. Based on time data and location data associated with the image data and the signal data, the system can, after multiple iterations, determine whether one of the physical objects is correlated with one of the communications devices. In response to a correlation, the system can store in a record data (e.g., a container, database, etc.) data elements representative of the physical object and a second data element associated with the communications device.
US10579883B2	Method and apparatus for detecting a vehicle in a driving assisting system The disclosure discloses a method for detecting a vehicle in a driving assisting system. The method for detecting a vehicle in a driving assisting system includes: obtaining an image to be detected, and determining the positions of lane lines in the image to be detected; determining a valid area in the image to be detected, according to the positions of the lane lines, and the velocity of the present vehicle; and determining a detected vehicle in the valid area according to T preset weak classifiers, and thresholds corresponding to the respective weak classifiers, wherein T is a positive integer.
US10579882B1	Sensor module A vehicle includes a vehicle body having an outer surface, and a sensor that is arranged to observe an environment. The sensor is located within the vehicle body. The vehicle also includes a movement mechanism for moving the sensor from an outward position to an inward position relative to the vehicle body. The movement mechanism moves the sensor from the outward position to the inward position in response to a signal. In an alternative implementation, the sensor is disposed in a sensor module, and the sensor module is able to move relative to the vehicle body from an outboard position to an inboard position in response to application of an external force to the sensor module.
US10579871B2	Biometric composite imaging system and method reusable with visible light An object of the present invention is to provide a biological feature composite imaging technology that multiplexing of the imaging functions and a mobile terminal comprising said composite imaging system. The composite imaging system comprises: a lens assembly (130); an optical filter assembly (120) including at least a visible light bandpass region and an infrared light bandpass region; an image sensor (110) that includes a visible light imaging region, an infrared light imaging region, and a transition region between said two regions, said image sensor (110) operating under one of the visible light imaging mode and the infrared light imaging mode. Under the infrared light imaging mode, specific physical properties of the biological features are used as the image quality information to realize auto-focus of the biological features in the region of interest.
US10579862B2	Method, device, and computer readable storage medium for detecting feature points in an image According to the embodiments of the present disclosure, there is provided a method for detecting feature points in an image. The method comprises: processing data of the image using a first type of convolutional layers in a Convolutional Neural Network (CNN) to generate first processed data, wherein the first type of convolutional layers comprise convolution kernels having non-shared weights; processing the first processed data using a second type of convolutional layers in the CNN to generate second processed data, wherein the second type of convolutional layers comprise convolution kernels having shared weights; and determining the feature points in the image based on the second processed data. In addition, the embodiments of the present disclosure further provide a corresponding device and a corresponding computer readable storage medium.
US10579846B2	AMOLED driving device Disclosed is an AMOLED driving device. The AMOLED driving device includes a fingerprint identification circuit and a detection identification circuit. The fingerprint identification circuit includes multiple fingerprint identification units provided in an active area. Each fingerprint identification unit corresponds to one pixel unit. The detection identification circuit is used to sense and compensate a current flowing through an OLED element and to analyze and process a signal outputted by the fingerprint identification circuit. The AMOLED driving device can reduce a bezel area of the display device and expands the active area.
US10579845B2	Measurement device and method for a multidimensional signal analysis The invention is related to a method and a measurement device for performing multidimensional signal analysis. The measurement device comprises at least one input terminal configured to apply a signal for a signal analysis. A displaying unit is configured to display the applied signal. A masking unit is configured to define a signal mask, wherein at least one signal mask parameter of the signal mask dynamically varies over the signal analysis time of the applied signal.
US10579840B2	Securing internet of things (IOT) RF (radio frequency) location tags using source addresses to locate stations on a Wi-Fi network RF tags using source addresses to locate stations on a Wi-Fi network are secured. An RF location server receives a pseudo source address of an RF (radio frequency) tag from a station. The station obtains the pseudo source address while being within radio range of the RF tag and the station receiving a beacon frame from the RF tag. A source address for the RF tag is looked-up utilizing the pseudo source address, and a specific location for the RF tag is looked-up utilizing the source address. Some embodiments store the locations in association with the pseudo address. Either way, the specific location of the station is identified based on the source address of the RF tag. An action is determined in response to at least the specific location of the station. Information related to the action is sent to the station for output to a user of the station. For example, a location-based offer or service can be provided in real-time with a consumer's presence to relevant products or services.
US10579835B1	Semantic pre-processing of natural language input in a virtual personal assistant A computing system is operable as a virtual personal assistant (VPA). Among other things, a semantic preprocessor of the VPA recognizes natural language user input that is intended as a reference to a known semantic type, and creates a semantic interpretation of the natural language input. The semantic interpretation may be used by a natural language understanding module of the VPA.
US10579833B1	Tamper detection circuit assemblies and related manufacturing processes A tamper sensor assembly includes a lid having a surface and a sensor substrate on the surface of the lid. The sensor substrate has conductive lines that extend across at least a major portion of the surface of the lid and conform to three dimensional characteristics of the surface of the lid. The security processor is electrically connected to the conductive lines of the sensor substrate and is configured to identify occurrence of tampering with the lid based on an electrical characteristic of signals conducted through the conductive lines, and to perform an anti-tampering operation responsive to identifying occurrence of tampering.
US10579827B2	Event processing system to estimate unique user count User events are processed to estimate a unique user count. An identifier hash, having a bucket index portion denoting one of a plurality hash buckets, is generated for each of the user events. At a processing node, each of the user events is allocated to one of a plurality of processing threads based on the bucket index portion of its identifier hash. A unique user count is estimated as follows: for each user event satisfying at least one query parameter, 1) determine a run length of a second portion of its identifier hash, 2) compare it with a value of the hash bucket denoted by the bucket index portion of that identifier hash, and 3) if the determined run length is greater, change that hash bucket value at that node to match the determined run length. The hash bucket values are used to estimate the unique user count.
US10579823B2	Systems and methods for secure high speed data generation and access Systems and methods for generating a data map for retrieval of a data object. An example method includes: receiving an indication to generate a data entry for the data map, the data entry corresponding to a field identifier and a field value related to the field identifier; obfuscating the field identifier to generate a record locator associated with the data entry based, at least in part, on one or more variable storage parameters; and encrypting the field identifier and field value and storing the data entry in the data map as an encrypted field identifier and field value in association with the record locator.
US10579809B2	National identification number based authentication and content delivery The present disclosure envisages a computer implemented method that provides an intended content recipient with selective access to an encrypted data file, subject to successful authentication of the intended content recipient's unique personal identity. An intended content recipient is enabled to create a verifiable personal identity for himself by using a National Identification Number (NIN), and link the NIN to an identifier identifying a computer-based device, so that a challenge (preferably in the form of an OTP having a time-validity) for verifying the identity of the intended content recipient could be delivered to both the mobile phone and the email ID linked to the corresponding NIN. Subsequently, when the intended content recipient authenticates himself and validates the fact that the email ID and mobile phone number linked to the NIN are indeed accessible to him, the remote server enables the intended content recipient to access the encrypted data file.
US10579808B2	Systems and methods for generating previews of content protected by authentication protocols The disclosed computer-implemented method may include (1) acquiring, from a user of a social networking system, a hyperlink to a protected content item, hosted by a content provider system, that is protected by an authentication protocol, (2) sending a request for metadata associated with the protected content item to the content provider system, where the request includes authentication information associated with the authentication protocol, (3) receiving, in response to the content provider system approving the request, metadata associated with the protected content item from the content provider system, where the metadata includes information sufficient to generate a preview of the protected content item, and (4) generating a preview of the protected content item based on the metadata received from the content provider system. Various other methods, systems, and computer-readable media are also disclosed.
US10579799B2	System and method for execution of objects lacking rules of interpretation Disclosed are systems and methods for execution of program code by an interpreter. One exemplary method comprises: generating intermediate instructions based on a unified grammar from instructions of the program code, beginning execution of the intermediate instructions in an emulated computer environment, in response to detecting an instruction of the program code associated with an object for which a rule of interpretation is not found, halting further execution of the intermediate instructions, obtaining an auxiliary code corresponding to the object, wherein a result of execution of the auxiliary code corresponds to the result of the execution of the object, and wherein the auxiliary code contains objects for which the interpreter has a rule of interpretation, executing the instructions of the auxiliary code; and after completion of the execution of the auxiliary code, resuming the execution of the intermediate instructions.
US10579797B2	Program integrity monitoring and contingency management system and method The present disclosure provides a program integrity monitoring and contingency management system and method. The system includes a monitoring-notifying module and a contingency management module. The monitoring-notifying module includes a management unit configuring an exclusion profile and a program integrity monitoring profile, a setup unit establishing a file integrity baseline list according to the program integrity monitoring profile, a notifying unit, and an integrity comparison unit comparing the exclusion profile and the file integrity baseline list with the program integrity file, and generating an abnormality warning when the comparison result is abnormal and instructing the notifying unit to report the same. The contingency management module includes an evidence-collecting unit collecting and storing the program integrity file upon generation of an abnormality warning, and a software malicious program detection unit comparing the program integrity file with virus signatures in a database to determine whether the program integrity file is a software malicious program.
US10579795B1	Systems and methods for terminating a computer process blocking user access to a computing device The disclosed computer-implemented method for terminating a computer process blocking user access to a computing device may include (1) receiving, at a user computing device, a communication indicating that a user is unable to access the user computing device, (2) identifying, by the user computing device, an active computer process running on the user computing device, and (3) executing a process termination application stored on the user computing device to terminate the active computer process and enable the user to access the user computing device. Various other methods, systems, and computer-readable media are also disclosed.
US10579787B1	3D challenge-response tests to distinguish human users from bots The present disclosure provides a challenge-response testing systems for distinguishing between human users and bots. When a user requests to access an electronic resource on a computing device, the computing device identifies a challenge-response test for the user to complete. As part of the test, the computing device renders a first view of a 3D environment on a digital display. The computing device notifies the user of a test condition to complete. To satisfy the test condition, the user has to provide input that will effect a specified change to the view of the 3D environment seen on the display. Once the user provides electronic input, the computing device updates the viewing perspective of the 3D environment and renders an updated view on the digital display. When the user submits an indication that the test has been completed, the computing device verifies whether the test condition has been satisfied.
US10579785B2	Automatic authentification for MES system using facial recognition An authentication system includes a processor, a non-transitory computer readable medium, and one or more programs stored on the computer readable medium, where the processor, under control of the programs implements at least one neural network trained to produce first feature vectors from facial features extracted from a population of first facial images and, after training, configured to produce a second feature vector from facial features extracted from a second facial image, a discriminative classifier trained to identify closely matching ones of the first feature vectors and configured to identify whether at least one first feature vector and the second feature vector meet a correlation threshold. The authentication system may also include an access interface configured to allow access if the correlation threshold is met.
US10579777B2	Structural health monitoring system and associated methods Exemplary embodiments of the present disclosure relate to systems and methods for structural health monitoring in which a sensor network includes motes distributed with respect to a structure. The sensor network can utilize dynamic pattern matching to monitor and localize damage in the structure without modeling or solving equations of the engineered structure, and without ascertaining or separately accounting for extraneous and often-difficult-to-recognize or evaluate factors, such as of the environmental and stimuli-related variability type.
US10579775B2	Tile-cell interpolation Various implementations described herein are directed to a method that identifies a memory instance with multiple tile-cells. The memory instance has memory instance leakage data, and each tile-cell of the multiple tile-cells has tile-cell leakage data. The method subdivides the multiple tile-cells into multiple categories based on a relationship between the memory instance leakage data and the tile-cell leakage data. The method obtains measured leakage data for each tile-cell of the multiple tile-cells by simulating the memory instance based on the memory instance leakage data and the tile-cell leakage data for each category of the multiple categories. The method determines a combined leakage of the memory instance by combining the measured leakage data for each tile-cell of the multiple tile-cells.
US10579770B2	Scalable connectivity verification using conditional cut-points Invention disclosed herein is a method for performing connectivity verification of an integrated circuit device. In embodiments of the invention, the method includes creating a directed graph representation of the integrated circuit device. The method can further include determining target gates referred to as trace signals within the integrated circuit device. The method can further include creating a hierarchical representation of trace signals and determining nested trace signals. The method can further include determining one or more locations for cut points for non-nested trace signals. Thereafter, performing connectivity verification using the one or more locations for cut points. Finally improving scalability of the connectivity verification by utilizing hierarchical decomposition embodiment of the invention.
US10579769B2	Using design proximity index and effect-to-design proximity ratio to control semiconductor processes and achieve enhanced yield A method for detecting a design-impacting defect in an integrated circuit substrate is disclosed. In one implementation, a controller determines a distribution of intended geometric features in a design window of the integrated circuit substrate based on proximities of a plurality of points of interest in the design window to the intended geometric features. The controller obtains a set of intended contours from the distribution. The controller obtains a set of imaged contours from one or more images of the integrated circuit substrate. The controller compares the set of imaged contours to the set of intended contours to obtain a set of potential design-impacting defects in the intended geometric features. The controller determines a probability that a potential design-impacting defect from the set of potential design-impacting defects is a valid design-impacting defect. The controller takes a corrective action based on the determined probability.
US10579764B2	Co-modeling post-lithography critical dimensions and post-etch critical dimensions with multi-task neural networks A method is presented for constructing a deep neural network based model to concurrently simulate post-lithography critical dimensions (CDs) and post-etch critical dimensions (CDs) and to improve the modeling accuracy of each process respectively. The method includes generating lithographic aerial images of physical design layout patterns, constructing a multi-task neural network including two output channels, training the multi-task neural network with the training data of the lithographic aerial images, and outputting simulated critical dimension values pertaining to lithography and etch processes.
US10579763B2	Optimization apparatus and method of controlling optimization apparatus When stochastically deciding, based on a change in energy and a random number relating to thermal excitation, whether to accept any of a plurality of state transitions according to the relative relationship between the change in energy and thermal excitation energy, a transition control unit adds an offset to the change in energy, performs control so that the offset at a local minimum where energy is locally minimized is larger than an offset when the energy is not minimized, holds transition information (a transition number) indicating a previous state transition, and prohibits, based on a decoding result for the held transition information, a first state transition out of the present state transition candidates.
US10579758B2	Method and system for implementation of user logic in a field programmable gate array device Embodiments of present disclosure relates to a method and a system for implementation of user logic in a FPGA device. For the implementation, user logic is mapped onto cells of the FPGA device in implementation platform associated with FPGA device. The mapping is based on user logic constraints to be met and received for FPGA device. Further, mapped cells of FPGA device are placed in implementation platform based on local mapping optimization parameters. The placing also comprises of performing placement optimization on placed cells of FPGA device. Upon placement, placed cells of FPGA device are routed in implementation platform based on at least local mapping optimization parameters and local placement optimization parameters. The routing also comprises of performing routing optimization on routed cells of FPGA device.
US10579745B2	Model driven computational platform for integrated design of products, materials and manufacturing processes The method(s) and system(s) for implementing extensibility of computational design and modelling of subject area on a computational platform in respect of a new subject in a subject area through a modelling schema includes populating the new subject in the model repository as data elements corresponding to the domain entity model of the domain entity meta model. The method includes generating a subject integration layer and a subject information interaction layer from the populated subject data elements and generating GUI screens for user interactions from the populated subject data elements. The method, further, includes integrating user determined external simulation tools with the computational platform by mapping the user determined external simulation tool parameters to the subject data elements. Subsequently, the method includes generating simulation tool adapters from said mapping to achieve said integration.
US10579743B2	Communication assistant to bridge incompatible audience A cognitive communication assistant receives a message transmitted over a communication network from a sender to a recipient. A sender's industry identified with the sender and a recipient's industry identified with the recipient are determined. One or more terms associated with the sender's industry are extracted from the message. A definition associated with the one or more terms is searched for in an on-line reference text. The message is updated based on the definition. The message is transmitted over the communication network to the recipient.
US10579742B1	Biometric signal analysis for communication enhancement and transformation Techniques are described for data transformation performed based on a current emotional state of the user who provided input data, the emotional state determined based on biometric data for the user. Sensor(s) may generate biometric data that indicates physiological characteristic(s) of the user, and an emotional state of the user is determined based on the biometric data. Different dictionaries and/or dictionary entries may be used in translation, depending on the emotional state of the sender when the data was input. In some implementations, the emotional state of the sending user may be used to infer or otherwise determine that a translation was incorrect. The input data may be transformed to include information indicating the current emotional state of the sending user when they provided the input data. For example, the output text may be presented in a user interface with an icon and/or other indication of the sender's emotional state.
US10579733B2	Identifying codemixed text A method for identifying codemixed text includes receiving codemixed text and segmenting the codemixed text into a plurality of tokens. Each token includes at least one character and is delineated from any adjacent tokens by a space. For each token of the codemixed text, the method also includes extracting features from the token and predicting a probability distribution over possible languages for the token using a language identifier model configured to receive the extracted features from the token as feature inputs. The method also includes assigning a language to each token of the codemixed text by executing a greedy search on the probability distribution over the possible languages predicted for each respective token.
US10579722B1	Structured metadata for dynamic data encapsulation A computer system for providing access service request (ASR) forms. The system comprises a data store comprising structured metadata, where the structured metadata represents a plurality of ASR forms, a processor, a non-transitory memory, and an application stored in the non-transitory memory. When executed by the processor, the application traverses the structured metadata, builds a plurality of ASR form group containers based on the traversing, where each ASR form group container is associated with one access service request type and the ASR form group container comprises definitions of forms, sections, and attributes and methods for accessing the forms, sections, and attributes by a front-end workstation for presenting a ASR, and caches each of the ASR form group containers by the application in a memory of the computer system, wherein the ASR form group containers are built once during an execution cycle by the application on initiation of the application.
US10579705B1	Energy design and rating system for buildings This document generally describes computer-based technology related to energy design and rating systems for buildings. For example, a computer-based energy design and rating system can provide a fast and accurate method for calculating the energy performance and thermal comfort of residential and light commercial buildings.
US10579700B2	Website builder image and color palette selector A website builder tool receives an image(s) selected or uploaded by a user, performs color analysis on that image(s) to identify prominent colors and most-occurring colors, and suggests one or more color palettes for use on the website such that text and other visual elements on the website will be aesthetically compatible with the user-provided image(s). Additionally, the server selects images from a database of stock images based on color compatibility with the user-provided image. The process can be performed in the CIELAB color space. Images can also be selected in part based on subject-matter tags. The user thus uploads an image(s) for placement on his website and optionally provides subject-matter descriptive tags, and the website builder tool responds by suggesting additional images and a color palette that will be compatible with the user-provided image, thus making the process of building an attractive and consistently themed website faster and easier.
US10579694B1	Location based recommendation and tagging of media content items Content items, such as e-books, audio files, video files, and the like, may be tagged as associated with a location based on observing the locations at which users access the content items. A rich set of tag data may be gathered by additionally observing such things as the date and time when users access the content items as well as allowing the users to tag the content items with comments or ratings. A fine granularity of tagging may be achieved by associating the tags with specific portions of the content items. Content recommendations based on the tags may be provided to other users when those users are in approximately the same location.
US10579693B2	Modifying a custom search engine Automatically creating and modifying a search engine for a website. User input may be received specifying an address of a website. A search engine may be automatically created for the website based on the user input. Webpages of the website may specify a plurality of tags specifying custom attributes of the webpages. During creation of the search engine, these custom attributes may be incorporated into the search engine index. Additional user input may be received customizing the search engine for various search engine contexts, e.g., based on the custom attributes of the webpages. Search engine results for the website may be based on various ranking functions, potentially including social impact of webpages of the website.
US10579685B2	Content event insights Analysis of the effects of content events on correlated search queries is provided herein. As content events occur, terminology and key words related to the content event are analyzed against search queries submitted to search engines to determine the effect of the content event on what persons exposed to the content event search for. The timing, devices used, a user-demographics of the searches are collected to refine the analysis of the effect of the content event. For example, search queries may be gathered into fine-grained time periods, mobile/desktop device groups, and various geographic regions to determine how users are performing searches in light of the content event. The gathered search queries are refined based on the searches of persons not exposed to the content event to more accurately demonstrate the effect of the content event.
US10579683B2	Memory system including key-value store According to one embodiment, a memory system including a key-value store containing key-value data as a pair of a key and a value corresponding to the key, includes an interface, a memory block, an address acquisition circuit and a controller. The interface receives a data write/read request or a request based on the key-value store. The memory block has a data area for storing data and a metadata table containing the key-value data. The address acquisition circuit acquires an address in response to input of the key. The controller executes the data write/read request for the memory block, and outputs the address acquired to the memory block and executes the request based on the key-value store. The controller outputs the value corresponding to the key via the interface.
US10579679B2	Directed graph compression In one embodiment of the present disclosure, an original graph including nodes is obtained. The nodes of the original graph are reordered to generate a reordered graph. Non-zero elements in an adjacency matrix for the reordered graph are clustered as compared with an adjacency matrix for the original graph. The adjacency matrix for the reordered graph is encoded with integers. The integers correspond to non-empty blocks in the adjacency matrix for the reordered graph.
US10579678B2	Dynamic hierarchy generation based on graph data Provided are systems and methods for generating a hierarchy. In one example, a method includes receiving a first data graph including a plurality of nodes and links connecting the plurality of nodes, receiving a second data graph including a second plurality of nodes and links connecting the second plurality of nodes, generating a hierarchy based on the first data graph and the second data graph, where the generated hierarchy includes a plurality of levels, nodes from the first data graph arranged on at least one level, nodes from the second data graph arranged on at least one other level, and links connecting the nodes from the first data graph and the nodes from the second data graph, and indicating a relationships between the first and second data items, and outputting the generated hierarchy for at least one of display and further processing.
US10579676B2	Highly scalable fine grained rate limiting Techniques of the present disclosure provide an embodiment of a multistage filter (MSF) that takes a rate limiting parameter. The entries of the MSF are updated upon each access. Each update may cause a different breakdown of entries in the MSF and the entries can be dynamically set to reduce collisions and their impact. In some embodiments, the MSF is: configured based on the rate limiting parameter, used to dynamically monitor network traffic and changing assignments, and adjustable in size. In some embodiments, hashing is performed on a per-row basis and seeding initializes entries of the buckets to entries that are the same within a given row and different within a given column.
US10579674B2	Generating and sharing digital video profiles across computing devices utilizing a dynamic structure of unpopulated video silos One or more embodiments of the disclosure include a digital video profile system that generates video profiles utilizing a video silo structure. In particular, in one or more embodiments, the digital video profile system generates a video silo structure comprising a plurality of unpopulated video silos. In addition, the digital video profile system receives a digital video and populates an unpopulated video silo utilizing the digital video. Further, in one or more embodiments, the digital video profile system modifies the video silo structure based on the received digital video. Moreover, the digital video profile system can share video profiles across users and further modify video silo structures based on interactions with video profiles of other users.
US10579654B2	Method and device for generating online question paths from existing question banks using a knowledge graph The disclosure provides an information processing method and device. In one embodiment, an information processing method comprises receiving a request for generating questions inputted by a user, the request for generating questions includes a to-be-learned knowledge point; acquiring, from a knowledge graph for questions, a node path including a target node indicating the to-be-learned knowledge point, the nodes in the knowledge graph for questions indicating question-answering steps of existing questions, knowledge points tested in the question-answering steps, and questioning styles corresponding to the question-answering steps; and generating questions required by the user according to question-answering steps, knowledge points tested in the question-answering steps, and questioning styles corresponding to the question-answering steps indicated by nodes on the node path. The present disclosure enables generation of new questions and facilitates the expansion of a question bank.
US10579652B2	Learning and using contextual content retrieval rules for query disambiguation Various technologies related to generating and applying content retrieval rules are described herein. A content retrieval rule maps a combination of a query and a context to one of a query reformulation or content. The content retrieval rule is learned from search logs of a search engine, and is applied when the query having the context is received at the search engine.
US10579633B2	Reducing probabilistic filter query latency Systems and techniques for reducing probabilistic filter query latency are described herein. A query for a probabilistic filter that is stored on a first media may be received from a caller. In response to receiving the query, cached segments of the probabilistic filter stored on a second media may be obtained. Here, the probabilistic filter provides a set membership determination that is conclusive in a determination that an element is not in a set. The query may be executed on the cached segments resulting in a partial query result. Retrieval of remaining data of the probabilistic filter from the first media to the second media may be initiated without intervention from the caller. Here, the remaining data corresponds to the query and data that is not in the cached segment. The partial query results may then be returned to the caller.
US10579625B2	Personalized review snippet generation and display Systems and methods including one or more processing modules and one or more non-transitory storage modules storing computing instructions configured to run on the one or more processing modules and perform acts of receiving a plurality of user reviews of a product, performing topic modeling of the plurality of user reviews of the product to find a plurality of snippets within the plurality of user reviews each relating to at least one user attribute category of a plurality of user attribute categories, and facilitating a display on a device of a first snippet of the plurality of snippets proximate the product.
US10579619B2	Validation of query plan Database query optimization method that provides for selective restriction of an operation. A query plan for a query is received. The query plan includes an operation to be executed on a table. The received query plan is traversed to determine at least one table in the query plan having a mapping with a threshold rule and based upon a determination that there is at least one table in the query plan having a mapping with the threshold rule, substituting the operation on the at least one table identified in the query plan to another operation having the mapping with the threshold rule.
US10579616B2	Data search system, data search method, and program product A data search system is configured to: generate a first data set including a plurality of records, in which a first column is used as a reference column, and clustering is performed for each predetermined range of the first column to generate first clusters; generate a second data set including the plurality of records, in which a second column is used as the reference column, and clustering is performed for each predetermined range of the second column to generate second clusters; cause a memory device to store therein the first date set and the second data set; generate index information in which information indicating the reference column, information indicating the predetermined range, and a memory area of the clusters are associated with each other; read out the cluster from the memory device based on the index information; and extract data matching the search condition from the read cluster.
US10579611B2	Selective event logging An apparatus includes one or more processors configured to execute instructions to generate a plurality of event results that includes a first event result and a second event result. The apparatus further includes a first buffer coupled to the one or more processors and a second buffer coupled to the first buffer. The first buffer is configured to store the plurality of event results. The apparatus further includes a circuit coupled to the first buffer. The first buffer is further configured to provide the first event result to the second buffer in response to detection by the circuit of a failure condition associated with the first event result.
US10579610B2	Replicated database startup for common database storage Read-only nodes of a distributed database system may perform replicated database startup for common database storage. A read-only node may request a view of a database from a master node to initialize the read-only node for servicing queries. An indication of the view may be received and portions of data maintained for the distributed database may be read from a common data store maintaining the data for the database according to the indicated view of the database. In-memory data structures at the read-only node for servicing queries may be initialized based on the portions of data read from the common data store. The read-only node may then be made available for servicing queries.
US10579606B2	Apparatus and method of data analytics in key-value solid state device (KVSSD) including data and analytics containers An apparatus and a method are provided. The apparatus of data analytics in a key-value solid state device (KVSSD) are disclosed. The KVSSD includes at least one KVSSD data container; and at least one KVSSD analytics container associated with at least one of the at least one KVSSD data container. The KVSSD data and analytics containers may be configured to store data and data analytics results in key-value pairs. The apparatus may include a virtual analytics container which is configured to utilize a field programmable gate array (FPGA) for performing a logical operation on data stored in multiple containers. A key in a key-value pair stored in a KVSSD analytics container may include a KVSSD data container identifier, a logical offset, and a user key that is also a key in a KVSSD data container associated with the KVSSD data container identifier. A value in a key-value pair may include a header of a fixed size, and analytics result information that depends on a type stored in the header. The type may include a first type to indicate storing user data associated with analytics and a second type to indicate holding references within the KVSSD data container where a key is written.
US10579599B2	Upgrade of heterogeneous multi-instance database clusters A method, system, and computer program product for management of large multi-database installations. The method form commences by analyzing a multiple database installation to determine a set of candidate upgrade operations to apply to individual instances of heterogeneous databases in the multiple database installation, and then scheduling an order in which order to apply individual operations from among the set of candidate upgrade operations. In exemplary operation, the candidate upgrade operations comprise database version upgrades, database stack upgrades, and/or database listener upgrades. Some embodiments exploit homogeneity and/or groupings in order to parallelize performance of various upgrade operations during mass upgrade of multi-database installations. In addition to performing upgrade operations in the form of database version upgrades, database stack upgrades, and/or database listener upgrades, the installation can be upgraded by receiving application upgrades.
US10579595B2	Method and device for calling a distributed file system The present application discloses a method and device for scheduling a distributed file system. A specific implementation of the method comprises: creating a new session based on a received session request from a user terminal; sending a first locking request to a manager of the distributed file system, the first locking request used for requesting locking a lease directory; sending a request for creating a new subdirectory in the lease directory to the manager in response to receiving a response of successful locking to the first locking request, the new subdirectory being named using an IP address and a port of the new session; and designating the new session as a primary session in response to receiving a response of successful new creation to the request for creating the new subdirectory.
US10579586B1	Distributed hash object archive system A method of managing objects in an archive system includes assigning a number of addresses to each of a plurality of nodes, dividing an object into a sequence of blocks, uniformly distributing the sequence of blocks across the plurality of nodes by, calculating a hash value of a unique identifier of the object to be used as an address for a first block in the sequence, storing the first block at a node to which the address is assigned, for each subsequent block in the sequence, calculating a subsequent address from a hash value of the address of an immediately previous block in the sequence and storing the subsequent block at a node to which the calculated subsequent address is assigned, iteratively calculating a hash value of the hash value of the subsequent address if the calculated subsequent address is assigned to a node where a previous block is stored, and storing the subsequent block at a node to which an address corresponding to the iteratively calculated hash value is assigned.
US10579575B2	Systems and methods of management console user interface pluggability In accordance with embodiments of the present disclosure, an information handling system may include a processor and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution by the processor, cause the processor to (i) read plug-in configuration data setting forth data regarding user interface modifications to be made to a user interface of a management console application; (ii) based on the plug-in configuration data, call one or more pluggable modules; and (iii) integrate user interface features defined by the plug-in configuration data and the one or more pluggable modules into the user interface of the management console application.
US10579569B2	Universal serial bus type-C interface circuit and pin bypass method thereof A universal serial bus type-C interface circuit and a pin bypass method thereof are provided. The interface circuit includes a first configuration channel pin, a second configuration channel pin, a port manager and a port controller. The port manager has a first signal terminal and a second signal terminal. The port controller includes a multiplexer circuit and a control logic circuit. The multiplexer circuit is coupled to the first configuration channel pin, the second configuration channel pin, the first signal terminal and the second signal terminal. The control logic circuit is coupled to the multiplexer circuit and provides a multiplexer control signal to the multiplexer circuit in response to a switching request. The multiplexer circuit couples the first configuration channel pin and the second configuration channel pin to the first signal terminal and the second signal terminal respectively according to the multiplexer control signal.
US10579567B2	Queue depth management for host systems accessing a peripheral component interconnect express (PCIe) device via a PCIe switch Described herein are enhancements for managing quality of service in a multi-host Peripheral Component Interconnect Express (PCIe) switching environment. In one implementation, a host system is configured to maintain quality of service statistics corresponding to data interactions with a PCIe storage device available via a PCIe switch. The host system may further receive secondary quality of service statistics for one or more other host systems communicatively coupled to the PCIe device via the PCIe switch, and determine a maximum queue depth for the host system based on the quality of service statistics and the second quality of service statistics to maintain a quality of service for the host systems.
US10579562B2	Time and event based message transmission A system, apparatus and method for efficient utilization of available band-width on the system's bus connection. The system includes a scheduler configured to receive a virtual schedule that provides at least one slot for sending a message over the communication bus. A module is configured to send a message over the communication bus.
US10579560B2	Transaction-based hybrid memory A transaction-based hybrid memory device includes a host memory controller to control operation of the device. A hybrid memory controller is coupled to the host memory controller over a memory bus. The hybrid memory controller includes non-volatile memory control logic to control operation of non-volatile memory devices and cache control logic to accelerate cache operations, a direct memory access (DMA) engine to control volatile cache memory and to transfer data between non-volatile memory, and cache memory to off load host cache managements and transactions. A host interface couples the host memory controller to the memory bus.
US10579558B1	Flexible redundant input/output (I/O) schemes for I/O channels A redundancy termination panel includes first and second interfaces configured to be coupled to first and second I/O modules, respectively. The redundancy termination panel also includes a third interface configured to be coupled to a field device. The redundancy termination panel further includes an I/O channel circuit associated with an I/O channel between the I/O modules and the field device. The I/O channel circuit is configured to allow an input current used for receiving data from the field device to be split such that different portions of the input current are sourced by different ones of the I/O modules. The I/O channel circuit is also configured to combine multiple currents driven by different ones of the I/O modules and provide an output current used for sending data to the field device.
US10579557B2	Near-memory hardened compute blocks for configurable computing substrates A configurable computing system which uses near-memory and in-memory hardened logic blocks is described herein. The hardened logic blocks are incorporated into memory modules. The memory modules include an interface or communication logic to communicate between the configurable computing substrate and the memory module. In an implementation, the memory modules can include an on-die memory or other forms of non-configurable logic to enable more efficient processing for a variety of operations. In another implementation, the memory modules can include a portion of configurable computing substrate logic fabric to enable more efficient processing for a variety of operations. In another implementation, the memory modules can include an on-die memory and a portion of configurable computing substrate logic fabric to enable more efficient processing for a variety of operations.
US10579555B2	Electronic control unit and data transmission method An electronic control unit connected to a communication line, the electronic control unit including: a transmission request buffer including a plurality of transmission buffer areas; a message buffer including a plurality of message buffer areas; a transmission controller configured to transmit data stored in the message buffer to the communication line; and a central processing unit. The central processing unit programmed to search for data with a higher priority than data stored in the message buffer from among pieces of data stored in the transmission request buffer, sequentially search for a vacant buffer area in which no data is stored from among the plurality of message buffer areas, set the data that has been searched for in the vacant buffer area that has been searched for.
US10579543B2	Method and electronic device for processing information The present disclosure provides a method and electronic device for processing information. The method is applied in a solid state storage apparatus which is connected to an electronic device. The solid state storage apparatus supports N logical-address-to-physical-address mapping tables different from each other simultaneously, wherein N is an integer greater than or equal to 1. The method comprises: receiving identity information for a user from the electronic device; determining a first logical-address-to-physical-address mapping table corresponding to the user based on the identity information; and assigning the first logical-address-to-physical-address mapping table to the user.
US10579529B2	Reducing overhead of managing cache areas Maintaining multiple cache areas in a storage device having multiple processors includes loading data from a specific portion of non-volatile storage into a local cache slot in response to a specific processor of a first subset of the processors performing a read operation to the specific portion of non-volatile storage, where the local cache slot is accessible to the first subset of the processors and is inaccessible to a second subset of the processors that is different than the first subset of the processors and includes converting the local cache slot into a global cache slot in response to one of the processors performing a write operation to the specific portion of non-volatile storage, wherein the global cache area is accessible to the first subset of the processors and to the second subset of the processors. Different ones of the processors may be placed on different directors.
US10579521B2	Address allocation to PSUs, service arrangement and passenger cabin A method for allocating addresses to passenger service units (PSUs) and a service controller for a passenger cabin of an aircraft are provided. A coding device of the controller defines multiple coding parameters each corresponding to an installation position of a PSU. Each coding parameter defines a coding value. The PSUs are installed at respective installation positions in an installation space. A head unit of the controller communicates with the PSUs. In response to a start command, a respective coding value is determined at a respective installation position of a respective PSU. A respective waiting time is determined from the respective coding value according to a time rule. A response is transmitted to the head unit for each PSU upon expiration of the waiting time from the start command. Upon receiving the response, an address is allocated to a PSU which transmitted the response.
US10579519B2	Interleaved access of memory In some examples, each processor of a plurality of processors applies an interleave transform to perform interleaved access of a plurality of memory banks, where for any given memory address in use by the plurality of processors, applying any of the interleave transforms results in selection of a same memory bank of the plurality of memory banks and a same address within the same memory bank.
US10579515B1	Recycling segment pages while preserving integrity of memory addressing Techniques for recycling segment pages while preserving integrity of memory addressing. Upon a request to delete a system object, an initial segment identifier is de-assigned from a segment of the system object, and each segment page of the system object is remapped to a new virtual address range. The segment is stored as a reusable segment in a reusable segment store. Upon a request to access the system object, an exception is raised that the system object does not exist. Upon a request to create a new system object, the reusable segment store is searched to identify the reusable segment as a match. The reusable segment is assigned as a segment of the new system object.
US10579507B1	Device cloud provisioning for functional testing of mobile applications A computer-implemented method for automatically provisioning a device grid for use in cloud-based functional testing of an application includes providing a graphical user interface (GUI) that allows a user to input search criteria specifying a set of different device characteristics. A search is then performed across one or more device cloud providers to locate available physical devices that match at least one of the device characteristics. The available physical devices are displayed on the GUI. Responsive to selection input of the user, a number of each selected physical device for the device grid are reserved. An application program to test is then loaded on each reserved physical device.
US10579505B1	Capturing task traces for multiple tasks Method and system are provided for capturing task traces for multiple tasks. The method includes capturing in a task trace structure recent trace data entries for a task segmented into a predefined number of available blocks, wherein a task trace structure is provided for each of multiple tasks in parallel, wherein trace data entries are written to a block with a timestamp of the trace data entries. The method also includes storing in a global trace structure pushed blocks from the multiple task trace structures of older data that exceed the predefined number of blocks of the task trace structures, wherein the blocks are ordered in the global trace structure by the pushed order of the blocks from the multiple task trace structures.
US10579492B2	Device, system and method for identifying a source of latency in pipeline circuitry Techniques and mechanisms for determining a latency event to be represented in performance monitoring information. In an embodiment, circuit blocks of a pipeline experience respective latency events at variously times during tasks by the pipeline which service a workload. The circuit blocks send to an evaluation circuit of the pipeline respective event signals which each indicate whether a respective latency event has been detected. The event signals are communicated in parallel with at least a portion of the pipeline. In response to a trigger event in the pipeline, the evaluation circuit selects an event signal, based on relative priorities of the event signals, which provides a sample indicating a detected latency event. Based on the selected event signal, a representation of the indicated latency event in provided to latency event count or other value performance monitoring information. In another embodiment, different time delays are applied to various event signals.
US10579491B2	Method and system for automated injection of process type specific in process agents on process startup A system and method is disclosed that installs an agent on a computer system that is configured to be automatically started at startup of the computer system and that is also configured to detect the startup of processes on the computer system. The agent determines the capabilities to monitor process starts that available on the computer systems and installs an appropriate process start monitoring procedure. The installed process start monitoring procedure detects the start of a process, installs a core agent into the execution context of the started process and manipulates the start sequence of the started process to initialize and start the core agent. On startup, the core agent analyzes the execution context of the started process to identify the type of application executed by the started process, and injects a special agent matching the identified type into the started process to perform application level monitoring.
US10579488B2	Auto-calculation of recovery plans for disaster recovery solutions One or more embodiments provide techniques for migrating virtual machines (VMs) from a private data center to a cloud data center. A hybrid cloud manager determines a scope of migration from the private data center to the cloud data center. The hybrid cloud manager groups each VM included in the scope of migration into one or more clusters. The hybrid cloud manager defines one or more migration phases. Each migration phase comprises a subset of the one or more clusters. The hybrid cloud manager generates a migration schedule based on at least the one or more migration phases. The hybrid cloud manager migrates the VMs from the private data center to the cloud data center in accordance with the migration schedule.
US10579485B2	Virtual machine fault tolerance In a computer system running at least a first virtual machine (VM) and a second VM on virtualization software, a computer implemented method for the second VM to provide quasi-lockstep fault tolerance for the first VM includes executing a workload on the first VM and the second VM that involves producing at least one externally visible output and comparing an externally visible output of the second VM with an externally visible output of the first VM to determine if there is an output match. In response to a determination that the externally visible output of the second VM does not match the externally visible output of the first VM, a resynchronization of the second VM is executed. The externally visible output of the first VM is kept from being output externally until completion of the resynchronization.
US10579484B2	Apparatus and method for enhancing reliability of watchdog circuit for controlling central processing device for vehicle An operating method of a vehicle watchdog circuit is provided. The method includes monitoring whether communication with a vehicle controller through a preset protocol is enabled and when a communication fault does not occur by monitoring whether communication is enabled, transmitting an error detection query to the vehicle controller every preset period. A response to the error detection query is received, and an operation of the vehicle controller is monitored, and upon determining that the operation of the vehicle controller is normal, a plurality of preset reset signals are sequentially transmitted to the vehicle controller.
US10579482B2	Method of checkpointing the working environment of a session of a user on a server The invention relates to a method of checkpointing the working environment of a user (7) session on a server (1) comprising a first step (11) of checkpointing the working environment of a first application of said session, characterized in that it comprises at least one second step (12) of checkpointing the working environment of a second application of said session different from said first application, and in that said first checkpointing step (11) and said second checkpointing step (12) are synchronized with each other such that the checkpointed working environment of the first application and the checkpointed working environment of the second application are coherent with each other.
US10579476B2	Using alternate recovery actions for initial recovery actions in a computing system Provided are a computer program product, system, and method for using alternate recovery actions for initial recovery actions in a computing system. An initial recovery table provides initial recovery actions to perform for errors detected in the computing system. An alternate recovery table is received including at least one alternate recovery action for at least one of the initial recovery actions. An alternative recovery action provided for an initial recovery action specifies a different recovery path involving at least one of a different action and a different component in the computing system than involved in the initial recovery action. A determination is made as to whether to use the initial recovery action in the initial recovery table for a detected error or the alternate recovery action in the alternate recovery table. The determined initial recovery action or alternate recovery action determined is used to address the detected error.
US10579472B2	Semiconductor devices A semiconductor device may include an error correction circuit and a fuse signal generation circuit. The error correction circuit may be configured to generate a syndrome signal from data using an error correction code. The fuse signal generation circuit may be configured to receive the syndrome signal to generate a fuse signal for repairing a cell array storing the data.
US10579464B2	Method and apparatus for partial cache line sparing Provided are an apparatus and method to store data from a cache line at locations having errors in a sparing directory. In response to a write operation having write data for locations in one of the cache lines, the write data for a location in the cache line having an error is written to an entry in a sparing directory including an address of the cache line.
US10579462B2	Method and apparatus for using an error signal to indicate a write request error and write request acceptance Provided are a method and apparatus for using an error signal to indicate a write request error and write request acceptance performing error handling operations using error signals. A memory module controller detects a write error for a write request in a memory module and asserts an error signal on a bus to a host memory controller in response to detecting the write error.
US10579461B2	Log message grouping apparatus, log message grouping system, and log message grouping method A log message grouping apparatus calculates a coincidence degree evaluation value E1 representing the degree of coincidence between minority words, which are relatively low occurrence frequency words, out of the words that form a log message and minority words in another log message. The log message grouping apparatus further calculates an occurrence degree evaluation value E2 representing the degree of occurrence of the combination of a classification value of a log message and the classification value of a past log message on the basis of the occurrence frequency of the combination of the classification values and calculates an association degree evaluation value E3 representing the degree of association between the log message and the past log message on the basis of the coincidence degree evaluation value E1 and the occurrence degree evaluation value E2.
US10579451B2	Pro-actively preparing a dispersed storage network memory for higher-loads A method for execution by one or more processing modules of one or more computing devices of a dispersed storage network (DSN), the method begins by maintaining dispersed storage network (DSN) storage and maintenance loading information. The method continues by estimating a future data access task rate and determining a probability level of potential future data loss based on the estimated future data access task rate. The method continues, when the probability level of the potential future data loss compares unfavorably to a maximum probability of data loss threshold level, by facilitating execution of a preventative data loss mitigation process and when a current data access task rate is greater than a maximum task rate level, suspending the execution of the preventative data loss mitigation process.
US10579450B2	Distributed data rebuilding A distributed storage network (DSN) stores sets of encoded data slices in sets of storage units. A first storage unit assigned to store an encoded data slice included in a set of encoded data slices transmits a rebuild request associated with the storage error to a second storage unit. The second storage unit generates the rebuilt encoded data slice in response to the rebuild request, and transmits the rebuilt encoded data slice back to the first storage unit, which stores the rebuilt encoded data slice.
US10579441B2	Detecting deadlocks involving inter-processor interrupts Creating, maintaining and using a lock dependency graph in a way that includes the following steps: (i) acquiring a first restriction on processor access in a multi-processor computer system; (ii) modeling the first restriction as first locking primitive information; and (iii) storing data corresponding to the first locking primitive information in a lock dependency graph. The first restriction on processor access is one of the following two types: (i) disabling the interrupts on a given processor; and/or (ii) sending inter-processor interrupts with synchronous waiting from one processor to another (including itself).
US10579437B2	Migrating a logical partition with a native logical port Migrating a logical partition with a native logical port including establishing in the target computing system a target VIOS that includes a virtual network interface controller (vNIC) server, the vNIC server of the target VIOS coupled for data communications to a first target virtual adapter; copying the logical partition including a vNIC client to the target computing system; starting the logical partition; establishing, by the vNIC client of the logical partition, data communications with the vNIC server of the target VIOS, including performing I/O data communications between the logical partition and the first target virtual adapter; establishing a second logical port in the logical partition on the target computing system, including coupling for I/O data communications the second logical port to a second target virtual adapter; and performing I/O data communications from the logical partition to the second target virtual adapter through the second logical port.
US10579431B2	Systems and methods for distributed management of computing resources A computer-implemented method for distributed management of computing resources may include (i) performing, by a computing device, an initial configuration of one or more computing resources connected to a network, (ii) detecting a request for a computing resource from a client daemon, (iii) based on the request, initializing a computing environment on the computing resource, (iv) maintaining an active state of the computing resource for a usage session by a client device, (v) detecting, from the client daemon, a notification of completion of the usage session, and (vi) in response to the notification of completion, reverting the computing resource to an initial state. Various other methods, systems, and computer-readable media are also disclosed.
US10579427B2	Method and system for translating resource requirement of application into tangible infrastructural resources A method and a system for translating a resource requirement associated with an application into one or more tangible infrastructural resources in a communication network is disclosed. The method includes receiving a request for the resource requirement associated with the application. The method includes creating in response to the received request, an application compose requirement file based on an application definition and the resource requirement. The method includes translating the resource requirement associated with the application into the one or more tangible infrastructural resources based on the created application compose requirement file. The method includes providing the one or more tangible infrastructural resources to the application based on the translated resource requirement.
US10579405B1	Parallel virtual machine managers A processor on a host machine can concurrently operate a standard virtual machine manager (VMM) and a security VMM (SVMM), where the SVMM has a higher privilege level and manages access to a hardware TPM or other trusted source on the host machine. Such a configuration prevents a compromised VMM from gaining access to secrets stored in the hardware TPM. The SVMM can create a virtual TPM (vTPM) for each guest VM, and can seal information in each vTPM to the hardware TPM. A guest VM or the standard VMM can access information in the corresponding vTPM only through the corresponding SVMM. Such an approach enables the host to securely implement critical security functionality that can be exposed to customers, and provides protection against leakage of customer secrets in case of a security compromise.
US10579399B2	Recursive serialization of a hierarchy of data objects A data-serialization system initially uses a recursive serialization algorithm to serialize a hierarchy of nested data objects by translating those objects into a serial stream of data. The system determines that a stack-overflow error is likely to occur whenever the number of objects serialized by the system exceeds a threshold value, or whenever the stack has reached an unacceptable level of utilization. When the system determines that a stack-overflow error is likely or if the system detects that a stack-overflow error will definitely occur if another object is serialized, the system either transfers control to a nonrecursive algorithm that does not require a stack data structure or reduces stack utilization by transferring contents of the stack to a variable-size queue-like data structure.
US10579398B2	Accelerating reference count processing in object deletion A computer-implemented method is provided for deleting a given object from among a plurality of objects in an object-oriented programming language computing system which uses a Reference Count (RC) of each of the plurality of objects to check a liveness of the plurality of objects. The method includes decrementing, in a Reference Counts (RCs) decrement operation, RCs of objects referenced from the given object using one or more non-atomic operations in a transaction that utilizes a hardware transactional memory mechanism to accelerate the reference counts decrement operation.
US10579385B2	Prediction of an affiliated register Prediction of an affiliated register. A determination is made as to whether an affiliated register is to be predicted for a particular branch instruction. The affiliated register is a register, separate from a target address register, selected to store a predicted target address based on prediction of a target address. Based on determining that the affiliated register is to be predicted, predictive processing is performed. The predictive processing includes providing the predicted target address in a location associated with the affiliated register.
US10579381B2	Encoding and decoding variable length instructions Methods of encoding and decoding are described which use a variable number of instruction words to encode instructions from an instruction set, such that different instructions within the instruction set may be encoded using different numbers of instruction words. To encode an instruction, the bits within the instruction are re-ordered and formed into instruction words based upon their variance as determined using empirical or simulation data. The bits in the instruction words are compared to corresponding predicted values and some or all of the instruction words that match the predicted values are omitted from the encoded instruction.
US10579373B2	Seamless extension porting Techniques are presented for providing seamless extension porting. A second browser of a client device can receive a call to execute extension code containing function calls for a first browser. The extension code can further include a preload manifest key, which can include at least one bridge script property providing a bridge between function calls for the first browser and function calls for the second browser. In response to receiving the call to execute the extension code, the at least one bridge script property of the preload manifest key may be performed to execute the referenced bridge. Subsequently, remaining code of the extension code may then be executed. The bridge can receive function calls by the extension code. When a function call for the first browser is received, the bridge can map the function call for the first browser to a corresponding function call supported by the second browser.
US10579370B2	Method to disintegrate a monolith service to microservices A method for forming at least one microservice is provided. The method includes the steps of getting a monolith application to disintegrate, scanning codes of the monolith application, finding one or more nanoservice candidates in the codes, and recommending at least one microservice to a user. Herein, the at least one microservice is a group of one or more selected nanoservice candidates sharing a common characteristic. According to an input of the user, at least one microservice selected among the at least one recommended microservice is generated.
US10579367B2	Zero down time upgrade for a multi-tenant identity and data security management cloud service Embodiments implement data versioning in a cloud-based identity management system. Embodiments provide a first microservice for performing an identity management service and having a corresponding first version application programming interface (“API”) that identifies the first microservice. Embodiments provide a second microservice for performing the identity management service, the second microservice comprising a new version of the first microservice and having a corresponding second version API that identifies the second microservice. Embodiments receive a request for performing the identity management service from a client of the identity management system, the request including a uniform resource locator (“URL”), where the first version API or the second version API are identified in the URL. Embodiments then perform the identity management service using either the first microservice or the second microservice based on the request and using tenant data stored in a database.
US10579354B2	Method and system for rapid deployment and execution of customized functionality across multiple distinct platforms A computing system environment executes platform-independent instructions to combine object data of a plurality of objects into a platform-independent object. Such objects of the plurality of objects may, for example, include form, entity and schema objects. Platform-dependent instructions comprising a set of one or more platform-specific instructions to display and operate on the platform-independent object are executed on a specific platform type associated with the platform-dependent instructions. By decoupling the hardcoded functionality from easily created and edited object portions of the application design, rapid deployment and execution of customized functionality across multiple distinct platforms is thereby enabled.
US10579350B2	Heterogeneous computer system optimization Method and system are provided for identifying a processing element for executing a computer program code module. The method includes: calculating a cyclomatic complexity score for the module; selecting one of a first or second processing element based on the calculated complexity score, the first processing element having a first architecture and the second processing element having a second architecture different from the first architecture, the first and second processing elements forming part of a heterogeneous computer system; running the module on the selected processing element to determine a first run time, and subsequently running the module on the non-selected processing element to determine a second run time; comparing the first and second run time to identify a shortest run time; and identifying a processing element producing a shortest run time as the processing element for executing the computer program code module.
US10579344B2	Converting visual diagrams into code The techniques and systems described herein provide a tool for use in association with the development of a computer program. For instance, a computer program development team (e.g., design architects, developers, programmers, coders, etc.) can use the tool to efficiently generate code solutions using an illustrated diagram (e.g., drawn on a dry-erase white board, drawn using a digital drawing program, etc.). In various examples, the tool receives a diagram illustrating the design architecture and performs recognition techniques to identify characteristics of the components illustrated in the diagram. The characteristics can include keywords written on or in association with a component, a visual shape of a component, and a visual relationship between the component and other components illustrated in the design architecture. Using the identified characteristics, the tool maps the components to previously generated code template(s) and provides the code templates to a user.
US10579341B2	Generation of workload models from execution traces Methods and computer readable media for software modeling. The method comprises accessing one or more software execution traces describing execution times of tasks within software executed on a target platform. The method also comprises generating a workload model of the software based on the one or more software execution traces of the software executed on the target platform. The workload model describes tasks of the software and workloads on the target platform associated with the tasks of the software.
US10579338B2	Apparatus and method for processing input operand values An apparatus and method are provided for processing input operand values. The apparatus has a set of vector data storage elements, each vector data storage element providing a plurality of sections for storing data values. A plurality of lanes are considered to be provided within the set of storage elements, where each lane comprises a corresponding section from each vector data storage element. Processing circuitry is arranged to perform an arithmetic operation on an input operand value comprising a plurality of portions, by performing an independent arithmetic operation on each of the plurality of portions, in order to produce a result value comprising a plurality of result portions. Storage circuitry is arranged to store the result value within a selected lane of the plurality of lanes, such that each result portion is stored in a different vector data storage element within the corresponding section for the selected lane. Such an approach allows efficient processing of input operand values in a manner that is not constrained by the size of the vector data storage elements, and in particular in a way that is vector length agnostic.
US10579331B2	Method and apparatus for controlling an average fill level of an asynchronous first-in-first-out, FIFO A fill level control apparatus configured to control the average fill level of an asynchronous first-in-first-out, FIFO, the fill level control apparatus comprising an offset calculation unit adapted to or configured to calculate the offset between a programmable target average fill level and the current average fill level of the FIFO and an adjustment unit adapted to or configured to adjust continuously the empty rate of the FIFO in response to the calculated offset to keep the average fill level of the FIFO constant.
US10579329B2	Entertainment server and associated social networking services Certain exemplary embodiments relate to entertainment systems that interact with users so as to provide for social networking and/or other services. In certain exemplary embodiments, an entertainment system is configured to provide jukebox-related and entertainment system mediated services that are accessible from within and from the outside of the location, coordinating social networking services among and between patrons within and outside of the location and also providing for advertisement opportunities. In certain exemplary embodiments, the entertainment system within a location may serve as and/or be connected to a jukebox. The entertainment system within the location may be connected to one or more client devices, one or more displays, one or more bar-top or hand-held gaming devices, etc., in certain exemplary embodiments. The jukebox-related and entertainment system mediated services may provide mechanisms for enhancing patrons' experiences, creating a sense of ownership and/or belongingness to a connected community of entertainment system users.
US10579321B2	Control method and control apparatus for apparatus including short range wireless communication module A control method and control apparatus for determining a relative location of a mobile terminal with respect to a display apparatus by using short range wireless communication. A method of controlling a display apparatus including a plurality of short range wireless communication modules, the method includes: performing short range wireless communication with a mobile terminal through a short range wireless communication module included in the display apparatus; identifying the short range wireless communication module performing the short range wireless communication with the mobile terminal from among the plurality of short range wireless communication modules; determining a relative location of the mobile terminal with respect to the display apparatus according to the result of identifying; and determining a location on a screen of the display apparatus to display data according to the relative location and displaying the data on the screen of the display apparatus according to the determined location.
US10579320B2	Display system, display device, information display method, and program A display system includes a first display device of a head mounted type, and a second display device. The first display device includes: a first display configured to display a guide image, a first camera configured to capture an outside image, and a first communication interface configured to: transmit the outside image to the second display device, and receive the guide image transmitted from the second display device. The second display device includes: a second display configured to display the outside image, a detector configured to detect a pointing position relative to the outside image, a second processor configured to generate the guide image based on the pointing position, and a second communication interface configured to: receive the outside image transmitted from the first display device, and transmit the guide image to the first display device.
US10579315B2	Multi-level system for label creation and printing A method for printing certain information on labels using a smart device. Product-related information, expiration information, and batch information is stored on a server and provided to a smart device. One of the products or batches is selected using the smart device. Labels incorporating certain product-related information are generated and sent to a printer.
US10579310B2	System and method for reliably persisting storage writes at high speed A method for operating a device adapted to store information with high reliability includes determining a storage address for a data payload portion of a write request in accordance with a configuration of a communications interface coupled to the device, where the data payload is to be stored in mirroring groups of cache storage partitions of a plurality of cache storage modules. The method also includes generating a payload read request in accordance with the storage address, and prompting the communications interface to initiate the storing of the data payload, in parallel, in the mirroring groups in accordance with the payload read request.
US10579307B2	Correcting power loss in NAND memory devices Devices and techniques for correcting for power loss in NAND memory devices are disclosed herein. The NAND memory devices may comprise a number of physical pages. For example, a memory controller may detect a power loss indicator at the NAND flash memory. The memory controller may identify a last-written physical page and determine whether the last-written physical page comprises more than a threshold number of low-read-margin cells. If the last-written physical page comprises more than the threshold number of low-read-margin cells, the memory controller may provide a programming voltage to at least the low-read-margin cells.
US10579306B1	Memory management method and storage controller A memory management method is provided. The method includes storing an acquired first command into a command queue, and setting a command phase value of the first command according to a current command phase, wherein in response to determining that the first command is a flush command, calculating a command phase count value corresponding to the current command phase, and adjusting the current command phase; selecting a new target command from the command queue, and executing the target command according to a target command phase value of the target command and a corresponding target command phase count value, wherein the target command phase count value which is not a preset value is adjusted; determining, according to the adjusted target command phase count value, whether to respond to a host system that an execution of a target flush command corresponding to the target command phase value is completed.
US10579301B1	Processing platform configured to estimate storage system performance utilizing processor characteristics A processing platform is configured to communicate over a network with one or more client devices, and to receive a request from a given one of the client devices for a proposed configuration of a storage system. The processing platform identifies based at least in part on the received request at least one processor to be utilized in implementing the storage system, selects a particular one of a plurality of storage system performance models based at least in part on the identified processor, computes a performance metric for the storage system utilizing the selected storage system performance model and one or more characteristics of the identified processor, generates presentation output comprising: (i) the performance metric, and (ii) information characterizing at least a portion of the proposed configuration of the storage system, and delivers the presentation output to the given client device over the network.
US10579295B2	Tape backup in large scale distributed systems A computer-implemented method includes identifying a source data object of a distributed computing environment. The distributed computing environment includes two or more storage nodes. The source data object exists as two or more slices. At least one of the slices is replicated on at least two storage nodes. The computer-implemented method further includes associating the source data object with a tape. The tape is written by a tape drive controlled from the distributed computing environment. The computer-implemented method further includes copying the source data object to the tape by, for each source slice of the two or more slices, in sequence: selecting a source node of the two or more storage nodes whereon the source slice is replicated, mounting the tape drive to the source node, appending the source slice to the tape, and unmounting the tape drive. A corresponding computer program product and computer system are also disclosed.
US10579291B2	Resource sharing in a telecommunications environment A transceiver is designed to share memory and processing power amongst a plurality of transmitter and/or receiver latency paths, in a communications transceiver that carries or supports multiple applications. For example, the transmitter and/or receiver latency paths of the transceiver can share an interleaver/deinterleaver memory. This allocation can be done based on the data rate, latency, BER, impulse noise protection requirements of the application, data or information being transported over each latency path, or in general any parameter associated with the communications system.
US10579289B2	Memory management method for configuring super physical units of rewritable non-volatile memory modules, memory control circuit unit and memory storage device A memory management method, a memory control circuit unit and a memory storage device are provided. The method includes recording use information according to each physical erasing unit of a rewritable non-volatile memory module. The method also includes configuring a plurality of super physical units. An address offset value corresponding to a first unavailable physical programming unit of a first physical erasing unit in a first super physical unit is the same as an address offset value corresponding to a first available physical programming unit of a second physical erasing unit in the first super physical unit.
US10579287B2	Sharing alias addresses among logical devices Provided are a computer program product, system, and method for sharing alias addresses among logical devices by a host accessing logical devices provisioned with a capacity from physical devices managed by a control unit. The host establishes with the control unit an association of logical devices and alias addresses assigned to the logical devices, wherein the alias addresses are associated with an alias management group. Alias address pool information is generated indicating each of the logical devices and their assigned alias addresses indicated in the association. The host uses from the alias address pool information any one of the alias addresses in the alias address pool information to access any of the logical devices associated with the same alias management group as the alias address.
US10579281B2	Rule-based tiered storage system A method for storing a data segment in a storage tier of a storage unit comprising at least two storage tiers includes receiving the data segment to be stored including metadata; receiving metadata of data segments stored in the storage unit; and determining the storage tier to store the received data segment to and a protection level dependent on the metadata received and dependent on the metadata of the received data segment.
US10579274B2	Hierarchical stalling strategies for handling stalling events in a virtualized environment Hierarchical stalling strategies are disclosed. An indication is received of a stalling event caused by a requested resource being inaccessible. In response to receiving the indication of the stalling event, a set of cost functions usable to determine how to handle the stalling event is selected based at least in part on a type of the stalling event. The stalling event is handled based at least in part on an evaluation of the set of cost functions selected based at least in part on the type of the stalling event.
US10579269B2	Method, system, and apparatus for nested suspend and resume in a solid state drive A first type of command is suspended, by a controller of a non-volatile memory device, in response to determining that a second type of command is waiting for execution. The first type of command is split into a plurality of chunks based on a computed criteria. A second type of command is executed in between execution of at least two chunks of the first type of command.
US10579268B2	Disk control device, disk control method, and recording medium A disk control device includes a hypervisor, a cache access measurement unit, and a distribution determination unit. The cache access measurement unit measures a characteristic value of a logical disk by analyzing an access pattern to the logical disk by a cache memory. The distribution determination unit selects one of a plurality of virtual computers including the cache memory associated with the measured characteristic value. The hypervisor activates the virtual computer selected by the distribution determination unit and switches a forwarding destination of an input-output request to the logical disk to the virtual computer selected by the distribution determination unit.
US10579267B2	Memory controller and memory system A memory controller according to the embodiment includes a front-end unit that issues an invalidation command in response to a command from outside of the memory controller, the command including a logical address, an address translation unit that stores a correspondence relationship between the logical and a physical address, an invalidation command processing unit that, when the invalidation command is received, registers the logical address associated with the invalidation command as an invalidation registration region in an invalidation registration unit and issues a notification to the front-end unit, and an internal processing unit that dissolves a correspondence relationship between the logical address registered in the invalidation registration unit and the physical address in the address translation unit in a predetermined order by referencing the logical address registered in the invalidation registration unit. The front-end unit transmits completion command which indicates the completion of the command in response to the notification.
US10579262B2	Optimization of data deduplication Links between data regions are intelligently formed, based on up-to-date popularity statistics, including a number of times a particular one of the data regions was a target for a potential link with another one of the data regions. An owner manages a popularity index incorporating the popularity statistics, where over time, the popularity index is subjected to an aging mechanism pursuant to a decaying algorithm. An owner one of the data regions decides whether to accept the one of the intelligently formed links based on at least one of a plurality of predetermined factors. If the one of the intelligently formed links is accepted by the owner one of the data regions, a potential referrer creates one of the data regions using one of the intelligently formed links. If the one of the intelligently formed links is rejected by the owner one of the data regions, data is written.
US10579257B2	Managing real-time handwriting recognition Methods, systems, and computer-readable media related to a technique for providing handwriting input functionality on a user device. A handwriting recognition module is trained to have a repertoire comprising multiple non-overlapping scripts and capable of recognizing tens of thousands of characters using a single handwriting recognition model. The handwriting input module provides real-time, stroke-order and stroke-direction independent handwriting recognition for multi-character handwriting input. In particular, real-time, stroke-order and stroke-direction independent handwriting recognition is provided for multi-character, or sentence level Chinese handwriting recognition. User interfaces for providing the handwriting input functionality are also disclosed.
US10579256B2	Display operating method and electronic device supporting the same An electronic device is disclosed which includes a housing including a first surface facing in a first direction and a second surface facing in a second direction that is opposite to the first direction, a display disposed between the first surface and the second surface, at least a part of the display being exposed through the first surface, a pressure sensor disposed between the display and the second surface and detecting pressure of an external object applied on the display, and a processor electrically connected with the display and the pressure sensor. If a touch input of a specified pressure intensity or more is made by the external object in any region on the display, the processor activates at least one virtual function key operating in common with respect to any screens to be displayed in the display.
US10579252B2	Automotive touchscreen with simulated texture for the visually impaired Electrostatic friction textures on a touchscreen panel are used to create the sensation of braille text in a contextual menu adapted to an automotive environment. In particular, a center stack touchscreen friction display in a passenger vehicle provides one set of touch controls and HMI data to the driver while simultaneously providing either the same control options and HMI to the passenger in Braille form or a completely different set of information and menu structure in Braille form. The manner of providing a Braille display in an automobile is adapted for vehicle vibration and movement, the types of functions normally presented and/or controlled by passengers, and other challenges Braille readers of different ages, health, or experience may face when attempting to read Braille in a vehicle cabin.
US10579249B2	Methods, systems, and computer readable media for utilizing an augmented scroll bar The subject matter described herein relates to methods, systems, and computer readable media for utilizing an augmented scroll bar. In some examples, a system for utilizing an augmented scroll bar includes a processing unit, a memory accessed by the processing unit, and a scroll bar manager that is stored in memory and when executed by the processing unit is configured to display contents of a data file within a table layout of a display field. The scroll bar manager is further configured to display, within the display field, a scroll bar user interface element that includes a scrolling region and a view slider element that traverses the scrolling region, wherein the view slider element indicates a position of the table layout within a portion of the data file and the scrolling region graphically illustrates indicia corresponding to dynamic status information of data elements included in the data file.
US10579245B1	Apparatuses and methods for graphical user interface display to increase completeness and accuracy of measured parameter values for installation of garage doors A technical solution provides a graphical user interface display that increases completeness and accuracy of determining values for installation parameters needed to install one or more garage doors and related equipment in different garage door (GD) installation environments where different types of GD installations use different combinations of installation parameters. Displays of different GD installation environments (e.g., single or multiple doors) with and without obstructions are generated using a graphical user interface with different parameter indicators generated in sequence according to GD installation type to determine values of GD installation parameters needed to improve accuracy of GD installation designs. The different parameter indicators are generated dynamically to illustrate the respective GD installation parameters such as opening dimensions, head room, side room on sides of an GD opening, shared side room between adjacent GD openings, as well as GD installation parameters impacted by obstructions in the GD installation environment.
US10579244B2	Simplified sharing of content among computing devices In one general aspect, a method can include displaying, on a display device included in a computing device, content in an application executing on the computing device, and determining that the computing device is proximate to a videoconferencing system. The method can further include displaying, in a user interface on the display device, at least one identifier associated with a videoconference, receiving a selection of the at least one identifier, and initiating the videoconference on the videoconferencing system in response to receiving the selection of the at least one identifier. The videoconference on the videoconferencing system can be initiated such that the content is provided for display on a display device included in the videoconferencing system.
US10579243B2	Theming for virtual collaboration Aspects of the disclosure provide techniques that enable a communication server hosting a virtual communication session to receive theme parameters from a remote server to control the look and feel of the virtual communication session. In one example, a method includes sending a plurality of video feeds for display at a plurality of graphical user interfaces (GUIs) of client devices coupled to a communication session. The communication session enables communication among a plurality of users of the client devices. The method also includes receiving a set of parameters of a theme to modify one or more visual properties of the GUIs. The method also includes sending the set of parameters to the client devices connected to the communication session to modify visual properties of the GUIs displaying the plurality of video feeds at the plurality of client devices based on the parameters of the theme.
US10579240B2	Live-rendered and forkable graphic edit trails A user computing device may receive a command from a user to modify an object of a canvas. The received command may be accepted and the user computing device may perform one or more operations on the object of the canvas according to the command, such as modifying a mutable attribute. The canvas state may then be captured by the computing device using one or more patches. The computing device may generate and store one or more snapshots to include a subset of the one or more patches and further provide the one or more snapshots to playback a sequence of at least some of the one or more operations that were performed on the object of the canvas.
US10579232B2	Touchscreen-based vehicle interface An interface/electronics module for reading information from a vehicle data bus and controlling functions available through the vehicle data bus. A graphical user interface is provided. The interface may include a stand-alone tablet computer or may be part of an integrated and permanently-mounted display. The interface/electronics module may include the functionality of the factory audio system (such as a radio tuner, power amplifier, etc.). In addition, the interface/electronics module is able to transmit commands via the vehicle's CAN bus.
US10579228B2	Method and system for configuring selection of contextual dashboards An electronic device may have multiple users and multiple customized user interfaces for each user resulting in a large number of user customized UI dashboard configurations. However, defining these user customized UI dashboard configurations is performed by each user such that addition and/or replacement of software applications requires users to reconfigure customized UI dashboards. Similarly, organization generated dashboards must be configured on each user device. It would be beneficial for such user customized UI dashboard configurations to be updateable in response to information provided during new software installation, software upgrades etc or for UI dashboard configurations to be adjusted absent any such update/upgrade. It would also be beneficial for context rules to be adaptable based upon learned behavior or external adjustments just as it would be beneficial for the context rule engine to automatically identify new potential rules as a result of current and previous behavior.
US10579226B2	Time proximity based map user interactions Systems and methods for time proximity based map user interactions with a user interface are provided. In one example implementation, a method includes providing for display a user interface on a display device. The user interface can display imagery of a geographic area. The method can include obtaining data indicative of a relevant time for contextual information. The method can include obtaining contextual information associated with the geographic area. The method can include obtaining a configuration for a user interface element associated with the time based contextual information based at least in part on time proximity of the contextual information to the relevant time. The method can include providing for display the user interface element based at least in part on the configuration.
US10579213B2	Gravity composer A method includes presenting a UI of a first application on a screen of a computing device and detecting a user input. For example, the detected user input may be an input tracing a continuous path on the screen of the computing device, and the path may include a first gesture extending from a first location to a second location on the screen followed by a second gesture extending from the second location to a third location on the screen. In response to detecting the first gesture, the computing device may display an interactive menu of the first application, the interactive menu comprising a plurality of menu options. In response to the detecting the second gesture, the computing device may identify one of the menu options. In response to detecting user input indicating completion of the second gesture, the computing device may determine the selection of the identified menu option.
US10579209B2	Method and system for sorting desktop objects In a method and system, the method includes: acquiring a desktop thumbnail of each desktop screen in a desktop screen set, and collectively displaying all the acquired desktop thumbnails on a desktop home screen; listening to a sequence of tapping operations performed on the desktop thumbnails displayed on the desktop home screen, and determining a tapping location of each tapping operation in the sequence of tapping operations; and sorting and displaying, according to the tapping location of each tapping operation in the sequence of tapping operations, desktop objects that are on each desktop screen on a multi-screen desktop. Desktop thumbnails of desktop screens in a desktop screen set are collectively displayed on a desktop home screen, so that desktop objects on each desktop screen on a multi-screen desktop can be sorted and displayed by performing a tapping operation on the desktop home screen.
US10579201B2	Mobile terminal, image display device and user interface provision method using the same A method for sharing data with a mobile terminal in an image display device, can include including receiving a broadcast signal including audio and video data, connecting to the mobile terminal via a wireless network interface, controlling the wireless network interface to transmit data to the mobile terminal wirelessly connected to the image display device, in which the transmitted data includes information for representing a screen posture direction of the image display device, controlling the wireless network interface to receive screen information from the mobile terminal wirelessly connected to the image display device, in which the screen information changes based on the information for representing the screen posture direction of the image display device and displaying a mirroring image based on the screen information received from the mobile terminal in a first region while displaying the video data included in the broadcast signal in a second region, in which the mirroring image corresponds to a current screen displayed on the mobile terminal, further the video data is received via a tuner while the screen information is received via the wireless network interface different from the tuner.
US10579193B2	Spatial-frequency-based capacitive motion sensor and method of using the same A spatial frequency based capacitive motion sensor and method of operating the same are disclosed. In one embodiment, the motion sensor includes an array of sense cells to capacitively sense capacitance variations induced by a surface in proximity to the array. The motion sensor further includes processing circuitry including a multiplexer and a processor to process motion dependent output signals from the array to measure motion of the surface in a direction parallel to a surface of the array. Generally, processor is adapted to execute a program to control the multiplexer to interconnect the sense cells of the array to configure the array as a comb-filter to detect at least one spatial frequency component of the capacitance variations, and to measure motion of the surface in a direction parallel to the array. Other embodiments are also disclosed.
US10579191B2	Touch sensor including rounded corner and sensing electrode including rounded edge corresponding to rounded corner, and display device including the same A touch sensor includes a base, first sensing electrode columns (FSECs), and second sensing electrode columns (SSECs). The base includes a sensing region (SR) including a rounded corner (RC), and a non-SR outside the SR. The FSECs extend in a direction on the base, each FSEC among the FSECs including first sensing electrodes (FSEs), each FSE among the FSEs including sub-electrodes. The SSECs are alternately disposed with the FSECs on the base, each SSEC among the SSECs including second sensing electrodes (SSEs). Sub-electrodes of one of adjacent FSEs among the FSEs are electrically connected to respective sub-electrodes of another of the adjacent FSEs. A sub-electrode closest to the RC among the sub-electrodes includes a rounded edge (RE) corresponding to the RC. A SSE closest to the RC among the SSEs includes a RE corresponding to the RC, and a protrusion part protruding toward the sub-electrode including the RE.
US10579189B2	Display device A display device includes a first organic insulating layer covering video signal lines; a first metal layer provided above the first organic insulating layer; a first conductive layer provided above the first organic insulating layer and connected to a switching element via a first contact hole; a first inorganic insulating layer covering the first conductive layer and the first metal layer; a second conductive layer provided above the first inorganic insulating layer and connected to the first metal layer; a second inorganic insulating layer provided above the second conductive layer; a third conductive layer provided above the second inorganic insulating layer and connected to the first conductive layer via a second contact hole; and a fourth conductive layer provided above the second inorganic insulating layer, connected to the first metal layers via a third contact hole, and connected to the second conductive layer via a fourth contact hole.
US10579188B2	Display device A display device with a touch panel includes a display panel, and a touch panel formed above the display panel. The touch panel includes X electrodes which extend in a first direction, and Y electrodes which extend in a second direction different from the first direction. The X electrodes and the Y electrodes respectively include intersection portions each formed where the X electrodes and the Y electrodes overlap each other, and electrode portions each formed between the intersection portions, wherein the electrode portions of one of the X electrodes is smaller in area than the electrode portions of one of the Y electrodes, and wherein floating electrodes are formed close to the electrode portion of the one of the X electrodes or Y electrodes, and over a reduced portion of the X electrode.
US10579187B2	Display control apparatus, display control method and display control program A display control apparatus includes a display control unit for controlling a display unit for displaying an image, the display control unit being configured to display a plurality of represented images that represent a plurality of image groups classified depending on related information of the images on the display unit in a first display mode, and display related images relating to the represented images between a plurality of the represented images displayed in the first display mode depending on a user input on the display unit in a second display mode.
US10579185B2	Display panel, photosensitive touch circuit and control method thereof The present disclosure is directed to a photosensitive touch circuit and a control method thereof. The circuit includes a first switch unit, a driving switch unit, a photosensitive switch unit, a first storage capacitor, and a second storage capacitor, wherein: the first switch unit is connected to a data signal line and transmits a data signal to the driving switch unit in response to a first control signal; the driving switch unit is connected to a liquid crystal capacitor and the first storage capacitor, and writes a received data signal thereto in response to a second control signal; and the photosensitive switch unit is connected to the second storage capacitor, generates a touch signal, and outputs a signal in the second storage capacitor to the data signal line through the first switch unit in response to a third control signal.
US10579184B2	Portable multi-touch input device A portable input device is described. The portable input device can wirelessly send control signals to an external circuit. The control signals can derive from touch or gestures applied to a touch sensitive surface. The control signals can also include a mouse click equivalent control signal generated by mechanical manipulation of the portable input device.
US10579157B1	Electronic devices having keys with coherent fiber bundles An electronic device may have a reconfigurable keyboard. The keyboard may be formed from an array of keys coupled to a housing. Each key may have a movable key member and an associated key display. Control circuitry in the keyboard may direct the key displays to display dynamically adjustable key labels for the keys. Each key movable key member may be formed from a fiber optic plate. The fiber optic plate may be formed from a coherent fiber bundle with opposing first and second surfaces. The first surface may be adjacent to the key display and may receive key label images from the key display. The second surface may face outwardly towards a user and may receive key press input from the fingers of a user while presenting key label images for viewing.
US10579150B2	Concurrent detection of absolute distance and relative movement for sensing action gestures A gesture detection system uses two radar tones to concurrently detect absolute distance and relative movement of a target object. A radar-based detection device alternates transmitting a first radar tone and a second radar tone via a radar-emitting device, and then captures a first return signal and a second return signal that are generated by the first radar tone and second radar tone reflecting off the target object. The radar-based detection device demodulates the return signals into a first set of quadrature signals and a second set of quadrature signals and, in some cases, generates a first set of digital samples and second set of digital samples from the respective quadrature signals. Various aspects process the first set of digital samples and second set of digital samples to concurrently identify absolute distance and relative movement and, at times, determine an in-the-air gesture performed by the target object.
US10579148B2	Tactile apparatus link An apparatus comprising: an input module configured to determine an input characteristic; a signal generator configured to generate a signal dependent on the input characteristic; and an output module configured to provide the signal to one or more separate apparatus, wherein the signal is configured to generate a tactile output.
US10579127B2	Apparatus for driving a touch pad and a portable terminal having the same An apparatus for driving a touchpad of a portable terminal including a second control unit controlling the touchpad in an active mode is provided. The apparatus includes a sensor unit for generating interrupt signals when pressure on the touchpad is sensed, a first control unit for outputting activating signals to activate the second control unit when the interrupt signals are input and a switching unit for transmitting the interrupt signals generated from the sensor unit to the first control unit when the second control unit is in an inactive mode. Accordingly, even though the multimedia processor embedded in the portable terminal is in an inactive mode, the multimedia processor is activated when a user presses the touchpad, thereby making it possible to process signals input by touching the touchpad, particularly, to keep the user interface. Furthermore, the multimedia processor embedded in the portable terminal can reduce the consumption of battery power required to maintain the user interface, as compared with multimedia processors maintaining operating in a conventional polling method.
US10579119B2	Active charge through of a peripheral device A method for port policy management for active charge through of a peripheral device that has a first communication port and a second communication port may include detecting whether a valid power connection exists at the peripheral device, in response to detecting the valid power connection, determining a relationship between the first communication port and the second communication port, based on the relationship, determining, by the peripheral device, a power relationship among the peripheral device, the first communication port, and the second communication port, selectively configuring the first communication port, the second communication port, and the peripheral device to match the power relationship, and enabling active charging through of the peripheral device if active charging through is supported by the power relationship.
US10579118B2	Detection circuits Example implementations relate to detection circuits. In one example, a detection circuit includes a power supply, a transistor coupled to the power supply, a port coupled via the transistor to the power supply, where the port is to transmit power received via the transistor from the power supply to a corresponding port included in an external device when the corresponding port is coupled to the port, and a detection circuit to detect a voltage between the port and the corresponding port when the port is coupled to the corresponding port and interrupt, via the transistor, power supplied to the port when the detected voltage satisfies a threshold voltage.
US10579107B2	Reversible connector orientation detection circuitry Reversible connector orientation detection circuitry, reversibly connectible devices having multiple device portions, and methods for determining a connection orientation of multiple device portions of a hardware device are provided herein. A hardware device can include a first device portion and a second device portion. A first resistor can be in a first side of the first device portion. A second resistor can be in a first side of the second device portion, and a third resistor can be in a second side of the second device portion. Connection of the first device portion to the second device portion in different orientations creates, through the resistors, different voltages that can be compared by a digital logic device to indicate orientation. The compared voltages are within either a low voltage range below a digital logic low threshold or a high voltage range above a digital logic high threshold.

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