会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 91. 发明授权
    • Silicon carbide semiconductor device
    • US11251291B2
    • 2022-02-15
    • US16951853
    • 2020-11-18
    • FUJI ELECTRIC CO., LTD.
    • Shinichiro Matsunaga
    • H01L29/739H01L29/74H01L29/16
    • A silicon carbide semiconductor device includes first semiconductor areas and second semiconductor areas. The first semiconductor areas have a first semiconductor layer of a second conductivity type, a second semiconductor layer of a first conductivity type, first semiconductor regions of the second conductivity type, second semiconductor regions of the first conductivity type, gate electrodes, and first electrodes. The second semiconductor areas have the first semiconductor layer, the second semiconductor layer, third semiconductor regions of the second conductivity type, the gate electrodes, and the first electrodes. The first semiconductor regions include low- impurity-concentration regions and high-impurity-concentration regions. The third semiconductor regions have a potential equal to that of the first electrodes. The first semiconductor regions are connected to the third semiconductor regions by MOS structures. In the first semiconductor regions, the high-impurity-concentration regions are provided at positions different from positions facing the first electrodes.
    • 99. 发明授权
    • Semiconductor device and data driver
    • US11232762B2
    • 2022-01-25
    • US16831780
    • 2020-03-26
    • LAPIS Semiconductor Co., Ltd.
    • Hiroshi Tsuchi
    • G09G3/36H03F3/45H03K3/356
    • In the present invention, a differential amplifier that includes a first output transistor and a second output transistor includes a boost circuit that includes a third output transistor and a fourth output transistor. The first output transistor delivers a current according to a first differential signal generated in a differential stage to an output terminal. The second output transistor extracts a current according to a second differential signal generated as a signal which is the same phase with a different potential of the first differential signal from the output terminal. The third output transistor delivers a current to the output terminal according to a level-shifting signal generated by level-shifting the first differential signal. The fourth output transistor extracts a current from the output terminal according to a level-shifting signal generated by level-shifting the second differential signal. As the third and fourth output transistors, transistors having withstand voltages against gate-source voltages lower than those of the first and second output transistors and drain currents larger than those of the first and second output transistors are employed.