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    • 91. 发明专利
    • SEMICONDUCTOR INTEGRATED CIRCUIT
    • JPH0378305A
    • 1991-04-03
    • JP21522689
    • 1989-08-21
    • MITSUBISHI ELECTRIC CORP
    • MIYAKE TAKASHI
    • H03F3/393
    • PURPOSE:To reduce the influence of coupling affected to a chopper amplifier in a subsequent stage by turning off NMOS transfer gates for feeding back from an output to an input from that on an input-side in order by means of shifting a timing. CONSTITUTION:Capacitors 1 and 2 for coupling capacity, invertors 3 and 4 for amplification and the NMOS transfer gates 5 and 6 for controlling the feeding back of the outputs of invertors 3 and 4 to the input are provided, and respective NMOS transfer gates 5 and 6 are controlled by signals 7 and 8. Namely, the signals 7 and 8 controlling the NMOS transfer gates 5 and 6 for feeding back such as a timing chart are set to 'L' from the signal 7 near the input-side in order by shifting the timing and then the NMOS transfer gates are turned off from one 5 near the input in order. Thus, the influence of the coupling of a gate potential at the time of turning off the gates is reduced and the gain of a circuit improves.