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    • 24. 发明授权
    • Use of silicide blocking layer to create high valued resistor and diode for sub-1V bandgap
    • 使用硅化物阻挡层,为亚1V带隙创建高电阻和二极管
    • US06690083B1
    • 2004-02-10
    • US09586411
    • 2000-06-01
    • Todd MitchellMark W. Haley
    • Todd MitchellMark W. Haley
    • H01L2900
    • H01L27/0629H01L28/20
    • The present invention is drawn to a method and a system for creating a sub-1V bandgap reference (BGR) circuit. In particular, a sub-1V BGR circuit is formed comprising a shallow trench isolation (STI) region and a poly silicon region above said STI region. The poly silicon region is formed having a first doped region longer than a second doped region. The poly silicon region as one single structure is adapted to function as a resistor and a diode coupled in series, said structure adapted to generate currents in a feedback loop to generate a BGR voltage. In forming the sub-1V BGR circuit, a silicide blocking mask (already available in the process flow for forming a standard semiconductor device) is used to prevent spacer oxide from forming above the center portion of the poly silicon region. In turn, silicide contacts can be formed away from the center portion of the poly silicon region.
    • 本发明涉及一种用于创建sub-1V带隙基准(BGR)电路的方法和系统。 特别地,形成包括浅沟槽隔离(STI)区域和所述STI区域上方的多晶硅区域的亚-1V BGR电路。 所述多晶硅区域形成为具有比第二掺杂区域长的第一掺杂区域。 作为一个单一结构的多晶硅区域适于用作串联耦合的电阻器和二极管,所述结构适于在反馈回路中产生电流以产生BGR电压。 在形成亚-1V BGR电路中,使用硅化物阻挡掩模(在用于形成标准半导体器件的工艺流程中已经可用)防止在多晶硅区域的中心部分上形成间隔氧化物。 反过来,硅化物接触可以远离多晶硅区域的中心部分形成。
    • 28. 发明授权
    • Backend process for fuse link opening
    • 熔断体开口的后端工艺
    • US06306746B1
    • 2001-10-23
    • US09475698
    • 1999-12-30
    • Mark W. HaleyTodd Mitchell
    • Mark W. HaleyTodd Mitchell
    • H01L2144
    • H01L23/5258H01L2924/0002H01L2924/00
    • The present invention is directed to a method of forming an insulative layer over a fuse link in a semiconductor device that is sufficiently thick to encapsulate the fuse link during laser opening, thereby preventing vaporized metal from re-depositing on the fuse link. The layer is also sufficiently thin to allow the laser to penetrate the insulative layer during laser opening of the fuse. A primary dielectric layer is formed over a metal fuse link, the primary dielectric having a predetermined deposition thickness over the fuse link. The primary dielectric layer is then covered with an etch interrupting layer. The etch interrupting layer is covered with a secondary dielectric layer and a portion of the secondary dielectric layer is then removed, resulting in an interlayer dielectric (ILD) stack formed from the etch interrupting layer and the remaining secondary dielectric layer. The ILD has a selected thickness that is greater than the thickness of the primary dielectric layer. A metal layer is formed over the interlayer dielectric and then the layers over the etch interrupting layer and above the metal fuse link are then removed. Finally, the etch interrupting layer is removed from above the primary dielectric layer so as to expose a portion of the primary dielectric layer disposed above the metal fuse link.
    • 本发明涉及一种在半导体器件中的熔丝连接件上形成绝缘层的方法,所述绝缘层足够厚以在激光打开期间封装熔丝链,从而防止蒸发的金属在熔丝链上重新沉积。 该层也足够薄,以允许激光在激光打开保险丝期间穿透绝缘层。 第一电介质层形成在金属熔断体之上,第一电介质在熔丝链上具有预定的沉积厚度。 然后用蚀刻中断层覆盖第一介电层。 蚀刻中断层被二次电介质层覆盖,然后去除二次电介质层的一部分,从而形成由蚀刻中断层和剩余的二次电介质层形成的层间绝缘层(ILD)堆叠。 ILD具有大于第一介电层厚度的选定厚度。 在层间电介质上形成金属层,然后去除蚀刻中断层上方的金属熔丝链上方的层。 最后,从第一电介质层上方去除蚀刻中断层,以便露出设置在金属熔断体上方的主电介质层的一部分。