会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 31. 发明申请
    • DIGITAL FILTER AND METHOD FOR PERFORMING A MULTIPLICATION BASED ON A LOOK-UP TABLE
    • 数字滤波器和基于查找表进行多路复用的方法
    • WO00062421A1
    • 2000-10-19
    • PCT/EP1999/002762
    • 1999-04-14
    • H03H17/02H03H17/04H03H17/06
    • H03H17/0226H03H17/0405H03H17/0607
    • A digital filter and a multiplication method are described, which lead to an efficient architecture for a hardware implementation of digital FIR and IIR filters into FPGAs. The multiplications of input sample data and delayed sample data with filter coefficients are performed by addressing look-up tables in which corresponding multiplication results are prestored. The size of the look-up tables is reduced by storing only those multiplication results which cannot be obtained by a shifting operation performed on the other pre-stored multiplication results, the input sample data, or the delayed sample data. Thereby, the size of the look-up tables can be compressed significantly such that an implementation of large digital filters into FPGAs is possible.
    • 描述了数字滤波器和乘法方法,其导致用于将数字FIR和IIR滤波器硬件实现到FPGA中的有效架构。 输入采样数据和具有滤波器系数的延迟采样数据的乘法通过寻址预置的相应乘法结果的查找表来执行。 通过仅存储那些通过对其他预先存储的乘法结果,输入的采样数据或延迟的采样数据执行的移位操作而不能获得的相乘结果来减小查找表的大小。 因此,可以显着地压缩查找表的大小,使得可以实现大型数字滤波器到FPGA中。
    • 36. 发明申请
    • REDUCED POWER FIR FILTER
    • 降低功率FIR滤波器
    • WO1998023029A1
    • 1998-05-28
    • PCT/US1997021213
    • 1997-11-17
    • CIRRUS LOGIC, INC.
    • CIRRUS LOGIC, INC.PASTORELLO, Douglas
    • H03H17/02
    • H03H17/06H03H17/0226
    • A reduced power FIR filter may be utilized as the digital decimation filter for a delta sigma ADC. The FIR filter utilizes a serial bit stream which is part of the control path of the filter. Thus, operations of the circuitry which comprises the filter may be controlled depending upon the data presented at the output of the delta sigma modulator. In particular, filter operations may be enabled only for a given digital state, for example, a digital 1 state. Thus, the filter operations may be enabled only for typically half of the bits from the serial bit stream and the power usage of the digital filter is significantly reduced.
    • 降低功率FIR滤波器可以用作Δ西格玛ADC的数字抽取滤波器。 FIR滤波器利用串行比特流,该比特流是滤波器的控制路径的一部分。 因此,可以根据呈现在Δ-Σ调制器的输出处的数据来控制包括滤波器的电路的操作。 特别地,可以仅针对给定的数字状态(例如,数字1状态)使能滤波器操作。 因此,滤波器操作可以仅来自串行比特流的典型的一半比特,并且数字滤波器的功率使用量显着降低。