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    • 53. 发明授权
    • Method and system for optimizing a software-defined radio system
    • 用于优化软件定义无线电系统的方法和系统
    • US07571205B2
    • 2009-08-04
    • US11173131
    • 2005-07-01
    • Jasmin OzEran PisekYan Wang
    • Jasmin OzEran PisekYan Wang
    • G06F13/00
    • G06F15/16
    • A method for optimizing a software-defined radio system comprising a plurality of processors is provided. The method includes, for each of the plurality of processors, (i) providing an input burst comprising a first specified burst size, M, of input words to the processor for each of a plurality of configurations, each input word comprising an integer, and (ii) receiving from the processor an output burst comprising a second specified burst size, N, of output words generated by the processor based on the M input words for each of the configurations. An optimization factor is determined for each of the configurations based on the N output words generated by each processor for the configuration. An optimized configuration is identified from the plurality of configurations based on the optimization factor of each of the configurations.
    • 提供了一种用于优化包括多个处理器的软件定义的无线电系统的方法。 所述方法包括对于所述多个处理器中的每一个,(i)为多个配置中的每一个提供包括输入字的第一指定突发尺寸M到输入字的输入脉冲串,每个输入字包括整数,以及 (ii)从处理器接收输出脉冲串,其包括由处理器基于每个配置的M个输入字产生的输出字的第二指定突发大小N。 基于由每个处理器为该配置生成的N个输出字,为每个配置确定优化因子。 基于每个配置的优化因素,从多个配置中识别出优化的配置。
    • 59. 发明申请
    • Reconfigurable signal processor architecture using multiple complex multiply-accumulate units
    • 可重构的信号处理器架构,使用多个复数乘法单元
    • US20070106720A1
    • 2007-05-10
    • US11584175
    • 2006-10-20
    • Eran PisekYan WangJasmin Oz
    • Eran PisekYan WangJasmin Oz
    • G06F7/38
    • G06F7/5443H04B1/0003
    • A reconfigurable digital signal processor (DSP) comprises: a reconfigurable data path comprising a plurality of reconfigurable multiply-accumulate (MAC) units; and a programmable finite state machine for controlling the plurality of reconfigurable MAC units. The programmable finite state machine executes a first plurality of context-related instructions that cause selected ones of the plurality of reconfigurable MAC units to perform at least one of a defined set of functions consisting essentially of: i) Fourier transform functions; and ii) filter functions. The Fourier transform functions comprise a Fast Fourier Transform (FFT) function and an Inverse Fast Fourier Transform (FFT) function and the filter functions comprise a finite impulse response (FIR) filter function and an infinite impulse response (IIR) filter function.
    • 可重配置数字信号处理器(DSP)包括:可重构数据路径,其包括多个可重构的乘法累加(MAC)单元; 以及用于控制多个可重构MAC单元的可编程有限状态机。 所述可编程有限状态机执行第一多个上下文相关指令,所述第一多个上下文相关指令使得所述多个可重新配置的MAC单元中的所选择的指令执行至少一个定义的功能集合,所述功能集合主要包括:i)傅立叶变换函数; 和ii)过滤功能。 傅立叶变换函数包括快速傅立叶变换(FFT)函数和快速傅里叶逆变换(FFT)函数,滤波器函数包括有限脉冲响应(FIR)滤波函数和无限脉冲响应(IIR)滤波函数。