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71. 发明授权

EP0481630B1 High efficiency cross-coupled folded cascode circuit 失效
标题翻译：交叉耦合的共源共栅折叠以高效率。
公开(公告)号：EP0481630B1
公开(公告)日：1995-09-13
申请号：EP91309009.8
申请日：1991-10-02
申请人： ANALOG DEVICES, INCORPORATED
发明人： Butler, James R.
IPC分类号： H03F3/45 , H03F1/32
CPC分类号： H03F3/45291 , H03F1/3211 , H03F2203/45028 , H03F2203/45318 , H03F2203/45352 , H03F2203/45676

72. 发明公开

EP0481630A1 High efficiency cross-coupled folded cascode circuit 失效
标题翻译： Kreuzgekoppelte，gefaltete Kaskodenschaltung mit hohem Wirkungsgrad。
公开(公告)号：EP0481630A1
公开(公告)日：1992-04-22
申请号：EP91309009.8
申请日：1991-10-02
申请人： ANALOG DEVICES, INCORPORATED
发明人： Butler, James R.
IPC分类号： H03F3/45 , H03F1/32
CPC分类号： H03F3/45291 , H03F1/3211 , H03F2203/45028 , H03F2203/45318 , H03F2203/45352 , H03F2203/45676
摘要： A differential input circuit has an input stage with a pair of differentially biased input transistors (Q1,Q2) connected to supply current through respective load impedances (R1,R2), and a gain stage with a second pair of transistors (Q3,Q4) connected to supply additional currents to the load impedances (R1,R2) to keep the impedance currents constant over variations in the input voltage levels. A cross-coupled cascode circuit (Q8,Q9,6,8) connected between the gain stage transistors (Q3,Q4) and the load impedances (R1,R@) compensates for inaccuracies in the load impedance currents which occur during dynamic operation of the circuit, and thus enhances gain, linearity and the current transfer efficiency between the two stages.
摘要翻译：差分输入电路具有输入级，其具有连接到通过相应负载阻抗（R1，R2）提供电流的一对差分偏置输入晶体管（Q1，Q2），以及具有第二对晶体管（Q3，Q4）的增益级，连接以向负载阻抗（R1，R2）提供额外的电流，以使阻抗电流恒定在输入电压电平的变化上。连接在增益级晶体管（Q3，Q4）和负载阻抗（R1，R @）之间的交叉耦合共源共栅电路（Q8，Q9,6,8）补偿在动态运行期间发生的负载阻抗电流的不准确性电路，从而增强了两级之间的增益，线性度和电流传输效率。

73. 发明专利

JP2017216729A 電力効率のよい相互コンダクタンスアンプ装置及びシステム审中-公开
公开(公告)号：JP2017216729A
公开(公告)日：2017-12-07
申请号：JP2017147379
申请日：2017-07-31
申请人：日本テキサス・インスツルメンツ株式会社 , テキサスインスツルメンツインコーポレイテッド
发明人：チャールズパークハースト
IPC分类号： H03F1/42 , H02M3/155 , H03F1/08
CPC分类号： H03F3/45 , H03F1/0266 , H03F1/342 , H03F3/45179 , H03F3/45183 , H03F2203/45362 , H03F2203/45481 , H03F2203/45562 , H03F2203/45674 , H03F2203/45676
摘要：【課題】段間寄生静電容量に関連する周波数依存性を緩和させる回路を含む2段ダイナミック電流源を提供する。【解決手段】ダイナミック電流源200が、差動入力信号140、142を受け取るようにロングテールペアとして配置される、正側205、217及び負側208、218の差動入力相互コンダクタンスデバイスを有する。正側位相依存電流源200が、差動入力信号がもはやダイナミック電流源の正側をアクティブにしない位相期間の間正側出力信号回復用の電流を提供するように、正側差動入力相互コンダクタンスデバイス205の出力263に通信可能に結合される。負側位相依存電流源200が、差動入力信号がもはやダイナミック電流源の負側をアクティブにしない位相期間の間負側出力信号回復用の電流を提供するように、負側差動入力相互コンダクタンスデバイス208の出力272に通信可能に結合される。【選択図】図2

74. 发明专利

JP6212307B2 多出力相互コンダクタンス増幅器に基づく計装用増幅器有权
公开(公告)号：JP6212307B2
公开(公告)日：2017-10-11
申请号：JP2013141506
申请日：2013-07-05
申请人：ハネウェル・インターナショナル・インコーポレーテッド , Honeywell International Inc.
发明人：ポール・エム・ワーキング
IPC分类号： H03F3/34 , H03F3/68 , H03F3/45
CPC分类号： H03F3/45 , H03F3/45183 , H03F3/45475 , H03F2203/45644 , H03F2203/45676 , H03F2203/45711

75. 发明专利

JP5616762B2 出力回路及びデータドライバ及び表示装置有权
标题翻译：输出电路和所述数据驱动器和显示装置
公开(公告)号：JP5616762B2
公开(公告)日：2014-10-29
申请号：JP2010261082
申请日：2010-11-24
申请人：ルネサスエレクトロニクス株式会社
发明人：弘土 , 弘土
IPC分类号： H03F3/45 , G02F1/133 , G02F1/1368 , G09G3/20 , G09G3/30 , G09G3/36 , H01L51/50 , H03K17/687
CPC分类号： G09G3/3677 , G09G3/3258 , G09G3/3291 , G09G3/3688 , G09G2300/0426 , G09G2310/0289 , G09G2310/0291 , G09G2330/021 , H03F1/0261 , H03F3/45179 , H03F3/4526 , H03F2200/18 , H03F2200/27 , H03F2203/45562 , H03F2203/45614 , H03F2203/45618 , H03F2203/45644 , H03F2203/45674 , H03F2203/45676 , H03F2203/45724 , H03F2203/45728

76. 发明专利

JP2012114628A Output circuit, data driver and display device 有权
标题翻译：输出电路，数据驱动器和显示设备
公开(公告)号：JP2012114628A
公开(公告)日：2012-06-14
申请号：JP2010261082
申请日：2010-11-24
申请人： Renesas Electronics Corp , ルネサスエレクトロニクス株式会社
发明人： TSUCHI HIROSHI
IPC分类号： H03F3/45 , G02F1/133 , G02F1/1368 , G09G3/20 , G09G3/30 , G09G3/36 , H01L51/50 , H03K17/687
CPC分类号： G09G3/3677 , G09G3/3258 , G09G3/3291 , G09G3/3688 , G09G2300/0426 , G09G2310/0289 , G09G2310/0291 , G09G2330/021 , H03F1/0261 , H03F3/45179 , H03F3/4526 , H03F2200/18 , H03F2200/27 , H03F2203/45562 , H03F2203/45614 , H03F2203/45618 , H03F2203/45644 , H03F2203/45674 , H03F2203/45676 , H03F2203/45724 , H03F2203/45728
摘要： PROBLEM TO BE SOLVED: To provide an output circuit, a data driver and a display device that suppress a delay of an output signal at the time of output period switching.SOLUTION: The output circuit includes differential amplification circuits 110, 105, an output amplification circuit 120, a first control circuit 160, an input terminal 101, an output terminal 104, and first to third power terminals VDD, VSS, VML. The differential amplification circuit includes a differential input stage 110 for inputting an input signal to the input terminal and an output signal at the output terminal, and first and second current mirrors 130, 140. The output amplification circuit 120 includes a first transistor 121 of a first conductivity type connected between the first power terminal VDD and the output terminal 104, and a second transistor 122 of a second conductivity type connected between the output terminal 104 and the third power terminal VML. The first control circuit 160 includes a third transistor 161 of the first conductivity type, and a first switch 162.
摘要翻译：要解决的问题：提供一种在输出周期切换时抑制输出信号的延迟的输出电路，数据驱动器和显示装置。
解决方案：输出电路包括差分放大电路110,105，输出放大电路120，第一控制电路160，输入端101，输出端104和第一至第三电源端子VDD，VSS，VML。差分放大电路包括用于将输入信号输入到输入端的差分输入级110和输出端的输出信号以及第一和第二电流镜130,140。输出放大电路120包括：第一晶体管121，连接在第一电源端子VDD和输出端子104之间的第一导电类型以及连接在输出端子104和第三电力端子VML之间的第二导电类型的第二晶体管122。第一控制电路160包括第一导电类型的第三晶体管161和第一开关162。（C）2012，JPO和INPIT

77. 发明授权

US09973146B2 Amplifying circuit 有权
公开(公告)号：US09973146B2
公开(公告)日：2018-05-15
申请号：US15657618
申请日：2017-07-24
申请人： SHENZHEN GOODIX TECHNOLOGY CO., LTD.
发明人： Mengwen Zhang
IPC分类号： H03F3/04 , H03F1/02 , H03F1/30 , H03F1/32 , H03F3/187
CPC分类号： H03F1/0205 , H03F1/301 , H03F1/32 , H03F3/005 , H03F3/187 , H03F3/45183 , H03F3/45188 , H03F3/45192 , H03F3/45475 , H03F3/45659 , H03F3/45699 , H03F3/45762 , H03F2200/129 , H03F2200/156 , H03F2200/159 , H03F2200/18 , H03F2200/222 , H03F2200/252 , H03F2200/264 , H03F2200/471 , H03F2200/555 , H03F2203/45008 , H03F2203/45012 , H03F2203/45024 , H03F2203/45028 , H03F2203/45054 , H03F2203/45068 , H03F2203/45082 , H03F2203/45112 , H03F2203/45134 , H03F2203/45136 , H03F2203/45171 , H03F2203/45174 , H03F2203/45182 , H03F2203/45188 , H03F2203/45192 , H03F2203/45208 , H03F2203/45244 , H03F2203/45332 , H03F2203/45421 , H03F2203/45434 , H03F2203/45444 , H03F2203/45512 , H03F2203/45514 , H03F2203/45534 , H03F2203/45544 , H03F2203/45546 , H03F2203/45551 , H03F2203/45586 , H03F2203/45588 , H03F2203/45616 , H03F2203/45632 , H03F2203/45642 , H03F2203/45656 , H03F2203/45674 , H03F2203/45676
摘要： An amplifying circuit includes a reference voltage generating circuit, a common-mode voltage conversion circuit, a common-mode negative feedback circuit, and an amplifying sub-circuit. The reference voltage generating circuit generates a first reference voltage, a second reference voltage, and a reference common-mode voltage according to a post-stage common-mode voltage. The common-mode voltage conversion circuit converts the pre-stage output differential signal into a differential input signal according to the reference common-mode voltage. The common-mode negative feedback circuit generates a control voltage to quickly establish a common-mode negative feedback of the amplifying sub-circuit, wherein the first reference voltage and the second reference voltage are used to cancel a baseline signal of the pre-stage output differential signal. The amplifying circuit can eliminate the baseline signal, convert the common-mode voltage and quickly establish the common-mode negative feedback.

78. 发明申请

US20160195884A1 Circuits and Method for Controlling Transient Fault Conditions in a Low Dropout Voltage Regulator 审中-公开
公开(公告)号：US20160195884A1
公开(公告)日：2016-07-07
申请号：US15072591
申请日：2016-03-17
申请人： Dialog Semiconductor GmbH
发明人： Ambreesh Bhattad
IPC分类号： G05F1/575 , H02M1/32
CPC分类号： G05F1/575 , G05F1/462 , G05F1/56 , H02M1/32 , H03F3/45183 , H03F2200/555 , H03F2203/45314 , H03F2203/45636 , H03F2203/45674 , H03F2203/45676
摘要： An overshoot reduction circuit within a low dropout voltage regulator eliminates an overshoot at an output terminal resulting from a transient fault condition occurring at an input or output terminal. The overshoot reduction circuit monitors to sense if there is a transient fault condition occurring at the input or output terminal and provides a Miller capacitance at the output terminal of a differential amplifier of the low dropout voltage regulator to prevent the output of the differential amplifier from being discharged to ground during the transient. A control loop circuit balances current within an active load of the differential amplifier to clamp the output of the differential amplifier to its normal operating point. When the transient fault condition ends, the output voltage of the differential amplifier is set such that a pass transistor of the low dropout regulator responds quickly to resume the regulation to reduce or eliminate the overshoot.

79. 发明申请

US20150214897A1 FAMILY OF SLEW-ENHANCED OPERATIONAL TRANSCONDUCTANCE AMPLIFIERS 有权
标题翻译： SLEW增强的运行型交叉放大器的家族
公开(公告)号：US20150214897A1
公开(公告)日：2015-07-30
申请号：US14168647
申请日：2014-01-30
申请人： Apple Inc.
发明人： A MOTAMED
IPC分类号： H03F1/02 , H03F3/45
CPC分类号： H03F1/223 , H03F3/45188 , H03F3/45192 , H03F2200/234 , H03F2200/411 , H03F2203/45002 , H03F2203/45024 , H03F2203/45248 , H03F2203/45536 , H03F2203/45544 , H03F2203/45618 , H03F2203/45674 , H03F2203/45676 , H03F2203/45702
摘要： Operational transconductance amplifiers (OTAs) with enhanced slew rate are disclosed. An OTA can have a main amplifier and pre-amplifier gain stage to increase the effective transconductance and bandwidth of the OTA. The pre-amplifier and main amplifier can be coupled to enhance slew current without adding additional bias current to the main amplifier input stages. Pre-amplifier bias current can be recycled and redirected to the load. OTAs with enhanced slew rate can be particularly useful in applications requiring high-frequency switching of voltage levels to drive high capacitance lines. For example, an integrated touch sensor panel and display can be operated by alternatively applying a first voltage level to an electrode in a display mode and a second voltage level during a touch sensing mode using OTA sense or charge amplifiers with enhanced slew rate. Enhanced slew rate can increase the time available to demodulate a touch signal for improved system performance.
摘要翻译：公开了具有增强的转换速率的运算跨导放大器（OTA）。 OTA可以具有主放大器和前置放大器增益级，以增加OTA的有效跨导和带宽。前置放大器和主放大器可以耦合以增强转换电流，而不会向主放大器输入级增加额外的偏置电流。前置放大器偏置电流可以回收并重定向到负载。具有增强的转换速率的OTAs可以在需要高频切换电压电平以驱动高电容线的应用中特别有用。例如，可以通过在使用具有增强的转换速率的OTA感测或电荷放大器的触摸感测模式期间以显示模式和第二电压电平交替施加第一电压电平来操作集成的触摸传感器面板和显示器。增强的转换速率可以增加解调触摸信号的时间，以提高系统性能。

80. 发明申请

US20130002355A1 DIFFERENTIAL AMPLIFIER AND COMPARATOR 审中-公开
标题翻译：差分放大器和比较器
公开(公告)号：US20130002355A1
公开(公告)日：2013-01-03
申请号：US13420671
申请日：2012-03-15
申请人： Shuuji TODA , Mamoru MIWA
发明人： Shuuji TODA , Mamoru MIWA
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F1/223 , H03F3/45744 , H03F2200/78 , H03F2203/45674 , H03F2203/45676 , H03G11/002
摘要： According to one embodiment, a differential amplifier includes a differential circuit, an output circuit, and a clipper circuit. The differential circuit generates a pair of differential currents in accordance with a difference in potential between a pair of input signals. The output circuit receives the pair of differential currents and generates an output voltage in accordance with the current difference. The clipper circuit suppresses the output voltage within a range to be able to convert to a low level or to a high level being higher than the low level.
摘要翻译：根据一个实施例，差分放大器包括差分电路，输出电路和限幅器电路。差分电路根据一对输入信号之间的电位差产生一对差动电流。输出电路接收一对差动电流，并根据电流差产生输出电压。减速电路将输出电压抑制在能够转换成低电平或高于低电平的高电平的范围内。

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