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    • 85. 发明申请
    • Photo mask and method for fabricating the same
    • 照相掩模及其制造方法
    • US20050142461A1
    • 2005-06-30
    • US11024793
    • 2004-12-30
    • Jun Lee
    • Jun Lee
    • G03C5/00G03F1/32G03F1/68G03F9/00H01L21/027
    • G03F1/32
    • A photo mask and a method for fabricating the same are described, in which a transparent substrate is covered with a phase inversion light-transmitting layer, a plurality of small sized light-transmitting holes are aggregately formed at dense intervals in an isolated pattern hole region of the phase inversion light-transmitting layer, and lights transmitting the light-transmitting holes and the phase inversion light-transmitting layer are guided to cause a series of interference phenomena such as sidelobe phenomena, so that the isolated pattern hole can sufficiently receive lights as the light intensity increases by way of the sidelobe phenomena. If the sidelobe phenomena regarded as a defect factor are used to allow the isolated pattern hole to sufficiently receive lights after aggregately forming the small sized light-transmitting holes in the isolated pattern hole region of the transparent substrate, the step of additionally forming serif holes is naturally skipped, thereby improving yield of the product and controlling increase of the production cost.
    • 描述了一种光掩模及其制造方法,其中透明基板被相位反射透光层覆盖,多个小尺寸的透光孔以密集间隔聚集形成在隔离图案孔区域 相反转透光层的透光性和透光性以及相位反射型透光层的光线被引导而产生一系列的旁瓣现象等干扰现象,隔离图案孔能充分地接收光, 光强度通过旁瓣现象增加。 如果在透明基板的隔离图形孔区域中聚集形成小尺寸的透光孔之后,使用视为缺陷因子的旁瓣现象来允许隔离图案孔充分接收光,则附加形成衬线孔的步骤是 自然跳过,从而提高产品的收益并控制生产成本的增加。
    • 86. 发明申请
    • Masks of semiconductor devices and methods of forming mask patterns
    • 半导体器件的掩模和形成掩模图案的方法
    • US20050142457A1
    • 2005-06-30
    • US11022628
    • 2004-12-27
    • Jun Lee
    • Jun Lee
    • H01L21/027G03C5/00G03F1/14G03F9/00
    • G03F1/36
    • Masks for semiconductor devices and methods of forming masks of semiconductor devices are provided which are capable of improving line resolution. A disclosed mask includes: a first mask pattern disposed on a first side of the mask. The first mask pattern includes light-blocking patterns and light-blocking fine auxiliary patterns within a light-transmitting region. The mask also includes a second mask pattern disposed on a second side of the mask. The second mask pattern includes light-transmitting fine auxiliary patterns within a light-blocking region. The light-transmitting fine auxiliary patterns are disposed at positions corresponding to the light-blocking fine auxiliary patterns to facilitate an overlapping exposing process. The second mask has the opposite tone of the first mask, and the second mask is disposed at a position horizontally-translated from a position of the first mask. Accordingly, pattern bridge regions in repeated patterns of a poly-cell transistor device can be selectively removed.
    • 提供了用于半导体器件的掩模和形成半导体器件掩模的方法,其能够提高线分辨率。 公开的掩模包括:设置在掩模的第一侧上的第一掩模图案。 第一掩模图案包括光透射区域内的遮光图案和遮光精细辅助图案。 掩模还包括设置在掩模的第二侧上的第二掩模图案。 第二掩模图案包括在遮光区域内的透光精细辅助图案。 透光精细辅助图案设置在与遮光细小辅助图案对应的位置,以便于重叠曝光过程。 第二掩模具有第一掩模的相反色调,并且第二掩模设置在从第一掩模的位置水平平移的位置处。 因此,可以选择性地去除多单元晶体管器件的重复图案中的图案电桥区域。
    • 87. 发明申请
    • Masks for fabricating semiconductor devices and methods of forming mask patterns
    • 用于制造半导体器件的掩模和形成掩模图案的方法
    • US20050142456A1
    • 2005-06-30
    • US11022612
    • 2004-12-27
    • Jun Lee
    • Jun Lee
    • H01L21/027G03F1/00H01L21/8238G03F9/00
    • G03F1/29H01L21/823892Y10S438/949
    • Masks for fabricating a semiconductor device and methods of forming mask patterns are provided which are capable of enhancing the breakdown voltage of the fabricated semiconductor device by accurately correcting a line width pattern error of a semiconductor substrate due to a mask error during a process for forming a well ion implantation mask pattern. A disclosed mask used to manufacture a semiconductor device having complementary N-well and P-well includes: a master mask for the complementary N-well and P-well; and a light-blocking pattern on the master mask, wherein a region of the master mask, which is not a portion of the master mask adjacent to the light-blocking pattern, is etched by a predetermined thickness to have a phase shifting function.
    • 提供了用于制造半导体器件的掩模和形成掩模图案的方法,其能够通过在形成半导体器件的工艺期间由于掩模误差精确校正半导体衬底的线宽图案误差而增强制造的半导体器件的击穿电压 良好的离子注入掩模图案。 用于制造具有互补N阱和P阱的半导体器件的公开掩模包括:用于互补N阱和P阱的主掩模; 以及主掩模上的遮光图案,其中不是与遮光图案相邻的主掩模的一部分的主掩模的区域被蚀刻预定厚度以具有相移功能。
    • 90. 发明申请
    • Navigation system and controlling method for the motor vehicle
    • 汽车导航系统及控制方法
    • US20050080553A1
    • 2005-04-14
    • US10500081
    • 2003-10-21
    • Bong UmDong NaJun Lee
    • Bong UmDong NaJun Lee
    • G08G1/0969G01C21/36G08G1/0968G01C21/28
    • G01C21/3415G08G1/0968
    • A navigation system (20) includes a transceiver unit (210), a display unit (250), an input unit (260) and an ECU (230). The transceiver unit (210) transmits a signal for demanding a detection of a navigation path to a path detecting server (10) and then receives path data which represent the navigation path from the path detecting server (10). The display unit (250) outputs the navigation path or a revised navigation path. The ECU (230) conveys data on a departure point and a destination from the input unit (260) to the transceiver unit (210) and transfers the path data from the transceiver unit (210) to the display unit (250). Further, the ECU (270) precalculates deviation-expected paths in the course of driving along the navigation path and selects the revised navigation path among the precalculated deviation-expected paths in case a present position of a mobile object deviates form the navigation path to thereby provide the revised navigation path to the display unit (250).
    • 导航系统(20)包括收发器单元(210),显示单元(250),输入单元(260)和ECU(230)。 收发器单元(210)向路径检测服务器(10)发送要求导航路径的检测信号,然后从路径检测服务器(10)接收表示导航路径的路径数据。 显示单元(250)输出导航路径或经修改的导航路径。 ECU(230)将出发点和目的地的数据从输入单元(260)传送到收发器单元(210),并将路径数据从收发器单元(210)传送到显示单元(250)。 此外,ECU(270)在沿着导航路径行驶的过程中预先计算偏差预期路径,并且在移动对象的当前位置从导航路径偏离的情况下选择预先计算的偏差预期路径中的修正导航路径 提供修改后的导航路径到显示单元(250)。