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81. 发明授权

US06317765B1 Sinc filter with selective decimation ratios 有权
标题翻译：具有选择性抽取比例的Sinc滤波器
公开(公告)号：US06317765B1
公开(公告)日：2001-11-13
申请号：US09153862
申请日：1998-09-16
申请人： Joel Page , Edwin De Angel , Wai Laing Lee , Lei Wang , Hong Helena Zheng , Chung-Kai Chow
发明人： Joel Page , Edwin De Angel , Wai Laing Lee , Lei Wang , Hong Helena Zheng , Chung-Kai Chow
IPC分类号： G06F1717
CPC分类号： H03H17/0282 , H03H17/0226 , H03H17/0664
摘要： A decimation filter implements selective decimation ratios by arranging a plurality of sinc filters in different pipeline arrangements to produce the desired ratio. Power savings area achieved by implementing the sinc filters as FIR sinc filters and by implementing multiplications using look up tables. One approach uses a fixed first stage filter and one or more second stage sinc filters selected from the group comprising two 4th order, 5 tap sinc filters, a 4th order, 9 tap sinc filter; a 5th order, 6 tap sinc filter and a 6th order 7 tap sinc filter. The sinc filter is particularly useful applications in the field of data acquisition and particularly in the area of seismic sensing.
摘要翻译：抽取滤波器通过在不同的流水线布置中布置多个正弦滤波器来实现选择性抽取比，以产生期望的比率。通过将sinc滤波器实现为FIR sinc滤波器并通过使用查找表来实现乘法而实现的省电区域。一种方法使用固定的第一级滤波器和一个或多个第二级sinc滤波器，其选自包括两个4阶，5抽头sinc滤波器，第4级，9抽头sinc滤波器的组; 5号，6抽头sinc过滤器和6阶7抽头sinc过滤器。 sinc滤波器在数据采集领域尤其是在地震检测领域尤其有用。

82. 发明授权

US3777130A Digital filter for pcm encoded signals 失效
标题翻译： PCM编码信号的数字滤波器
公开(公告)号：US3777130A
公开(公告)日：1973-12-04
申请号：US3777130D
申请日：1971-12-15
申请人： IBM
发明人： CROISIER A , ESTEBAN D , LEVILION M , RISO V
IPC分类号： H03H17/02 , H03H17/04 , H03H17/06 , G06F1/02 , G06F15/34
CPC分类号： H03H17/0226 , H03H17/0405 , H03H17/0607
摘要： A digital filter either of a recursive or transversal type responsive to successive digitally encoded analog signal samples of m bits each. The filter comprises an accumulator for multiplying and summing a weighted hybrid value obtained from a memory medium addressed by a selected one of the m bits of each of N digitally encoded signal samples. If the bits of the N samples used for addressing the memory are derived from successive input signals only, then the filter is of the transversal type. If V of the N signals whose bits are used for addressing are from the input samples and R of the N signals whose bits also are used for addressing are obtained from filter output signals, then the filter is recursive. By addressing the memory with the binary value of like bit positions of the signal samples, then a hybrid value may be stored, which hybrid value need only be multiplied and combined by the accumulator. This permits the use of a substantially smaller memory than that required if the digits of the signals looked up the completed weighted function.
摘要翻译：数字滤波器是递归或横向类型的数字滤波器，其响应于每个m位的连续数字编码的模拟信号样本。滤波器包括一个累加器，用于对由N个数字编码的信号样本中的每一个的m位中选择的一个寻址的存储介质获得的加权混合值进行乘法和求和。如果用于寻址存储器的N个样本的比特仅从连续的输入信号导出，则滤波器是横向类型。如果用于寻址的N个信号的V来自输入采样，并且从滤波器输出信号获得其位也用于寻址的N个信号的R，则滤波器是递归的。通过用信号样本的相似位位置的二进制值寻址存储器，则可以存储混合值，该混合值仅需要被累加器相乘并组合。如果信号的数字查找完成的加权函数，则允许使用比所需的更小的存储器。

83. 发明申请

US20180303364A1 Multi-Channel Scalable EEG Acquisition System on a Chip with Integrated Patient Specific Seizure Classification and Recording Processor 审中-公开
公开(公告)号：US20180303364A1
公开(公告)日：2018-10-25
申请号：US15955010
申请日：2018-04-17
申请人： Massachusetts Institute of Technology , Masdar Institute of Science and Technology
发明人： Jerald Yoo , Anantha P. Chandrakasan , Long Yan , Dina Reda El-Damak , Ali Hossam Shoeb , Muhammad Awais Bin Altaf
IPC分类号： A61B5/04 , H03H17/02 , A61B5/00 , H03F3/387 , A61B5/0476
CPC分类号： A61B5/04012 , A61B5/0476 , A61B5/4094 , A61B2562/166 , H03F3/387 , H03F2200/294 , H03F2200/375 , H03H17/0226 , H03H17/0248
摘要： An integrated circuit chip and method for EEG monitoring. In one embodiment, the integrated circuit chip includes an Analog Front End cell in communication with an electrode and a Classification Processor wherein a signal received from the electrode is processed by the Classification Engine cell and designated as seizure or non-seizure. In another embodiment, the Analog Front End cell includes an amplifier cell in communication with an electrode; and an ASPU cell in communication with the amplifier cell. In yet another embodiment, the Classification Processor includes a DBE Channel Controller cell; a Feature Extraction Engine Processor cell, and a Classification Engine cell in communication with the Feature Extraction Engine Processor cells and the DBE Channel Controller cell.

84. 发明授权

US07929498B2 Adaptive forward power control and adaptive reverse power control for spread-spectrum communications 有权
标题翻译：用于扩频通信的自适应正向功率控制和自适应反向功率控制
公开(公告)号：US07929498B2
公开(公告)日：2011-04-19
申请号：US09789389
申请日：2001-02-21
申请人： Fatih M. Ozluturk , Gary R. Lomp , John Kowalski
发明人： Fatih M. Ozluturk , Gary R. Lomp , John Kowalski
IPC分类号： H04B7/216
CPC分类号： H04W52/08 , G06F13/374 , H03H17/0226 , H03H17/06 , H04B1/707 , H04B1/7075 , H04B1/70753 , H04B1/70755 , H04B1/70758 , H04B1/7077 , H04B1/708 , H04B1/7085 , H04B1/7093 , H04B1/7115 , H04B1/712 , H04B7/2628 , H04B7/2637 , H04B7/264 , H04B2201/70701 , H04B2201/70702 , H04B2201/70703 , H04B2201/70707 , H04B2201/7071 , H04J13/16 , H04L1/0042 , H04L1/0047 , H04L1/0059 , H04L5/1446 , H04L25/0212 , H04L27/206 , H04L27/2332 , H04L2027/003 , H04L2027/0053 , H04N1/00912 , H04N1/3333 , H04N2201/3335 , H04W52/146 , H04W52/24 , H04W52/26 , H04W52/322 , H04W52/325 , H04W52/343 , H04W52/36 , H04W52/362 , H04W52/367 , H04W52/44 , H04W52/50 , H04W52/52 , H04W52/54 , H04W52/60
摘要： A wireless code division multiple access (CDMA) communication system, including a base station (BS) and a subscriber unit (SU), uses adaptive forward power control (AFPC) and adaptive reverse power control (ARPC) to control the transmit power of forward and reverse link radio frequency (RF) channel signals, respectively. Automatic gain control (AGC) signals are produced to maintain the level of forward and reverse CDMA signals at a near constant level. The CDMA signals are despread to produce first and second despread signals. The first and second despread signals are used to produce a first error signal e1. A second error signal e2 is produced based on the AGC signals. Combined error signals are formed based on the first error signal e1 and the second error signal e2. The combined error signals are hard limited to form adaptive power control (APC) bits used to control the level of the forward and reverse link RF channel signals.
摘要翻译：包括基站（BS）和用户单元（SU）的无线码分多址（CDMA）通信系统使用自适应正向功率控制（AFPC）和自适应反向功率控制（ARPC）来控制前向发射功率和反向链路射频（RF）信道信号。产生自动增益控制（AGC）信号，以保持正向和反向CDMA信号的电平处于接近恒定的水平。 CDMA信号被解扩展以产生第一和第二解扩信号。第一和第二解扩信号用于产生第一误差信号e1。基于AGC信号产生第二误差信号e2。基于第一误差信号e1和第二误差信号e2形成组合误差信号。组合的误差信号被硬限制以形成用于控制正向和反向链路RF信道信号的电平的自适应功率控制（APC）位。

85. 发明授权

US07706332B2 Method and subscriber unit for performing power control 失效
标题翻译：用于执行功率控制的方法和用户单元
公开(公告)号：US07706332B2
公开(公告)日：2010-04-27
申请号：US11181450
申请日：2005-07-14
申请人： Fatih Ozluturk , Gary Lomp
发明人： Fatih Ozluturk , Gary Lomp
IPC分类号： H04B7/216 , H04B1/00 , H04B7/00
CPC分类号： G06F13/374 , H03H17/0226 , H03H17/06 , H03H21/0018 , H03H2218/06 , H04B1/7075 , H04B1/70752 , H04B1/70753 , H04B1/70755 , H04B1/70758 , H04B1/708 , H04B1/7085 , H04B1/7093 , H04B1/7115 , H04B1/712 , H04B7/2628 , H04B7/2637 , H04B7/264 , H04B2201/70701 , H04B2201/70702 , H04B2201/70703 , H04B2201/70707 , H04B2201/7071 , H04J13/004 , H04J13/10 , H04J13/107 , H04L1/004 , H04L5/1446 , H04L25/0212 , H04L27/206 , H04L27/2332 , H04L2027/003 , H04L2027/0053 , H04W52/08 , H04W52/146 , H04W52/24 , H04W52/26 , H04W52/322 , H04W52/325 , H04W52/343 , H04W52/36 , H04W52/367 , H04W52/44 , H04W52/50 , H04W52/52 , H04W52/54 , H04W52/60 , Y02D10/14
摘要： A system for rapidly acquiring a spreading code, used in a code division multiple access (CDMA) system, comprises a generator for generating a first long code and a second long code, with each long code having a length of N chips. The first long code is different from the second long code. A transmitter transmits the first long code and the second long code at a first phase angle and at a second phase angle, respectively, on a carrier signal over a communications channel using radio waves. The first long code and the second long code may be transmitted at an in-phase (I) angle and at a quadrature-phase (Q) angle, respectively, on the carrier signal. From the communications channel, an I acquisition circuit and a Q acquisition circuit may acquire, in parallel, the first long code and the second long code from the I angle and the Q angle, respectively, of the carrier signal by searching, in parallel, N/2 chips of the first long code and the second long code.
摘要翻译：用于在码分多址（CDMA）系统中使用的用于快速获取扩展码的系统包括用于产生第一长码和第二长码的发生器，每个长码具有N个码片的长度。第一个长代码与第二个长代码不同。发射机通过使用无线电波的通信信道上的载波信号分别以第一相位角和第二相位角发送第一长码和第二长码。第一长码和第二长码可以分别在载波信号上以同相（I）角度和正交相位（Q）角发射。从通信信道，I采集电路和Q采集电路可以并行地通过并行地搜索载波信号的I角度和Q角度的第一长码和第二长码，第一长码的N / 2码片和第二长码。

86. 发明授权

US07096243B2 Flexible decimator 失效
公开(公告)号：US07096243B2
公开(公告)日：2006-08-22
申请号：US10348308
申请日：2003-01-21
申请人： Robertus Laurentius Van Der Valk , Johannes Hermanus Aloysius De Rijk
发明人： Robertus Laurentius Van Der Valk , Johannes Hermanus Aloysius De Rijk
IPC分类号： G06F17/17
CPC分类号： H03H17/0664 , H03H17/0226
摘要： A decimator for use in digital signal processing has an input line for receiving a sequence of input samples at a first sampling rate and a first register for accumulating input samples for which the order in the sequence is a power of a predetermined number greater than one. A control unit for outputs samples from the first register at a second sampling rate. Typically accumulates input samples for which the order in the sequence is a not power of the predetermined number so that the first register accumulates input samples for which the order of said sequence is a power of the predetermined number combined with a current accumulated value in the second register.

87. 发明申请

US20050223049A1 Efficient multichannel filtering for CDMA modems 失效
标题翻译： CDMA调制解调器的高效多信道滤波
公开(公告)号：US20050223049A1
公开(公告)日：2005-10-06
申请号：US11141622
申请日：2005-05-31
申请人： Robert Regis
发明人： Robert Regis
IPC分类号： G06F17/10 , H03H17/02 , H03H17/06 , H04B1/707 , H04B1/7075 , H04B1/708 , H04B1/7093 , H04B7/216
CPC分类号： H04B1/7075 , H03H17/0226 , H03H17/06 , H04B1/707 , H04B1/70753 , H04B1/70755 , H04B1/70758 , H04B1/708 , H04B1/7093 , H04B2201/70702 , H04B2201/70707
摘要： An efficient, multichannel filter for CDMA modems permits multiple serial, digital bit streams to be filtered by digital signal processing techniques including sample weighting and summing functions. Each individual channel may have custom weighting coefficients or weighting coefficients common for all channels. If the weighting coefficients are by adaption, the same approach may be taken. The multichannel FIR filter is implemented with no multipliers and a reduction in the number of adders. To increase the speed of operation, the filter structure utilizes look-up tables storing the weighting coefficients. The invention can be embodied as either as a field programmable gate array or an application specific integrated circuit. The use of look-up tables saves significant chip resources.
摘要翻译：用于CDMA调制解调器的有效的多通道滤波器允许通过包括采样加权和求和功能的数字信号处理技术对多个串行数字比特流进行滤波。每个单独的通道可以具有对于所有通道共同的自定义加权系数或加权系数。如果通过适应加权系数，则可以采用相同的方法。多通道FIR滤波器没有乘法器并且减少加法器的数量。为了提高操作速度，滤波器结构利用存储加权系数的查找表。本发明可以被实现为现场可编程门阵列或专用集成电路。查找表的使用节省了大量的芯片资源。

88. 发明授权

US06907024B2 Efficient multichannel filtering for CDMA modems 失效
公开(公告)号：US06907024B2
公开(公告)日：2005-06-14
申请号：US10304308
申请日：2002-11-25
申请人： Robert T. Regis
发明人： Robert T. Regis
IPC分类号： G06F17/10 , H03H17/02 , H03H17/06 , H04B1/707 , H04B1/7075 , H04B1/708 , H04B1/7093 , H04B7/216
CPC分类号： H04B1/7075 , H03H17/0226 , H03H17/06 , H04B1/707 , H04B1/70753 , H04B1/70755 , H04B1/70758 , H04B1/708 , H04B1/7093 , H04B2201/70702 , H04B2201/70707
摘要： An efficient, multichannel filter for CDMA modems permits multiple serial, digital bit streams to be filtered by digital signal processing techniques including sample weighting and summing functions. Each individual channel may have custom weighting coefficients or weighting coefficients common for all channels. If the weighting coefficients are by adaption, the same approach may be taken. The multichannel FIR filter is implemented with no multipliers and a reduction in the number of adders. To increase the speed of operation, the filter structure utilizes look-up tables storing the weighting coefficients. The invention can be embodied as either as a field programmable gate array or an application specific integrated circuit. The use of look-up tables saves significant chip resources.

89. 发明授权

US06850579B2 Multiplierless finite impulse response filter 有权
标题翻译：无有限脉冲响应滤波器
公开(公告)号：US06850579B2
公开(公告)日：2005-02-01
申请号：US09753258
申请日：2000-12-29
申请人： In-Gi Lim , Ik-Soo Eo , Kyung-Soo Kim , Han-Jin Cho
发明人： In-Gi Lim , Ik-Soo Eo , Kyung-Soo Kim , Han-Jin Cho
IPC分类号： H03H17/02 , H03H17/06 , H03K5/159
CPC分类号： H03H17/0607 , H03H17/0226 , H03H17/0621 , H03H17/0657
摘要： A finite impulse response filter of 1:4 interpolation with 108 taps for outputting filter output data of 8 bits with respect to filter input data of 4 bits includes four shifting and storing unit of 27 bits for unifying bits of filter input data of 4 bits, which is 2's complement to shift and store the bi-unified input data, first selection unit for selecting any one of the input data stored in the four shifting and storing unit of 27 bits, address generating unit for generating addresses of lookup tables corresponding to each of a plurality of filter coefficients groups, first to fourth lookup table groups for generating filter outputs of each filter coefficients group, four accumulating unit for shifting the filter outputs of the filter coefficients groups respectively outputted in parallel from the first to the fourth lookup table groups, and second selection unit for serially converting the outputs from each of the four accumulators in accordance with filter coefficients groups.
摘要翻译：对于4位的滤波器输入数据，输出8位的8位滤波器输出数据，具有108抽头的1：4内插有限脉冲响应滤波器包括4位的4位移位和存储单元，用于4位滤波器输入数据的位的统一，其是用于移位和存储双统一输入数据的补码，用于选择存储在27位的四个移位和存储单元中的任何一个输入数据的第一选择单元，用于生成与每个对应的查找表的地址的地址生成单元多个滤波器系数组的第一至第四查找表组，用于产生每个滤波器系数组的滤波器输出;四个累加单元，用于将由第一至第四查找表组并行输出的滤波器系数组的滤波器输出移位; 以及第二选择单元，用于根据滤波器系数组串行转换四个累加器中的每一个的输出。

90. 发明授权

US06801922B2 Sampling rate converter and method 有权
标题翻译：采样率转换器和方法
公开(公告)号：US06801922B2
公开(公告)日：2004-10-05
申请号：US09873592
申请日：2001-06-04
申请人： Cynthia P. Goszewski , Steven R. Magee
发明人： Cynthia P. Goszewski , Steven R. Magee
IPC分类号： G06F1710
CPC分类号： H03H17/0223 , H03H17/0226 , H03H17/0621
摘要： Variable sample rate converter by convolution of input data samples with an impulse response to produce output samples with the impulse response values generated by interpolation from a table of oversampled values with the oversampling rate lower for outlying lobes of the impulse response.
摘要翻译：可变采样率转换器通过用脉冲响应卷积输入数据样本以产生输出样本，其中产生的脉冲响应值由过采样值的表进行插值，而过采样率对于脉冲响应的外围波瓣较低。

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