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1. 发明申请

WO2009118648A1 NETWORK SYSTEM OF TIME BAND RESERVATION, FRAME TRANSFER METHOD, AND NETWORK DEVICE 审中-公开
标题翻译：时间段预留网络系统，帧传送方法和网络设备
公开(公告)号：WO2009118648A1
公开(公告)日：2009-10-01
申请号：PCT/IB2009/005313
申请日：2009-03-26
申请人： TOYOTA JIDOSHA KABUSHIKI KAISHA , NEC ELECTRONICS CORPORATION , TAKEUCHI, Junichi , IGA, Naoto , GOTO, Hideki , IIYAMA, Shinichi
发明人： TAKEUCHI, Junichi , IGA, Naoto , GOTO, Hideki , IIYAMA, Shinichi
IPC分类号： H04L12/56 , H04L12/40
CPC分类号： H04W28/26 , H04L47/70 , H04L47/724 , H04L47/826
摘要： In a network system of this invention including a plurality of network devices that transfer frames by repeating, in a constant cycle, a reserved transfer interval that is a time band, in which a frame is transferred with a reservation and a free transfer interval that is a time band, in which a frame is freely transferred, a relay network device that links a first network device that is a transmission source of a frame and a second network device that is a transmission destination of the frame and the first network device execute a reservation processing such that the same time band within the reserved transfer interval is reserved and transfer the frame from the first network device to the second network device on the basis of the reservation result.
摘要翻译：在本发明的网络系统中，包括通过以恒定周期重复作为时间带的预约传送间隔来传送帧的多个网络设备，在该传输间隔中，以预约传输帧，并且自由传送间隔是可自由传送帧的时间带，将作为帧的发送源的第一网络装置和作为所述帧的发送目的地的第二网络装置进行链接的中继网络装置，并且所述第一网络装置执行预留处理，使得预留传送间隔内的相同时间段被保留，并且基于预留结果将帧从第一网络设备传送到第二网络设备。

2. 发明申请

WO2007102597A1 BROADBAND TRANSITION FROM A VIA INTERCONNECTION TO A PLANAR TRANSMISSION LINE IN A MULTILAYER SUBSTRATE 审中-公开
标题翻译：从多通道基板中的平面传输线的宽带连接过渡到宽带传输
公开(公告)号：WO2007102597A1
公开(公告)日：2007-09-13
申请号：PCT/JP2007/054621
申请日：2007-03-02
申请人： NEC CORPORATION , NEC Electronics Corporation , KUSHTA, Taras , NARITA, Kaoru , KANEKO, Tomoyuki , OGOU, Shin-ichi
发明人： KUSHTA, Taras , NARITA, Kaoru , KANEKO, Tomoyuki , OGOU, Shin-ichi
IPC分类号： H05K3/46
CPC分类号： H05K1/116 , H05K1/0219 , H05K1/0222 , H05K1/0245 , H05K1/0251 , H05K3/429 , H05K2201/09381 , H05K2201/09636 , H05K2201/09718 , H05K2201/09727
摘要： According to one embodiment, a broadband transition to joint a via structure and a planar transmission line in a multilayer substrate is formed as an intermediate connection between the signal via pad and the planar transmission line disposed at the same conductor layer. The transverse dimensions of the transition are equal to the via pad diameter at the one end and strip width at another end; The length of the transition can be equal to the characteristic dimensions of the clearance hole in the direction of the planar transmission line or defined as providing the minimal excess inductive reactance in time-domain according to numerical diagrams obtained by three-dimensional full-wave simulations.
摘要翻译：根据一个实施例，形成在多层基板中连接通孔结构和平面传输线的宽带转变，作为信号通孔焊盘和布置在相同导体层处的平面传输线之间的中间连接。过渡的横向尺寸等于一端的通孔焊盘直径和另一端的带宽度; 转换的长度可以等于平面传输线方向上的间隙孔的特征尺寸，或者定义为根据通过三维全波模拟获得的数值图在时域中提供最小的额外的电抗。

3. 发明申请

WO2006098498A1 DATA TRANSMITTING APPARATUS, DATA RECEIVING APPARATUS, COMMUNICATION SYSTEM, ERROR DETECTION METHOD AND PROGRAM 审中-公开
标题翻译：数据发送装置，数据接收装置，通信系统，错误检测方法和程序
公开(公告)号：WO2006098498A1
公开(公告)日：2006-09-21
申请号：PCT/JP2006/305753
申请日：2006-03-16
申请人： NEC ELECTRONICS CORPORATION , HATAGUCHI, Takeshi
发明人： HATAGUCHI, Takeshi
IPC分类号： H04L1/08
CPC分类号： H04L1/08
摘要： The fact that erroneous data has been received is sensed easily even if the data has been received at an erroneous timing on the receiving side. A data transmitting apparatus includes a digital computation circuit for subjecting digital data to be transmitted to n (where n is an integer of 2 or greater) different exclusive-OR computations, an authentication-data add-on circuit for gathering the n items of computed data into one set of data, and a data transmitting circuit for transmitting the set of data to a data receiving apparatus. A data receiving apparatus includes a digital reverse computation circuit for subjecting the n items of computed data, which have been received via a data receiving circuit, to respective ones of computations (exclusive-OR computations) that are the reverse of the digital computations on the transmitting side, and an authentication-data detecting circuit for detecting error in the receive data based upon degree of agreement among the n items of receive data obtained by the reverse computations.
摘要翻译：即使已经在接收侧的错误定时接收到数据，也容易感测到已经接收到错误数据的事实。数据发送装置包括数字计算电路，用于将数字数据发送到n（其中n是2或更大的整数）不同的异或运算;认证数据附加电路，用于收集计算出的n个项目数据转换为一组数据，以及数据发送电路，用于将数据集发送到数据接收装置。一种数据接收装置，包括一个数字反向计算电路，用于将已经经由数据接收电路接收到的n个计算数据项目对应于与数字计算相反的计算（异或运算）以及认证数据检测电路，用于根据通过反向计算获得的n个接收数据之间的一致度来检测接收数据中的错误。

4. 发明申请

WO2004030096A2 CRACK RESISTANT INTERCONNECT MODULE 审中-公开
标题翻译：抗干扰互连模块
公开(公告)号：WO2004030096A2
公开(公告)日：2004-04-08
申请号：PCT/US2003/030060
申请日：2003-09-24
申请人： 3M INNOVATIVE PROPERTIES COMPANY , NEC ELECTRONICS CORPORATION
发明人： GORRELL, Robin, E. , SYLVESTER, Mark, F. , BANKS, Donald, R. , HOLCOMB, Michael, D. , BALLARD, William, V. , HIROSAWA, Kouichi , SATOU, Sadanobu , KIMURA, Teruhiko
IPC分类号： H01L23/498
CPC分类号： H01L23/49822 , H01L23/49816 , H01L23/49894 , H01L2224/16 , H01L2224/73253 , H01L2924/01019 , H01L2924/01057 , H01L2924/01079 , H01L2924/15311 , H01L2924/16195 , H01L2924/3511
摘要： A laminated flip-chip interconnect package comprising a substrate having a chip attach surface and a board attach surface that define contact pads for attachment to corresponding pads on the chip and board wherein the substrate board surface comprises at least one solid plane covering the chip attach surface region near at least one chip corner. In one embodiment, the solid plane comprises a dielectric material, optionally covered with a soldermask or coverlay material. In an alternate embodiment, the solid plane comprises a metal, optionally covered with a soldermask or coverlay material.
摘要翻译：一种层压倒装芯片互连封装，包括具有芯片连接表面的基板和限定用于连接到芯片和板上的相应焊盘的接触焊盘的板附着表面，其中基板表面包括覆盖芯片连接表面的至少一个实心平面区域至少有一个芯片角落。在一个实施例中，固体平面包括电介质材料，任选地覆盖有焊接掩模或覆盖材料。在替代实施例中，固体平面包括可选地用焊接掩模或覆盖物材料覆盖的金属。

5. 发明申请

WO2009118653A1 NETWORK DEVICE PERFORMING CONNECTION CHECK, NETWORK SYSTEM, AND FRAME TRANSFER METHOD 审中-公开
标题翻译：网络设备执行连接检查，网络系统和帧传输方法
公开(公告)号：WO2009118653A1
公开(公告)日：2009-10-01
申请号：PCT/IB2009/005439
申请日：2009-03-26
申请人： TOYOTA JIDOSHA KABUSHIKI KAISHA , NEC ELECTRONICS CORPORATION , TAKEUCHI, Junichi , IGA, Naoto , GOTO, Hideki , IIYAMA, Shinichi
发明人： TAKEUCHI, Junichi , IGA, Naoto , GOTO, Hideki , IIYAMA, Shinichi
IPC分类号： H04L12/64 , H04L12/46 , H04J3/06
CPC分类号： H04L12/40091 , H04J3/0652 , H04L12/40078 , H04L12/4035 , H04L12/462
摘要： A network device that transfers frames by repeating, in a constant cycle, a reserved transfer interval that is a time band, in which a frame is transferred with a reservation, and a free transfer interval that is a time band, in which a frame is freely transferred, includes: a BPDU generation unit (146) that generates a first BPDU; and a BPDU transmission instruction unit (143) that instructs to arrange the first BPDU in the reserved transfer interval and transmit the first BPDU to a first other network device.
摘要翻译：一种网络设备，其通过以恒定周期重复作为其中帧的传送与预留的时间带的保留传送间隔和作为帧的时间段的自由传送间隔来传送帧，帧的间隔是包括：产生第一BPDU的BPDU生成单元（146）; 以及BPDU发送指示单元，其指示将所述第一BPDU布置在所述预留传送间隔中，并将所述第一BPDU发送到第一其他网络设备。

6. 发明申请

WO2009118650A1 NETWORK DEVICE OF TRANSFER SWITCHING TYPE AND FRAME TRANSFER METHOD 审中-公开
标题翻译：传输切换类型和帧传输方法的网络设备
公开(公告)号：WO2009118650A1
公开(公告)日：2009-10-01
申请号：PCT/IB2009/005333
申请日：2009-03-26
申请人： TOYOTA JIDOSHA KABUSHIKI KAISHA , NEC ELECTRONICS CORPORATION , TAKEUCHI, Junichi , IGA, Naoto , GOTO, Hideki , IIYAMA, Shinichi
发明人： TAKEUCHI, Junichi , IGA, Naoto , GOTO, Hideki , IIYAMA, Shinichi
IPC分类号： H04L12/56
CPC分类号： H04L49/351 , H04L49/251
摘要： A network device (101) of is a network device that transfers frames by repeating, in a constant cycle, a reserved transfer interval and a free transfer interval. The network device includes a transmission port (132), a cycle timer (142), a mode switching control unit (144) that monitors a transfer state of the transmission port and selects a store-and-forward system when the transmission port is in the transfer process and selects a cut-through system when the transmission port is not in the transfer process, and a transfer prohibition control unit (145) that selects the cut-through system as a transfer system when a non-reserved frame is transmitted and switches a transfer method of the non-reserved frame to the store-and-forward system when a reserved transfer interval is establish, with reference to the cycle timer.
摘要翻译：网络设备（101）是通过以恒定周期重复预留传送间隔和自由传送间隔来传送帧的网络设备。网络设备包括传输端口（132），周期定时器（142），模式切换控制单元（144），其监视传输端口的传输状态，并且当传输端口处于传输端口时选择存储转发系统传送处理并且当传输端口不在传送处理中时选择切入系统;以及传输禁止控制单元（145），当发送非保留帧时，选择直通系统作为传送系统;以及参考循环定时器，当建立保留传送间隔时，将非保留帧的传送方法切换到存储转发系统。

7. 发明申请

WO2008029607A1 MANUFACTURING METHOD OF SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体基板的制造方法和半导体器件的制造方法
公开(公告)号：WO2008029607A1
公开(公告)日：2008-03-13
申请号：PCT/JP2007/066075
申请日：2007-08-13
申请人： NEC Electronics Corporation , KATOU, Hiroaki
发明人： KATOU, Hiroaki
IPC分类号： H01L21/762 , H01L21/322
CPC分类号： H01L21/76256 , H01L21/02052 , H01L21/3226
摘要： To provide a manufacturing method of a semiconductor substrate and a manufacturing method of a semiconductor device, which prevent reduction in breakdown voltage of a gate oxide film of a device formed in a semiconductor substrate to improve a reliability of the gate oxide film. A manufacturing method of a semiconductor substrate according to the present invention includes: exposing a silicon surface of an active layer substrate 1 made of single-crystal silicon, to which a semiconductor device is formed; forming an oxide film on a support substrate 2 made of single-crystal silicon; and bonding the silicon surface of the active layer substrate 1 to the oxide film formed on the support substrate 2. The silicon surface of the active layer substrate 1 is exposed by removing a spontaneous oxidation film 7 formed on the surface.
摘要翻译：为了提供半导体衬底的制造方法和半导体器件的制造方法，其防止形成在半导体衬底中的器件的栅极氧化膜的击穿电压降低，以提高栅氧化膜的可靠性。根据本发明的半导体衬底的制造方法包括：暴露由形成有半导体器件的单晶硅制成的有源层衬底1的硅表面; 在由单晶硅制成的支撑基板2上形成氧化膜; 并将有源层衬底1的硅表面粘合到形成在支撑衬底2上的氧化膜上。通过去除形成在表面上的自发氧化膜7，有源层衬底1的硅表面被暴露。

8. 发明申请

WO2007023713A1 OPTICAL MODULE 审中-公开
标题翻译：光学模块
公开(公告)号：WO2007023713A1
公开(公告)日：2007-03-01
申请号：PCT/JP2006/316066
申请日：2006-08-09
申请人： NEC ELECTRONICS CORPORATION , TAKETOMI, Kowashi , HATAKEYAMA, Itirou , SASAKI, Junichi
发明人： TAKETOMI, Kowashi , HATAKEYAMA, Itirou , SASAKI, Junichi
IPC分类号： G02B6/42 , G02B6/00
CPC分类号： G02B6/4201 , G02B6/4243 , G02B6/4269 , G02B6/4279
摘要： The present invention enables the reduction in module manufacturing cost and size and the significant increase in reliability and mass productivity. The optical module 200 of the present invention includes the peripheral IC 214 to be electrically connected to the substrate 106, the photoelectric device 212 having the circuit surfaces 212d1 and 212e1 that serve as at least one of a light receiving portion for receiving an optical signal and a light emitting portion for emitting an optical signal, and the optical fiber 202 that extends substantially parallel to the substrate 106 and is optically connected to the photoelectric device 212. The photoelectric device 212 is placed in such a way that the circuit surfaces 212d1 and 212e1 are substantially perpendicular to the extending direction of the optical fiber 202. The body of the photoelectric device 212 is covered with the film having the line 212b for electrically connecting the circuit surfaces 212d1 and 212e1 with the optical module terminal 210 over the area from the circuit surfaces 212d1 and 212e1 to the peripheral IC 214.
摘要翻译：本发明能够降低模块制造成本和尺寸，并且显着提高可靠性和批量生产率。本发明的光学模块200包括电连接到基板106的外围IC 214，具有用作接收光信号的光接收部分中的至少一个的电路面212d1和212e1的光电装置212以及用于发射光信号的发光部分和基本上平行于基板106延伸并与光电装置212光学连接的光纤202.光电装置212以这样的方式放置，使得电路面212d1和212e1 基本上垂直于光纤202的延伸方向。光电器件212的主体被具有线212b的膜覆盖，用于将电路表面212d1和212e1与光学模块端子210电连接在电路的区域上表面212d1和212e1连接到外围IC 214。

9. 发明申请

WO2005001807A2 CONTROLLER DRIVER AND DISPLAY APPARATUS USING THE SAME 审中-公开
标题翻译：控制器驱动器和显示设备使用它
公开(公告)号：WO2005001807A2
公开(公告)日：2005-01-06
申请号：PCT/JP2004/009462
申请日：2004-06-28
申请人： NEC ELECTRONICS CORPORATION , BITBOYS OY , FURIHATA, Hirobumi , OOHASHI, Katsuhisa , SHIODA, Junyou , TESHIROGI, Yoshiyuki , NOSE, Takashi , TUOMI, Mika
发明人： FURIHATA, Hirobumi , OOHASHI, Katsuhisa , SHIODA, Junyou , TESHIROGI, Yoshiyuki , NOSE, Takashi , TUOMI, Mika
IPC分类号： G09G5/393
CPC分类号： G09G5/393 , G06F3/14 , G09G3/2011 , G09G3/2018 , G09G3/2025 , G09G3/2048 , G09G3/2051 , G09G3/2055 , G09G3/3648 , G09G3/3666 , G09G3/3688 , G09G5/346 , G09G5/363 , G09G5/397 , G09G5/40 , G09G2320/0257 , G09G2320/0285 , G09G2320/106 , G09G2340/02 , G09G2340/10 , G11C11/413
摘要： A controller/driver is composed of a work memory, a graphic engine, a display memory, and a driver circuit. The graphic engine converts externally received image data into first bitmap data, and stores the first bitmap data in the work memory. The display memory receives and stores second bitmap data developed from the first bitmap data stored in the work memory. The driver circuit drives a display panel in response to the second bitmap data received from the display memory.
摘要翻译：控制器/驱动器由工作存储器，图形引擎，显示存储器和驱动器电路组成。图形引擎将外部接收的图像数据转换为第一位图数据，并将第一位图数据存储在工作存储器中。显示存储器接收并存储从存储在工作存储器中的第一位图数据开发的第二位图数据。驱动电路响应于从显示存储器接收到的第二位图数据来驱动显示面板。

10. 发明申请

WO2009118610A1 NETWORK DEVICE OF HIGH-PRECISION SYNCHRONIZATION TYPE, NETWORK SYSTEM, AND FRAME TRANSFER METHOD 审中-公开
标题翻译：高精度同步类型，网络系统和帧传输方法的网络设备
公开(公告)号：WO2009118610A1
公开(公告)日：2009-10-01
申请号：PCT/IB2009/000590
申请日：2009-03-25
申请人： TOYOTA JIDOSHA KABUSHIKI KAISHA , NEC ELECTRONICS CORPORATION , TAKEUCHI, Junichi , IGA, Naoto , GOTO, Hideki , IIYAMA, Shinichi
发明人： TAKEUCHI, Junichi , IGA, Naoto , GOTO, Hideki , IIYAMA, Shinichi
IPC分类号： H04J3/06 , H04L12/407 , H04L12/64 , H04L7/08
CPC分类号： H04J3/0602 , H04L7/08 , H04L12/407
摘要： A network device (101) that arranges and transfers in an initial period of the cycle a synchronization frame that synchronizes network devices (123, 124,125) within a network includes: a cycle timer (142) that measures a time within the cycle and a synchronization management unit (141) that suspends frame transmission for a predetermined period till a start of the next cycle in each cycle, on the basis of information from the cycle timer (142).
摘要翻译：一种网络设备（101），其在所述周期的初始阶段中布置和传送同步网络内的网络设备（123,124,125）的同步帧，包括：周期定时器（142），其测量所述周期内的时间和同步管理单元（141），其基于来自周期定时器（142）的信息，暂停在每个周期中的下一个周期开始的预定时间段的帧传输。

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