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1. 发明申请

WO2005022759A2 FILTER FOR SELECTIVELY PROCESSING OPTICAL AND OTHER SIGNALS 审中-公开
标题翻译：用于选择性处理光学信号和其他信号的滤波器
公开(公告)号：WO2005022759A2
公开(公告)日：2005-03-10
申请号：PCT/US2004/028027
申请日：2004-08-27
申请人： BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM , MACFARLANE, Duncan, L
发明人： MACFARLANE, Duncan, L
IPC分类号： H04B
CPC分类号： G02B6/12007 , G02B6/12004 , G02B6/2861 , G02B2006/12164
摘要： A multi-section filter is provided for use in processing optical signals and other signals that can be readily projected from one filter section to another. In one aspect of the present invention, first order or single stage active optical filter 10 is provided. Filter 10 has an input component, comprising a surface grating coupler 12 disposed to receive optical input signals, and an output component likewise comprising a surface grating coupler 14. Optical signals are projected directly from surface grating coupler 12 to surface coupling 14 along a light transmission path 16, which is configured to avoid delaying light signals passing therethrough. Filters of the present invention may be configured in numerous forms, including IIR and FIR filters and both linear and 2D active optical lattice filters.
摘要翻译：提供多段滤波器用于处理光信号和其他信号，这些信号可以容易地从一个滤波器部分投射到另一个滤波器部分。在本发明的一个方面中，提供了一阶或单级有源滤光器10。滤波器10具有一个输入部件，包括一个设置用于接收光输入信号的表面光栅耦合器12和一个同样包括表面光栅耦合器14的输出部件。光信号从光栅耦合器12直接投射到表面光耦合器14上，路径16，其被配置为避免延迟从中通过的光信号。本发明的滤波器可以以许多形式配置，包括IIR和FIR滤波器以及线性和2D有源光栅滤波器。

2. 发明授权

US10672721B2 Method for fabricating an electronic device and a stacked electronic device 审中-公开
公开(公告)号：US10672721B2
公开(公告)日：2020-06-02
申请号：US16208038
申请日：2018-12-03
申请人： STMicroelectronics (Grenoble 2) SAS
发明人： Karine Saxod , Marika Sorrieul
IPC分类号： H01L23/00 , H01L21/56 , H01L23/31 , H01L23/48 , H01L27/146 , H01L31/02 , H01L31/0203
摘要： A method for fabricating an electronic device includes fixing a rear face of an integrated-circuit chip to a front face of a support wafer. An infused adhesive is applied in the form of drops or segments that are separated from each other. A protective wafer is applied to the infused adhesive, and the infused adhesive is cured. The infused adhesive includes a curable adhesive and solid spacer elements infused in the curable adhesive. A closed intermediate peripheral ring is deposited on the integrated-circuit chip outside the cured infused adhesive, and an encapsulation block is formed such that it surrounds the chip, the protective wafer and the closed intermediate peripheral ring.

3. 发明授权

US09946652B2 Pre-fetch in a multi-stage memory management system 有权
公开(公告)号：US09946652B2
公开(公告)日：2018-04-17
申请号：US14486215
申请日：2014-09-15
申请人： STMicroelectronics International N.V.
发明人： Gilles Ries , Ennio Salemi , Sana Ben Alaya
IPC分类号： G06F12/00 , G06F12/0862 , G06F12/1027
CPC分类号： G06F12/0862 , G06F12/1027 , G06F2212/602 , G06F2212/654
摘要： A memory management system for managing a memory and includes a multi-stage memory management unit including control circuitry and cache memory. The cache memory may have a respective translation look-aside buffer for each stage of the multi-stage memory management unit. The control circuitry may be configured to generate a blank data request including a virtual address and information that specifies that data is not to be read from the memory, perform address translations based on the generated blank data request in multiple stages until a physical address is obtained, and discard the blank data request.

4. 发明授权

US09946282B2 LDO regulator with improved load transient performance for internal power supply 有权
公开(公告)号：US09946282B2
公开(公告)日：2018-04-17
申请号：US15244289
申请日：2016-08-23
申请人： STMicroelectronics (Shenzhen) R&D Co. Ltd
发明人： Yong Feng Liu
IPC分类号： G05F1/00 , G05F1/575 , G05F1/565 , G05F1/59 , G05F3/30
CPC分类号： G05F1/575 , G05F1/565 , G05F1/59 , G05F3/30
摘要： A voltage regulator includes a feedback regulation loop and a drive transistor configured to source current to a regulated output. A transient recovery circuit is coupled to the voltage regulator circuit and includes a first transistor coupled to source current into a control terminal of the drive transistor, wherein the source current is in addition to current sourced in response to operation of the feedback regulation loop. The first transistor is selectively actuated in response to a drop in voltage at the regulated output. The transient recovery circuit further includes a second transistor coupled to sink current from the regulated output. The sink current has a first non-zero magnitude in the quiescent operating mode of the regulator circuit. In response to an increase in voltage at the regulated output, the operation of the second transistor is modified to increase the sink current to a second, greater, non-zero magnitude.

5. 发明授权

US09941416B2 MOS transistor and method of manufacturing the same 有权
公开(公告)号：US09941416B2
公开(公告)日：2018-04-10
申请号：US15356022
申请日：2016-11-18
申请人： STMicroelectronics (Crolles 2) SAS
发明人： Gregory Bidal
IPC分类号： H01L31/119 , H01L29/786 , H01L21/762 , H01L21/28 , H01L29/06 , H01L29/423 , H01L29/78 , H01L29/66
CPC分类号： H01L29/78696 , H01L21/28026 , H01L21/28158 , H01L21/7624 , H01L29/0649 , H01L29/0653 , H01L29/0684 , H01L29/42364 , H01L29/66477 , H01L29/665 , H01L29/6656 , H01L29/66636 , H01L29/66772 , H01L29/78 , H01L29/78603 , H01L29/78618 , H01L29/78654
摘要： A MOS transistor includes a semiconductor layer resting on an insulator and having a substantially planar upper surface. The semiconductor layer extends down to a first depth in the channel region, and down to a second depth, greater than the first depth, in the source and drain regions. In the channel region, the semiconductor layer is formed from a portion of an upper semiconductor layer of a silicon on insulator substrate. In the source and drain regions, the semiconductor layer is formed by epitaxially grown semiconductor material.

6. 发明授权

US09939530B2 Optical system for extended time of flight ranging 有权
公开(公告)号：US09939530B2
公开(公告)日：2018-04-10
申请号：US14685656
申请日：2015-04-14
申请人： STMicroelectronics (Research & Development) Limited
发明人： Adam Caley , Colin Campbell , Christopher Townsend
IPC分类号： G01C3/08 , G01S17/08 , G01S7/481 , G01S7/497
CPC分类号： G01S17/08 , G01S7/4813 , G01S7/4814 , G01S7/4816 , G01S7/4972
摘要： A time of flight detector includes an electromagnetic radiation emitter configured to emit a beam of radiation. A first optical element receives the beam of radiation and generates a collimated beam of radiation. A second optical element defines a narrow imaging field of view sufficient to capture reflected electromagnetic radiation from the collimated beam. An electromagnetic radiation sensor then senses the captured reflected electromagnetic radiation from the collimated beam in the narrow imaging field of view. Further narrowing of the imaging field of view is accomplished by selective enabling a sub-array of photosensitive elements with the electromagnetic radiation sensor.

7. 发明授权

US09923566B1 Spread spectrum clock generator 有权
公开(公告)号：US09923566B1
公开(公告)日：2018-03-20
申请号：US15251065
申请日：2016-08-30
申请人： STMicroelectronics International N.V.
发明人： Anand Kumar , Gagan Midha
IPC分类号： H03L7/093 , H03L7/099 , H03L7/089 , H03L7/197
CPC分类号： H03L7/093 , H03C3/095 , H03L7/0891 , H03L7/099 , H03L7/1976 , H04B1/69
摘要： A phase or frequency locked-loop circuit includes an oscillator configured to generate an output clock signal having a frequency set by an oscillator control signal. A modulator circuit receives a first signal and a second signal and is configured to generate a control signal having a value modulated in response to the first and second signals. A filter circuit generates the oscillator control signal by filtering the control signal. A delta-sigma modulator circuit operates to modulate the second signal in response to a modulation profile. As a result, the output clock signal is a spread spectrum clock signal.

8. 发明授权

US09922871B2 Process for producing a contact on an active zone of an integrated circuit, for example produced on an SOI substrate, in particular an FDSOI substrate, and corresponding integrated circuit 有权
公开(公告)号：US09922871B2
公开(公告)日：2018-03-20
申请号：US15401896
申请日：2017-01-09
申请人： STMicroelectronics (Crolles 2) SAS
发明人： Emmanuel Petitprez
IPC分类号： H01L21/768 , H01L29/78 , H01L29/06 , H01L29/08 , H01L29/45 , H01L23/535 , H01L23/532
CPC分类号： H01L21/76832 , H01L21/0217 , H01L21/283 , H01L21/76801 , H01L21/76802 , H01L21/76805 , H01L21/76816 , H01L21/76835 , H01L21/76895 , H01L21/823475 , H01L21/84 , H01L23/485 , H01L23/53295 , H01L23/535 , H01L27/1203 , H01L29/0649 , H01L29/0847 , H01L29/41733 , H01L29/42364 , H01L29/45 , H01L29/518 , H01L29/7838
摘要： An integrated circuit includes an active zone lying above a semiconductor substrate. A cavity borders the active zone and extends, in an insulating zone, as far as into the vicinity of a semiconductor region. An insulating multilayer is provided and an electrically conductive contact extends within the insulating multilayer to emerge onto the active zone and into the cavity. The insulating multilayer includes a first insulating layer covering the active zone outside the contact and lining the walls of the cavity. An additional insulating layer covers the portion of the first insulating layer lining the walls of the cavity. The contact reaches the additional insulating layer in the cavity. An insulating region lies on top of the first insulating layer and the additional insulating layer made from insulating material around the contact.

9. 发明授权

US09917040B1 Stress relieved thermal base for integrated circuit packaging 有权
公开(公告)号：US09917040B1
公开(公告)日：2018-03-13
申请号：US15375314
申请日：2016-12-12
申请人： STMicroelectronics, Inc.
发明人： Craig J. Rotay
IPC分类号： H01L23/495 , H01L23/00 , H01L23/31
CPC分类号： H01L23/36 , H01L23/047 , H01L23/10 , H01L23/49541 , H01L2224/48091 , H01L2224/48247 , H01L2924/00014
摘要： A package is formed by a thermal base and a leadframe assembly. The thermal base includes a body of thermally conductive material having a top surface, wherein the top surface of the body includes a pedestal. An integrated circuit chip is mounted to the pedestal, the integrated circuit chip including bonding pads. The leadframe assembly includes leads and an encapsulant ring that partially embeds the leads. The leadframe assembly is mounted to the top surface of said body surrounding the pedestal. The pedestal is configured with a thickness that positions the bonding pad at a height substantially coplanar with the leads. Bonding wires extend from the bonding pads to the leads with a shortened length so as to provide for improved electrical characteristics of frequency response, impedance and inductance.

10. 发明授权

US09893001B2 Semiconductor device, corresponding methods of production and use and corresponding apparatus 有权
公开(公告)号：US09893001B2
公开(公告)日：2018-02-13
申请号：US15416546
申请日：2017-01-26
申请人： STMicroelectronics S.r.l.
发明人： Alberto Arrigoni , Alberto Da Dalt
IPC分类号： H01L23/495 , H01L21/48 , H01L21/56 , H01L21/78 , H01L23/31 , H01L25/065
CPC分类号： H01L23/49575 , H01L21/4825 , H01L21/4842 , H01L21/4853 , H01L21/561 , H01L21/565 , H01L21/78 , H01L23/3107 , H01L23/3114 , H01L23/49503 , H01L23/49524 , H01L23/49541 , H01L25/0655 , H01L2924/181 , H01L2924/00012
摘要： A semiconductor device includes a quadrilateral package with a first pair of opposed sides and a second pair of opposed sides. Both sides of the first pair of opposed sides are provided with electrical contact leads. Only one side of the second pair of opposed sides is provided with electrical contact leads. The side of the second pair of opposed sides without electrical contact leads is a leadless side. That side is not a molded side of the package, but rather is defined by a cut surface.

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