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    • 2. 发明专利
    • INTEGRATED CIRCUIT FABRICATION
    • MY7300359A
    • 1973-12-31
    • MY7300359
    • 1973-12-31
    • TEXAS INSTRUMENTS INCORPORATED
    • H01L21/00H01L21/762H01L27/02
    • 1,186,526. Integrated circuits. TEXAS INSTRUMENTS Inc. 15 Sept., 1967 [23 Dec., 1966], No. 42212/67. Heading H1K. A method of preparing an integrated circuit comprises the steps of: (a) forming a layer 4 of insulating material, preferably silicon dioxide or silicon nitride, on a supporting body 1 of silicon; (b) depositing single crystals 7 of silicon at a plurality of nucleation sites on the layer 4; (c) depositing a second layer 8 of insulating material on the surface of the layer 4 to cover the crystals 7; (d) depositing a substrate 9 of semi-conductor material, preferably polycrystalline silicon, on the layer 8; (e) removing the supporting body 1 by etching or lapping; and (f) forming individual circuit components in each of the crystals 7. The nucleation sites may be randomly distributed on the layer 4, their density being controlled by the deposition conditions or by exposing varying areas of the underlying surface of the body 1, or may be pre-selected by imprinting a nucleating agent on the layer or by forming indentations in the layer using mechanical means or an electron beam. In one embodiment, a silicon dioxide layer 4 15,000 Š thick, is formed by vapour deposition or thermal oxidation of the body 1 and the crystals 7 are formed by reacting SiCl 4 or SiHCl 3 with hydrogen at 1000-1300‹ C., suitable impurities being introduced into the reactor if required. The crystal growth is monitored through a microscope. The body 1 is removed with amine-catechol, and circuit components are formed in the crystals by ion implantation of appropriate impurities or by etching the layer 4 and diffusing or depositing suitable material. In a second embodiment having randomly distributed crystals, the locations of the crystals are recorded by scanning the surface and storing the information received in a computer. The computer may then be used to design a mask for selectively etching the layer 4 and forming the circuit components.
    • 3. 发明专利
    • SEMICONDUCTOR DEVICE AND METHOD OF MAKING SAME
    • MY6900309A
    • 1969-12-31
    • MY6900309
    • 1969-12-31
    • TEXAS INSTRUMENTS INCORPORATED
    • H01L23/057H01L23/495H01L23/498H01L27/07H03K3/286H01G1/16H01L27/06
    • 958,241. Semi-conductor devices. TEXAS INSTRUMENTS Inc. May 6, 1960 [May 6, 1959], No. 16070/60. Heading H1K. A semi-conductor body, e.g. of germanium, silicon or intermetallic alloys is attached to an insulating, e.g. ceramic base by a cement, the thermal expansion coefficient of which matches those of the ceramic and semi-conductor. The wafer is then processed and a sealed enclosure, of which the substrate forms an external wall, formed around it. In one embodiment a semiconductor wafer in ohmic contact with metal strip or silver paste electrodes 3-6 (Fig. 1), on a ceramic base 1 is stuck to the base with a thermosetting cement, containing finely-divided glass, and is subsequently formed into a junction diode combined with a centre-tapped resistor, constituted by the semi-conductor wafer itself. A metal ring 11 (Fig. 2), coated with non-conductive glaze 12, or a ceramic ring metallized on its upper surface, is mounted on a low-melting glaze ring 13 applied over electrodes 3-7 and sealed thereto by heating to soften the glaze. Metal plate 14 is subsequently welded or soldered to ring 11 in inert gas or vacuo to form a sealed housing. A multivibrator formed from a single slab of semiconductor and of the circuit configuration shown in Fig. 4, is made by the following steps. A sheet of nickel-iron-cobalt alloy is etched to the form shown in Fig. 5 with indexing holes 53, 54. The sheet is positioned by these holes, a semi-conductor wafer ohisically soldered thereto in the position shown, and the assembly attached to a ceramic base as described above. The wafer is then subjected to various processes as described in Specification 945,734, to form therein the elements of the multivibrator circuit and to interconnect them. A housing is formed about the processed wafer broadly as described with reference to Fig. 2, but using a basically rectangular ring 52. The alloy sheet is finally cut along the dotted lines to isolate the various external connections of the circuit.
    • 9. 发明专利
    • DIGITAL DATA HANDLING
    • MY6900256A
    • 1969-12-31
    • MY6900256
    • 1969-12-31
    • TEXAS INSTRUMENTS INCORPORATED
    • G06F3/06
    • 1,060,762. Electric digital-data-storage apparatus. TEXAS INSTRUMENTS Inc. April 6, 1964 [April 9, 1963], No. 14118/64. Heading G4C. A system for asynchronously transferring digital words into and out of a memory comprises means to sequentially read in data to a memory, means to produce a command after a word is read into the memory, means responsive to said command to enable the operation of read-out means whereby the read-out means has access to each word stored in the memory after it is read in, and wherein the read-out means inhibits the read-in and vice versa, and search means used to locate the digital words to be read into the memory. In the system described words are stored on magnetic tape (Fig. 1, not shown). A Start command starts the tape transport in the Search mode wherein data is transferred in parallel to a Buffer Register 6. When a word, identical to a predetermined word stored in Register 11 enters Register 6 Comparator 14 terminates the Search mode, initiates the Read mode and opens Gate G3 to transfer the word via Register 7 to Buffer Memory 8. Gate G2 is also opened to transfer the words to Register 11. Index Register A, decremented each time a word is entered in the Memory determines the address of the word, A being preset to a value equal to the number of words to be transferred. If a word is required for arithmetical operations in Unit 9 after it has been entered in Memory 8 the word is transferred to Unit 9 under the control of Index Register B which is decremented for each word read out, Register B being pre-set equal to Register A. The read-out command is produced by Controller 10. When the index Comparator 18 identifies that the Memory is full, a signal is sent out to stop the tape transport. The FULL pulse plus the 1st bit of the succeeding word set INHIBIT 36 to close gate G3. The sixteen least significant digits of said succeeding word are then transferred to Register 11 to identify the starting word on the next read-out. The INHIBIT pulse passes Delay 34 to close gate 2 after the digits are transferred. The tape having overshot the stop mark due to momentum and inertia is recycled to a point prior to its stopping point. On the next operation the search mode occurs until the word stored in Register 11 is reached and the read operation is continued. If the Index Comparator defines an EMPTY state then the tape transport is started if it was stopped or otherwise continues reading out. If Register A and B contain the same quantity then the Comparator produces an INHIBIT READ-OUT signal. The circuits preventing read-out while information is being read in, or vice versa are given in Figs. 5A, 5B (not shown). To enable read-in a clock-bit sets Flip-Flop (44) to enable AND gate (45). An Arithmetic Command Completed signal applied to gate (45) sets Flip-Flop (46) to enable AND gate (47) and remove the INHIBIT signal which otherwise enables readout. A Memory Idle command acts to set a Blocking Oscillator (48) to open gate G4 (also in Fig. 2) and also to open gate G3 via AND gate (29). The latter signal is also applied to reset Flip-Flop (44) and also via delay (49) to reset Flip-Flop (46). After an Arithmetic Operation an Arithmetic Operation Completed signal is applied to Blocking Oscillator (50) to set Flip-Flop (51) and send the ACC signal to AND gate (45). This signal is applied via DELAY (52) to AND gate (53) the DELAY allowing sufficient time to allow Flip-Flop (46) to be set by the read-in command if required. If Flip-Flop (46) produces an INHIBIT signal and the COMPARATOR does not INHIBIT READ-OUT then AND gate (53) is enabled and sets Blocking Oscillator (54) to start the arithmetic operation, the start pulse being fed back to Flip-Flop (51) to remove the ACC command.