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91. 发明专利

JPS61213896A DISPLAY CONTROLLER 失效
公开(公告)号：JPS61213896A
公开(公告)日：1986-09-22
申请号：JP5512785
申请日：1985-03-19
申请人： ASCII CORP , NIPPON MUSICAL INSTRUMENTS MFG
发明人： ISHII TAKATOSHI , KANEKO MAKOTO
IPC分类号： G09G5/18 , G02F1/133 , G06F3/147 , G06F3/153 , G09G1/16 , G09G3/20 , G09G3/36 , G09G5/00 , G09G5/22
摘要： A display controller displays an image on either of a CRT display unit and a liquid crystal display unit (LCD) having upper and lower screens in accordance with image data stored in a memory. When a CRT display unit is driven, an address generating circuit calculates at the beginning of each horizontal scanning an address of the memory corresponding to the leftmost display position on the current horizontal scanning line in accordance with the vertical position of the horizontal scanning line and the number of display positions on a horizontal scanning line, and stores data representing the address in a first register. The data in the first register is incremented in accordance with the horizontal scanning and fed to the memory to read the image data. When the LCD is driven, the address generating circuit calculates at the beginning of each horizontal scanning two addresses of the memory corresponding respectively to the left most display positions on the current horizontal scanning lines on the upper and lower screens. In this case, the first one is obtained in accordance with the vertical position of the current horizontal scanning line on the upper screen and the number of display positions on a horizontal scanning line, while the seond one is obtained by adding the number of display positions on the upper screen to the calculated first address. Data representing these two addresses are stored in the first and second registers, which data are incremented in accordance with the horizontal scanning and fed to the memory to read the image data.

92. 发明专利

JPS61213892A DISPLAY CONTROLLER 失效
公开(公告)号：JPS61213892A
公开(公告)日：1986-09-22
申请号：JP5512885
申请日：1985-03-19
申请人： ASCII CORP , NIPPON MUSICAL INSTRUMENTS MFG
发明人： ISHII TAKATOSHI , KANEKO MAKOTO
IPC分类号： G09G5/02 , G09G5/06 , G09G5/08
摘要： A display controller can display a cursor having sufficient contour irrespective of the background color. The display controller has two cursor pattern memories from which first and second cursor patterns are read in such a timing that the first cursor pattern is displayed at a selected position on the screen and that the second cursor pattern is superimposed on the first cursor pattern. The display controller also has two registers storing therein first and second color codes corresponding respectively to the first and second cursor patterns. The color of the first cursor pattern is determined by a color code obtained by subjecting the first color code and a background color code read from a video memory to a logical multiplication, and the color of the second cursor pattern is determined by a color code obtained by subjecting the color code of the first cursor pattern and the second color code to an exclusive-OR operation. The logical operations are selectively effected in accordance with two control bits stored in a register.

93. 发明专利

JPS60249185A DISPLAY CONTROLLER 失效
公开(公告)号：JPS60249185A
公开(公告)日：1985-12-09
申请号：JP10609284
申请日：1984-05-25
申请人： ASCII CORP , NIPPON MUSICAL INSTRUMENTS MFG
发明人： NISHI KAZUHIKO , ISHII TAKATOSHI , YAMASHITA RIYOUZOU , OKUMURA TAKATOSHI , YAMAOKA NARIMITSU
IPC分类号： G06F3/153 , G06F3/14 , G09G1/02 , G09G5/00 , G09G5/02 , G09G5/12 , G09G5/393

94. 发明专利

JPS60245035A DISPLAY CONTROLLER 失效
公开(公告)号：JPS60245035A
公开(公告)日：1985-12-04
申请号：JP10030384
申请日：1984-05-18
申请人： ASCII CORP , NIPPON MUSICAL INSTRUMENTS MFG
发明人： NISHI KAZUHIKO , ISHII TAKATOSHI , YAMASHITA RIYOUZOU , OKUMURA TAKATOSHI , YAMAOKA NARIMITSU
IPC分类号： G06F3/153 , G06T11/00 , G09G5/02
摘要： PURPOSE:To use one color code as a transparent color code and also as a specific color code by providing plural registers and a transparent color code detecting circuit. CONSTITUTION:A register 9 is a one-bit register and 1 or 0 is written by a CPU2. A register 15, on the other hand, is a four-bit register and a color code is written by the CPU2. When the register 9 holds 1, the border area 4b on a display screen is displayed in a color (background color) corresponding to the color code in the register 15. Further, an image based upon color codes in a VRAM5, i.e. color codes of specific colors is displayed at the inside of the area 4b. Then, when the register 9 holds 0, zero detecting circuits 12, 13 both enter an enable state and the color codes are processed as transparent codes. Namely, one color code is usable as both the transparent color code and color code of a specific color.

95. 发明专利

JPS60225961A INTERRUPTION CONTROLLER OF CPU 失效
公开(公告)号：JPS60225961A
公开(公告)日：1985-11-11
申请号：JP8327384
申请日：1984-04-25
申请人： ASCII CORP
发明人： ISHII TAKATOSHI , YAMASHITA RIYOUZOU
IPC分类号： G06F13/38 , G06F9/48 , G06F13/24 , G06F15/78
摘要： PURPOSE:To further expand the function of a multiple-function CPU, by providing an interruption request port which checks the level condition of signals or internal condition of the multiple-function CPU and a register equipped with bits which inhibit or permit interruptions. CONSTITUTION:Address signals of address lines ADR0-ADR7 outputted from a CPU201 are decoded by an I/O address decoder 202 and select signals of each register/port 207-210 are outputted. The interruption controlling register 209 controls the enable/disable of expanding interruption requesting signals and the CPU201 checks that which expanding interruption requesting signal is generated by means of the interruption status port 210. Each interruption becomes enable only when each bit becomes ''1'' at the interruption status port 210 and each interruption is inhibited only when each bit becomes ''1'' at the interruption controlling register 209.

96. 发明专利

JPS60218697A DISPLAY CONTROLLER 失效
公开(公告)号：JPS60218697A
公开(公告)日：1985-11-01
申请号：JP7562084
申请日：1984-04-14
申请人： ASCII CORP , NIPPON MUSICAL INSTRUMENTS MFG
发明人： NISHI KAZUHIKO , ISHII TAKATOSHI , YAMASHITA RIYOUZOU , OKUMURA TAKATOSHI , YAMAOKA NARIMITSU
IPC分类号： G09G5/377 , G09G1/02 , G09G1/28 , G09G5/02 , G09G5/06 , G09G5/36

97. 发明专利

JPS60214392A Display controller 失效
公开(公告)号：JPS60214392A
公开(公告)日：1985-10-26
申请号：JP7159384
申请日：1984-04-10
申请人： Ascii Corp , Nippon Musical Instruments Mfg
发明人： NISHI KAZUHIKO , ISHII TAKATOSHI , YAMASHITA RIYOUZOU , OKUMURA TAKATOSHI , YAMAOKA NARIMITSU , MORIMOTO MINORU
IPC分类号： G06F3/153 , G06F3/14 , G09G1/02 , G09G1/28 , G09G5/00 , G09G5/06 , G09G5/36 , G09G5/38

98. 发明专利

JPS60173580A DISPLAY CONTROLLER 失效
公开(公告)号：JPS60173580A
公开(公告)日：1985-09-06
申请号：JP2878484
申请日：1984-02-20
申请人： ASCII CORP
发明人： ISHII TAKATOSHI
IPC分类号： G09G5/39 , G09G1/16 , G09G5/00 , G09G5/24 , G09G5/393 , G09G5/395

99. 发明专利

JPS60169935A DISPLAY CONTROLLER 失效
公开(公告)号：JPS60169935A
公开(公告)日：1985-09-03
申请号：JP2579684
申请日：1984-02-14
申请人： ASCII CORP , NIPPON MUSICAL INSTRUMENTS MFG
发明人： NISHI KAZUHIKO , ISHII TAKATOSHI , YAMASHITA RIYOUZOU , OKUMURA TAKATOSHI , YAMAOKA NARIMITSU
IPC分类号： G06F3/153 , G06F3/14 , G09G5/00
摘要： PURPOSE:To execute each processing of a horizontal flyback time of a central processor by outputting an interruption signal on the basis of a coincident signal between an output from a register storing a scanning line number from the centeral processor and an output from a vertical counter. CONSTITUTION:In a color display controller 7 reading out a moving picture parttern or the like in a video RAM(VRAM)4 on the basis of a command from a CPU1 and outputting the pattern on a CRT display device 5 displaying 256 bits, a coincidence signal between the output of the register 17 writing a scanning line number from a CPU2 and the output of the vertical counter 11 is outputted from a coincidence circuit 18 and the output of the circuit 18 and the output of a decoder 19 outputting a signal ''1'' when the output of a horizontal counter 9 of 341 digits is 256 are applied to an AND gate 20 to generate an interruption signal IR. Thus, the signal IR is generated at the end of horizontal scanning and processing such as rewriting or the like of the VRAM4 can be executed in a horizontal flyback period.

100. 发明专利

JPS60147785A CONTROLLER FOR DATA MOVEMENT BETWEEN LOGICAL AREAS 失效
公开(公告)号：JPS60147785A
公开(公告)日：1985-08-03
申请号：JP271084
申请日：1984-01-12
申请人： ASCII CORP
发明人： ISHII TAKATOSHI , YAMASHITA RIYOUZOU , NISHI KAZUHIKO
IPC分类号： G09G5/38 , G06F3/153 , G06F12/00 , G06F12/02 , G09G5/14 , G09G5/393

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