会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 12. 发明申请
    • PIXEL CIRCUIT, ORGANIC LIGHT EMITTING DISPLAY, AND DRIVING METHOD THEREOF
    • 像素电路,有机发光显示器及其驱动方法
    • US20110164016A1
    • 2011-07-07
    • US12869721
    • 2010-08-26
    • Chul-Kyu KangBo-Yong Chung
    • Chul-Kyu KangBo-Yong Chung
    • G09G3/32G06F3/038
    • G09G3/3233G09G2300/0819G09G2300/0852G09G2300/0861G09G2320/0223G09G2320/043
    • A pixel circuit includes: an OLED; a second transistor including gate, first, and second terminals coupled to a first scan line, a data line, and a first node, respectively; a fourth transistor including gate, first, and second terminals coupled to a third scan line, the first node, and a second node, respectively; a third transistor including gate, first, and second terminals coupled to a second scan line, a reference power source, and the second node, respectively; a fifth transistor including gate, first, and second terminals coupled to a light emission control line, a third node, and an anode of the OLED, respectively; a first capacitor coupled between the first and second nodes; a second capacitor coupled between the second and third nodes; and a first transistor including gate, first, and second terminals coupled to the first node, a first power source, and the third node, respectively.
    • 像素电路包括:OLED; 第二晶体管,其分别包括耦合到第一扫描线,数据线和第一节点的栅极,第一和第二端子; 第四晶体管,其分别包括耦合到第三扫描线的栅极,第一和第二端子,所述第一节点和第二节点; 第三晶体管,分别包括耦合到第二扫描线的栅极,第一和第二端子,参考电源和第二节点; 第五晶体管,其分别包括耦合到所述OLED的发光控制线,第三节点和阳极的栅极,第一和第二端子; 耦合在第一和第二节点之间的第一电容器; 耦合在第二和第三节点之间的第二电容器; 以及第一晶体管,其分别包括耦合到所述第一节点的栅极,第一和第二端子,第一电源和所述第三节点。
    • 13. 发明申请
    • PIXEL CIRCUIT AND ORGANIC ELECTROLUMINESCENT DISPLAY INCLUDING THE SAME
    • 像素电路和有机电致发光显示器包括它们
    • US20110084947A1
    • 2011-04-14
    • US12832952
    • 2010-07-08
    • Bo-Yong ChungKeum-Nam Kim
    • Bo-Yong ChungKeum-Nam Kim
    • G09G3/32G09G5/00
    • G09G3/3233G09G2300/0852G09G2300/0861G09G2310/0251G09G2310/0262G09G2320/043
    • Pixel circuits and an organic electroluminescent display including the same are provided. The pixel circuit includes: an organic light emitting diode; a fifth transistor coupled to a third scan line, a reference power source, and a first node; a first capacitor coupled between the first node and a second node; a second capacitor coupled between the first node and the organic light emitting diode; a fourth transistor coupled to a second scan line, a data line, and the first node; a sixth transistor coupled to a first scan line, a first power source, and the second node; a second transistor coupled to the second scan line, the second node, and a third node; a third transistor coupled to an emission control line, the first power source, and the third node; and a first transistor coupled to the second node, the third node, and the organic light emitting diode.
    • 提供像素电路和包括其的有机电致发光显示器。 像素电路包括:有机发光二极管; 耦合到第三扫描线的第五晶体管,参考电源和第一节点; 耦合在所述第一节点和第二节点之间的第一电容器; 耦合在所述第一节点和所述有机发光二极管之间的第二电容器; 耦合到第二扫描线的第四晶体管,数据线和所述第一节点; 耦合到第一扫描线的第六晶体管,第一电源和第二节点; 耦合到第二扫描线的第二晶体管,第二节点和第三节点; 耦合到发射控制线,第一电源和第三节点的第三晶体管; 以及耦合到第二节点,第三节点和有机发光二极管的第一晶体管。
    • 15. 发明授权
    • Scan driver and organic light emitting display device having the same
    • 扫描驱动器和有机发光显示装置具有相同的功能
    • US07852309B2
    • 2010-12-14
    • US11490755
    • 2006-07-20
    • Bo-Yong Chung
    • Bo-Yong Chung
    • G09G3/36G11C19/00H03K19/20
    • G09G3/3266G09G2300/0408
    • Provided is a scan driver that supplies a scan signal to an organic light emitting display device (OLED). The scan driver includes transistors of the same conductivity type. To generate individual scan signals, the scan driver includes samplers, each of which samples an input signal in synchronization with a clock signal or an inverted clock signal; and an OR gate and a NAND gate, each of which performs a logical operation on output signals of adjacent samplers and generates a scan signal. The samplers, the OR gate and the NOR gate include transistors of the same conductivity type.
    • 提供了向有机发光显示装置(OLED)提供扫描信号的扫描驱动器。 扫描驱动器包括相同导电类型的晶体管。 为了产生单独的扫描信号,扫描驱动器包括采样器,每个采样器与时钟信号或反相时钟信号同步地采样输入信号; 以及OR门和NAND门,其中每一个对相邻取样器的输出信号执行逻辑运算并产生扫描信号。 采样器,OR门和NOR门包括相同导电类型的晶体管。
    • 16. 发明授权
    • Logic gates, scan drivers and organic light emitting displays using the same
    • 逻辑门,扫描驱动器和使用其的有机发光显示器
    • US07535260B2
    • 2009-05-19
    • US11783014
    • 2007-04-05
    • Bo Yong Chung
    • Bo Yong Chung
    • G11C8/00H03K19/082H03K19/094
    • G09G3/3266H03K19/0013H03K19/09441
    • A logic gate includes a first driver connected to a first power source, a first control transistor connected between a first node and a second power source to control a voltage of the first node, a second driver connected between a gate electrode of the first control transistor and the second power source, a third driver connected between the first power source and the second power source, a second control transistor connected between the third driver and the second power source, and having a first electrode connected to an output terminal, and a fourth driver arranged between a gate electrode of the second control transistor and the second power source, wherein the first control transistor, the second control transistor and each transistor of the first driver, the second driver, the third driver and the fourth driver are PMOS transistors.
    • 逻辑门包括连接到第一电源的第一驱动器,连接在第一节点和第二电源之间的第一控制晶体管,以控制第一节点的电压;连接在第一控制晶体管的栅电极之间的第二驱动器 和第二电源,连接在第一电源和第二电源之间的第三驱动器,连接在第三驱动器和第二电源之间的第二控制晶体管,并且具有连接到输出端子的第一电极,以及第四驱动器 布置在第二控制晶体管的栅电极和第二电源之间的驱动器,其中第一驱动器,第二驱动器,第三驱动器和第四驱动器的第一控制晶体管,第二控制晶体管和每个晶体管是PMOS晶体管。
    • 17. 发明授权
    • Logic gate, scan driver and organic light emitting diode display using the same
    • 逻辑门,扫描驱动器和有机发光二极管显示使用相同
    • US07528631B2
    • 2009-05-05
    • US11826321
    • 2007-07-13
    • Bo Yong ChungWang Jo LeeHyung Soo KimSang Moo Choi
    • Bo Yong ChungWang Jo LeeHyung Soo KimSang Moo Choi
    • H03K19/20
    • H03K19/09441G09G3/3266G09G2310/06
    • A logic gate includes a first driver to receive an input signal, and to control a connection between a first power source and a first node in correspondence with the input signal, a second driver coupled to the first node and a second power source, and to control a voltage of the first node, a third driver to control a connection between an output terminal and the first power source in correspondence with the voltage of the first node, a control transistor to control a connection between the third driver and the second power source, a fourth driver to control a connection between a gate electrode of the control transistor and the second power source, and a second capacitor between a first electrode of the control transistor and the gate electrode of the control transistor, wherein the transistors are a same type of MOS transistor.
    • 逻辑门包括用于接收输入信号的第一驱动器,以及与输入信号相对应地控制第一电源和第一节点之间的连接;耦合到第一节点和第二电源的第二驱动器,以及 控制第一节点的电压,第三驱动器,用于根据第一节点的电压来控制输出端和第一电源之间的连接;控制晶体管,用于控制第三驱动器和第二电源之间的连接 控制晶体管的栅电极和第二电源之间的连接的第四驱动器和控制晶体管的第一电极和控制晶体管的栅电极之间的第二电容器,其中晶体管是相同的 的MOS晶体管。
    • 18. 发明授权
    • Electroluminescent display
    • 电致发光显示
    • US07372438B2
    • 2008-05-13
    • US10992358
    • 2004-11-19
    • Bo-Yong ChungWong-Sik Choi
    • Bo-Yong ChungWong-Sik Choi
    • G09G3/30
    • H01L27/3276H01L27/0207
    • An electroluminescent display includes: a pixel region including devices arranged therein and adapted to emit light in response to a data signal; a scan driver adapted to supply a switching signal to a gate electrode of a first switching device; a data driver adapted to supply data information to a source electrode of the first switching device; a conductive power supply line adapted to supply a first power supply voltage to the pixel region, and an electromagnetic shield adapted to shield electromagnetic waves having electric or magnetic field characteristics. The electromagnetic shield is adapted to generate a second power supply voltage having a polarity opposite to that of the first power supply voltage.
    • 电致发光显示器包括:像素区域,包括布置在其中并适于响应于数据信号而发光的器件; 扫描驱动器,其适于向第一开关装置的栅电极提供切换信号; 数据驱动器,适于向第一开关装置的源电极提供数据信息; 适于向像素区域提供第一电源电压的导电电源线以及适于屏蔽具有电场或磁场特性的电磁波的电磁屏蔽。 电磁屏蔽适于产生具有与第一电源电压的极性相反的极性的第二电源电压。
    • 20. 发明授权
    • Buffer circuit and active matrix display using the same
    • 缓冲电路和有源矩阵显示使用相同
    • US07301533B2
    • 2007-11-27
    • US10776998
    • 2004-02-10
    • Dong-Yong ShinBo-Yong Chung
    • Dong-Yong ShinBo-Yong Chung
    • G09G5/00
    • G11C19/184G09G3/20G09G2310/0267G09G2310/0289G09G2330/021G11C19/00G11C19/28H03K19/0013H03K19/01714H03K19/018521
    • A buffer circuit includes first to sixth transistors. The first transistor is coupled between a first power source and a first node, and has a gate for receiving a first signal having a first signal level. The second transistor is coupled between the first node and a second power source, and has a gate for receiving a second signal having a second signal level, which is an inverse of the first signal level. The third transistor has a gate coupled to the first node, and is coupled between the first power source and a second node. The fourth transistor is coupled between the second node and the second power source, and has a gate for receiving the first signal. The fifth transistor has a gate coupled to the second node, and is coupled between the first power source and an output end. The sixth transistor has a gate coupled to the first node, and is coupled between the output end and the second power source. In addition, a capacitance is formed between the gate of the sixth transistor and the output end.
    • 缓冲电路包括第一至第六晶体管。 第一晶体管耦合在第一电源和第一节点之间,并具有用于接收具有第一信号电平的第一信号的门。 第二晶体管耦合在第一节点和第二电源之间,并且具有用于接收具有第二信号电平的第二信号的门,该第二信号电平是第一信号电平的倒数。 第三晶体管具有耦合到第一节点的栅极,并且耦合在第一电源和第二节点之间。 第四晶体管耦合在第二节点和第二电源之间,并具有用于接收第一信号的门。 第五晶体管具有耦合到第二节点的栅极,并且耦合在第一电源和输出端之间。 第六晶体管具有耦合到第一节点的栅极,并且耦合在输出端和第二电源之间。 此外,在第六晶体管的栅极和输出端之间形成电容。