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    • 11. 发明授权
    • Direct patternization device and method
    • 直接图案化装置和方法
    • US5433821A
    • 1995-07-18
    • US201852
    • 1994-02-25
    • Thomas L. MillerRichard C. TaylorMichael R. Gaige
    • Thomas L. MillerRichard C. TaylorMichael R. Gaige
    • C23F1/02H05K3/06B44C1/22
    • C23F1/02H05K3/068
    • A predetermined electrical circuit pattern or discrete features composed of discrete, electrically conducting metal pathways and non-conducting spaces therebetween is formed on a dielectric substrate by(1) depositing a continuous layer of an electrically conducting metal on a surface of the substrate,(2) contacting the metal layer with a mask head defining a system of ridges and valleys therein, the ridges corresponding to the pathways of the target electrical circuitry pattern or discrete features and the valleys corresponding to the spaces of the target pattern, the ridges in the mask head contacting the metal layer in sealing arrangement with the portions of the metal layer coming into contact with the ridges, and(3) contacting the metal layer with an etchant to remove the portions of the metal layer in the spaces and thereby form the target electrical circuitry or discrete features pattern.
    • (1)在基板的表面上沉积导电金属的连续层(2),在电介质基板上形成由分立的导电金属通路和非导电空间构成的预定电路图形或离散特征 )使金属层与限定了其中的脊和谷的系统的掩模头接触,所述脊对应于目标电路图案或离散特征的路径,以及对应于目标图案的空间的谷,掩模中的脊 头部与密封布置的金属层接触,金属层与脊接触的部分,和(3)使金属层与蚀刻剂接触以去除空间中的金属层的部分,从而形成目标电 电路或离散特征模式。