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21. 发明授权

US09710349B2 Storing first computer trace information in memory of second computer 有权
公开(公告)号：US09710349B2
公开(公告)日：2017-07-18
申请号：US14501442
申请日：2014-09-30
申请人： Texas Instruments Incorporated
发明人： Karthik R. Sankar , Gary L. Swoboda
IPC分类号： G06F11/30 , G06F11/34 , G06F11/36
CPC分类号： G06F11/3003 , G06F11/3048 , G06F11/3065 , G06F11/3476 , G06F11/3636 , G06F2201/865 , Y02D10/34
摘要： A system having a plurality of application computer circuits is disclosed. A first application computer circuit is arranged to process a first application. A trace collection circuit collects trace information from the first application computer circuit. A second application computer circuit is arranged to receive and store the collected trace information in a first mode and to process a second application in a second mode.

22. 发明申请

US20160320454A1 SYSTEM AND METHOD FOR SHARING A COMMUNICATIONS LINK BETWEEN MULTIPLE COMMUNICATIONS PROTOCOLS 审中-公开
公开(公告)号：US20160320454A1
公开(公告)日：2016-11-03
申请号：US15210487
申请日：2016-07-14
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Gary L. Swoboda
IPC分类号： G01R31/317 , G01R31/3177
CPC分类号： G01R31/3177 , G01R31/31705 , G01R31/31723 , G01R31/31724 , G01R31/31727 , G01R31/318536 , G01R31/318544 , G01R31/318572
摘要： A system and method for sharing a communications link between multiple protocols is described. A system includes a communications interface configured to exchange information with other systems using at least one of a plurality of protocols; a protocol select register that stores a value that selects a protocol from among the plurality of protocols to become an active protocol; and a state machine accessible to the communications interface, the state machine used to control the exchange of information through the communications interface according to the active protocol. The active protocol is used by the communications interface to exchange information while the remaining protocols of the plurality of protocols remain inactive. The state machine sequences through a series of states that cause the communications interface to operate according to the active protocol, and that are designated as inert sequences under the remaining protocols.

23. 发明申请

US20160154058A1 BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CHAIN TOPOLOGY 审中-公开
公开(公告)号：US20160154058A1
公开(公告)日：2016-06-02
申请号：US15015790
申请日：2016-02-04
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Gary L. Swoboda , Robert A. McGowan
IPC分类号： G01R31/3177
CPC分类号： G01R31/31705 , G01R31/31713 , G01R31/31723 , G01R31/31724 , G01R31/31727 , G01R31/3177 , G01R31/318533 , G01R31/318536 , G01R31/318538 , G01R31/318544 , G01R31/318555 , G01R31/318572 , G01R31/318597 , G06F11/2236
摘要： A system comprises a plurality of components, scan chain selection logic coupled to the components, and override selection logic coupled to the scan chain selection logic. The scan chain selection logic selects various of the components to be members of a scan chain under the direction of a host computer. The override selection logic detects a change in the scan chain and, as a result, blocks the entire scan chain from progressing.

24. 发明授权

US09222980B2 IC test circuitry and adapter with data transport control register 有权
标题翻译： IC测试电路和带数据传输控制寄存器的适配器
公开(公告)号：US09222980B2
公开(公告)日：2015-12-29
申请号：US14679315
申请日：2015-04-06
申请人： Texas Instruments Incorporated
发明人： Gary L. Swoboda
IPC分类号： G01R31/28 , G01R31/3185 , G01R31/317 , G01R31/3177
CPC分类号： G01R31/3177 , G01R31/31705 , G01R31/31723 , G01R31/31724 , G01R31/31727 , G01R31/318536 , G01R31/318544 , G01R31/318572
摘要： A system and method for sharing a communications link between multiple protocols is described. A system includes a communications interface configured to exchange information with other systems using at least one of a plurality of protocols; a protocol select register that stores a value that selects a protocol from among the plurality of protocols to become an active protocol; and a state machine accessible to the communications interface, the state machine used to control the exchange of information through the communications interface according to the active protocol. The active protocol is used by the communications interface to exchange information while the remaining protocols of the plurality of protocols remain inactive. The state machine sequences through a series of states that cause the communications interface to operate according to the active protocol, and that are designated as inert sequences under the remaining protocols.
摘要翻译：描述了用于共享多个协议之间的通信链路的系统和方法。一种系统包括被配置为使用多个协议中的至少一个与其他系统交换信息的通信接口; 协议选择寄存器，其存储从所述多个协议之中选择协议以成为有效协议的值; 以及通信接口可访问的状态机，用于根据活动协议通过通信接口来控制信息交换的状态机。通信接口使用活动协议来交换信息，而多个协议的剩余协议保持不活动。状态机通过使通信接口根据活动协议进行操作的一系列状态进行排序，并在其余协议下被指定为惰性序列。

25. 发明申请

US20150253386A1 BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CHAIN TOPOLOGY 审中-公开
公开(公告)号：US20150253386A1
公开(公告)日：2015-09-10
申请号：US14717632
申请日：2015-05-20
申请人： Texas Instruments Incorporated
发明人： Gary L. Swoboda , Robert A. McGowan
IPC分类号： G01R31/3177
CPC分类号： G01R31/31705 , G01R31/31713 , G01R31/31723 , G01R31/31724 , G01R31/31727 , G01R31/3177 , G01R31/318533 , G01R31/318536 , G01R31/318538 , G01R31/318544 , G01R31/318555 , G01R31/318572 , G01R31/318597 , G06F11/2236
摘要： A system comprises a plurality of components, scan chain selection logic coupled to the components, and override selection logic coupled to the scan chain selection logic. The scan chain selection logic selects various of the components to be members of a scan chain under the direction of a host computer. The override selection logic detects a change in the scan chain and, as a result, blocks the entire scan chain from progressing.

26. 发明申请

US20150127997A1 MINIMIZING THE AMOUNT OF TIME STAMP INFORMATION REPORTED WITH INSTRUMENTATION DATA 审中-公开
标题翻译：最小化用仪器数据报告的时间戳信息
公开(公告)号：US20150127997A1
公开(公告)日：2015-05-07
申请号：US14597856
申请日：2015-01-15
申请人： Texas Instruments Incorporated
发明人： Gary L. Swoboda
IPC分类号： G06F11/07
CPC分类号： G01R31/31725 , G01R31/31703 , G01R31/3177 , G06F11/0757 , G06F13/40 , G06F21/6245 , H04L9/3297
摘要： This invention is time stamping subsystem of an electronic apparatus. A time stamp generator generates a multibit time stamp value including a predetermined number of least significant bits overlapping a predetermined number of most significant bits. Each client receives the least significant bits. Each client associates captured data with a corresponding set of the least significant bits in a message. A central scheduling unit associates most significant bits of the time stamp value with the least significant bits of the message. This associating compares overlap bits of the most significant bits and least significant bits. The most significant bits are decremented until the overlap bits are equal.
摘要翻译：本发明是电子设备的时间戳子系统。时间戳发生器产生包括与预定数量的最高有效位重叠的预定数量的最低有效位的多位时间戳值。每个客户端接收最低有效位。每个客户端将捕获的数据与消息中的对应的最低有效位集合相关联。中央调度单元将时间戳值的最高有效位与消息的最低有效位相关联。该关联比较了最高有效位和最低有效位的重叠位。最高有效位递减直到重叠位相等。

27. 发明申请

US20150127993A1 Trace Data Export to Remote Memory Using Memory Mapped Write Transactions 有权
标题翻译：使用内存映射写入事务跟踪数据导出到远程内存
公开(公告)号：US20150127993A1
公开(公告)日：2015-05-07
申请号：US14532051
申请日：2014-11-04
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Karthik Ramana Sankar , Gary L. Swoboda
IPC分类号： G06F11/34 , G06F11/30
CPC分类号： G06F11/3466 , G06F11/3636 , Y02D10/34
摘要： A method for easily tracing the execution of an application in a computer system having a plurality of computing nodes interconnected by high speed data links is disclosed. While executing the application on one or more of the computing nodes, trace data is collected into a separate temporary trace buffer coupled to each computing node. A trace transfer request event may be generated after collecting a portion of the trace data. The trace data is recorded on a designated recording and analysis computing node by transferring the trace data from each trace buffer to a recording buffer in the designated recording node in response to the transfer request by performing memory mapped write transfers initiated by each computing node that has collected trace data. The address of the recording buffer is memory mapped into an address space of each computing node that has collected trace data.
摘要翻译：公开了一种用于容易地跟踪具有通过高速数据链路互连的多个计算节点的计算机系统中的应用的执行的方法。当在一个或多个计算节点上执行应用程序时，跟踪数据被收集到耦合到每个计算节点的单独的临时跟踪缓冲器中。可以在收集跟踪数据的一部分之后生成跟踪传送请求事件。通过执行由每个计算节点发起的存储器映射的写入传送，通过将跟踪数据从每个跟踪缓冲器传送到指定记录节点中的记录缓冲器，记录在指定的记录和分析计算节点上收集跟踪数据。记录缓冲区的地址被存储器映射到已收集跟踪数据的每个计算节点的地址空间中。

28. 发明授权

US09009554B2 IC class T0-T2 taps with and without topology selection logic 有权
标题翻译： IC类T0-T2抽头，带和不带拓扑选择逻辑
公开(公告)号：US09009554B2
公开(公告)日：2015-04-14
申请号：US14340908
申请日：2014-07-25
申请人： Texas Instruments Incorporated
发明人： Gary L. Swoboda
IPC分类号： G01R31/28 , G01R31/3177 , G01R31/3185
CPC分类号： G01R31/3177 , G01R31/31701 , G01R31/31713 , G01R31/31723 , G01R31/31727 , G01R31/318533 , G01R31/318538 , G01R31/318544 , G06F11/22 , G06F11/267 , G06F11/27 , G06F11/36 , G06F11/3656 , G06F2201/88 , H04L43/50
摘要： Topology discovery of a target system having a plurality of components coupled with a scan topology may be performed by driving a low logic value on the data input signal and a data output signal of the scan topology. An input data value and an output data value for each of the plurality of components is sampled and recorded. A low logic value is then scanned through the scan path and recorded at each component. The scan topology may be determined based on the recorded data values and the recorded scan values.
摘要翻译：可以通过驱动数据输入信号上的低逻辑值和扫描拓扑的数据输出信号来执行具有与扫描拓扑结合的多个分量的目标系统的拓扑发现。对多个分量中的每一个的输入数据值和输出数据值进行采样和记录。然后通过扫描路径扫描低逻辑值，并记录在每个组件上。可以基于记录的数据值和记录的扫描值来确定扫描拓扑。

29. 发明申请

US20150019929A1 ALTERNATE SIGNALING MECHANISM USING CLOCK AND DATA 审中-公开
标题翻译：使用时钟和数据的替代信号机制
公开(公告)号：US20150019929A1
公开(公告)日：2015-01-15
申请号：US14504665
申请日：2014-10-02
申请人： Texas Instruments Incorporated
发明人： Gary L. Swoboda
IPC分类号： G01R31/3177
CPC分类号： G01R31/3177 , G01R31/31701 , G01R31/31713 , G01R31/31723 , G01R31/31727 , G01R31/318533 , G01R31/318538 , G01R31/318544 , G06F11/22 , G06F11/267 , G06F11/27 , G06F11/36 , G06F11/3656 , G06F2201/88 , H04L43/50
摘要： Control events may be signaled to a target system having a plurality of components coupled to a scan path by using the clock and data signals of the scan path. While the clock signal is held a high logic level, two or more edge transitions are detected on the data signal. The number of edge transitions on the data signal is counted while the clock signal is held at the high logic state. A control event is determined based on the counted number of edge transitions on the data signal after the clock signal transitions to the low logic state.
摘要翻译：控制事件可以通过使用扫描路径的时钟和数据信号被发信号通知具有耦合到扫描路径的多个分量的目标系统。当时钟信号保持高逻辑电平时，在数据信号上检测到两个或多个边沿转换。当时钟信号保持在高逻辑状态时，对数据信号上的边沿转换次数进行计数。基于在时钟信号转换到低逻辑状态之后数据信号上的边沿跃迁的计数数量来确定控制事件。

30. 发明授权

US08880926B2 Counter/gating producing technology specific function outputs from TCK and TMS(C) 有权
标题翻译： TCK和TMS（C）的计数器/门控产生技术特定功能输出
公开(公告)号：US08880926B2
公开(公告)日：2014-11-04
申请号：US13964574
申请日：2013-08-12
申请人： Texas Instruments Incorporated
发明人： Gary L. Swoboda
IPC分类号： G06F1/00 , G06F1/04 , G01R31/3185 , G01R31/3177
CPC分类号： G01R31/3177 , G01R31/31701 , G01R31/31713 , G01R31/31723 , G01R31/31727 , G01R31/318533 , G01R31/318538 , G01R31/318544 , G06F11/22 , G06F11/267 , G06F11/27 , G06F11/36 , G06F11/3656 , G06F2201/88 , H04L43/50
摘要： Control events may be signaled to a target system having a plurality of components coupled to a scan path by using the clock and data signals of the scan path. While the clock signal is held a high logic level, two or more edge transitions are detected on the data signal. The number of edge transitions on the data signal is counted while the clock signal is held at the high logic state. A control event is determined based on the counted number of edge transitions on the data signal after the clock signal transitions to the low logic state.
摘要翻译：控制事件可以通过使用扫描路径的时钟和数据信号被发信号通知具有耦合到扫描路径的多个分量的目标系统。当时钟信号保持高逻辑电平时，在数据信号上检测到两个或多个边沿转换。当时钟信号保持在高逻辑状态时，对数据信号上的边沿转换次数进行计数。基于在时钟信号转换到低逻辑状态之后数据信号上的边沿跃迁的计数数量来确定控制事件。

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