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21. 发明授权

US11211262B2 Electronic apparatus having inter-chip stiffener 有权
公开(公告)号：US11211262B2
公开(公告)日：2021-12-28
申请号：US16745278
申请日：2020-01-16
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Tuhin Sinha , Steven P. Ostrander , Bhupender Singh , Sylvain Ouimet
IPC分类号： H01L23/16 , H01L21/56 , H01L23/31 , G11C11/407 , H01L23/04
摘要： An electronic apparatus that includes a first semiconductor chip mounted on a substrate; a second semiconductor chip mounted on the substrate; a spacer attached to the substrate and situated between the first and second semiconductor chips; a lid mounted on the substrate and enclosing the first and second semiconductor chips and the spacer, the spacer having an adhesive material adhesively attached to the lid; and underfill material underneath the first and second semiconductor chips, underneath the spacer and between the spacer and the first and second semiconductor chips.

22. 发明申请

US20210391368A1 RELIABLE SEMICONDUCTOR PACKAGES 有权
公开(公告)号：US20210391368A1
公开(公告)日：2021-12-16
申请号：US17342546
申请日：2021-06-09
申请人： UTAC Headquarters Pte. Ltd.
发明人： Dennis Fernandez TRESNADO , Mario Arwin Simon FABIAN , Wedanni Linsangan MICLA , Allan Pumatong ILAGAN
IPC分类号： H01L27/146 , H01L23/04 , H01L23/00 , H01L23/10
摘要： Semiconductor packages and methods for forming thereof are disclosed. The semiconductor package includes a package substrate having a die attach region with a die attached thereto. A protective cover is disposed over a sensor region of the die and attached to the die by a cover adhesive. The cover adhesive may serve as a standoff structure to support the protective cover. The standoff structure may be configured to form multiple cavities below the protective cover to reduce thermal stress on the protective cover. An encapsulant is disposed to cover the package substrate while leaving the top package surface exposed.

23. 发明授权

US11195971B2 Glass wiring substrate, method of producing the same, part-mounted glass wiring substrate, method of producing the same, and display apparatus substrate 有权
公开(公告)号：US11195971B2
公开(公告)日：2021-12-07
申请号：US16996306
申请日：2020-08-18
申请人： SONY CORPORATION
发明人： Toshihiko Watanabe
IPC分类号： H01L23/04 , H01L23/48 , H05K7/00 , H01L33/20 , H01L33/62 , H05K3/18 , H05K3/42 , H05K1/02 , H05K1/18 , H05K3/14 , H05K1/11 , H01L27/12 , H01L27/15
摘要： A glass wiring substrate includes a glass substrate, a first wiring portion formed on a first surface of the glass substrate, a second wiring portion formed on a second surface opposite to the first surface, a through-hole formed in a region of the glass substrate in which the first wiring portion and the second wiring portion are not formed, the through-hole having a diameter on a second surface side larger than a diameter on a first surface side, and a through-hole portion formed in the through-hole, one end portion of the through-hole portion extending to the first wiring portion, the other end portion of the through-hole portion extending to the second wiring portion, in which a wiring pitch P1 of the first wiring portion in the vicinity of the through-hole portion is narrower than a wiring pitch P2 of the second wiring portion in the vicinity of the through-hole portion.

24. 发明申请

US20210375719A1 STACKED DIE ARCHITECTURES WITH IMPROVED THERMAL MANAGEMENT 有权
公开(公告)号：US20210375719A1
公开(公告)日：2021-12-02
申请号：US17399882
申请日：2021-08-11
申请人： Intel Corporation
发明人： Feras Eid , Shrenik Kothari , Chandra M. Jha , Johanna M. Swan , Michael J. Baker , Shawna M. Liff , Thomas L. Sounart , Betsegaw K. Gebrehiwot , Shankar Devasenathipathy , Taylor Gaines , Digvijay Ashokkumar Raorane
IPC分类号： H01L23/433 , H01L23/29 , H01L21/56 , H01L25/00 , H01L25/18 , H01L23/42 , H01L23/367 , H01L23/04 , H01L25/065 , H01L25/16 , H01L23/16
摘要： A semiconductor device that has a semiconductor die coupled to a substrate. A mold compound encapsulates the semiconductor die, and at least one thermal conductive material section extends from adjacent the semiconductor die through the mold compound. The at least one conductive material section thus conveys heat from the semiconductor die through the mold compound.

25. 发明授权

US11180364B2 Covering for a component and method for producing a covering for a component 有权
公开(公告)号：US11180364B2
公开(公告)日：2021-11-23
申请号：US15508820
申请日：2015-08-25
申请人： SNAPTRACK, INC.
发明人： Ansgar Schäufele
IPC分类号： B81B7/00 , H03H9/10 , B81C1/00 , H01L23/04 , B32B3/26 , B32B3/28 , H03H3/007 , H03H3/08
摘要： The invention relates to a covering (1) for an electronic component (e.g. of the MEMS, BAW, or SAW type). The covering comprises at least one layer (5, 6, 7) having a structure (19, 20, 21) with a number of prominences (8, 9, 15) and/or depressions (10, 11, 16). The invention furthermore relates to a method for producing a covering (1) of this type.

26. 发明授权

US11178771B2 Integrating Josephson amplifiers or Josephson mixers into printed circuit boards 有权
公开(公告)号：US11178771B2
公开(公告)日：2021-11-16
申请号：US16940556
申请日：2020-07-28
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Baleegh Abdo , Nicholas T. Bronn , Oblesh Jinka , Salvatore B. Olivadese
IPC分类号： H05K1/18 , G06N99/00 , G01R33/02 , H01L23/04 , H01L23/22 , H01L23/24 , G06N10/00 , H01L39/04 , H05K1/02 , H03D7/00 , H03F19/00 , H05K1/11 , H05K3/30 , H05K3/40 , H05K3/46 , H05K3/00
摘要： An aspect includes one or more board layers. A first chip cavity is formed within the one or more board layers, wherein a first Josephson amplifier or Josephson mixer is disposed within the first chip cavity. The first Josephson amplifier or Josephson mixer comprises at least one port, each port connected to at least one connector disposed on at least one of the one or more board layers, wherein at least one of the one or more board layers comprises a circuit trace formed on the at least one of the one or more board layers.

27. 发明申请

US20210305147A1 SEMICONDUCTOR DEVICE 有权
公开(公告)号：US20210305147A1
公开(公告)日：2021-09-30
申请号：US17001559
申请日：2020-08-24
申请人： KABUSHIKI KAISHA TOSHIBA , TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
发明人： Tomohiro IGUCHI , Tatsuya HIRAKAWA
IPC分类号： H01L23/498 , H01L23/04 , H01L23/31
摘要： A semiconductor device according to an embodiment includes: an insulating substrate having a first metal layer and a second metal layer on a surface of the insulating substrate; a semiconductor chip including an upper electrode and a lower electrode, the upper electrode being electrically connected to the first metal layer, the lower electrode being electrically connected to the second metal layer; a first main terminal including a first end and a second end, the first end being electrically connected to the first metal layer; a second main terminal including a third end and a fourth end, the third end being electrically connected to the second metal layer; a first detection terminal being electrically connected between the first end and the second end of the first main terminal; and a second detection terminal being electrically connected to the first metal layer.

28. 发明申请

US20210296188A1 SEMICONDUCTOR PACKAGE, TRANSPORT TRAY FOR THE SAME, AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE 有权
公开(公告)号：US20210296188A1
公开(公告)日：2021-09-23
申请号：US17250542
申请日：2019-06-25
申请人： C/O SONY SEMICONDUCTOR SOLUTIONS CORPORATION
发明人： SHOGO ONO
IPC分类号： H01L23/04 , H01L21/673 , H01L23/12 , H01L23/31 , H01L21/50
摘要： When a semiconductor package is stored in a transport tray and when a semiconductor package is transported by a transport tray, the semiconductor package comes into contact with the side wall of the transport tray, so that the end face of the semiconductor package is chipped and dust is generated from the end face of the semiconductor package. Provided is a technology for a semiconductor package that includes a multilayer structure having at least a synthetic resin layer and includes an outermost edge portion such that the end face of the synthetic resin layer protrudes outward compared to the end faces of the other layers constituting the multilayer structure.

29. 发明授权

US11127662B2 Semiconductor device 有权
公开(公告)号：US11127662B2
公开(公告)日：2021-09-21
申请号：US16483872
申请日：2018-03-14
申请人： ROHM CO., LTD.
发明人： Masaaki Matsuo , Kenji Hayashi , Akihiro Suzaki , Soichiro Takahashi , Masashi Hayashiguchi , Yoshihisa Tsukamoto
IPC分类号： H01L23/495 , H01L25/18 , H01L23/04 , H01L23/00
摘要： The disclosure provides a semiconductor device. The device includes first and second substrates, first mounting layers, second mounting layers, power supply terminals, an output terminal, electroconductive coupling members and switching elements. The first substrate has first obverse and reverse surfaces facing in a thickness direction. The second substrate has a second obverse surface facing as the first obverse surface faces in the thickness direction and a second reverse surface facing away from the second obverse surface. The second substrate is spaced from the first substrate in a first direction crossing the thickness direction. The first mounting layers are electrically conductive and disposed on the first obverse surface. The second mounting layers are electrically conductive and disposed on the second obverse surface. The power supply terminals are electrically connected to the first mounting layers. The output terminal is connected to one of the second mounting layers. The electroconductive coupling members are connected to the first and second mounting layers. The switching elements are mounted on the first and second mounting layers. Each of the electroconductive coupling members has strip sections and a connecting section. The strip sections extend in the first direction and are spaced in a second direction crossing the thickness direction and the first direction. The connecting section extends in the second direction to interconnect the strip sections. The strip sections are connected at one end to the first mounting layer and connected at another end to the second mounting layer.

30. 发明授权

US11127645B2 Grounding lids in integrated circuit devices 有权
公开(公告)号：US11127645B2
公开(公告)日：2021-09-21
申请号：US16446388
申请日：2019-06-19
申请人： NXP USA, inc.
发明人： Dwight Lee Daniels , Stephen Ryan Hooper , Michael B. Vincent
IPC分类号： H01L23/48 , H01L23/31 , H01L23/495 , H01L23/04 , H01L23/498 , H01L25/00 , H01L23/00 , H01L21/78 , H01L25/065 , H01L21/56
摘要： A semiconductor device includes a substrate, an IC die mounted on the substrate, packaging encapsulant on the substrate, a cavity in the packaging encapsulant, a conductive lid attached to the packaging encapsulant over the IC die, an electrical ground path in the substrate, and a first conductive structure in the cavity. The first conductive structure includes a first end electrically coupled to the conductive lid and a second end electrically coupled to the electrical ground path.

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