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21. 发明授权

US11631754B2 Method of fabricating semiconductor device 有权
公开(公告)号：US11631754B2
公开(公告)日：2023-04-18
申请号：US17339795
申请日：2021-06-04
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
发明人： Zhi-Chang Lin , Wei-Hao Wu , Jia-Ni Yu
IPC分类号： H01L29/66 , H01L23/535 , H01L29/78 , H01L29/08 , H01L29/06
摘要： A method includes forming an active fin using a hard mask as an etching mask, wherein the active fin comprises a source region, a drain region, and a channel region, the hard mask remains over the active fin after etching the semiconductive substrate, and the hard mask has a first portion vertically overlapping the source region of the active fin, a second portion vertically overlapping the channel region of the active fin, and a third portion vertically overlapping the drain region of the active fin. A sacrificial gate is formed over the second portion of the hard mask and the channel region of the active fin. The first and third portions of the hard mask are etched. After etching the first and third portions of the hard mask, a gate spacer is formed extending along sidewalls of the sacrificial gate, and the sacrificial gate is replaced with a replacement gate.

22. 发明授权

US11631675B2 Semiconductor memory structure and method for forming the same 有权
公开(公告)号：US11631675B2
公开(公告)日：2023-04-18
申请号：US17160871
申请日：2021-01-28
申请人： Winbond Electronics Corp.
发明人： Yu-Po Wang , Yi-Hao Chien , Hsiang-Po Liu
IPC分类号： H01L27/108 , H01L29/06
摘要： A semiconductor memory structure includes a semiconductor substrate including an active region and a chop region. The semiconductor memory structure also includes an isolation structure disposed in the chop region, a first gate structure extending at least through the isolation structure in the chop region, and a second gate structure extending at least through the active region. The semiconductor memory structure also includes a doped region disposed in the active region. A first distance between the doped region and the first gate structure is shorter than a second distance between the doped region and the second gate structure.

23. 发明授权

US11631671B2 3D complementary metal oxide semiconductor (CMOS) device and method of forming the same 有权
公开(公告)号：US11631671B2
公开(公告)日：2023-04-18
申请号：US17136820
申请日：2020-12-29
申请人： Tokyo Electron Limited
发明人： H. Jim Fulford , Anton J. Devilliers , Mark I. Gardner , Daniel Chanemougame , Jeffrey Smith , Lars Liebmann , Subhadeep Kal
IPC分类号： H01L27/092 , H01L29/06 , H01L29/423 , H01L29/66 , H01L29/786 , H01L29/16 , H01L21/8238
摘要： A method of fabricating a semiconductor device is provided. An initial stack of layers is formed over a substrate. The initial stack alternates between a first material layer and a second material layer that has a different composition from the first material layer. The initial stack is divided into a first stack and a second stack. First GAA transistors are formed in the first stack by using the first material layers as respective channel regions for the first GAA transistors and using the second material layers as respective replacement gates for the first GAA transistors. Second GAA transistors are formed in the second stack by using the second material layers as respective channel regions for the second GAA transistors and using the first material layers as respective replacement gates for the second GAA transistors. The second GAA transistors are vertically offset from the first GAA transistors.

24. 发明授权

US11631616B2 Semiconductor and method of fabricating the same 有权
公开(公告)号：US11631616B2
公开(公告)日：2023-04-18
申请号：US17370284
申请日：2021-07-08
申请人： Key Foundry Co., Ltd.
发明人： Young Bae Kim , Kwang Il Kim
IPC分类号： H01L21/8234 , H01L29/78 , H01L29/66 , H01L29/08 , H01L27/088 , H01L21/265 , H01L29/06 , H01L29/10 , H01L21/266
摘要： Provided are a semiconductor device, a method of manufacturing the same, and a method of forming a uniform doping concentration of each semiconductor device when manufacturing a plurality of semiconductor devices. When a concentration balance is disrupted due to an increase in doping region size, doping concentration is still controllable by using ion blocking patterns to provide a semiconductor device with uniform doping concentration and a higher breakdown voltage obtainable as a result of such doping.

25. 发明申请

US20230116857A1 ADVANCED HYBRID 3D STACKING FOR 3D ARCHITECTURAL DESIGN AND LAYOUT 有权
公开(公告)号：US20230116857A1
公开(公告)日：2023-04-13
申请号：US17881536
申请日：2022-08-04
申请人： Tokyo Electron Limited
发明人： Mark I. Gardner , H. Jim Fulford
IPC分类号： H01L29/06 , H01L27/06 , H01L29/417 , H01L29/786 , H01L21/8238
摘要： The solution provides structures and fabrication steps for manufacturing a device that includes a core comprising a dielectric material extending vertically from a substrate and a vertical shell having a cross-section having a rounded portion. The vertical shell can include an epitaxially grown semiconductor material that at least partially surrounds the core and forms a channel of a transistor. The core can include a second vertical shell including a second epitaxially grown semiconductor material that at least partially surrounds the core and forms a second channel of the transistor.

26. 发明申请

US20230116022A1 Hybrid Light Source System and Projection Display Device 有权
公开(公告)号：US20230116022A1
公开(公告)日：2023-04-13
申请号：US17603941
申请日：2020-12-15
申请人： CHENGDU XGIMI TECHNOLOGY CO., LTD.
发明人： Yixue CHEN , Lei YIN
IPC分类号： H01L29/78 , H01L29/06 , H01L29/16 , H01L21/265 , H01L21/266
摘要： The disclosure provides a hybrid light source system, the hybrid light source system includes a first light source group, a second light source group, and a bandpass filter. The first light source group and the second light source group emit light beams which are the same in color and different in wavelength range. An emergent direction of a light beam of the first light source group and an emergent direction of a light beam of the second light source group are perpendicular to each other. The bandpass filter is arranged on emergent light paths of the first light source group and the second light source group, an angle of 45 degrees is formed between the emergent direction of the light beam of the first light source group and the bandpass filter.

27. 发明申请

US20230115019A1 HYBRID SEMICONDUCTOR DEVICE 有权
公开(公告)号：US20230115019A1
公开(公告)日：2023-04-13
申请号：US18066511
申请日：2022-12-15
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Christopher Boguslaw KOCON , Henry Litzmann EDWARDS
IPC分类号： H01L29/78 , H01L29/40 , H01L29/417 , H01L29/45 , H01L29/16 , H01L29/20 , H01L29/66 , H01L29/06
摘要： A semiconductor device includes a switch element having a surface and first and second regions and including a first semiconductor material having a band-gap. The first region of the switch element is coupled to a source contact. A floating electrode has first and second ends. The first end of the floating electrode is coupled to the second region of the switch element. A voltage-support structure includes a second semiconductor material having a band-gap that is larger than the band-gap of the first semiconductor material. The voltage-support structure is in contact with the second end of the floating electrode. A drain contact is coupled to the voltage-support structure.

28. 发明申请

US20230111689A1 Nanowire Structures Having Non-Discrete Source and Drain Regions 有权
公开(公告)号：US20230111689A1
公开(公告)日：2023-04-13
申请号：US18081177
申请日：2022-12-14
申请人： Google LLC
发明人： Stephen M. Cea , Annalisa Cappellani , Martin D. Giles , Rafael Rios , Seiyon Kim , Kelin J. Kuhn
IPC分类号： H01L29/786 , H01L29/66 , H01L29/08 , H01L29/423 , H01L29/06 , H01L21/268 , H01L29/78
摘要： Nanowire structures having non-discrete source and drain regions are described. For example, a semiconductor device includes a plurality of vertically stacked nanowires disposed above a substrate. Each of the nanowires includes a discrete channel region disposed in the nanowire. A gate electrode stack surrounds the plurality of vertically stacked nanowires. A pair of non-discrete source and drain regions is disposed on either side of, and adjoining, the discrete channel regions of the plurality of vertically stacked nanowires.

29. 发明申请

US20230111142A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
公开(公告)号：US20230111142A1
公开(公告)日：2023-04-13
申请号：US17886049
申请日：2022-08-11
申请人： RENESAS ELECTRONICS CORPORATION
发明人： Katsumi EIKYU , Yuta NABUCHI , Atsushi SAKAI , Akihiro SHIMOMURA , Satoru TOKUDA
IPC分类号： H01L29/78 , H01L29/06 , H01L29/423 , H01L29/66
摘要： A semiconductor device includes a plurality of unit cells. Each of the plurality of unit cells has a pair of column regions, a pair of trenches formed between the pair of column regions in the X direction, and a pair of gate electrodes formed in the pair of trenches via a gate insulating film, respectively. The two unit cells adjacent in the X direction share one column region of the pair of column regions and are arranged to be symmetrical about the shared column region. Here, a distance between the two trenches, which are adjacent with the one column region interposed therebetween, of the trenches in the two adjacent unit cells is different from a distance between the pair of trenches in the one unit cell.

30. 发明授权

US11626514B2 Trench vertical power MOSFET with channel including regions with different concentrations 有权
公开(公告)号：US11626514B2
公开(公告)日：2023-04-11
申请号：US17007241
申请日：2020-08-31
申请人： Kabushiki Kaisha Toshiba , Toshiba Electronic Devices & Storage Corporation
发明人： Hiroyuki Kishimoto , Hiroaki Katou
IPC分类号： H01L29/78 , H01L29/66 , H01L27/088 , H01L29/06 , H01L29/423 , H01L29/40 , H01L29/08 , H01L29/10 , H01L29/417
摘要： A semiconductor device includes: a first semiconductor layer of first conductivity type; a second semiconductor layer of first conductivity type provided on the first semiconductor layer; a first semiconductor region of second conductivity type provided on the second semiconductor layer; a second semiconductor region of first conductivity type provided on the first semiconductor region; a first electrode provided in a first trench, the first trench reaching the second semiconductor layer from above the first semiconductor region, the first electrode facing the first semiconductor region via a first insulating film; a second electrode provided in a second trench, the second trench reaching the second semiconductor layer from above the first semiconductor region, the second electrode facing the first semiconductor region via a second insulating film; a third electrode including a first electrode portion, a second electrode portion provided on the first electrode portion and a third electrode portion provided on the second electrode portion, the first electrode portion being provided between the first trench and the second trench, the first electrode portion reaching the first semiconductor region from above the second semiconductor region, the first electrode portion being electrically connected to the first semiconductor region and the second semiconductor region; a third semiconductor region provided between the third electrode and the second semiconductor region provided between the first insulating film and the third electrode, the third semiconductor region having a higher concentration of impurities of second conductivity type than the first semiconductor region; a fourth semiconductor region provided between the third electrode and the second semiconductor region provided between the second insulating film and the third electrode, the fourth semiconductor region having a higher concentration of impurities of second conductivity type than the first semiconductor region; and a fifth semiconductor region provided between the first semiconductor region and the third electrode, the fifth semiconductor region being provided apart from the third semiconductor region and the fourth semiconductor region, the fifth semiconductor region having a higher concentration of impurities of second conductivity type than the first semiconductor region.

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