专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

41. 发明授权

US08644106B2 Shift circuit of a semiconductor device 有权
标题翻译：半导体器件的移位电路
公开(公告)号：US08644106B2
公开(公告)日：2014-02-04
申请号：US13220983
申请日：2011-08-30
申请人： Jeong-Tae Hwang
发明人： Jeong-Tae Hwang
IPC分类号： G11C8/00
CPC分类号： G11C7/1072 , G11C7/109 , G11C7/22 , G11C11/4076 , G11C11/408 , G11C11/4093
摘要： A shift circuit of a semiconductor device reduces the power consumption of the semiconductor device. The shift circuit comprises a plurality of shifters and a plurality of clock controllers. The plurality of shifters shifts an input signal in sequence in response to a clock. The plurality of clock each supply the clock to a corresponding shifter before an input of the corresponding shifter is activated and stop the supply of the clock to the corresponding shifter when an output of the corresponding shifter is activated.
摘要翻译：半导体器件的移位电路降低了半导体器件的功耗。移位电路包括多个移位器和多个时钟控制器。多个移位器响应于时钟顺序地移位输入信号。在对应的移位器的输入被激活之前，多个时钟将时钟提供给相应的移位器，并且当对应的移位器的输出被激活时，停止向对应的移位器提供时钟。

42. 发明授权

US08644092B2 Multi-chip package and method of operating the same 有权
标题翻译：多芯片封装和操作方法相同
公开(公告)号：US08644092B2
公开(公告)日：2014-02-04
申请号：US13243223
申请日：2011-09-23
申请人： Kyoung Nam Kim , Beom Ju Shin
发明人： Kyoung Nam Kim , Beom Ju Shin
IPC分类号： G11C7/06
CPC分类号： G11C29/26 , G11C2029/2602
摘要： A semiconductor memory device includes a memory cell array including first memory cells for storing data and second memory cells for storing chip identification (ID) information, a data comparison circuit configured to compare input data and the stored data of the first memory cells and to output comparison data, and output circuits configured to output the comparison data received in parallel from the data comparison circuit. The comparison data is outputted through a selected one of the output circuits according to an enable signal generated based on the chip ID information.
摘要翻译：半导体存储器件包括：存储单元阵列，包括用于存储数据的第一存储器单元和用于存储芯片识别信息的第二存储单元;数据比较电路，用于比较输入数据和第一存储单元的存储数据，并输出比较数据和输出电路，被配置为输出从数据比较电路并行接收的比较数据。根据基于芯片ID信息生成的使能信号，通过选择的一个输出电路输出比较数据。

43. 发明授权

US08643358B2 Oscillator 有权
标题翻译：振荡器
公开(公告)号：US08643358B2
公开(公告)日：2014-02-04
申请号：US13171046
申请日：2011-06-28
申请人： Jang Hwan Yoon
发明人： Jang Hwan Yoon
IPC分类号： G01R19/00
CPC分类号： G01R19/0092 , H03K3/0231 , H03L1/00
摘要： An oscillator includes a reference voltage generator configured to generate a reference voltage varying according a change in temperature and an external voltage, a first comparison voltage generator configured to output a first comparison voltage to a first node in response to the reference voltage, a second comparison voltage generator configured to output a second comparison voltage to a second node in response to the reference voltage, a first comparison circuit configured to compare the reference voltage and the first comparison voltage and to generate a first input voltage as a result of the comparison, a second comparison circuit configured to compare the reference voltage and the second comparison voltage and to generate a second input voltage as a result of the comparison, and a clock generator configured to output a clock signal that oscillates in response to the first and second input voltages.
摘要翻译：振荡器包括参考电压发生器，其被配置为产生根据温度变化和外部电压而变化的参考电压;第一比较电压发生器，被配置为响应于参考电压将第一比较电压输出到第一节点;第二比较电压发生器，其被配置为响应于参考电压将第二比较电压输出到第二节点;第一比较电路，被配置为比较所述参考电压和所述第一比较电压，并且作为所述比较的结果产生第一输入电压; 第二比较电路，被配置为比较参考电压和第二比较电压，并且作为比较的结果产生第二输入电压;以及时钟发生器，被配置为输出响应于第一和第二输入电压而振荡的时钟信号。

44. 发明授权

US08642428B2 Semiconductor device including line-type active region and method for manufacturing the same 有权
标题翻译：包括线型有源区的半导体器件及其制造方法
公开(公告)号：US08642428B2
公开(公告)日：2014-02-04
申请号：US12983119
申请日：2010-12-31
申请人： Kyung Do Kim
发明人： Kyung Do Kim
IPC分类号： H01L21/336
CPC分类号： H01L29/42328 , H01L27/10876
摘要： A semiconductor device having a line-type active region and a method for manufacturing the same are disclosed. The semiconductor device includes an active region configured in a successive line type, at least one active gate having a first width and crossing the active region, and an isolation gate having a second width different from the first width and being formed between the active gates. The isolation gate's width and the active gate's width are different from each other to guarantee a large storage node contact region, resulting in increased device operation characteristics (write characteristics).
摘要翻译：公开了一种具有线型有源区的半导体器件及其制造方法。半导体器件包括配置成连续线类型的有源区，具有第一宽度并与有源区交叉的至少一个有源栅极，以及具有不同于第一宽度的第二宽度并形成在有源栅极之间的隔离栅极。隔离栅极的宽度和有源栅极宽度彼此不同，以保证大的存储节点接触区域，从而增加器件工作特性（写入特性）。

45. 发明授权

US08625375B2 Temperature detection circuit of semiconductor memory apparatus 有权
标题翻译：半导体存储装置的温度检测电路
公开(公告)号：US08625375B2
公开(公告)日：2014-01-07
申请号：US13664971
申请日：2012-10-31
申请人： Hynix Semiconductor Inc.
发明人： Je-Yoon Kim , Jong C. Lee
IPC分类号： G11C7/04
CPC分类号： G11C7/04 , G11C11/406 , G11C11/40626
摘要： A temperature detection circuit of a semiconductor memory apparatus includes a fixed period oscillator, a temperature variable signal generating unit and a counting unit. The oscillator is configured to generate a fixed period oscillator signal when an enable signal is enabled. The temperature variable signal generating unit is configured to generate a temperature variable signal whose enable interval varies based on temperature variations, when the enable signal is enabled. The counting unit is configured to count the oscillator signal during the enable interval of the temperature variable signal to generate a temperature information signal.
摘要翻译：半导体存储装置的温度检测电路包括固定周期振荡器，温度可变信号发生单元和计数单元。振荡器被配置为当启用使能信号时产生固定周期振荡器信号。温度可变信号发生单元被配置为当使能信号被使能时，产生其使能间隔基于温度变化而变化的温度可变信号。计数单元被配置为在温度可变信号的使能间隔期间对振荡器信号进行计数，以产生温度信息信号。

46. 发明授权

US08625330B2 Nonvolatile memory apparatus and write control method thereof 有权
标题翻译：非易失性存储装置及其写入控制方法
公开(公告)号：US08625330B2
公开(公告)日：2014-01-07
申请号：US13331196
申请日：2011-12-20
申请人： Kyu Sung Kim
发明人： Kyu Sung Kim
IPC分类号： G11C11/00
CPC分类号： G11C13/0004 , G11C13/0061 , G11C13/0064
摘要： A nonvolatile memory apparatus includes a memory cell array, and a write operation controller configured to verify a write operation by comparing input data of the write operation controller to cell data written into the memory cell array, measure a resistance value after a first time is elapsed, and determine whether or not to re-perform the write operation according to the measured resistance value.
摘要翻译：非易失性存储装置包括存储单元阵列和写操作控制器，其被配置为通过将写操作控制器的输入数据与写入存储单元阵列的单元数据进行比较来验证写操作，测量经过第一次之后的电阻值，根据测定的电阻值判定是否重新进行写入动作。

47. 发明授权

US08624638B2 Semiconductor device including driving circuit 有权
公开(公告)号：US08624638B2
公开(公告)日：2014-01-07
申请号：US13446455
申请日：2012-04-13
申请人： Yong-Mi Kim
发明人： Yong-Mi Kim
IPC分类号： H03K3/00
CPC分类号： G11C7/1006 , G11C7/1057
摘要： A semiconductor device includes an information generation circuit configured to generate first information, an information multiplexing circuit configured to multiplex the first information and second information, and an information driving circuit configured to drive an output pad in response to an output signal of the information multiplexing circuit.

48. 发明授权

US08618605B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US08618605B2
公开(公告)日：2013-12-31
申请号：US13176395
申请日：2011-07-05
申请人： Yong Won Seo
发明人： Yong Won Seo
IPC分类号： H01L29/66
CPC分类号： H01L27/108 , H01L27/0688 , H01L27/10823 , H01L29/66484 , H01L29/7831
摘要： A semiconductor device includes a first gate electrode buried within a semiconductor substrate, a second gate electrode buried within a silicon growth layer disposed on the semiconductor substrate, and a bit line disposed on an interlayer insulating layer disposed on the semiconductor substrate between the first gate electrode and a second gate electrode. Therefore, the number of gates disposed in an active region is increased so that a total memory capacity of the semiconductor device, thereby reducing fabrication cost and improving productivity.
摘要翻译：半导体器件包括埋置在半导体衬底内的第一栅电极，埋在半导体衬底上的硅生长层内的第二栅电极，以及设置在半导体衬底上的位于第一栅极之间的层间绝缘层上的位线和第二栅电极。因此，增加设置在有源区域中的栅极的数量，使得半导体器件的总存储容量，从而降低制造成本并提高生产率。

49. 发明授权

US08599594B2 Nonvolatile memory device and operation method thereof 有权
标题翻译：非易失性存储器件及其操作方法
公开(公告)号：US08599594B2
公开(公告)日：2013-12-03
申请号：US13683331
申请日：2012-11-21
申请人： Hynix Semiconductor Inc.
发明人： Jin Su Park
IPC分类号： G11C15/00 , G11C11/34
CPC分类号： G11C15/046 , G11C16/0483 , G11C16/10
摘要： A nonvolatile memory device includes at least a memory cell block including memory cells that are coupled to a plurality of word lines, respectively, and store data; a content addressable memory (CAM) block including CAM cells that are coupled to the word lines, respectively, and store chip information for operations of the nonvolatile memory device; and a block switching circuit configured to couple the word lines with global word lines; and a voltage supply circuit coupled to the global word lines, for supplying a first read voltage to a selected global word line while supplying a first pass voltage to unselected global word lines in reading the memory cell block, and supplying a second read voltage to a selected global word line while supplying a second pass voltage to unselected global word lines in reading the CAM block, wherein the second pass voltage is lower than the first pass voltage.
摘要翻译：非易失性存储器件至少包括存储单元块，其包括分别耦合到多个字线的存储器单元并存储数据; 包括分别耦合到字线的CAM单元的内容可寻址存储器（CAM）块，并且存储用于非易失性存储器件的操作的芯片信息; 以及块切换电路，被配置为将所述字线与全局字线耦合; 以及耦合到全局字线的电压供应电路，用于在读取存储器单元块时向未选择的全局字线提供第一通过电压，同时向选定的全局字线提供第一读取电压，并将第二读取电压提供给同时在读取CAM块时向未选择的全局字线提供第二通过电压，其中第二通过电压低于第一通过电压。

50. 发明授权

US08598677B2 Semiconductor device including metal lines 失效
标题翻译：半导体装置包括金属线
公开(公告)号：US08598677B2
公开(公告)日：2013-12-03
申请号：US12842574
申请日：2010-07-23
申请人： Sang Soo Lee
发明人： Sang Soo Lee
IPC分类号： H01L21/70
CPC分类号： H01L23/5225 , H01L27/1052 , H01L27/10882 , H01L2924/0002 , H01L2924/00
摘要： Provided are a semiconductor device and a method for manufacturing the same. Since an additional space for forming a shield line is unnecessary, the critical dimension of metal lines is reduced, thereby improving data transfer characteristics, signaling characteristics and noise characteristics of the metal lines. The semiconductor device includes: a plurality of metal lines disposed on the semiconductor device; a plurality of insulation layers disposed on the metal lines; and a plurality of shield lines disposed between the insulation layers.
摘要翻译：提供半导体器件及其制造方法。由于不需要用于形成屏蔽线的附加空间，所以金属线的临界尺寸减小，从而提高金属线的数据传输特性，信号特性和噪声特性。半导体器件包括：设置在半导体器件上的多个金属线; 设置在所述金属线上的多个绝缘层; 以及设置在所述绝缘层之间的多个屏蔽线。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式