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    • 42. 发明授权
    • ATIP bit data generator and method for generating ATIP bit data in optical discs
    • ATIP位数据生成器和用于在光盘中生成ATIP位数据的方法
    • US06980500B2
    • 2005-12-27
    • US10302937
    • 2002-11-25
    • Ping-Hsing LuYao-Jen LiangChao-Long Tsai
    • Ping-Hsing LuYao-Jen LiangChao-Long Tsai
    • G11B7/00G11B7/005G11B7/007G11B20/14G11B27/24
    • G11B20/1403G11B7/24082G11B27/24G11B2020/1269
    • An ATIP (absolute time in pre-groove) bit data generator free from an uneven duty cycle. The ATIP bit data generator includes an analog processor, a high-frequency clock generator, a first decoder, a sync pattern detector, and a second decoder. The analog processor receives a signal generated from an optical pickup, and further processes the signal to generate an ATIP FM signal. The high-frequency clock generator provides a high-frequency clock using the ATIP FM signal as a reference signal. The first decoder receives the ATIP FM signal and the high-frequency clock and generates bi-phase data. The sync pattern detector receives the bi-phase data and the high-frequency clock, and generates a sync indication signal. The second decoder counts the pulse number of the high-frequency clock for each counting cycle, and the counting cycle includes a plurality of half periods of the ATIP FM signal. When the pulse number is smaller than a lower threshold value or greater than a upper threshold value, the second decoder outputs ATIP bit data with a first level. When the pulse number is between the lower threshold value and the upper threshold value, the second decoder outputs ATIP bit data with a second level.
    • ATIP(预槽中的绝对时间)位数据发生器不占用不均匀周期。 ATIP位数据发生器包括模拟处理器,高频时钟发生器,第一解码器,同步模式检测器和第二解码器。 模拟处理器接收从光学拾取器产生的信号,并进一步处理信号以产生ATIP FM信号。 高频时钟发生器使用ATIP FM信号作为参考信号提供高频时钟。 第一解码器接收ATIP FM信号和高频时钟并产生双相数据。 同步模式检测器接收双相数据和高频时钟,并产生同步指示信号。 第二解码器对每个计数周期的高频时钟的脉冲数进行计数,并且计数周期包括多个半周期的ATIP FM信号。 当脉冲数小于下阈值或大于上阈值时,第二解码器输出具有第一电平的ATIP位数据。 当脉冲数在下阈值和上阈值之间时,第二解码器输出具有第二电平的ATIP位数据。
    • 44. 发明申请
    • Copy protection of optical discs
    • 复印光盘保护
    • US20050270190A1
    • 2005-12-08
    • US11132896
    • 2005-05-19
    • Carmen Basile
    • Carmen Basile
    • G11B20/10G11B20/00G11B20/14H03M5/14H03M7/00
    • G11B20/00579G11B20/00086G11B20/1426G11B2020/1457G11B2020/1465
    • Subversive DSV (SDSV) sequences of data symbols having a large absolute value of DSV are extremely valuable in the copy protection of optical discs as they can induce uncorrectable read errors. However, very few SDSV sequences of data symbols can be found in multimodal codes such as Eight-to-Sixteen Modulation (ESM) utilised in DVDs. It is required to select data symbols, for encoding using a multimodal code, which are capable of forcing an encoder to produce at least one subversive sequence of code words. A possible code word for a data symbol is selected if the code word has a large absolute value of DSV and there are no alternative code words, or all alternative code words are equivalent, or all alternatives except one are ruled out by RLL rules.
    • 具有大的绝对值DSV的数据符号的颠覆性DSV(SDSV)序列在光盘的复制保护中是非常有价值的,因为它们可能引起不可校正的读取错误。 然而,数据符号的非常少的SDSV序列可以在诸如DVD中使用的8到16调制(ESM)的多模式代码中找到。 需要使用能够强制编码器产生至少一个代码字的颠覆序列的多模式代码来选择数据符号进行编码。 如果代码字具有较大的DSV绝对值,并且没有替代代码字,或者所有替代代码字都是等价的,则选择数据符号的可能代码字,否则除RLL规则排除的所有替代字除外。
    • 46. 发明申请
    • Method and apparatus for recording information in concatenated manner
    • 以连续方式记录信息的方法和装置
    • US20050268180A1
    • 2005-12-01
    • US11137382
    • 2005-05-26
    • Koubun Sakagami
    • Koubun Sakagami
    • G06F11/00G11B7/007G11B20/12G11B20/14H03M13/00
    • G11B20/1426
    • A method of recording data as presence/absence of marks on an information recording medium includes a step of obtaining data pieces, each of which has size of one block and is made by adding error-correction-purpose data to information data, a step of attaching to each of the data pieces a synchronizing signal that includes a portion having the marks and a portion having no mark, a step of recording the data pieces on the information recording medium in units of the one block inclusive of the synchronizing signal, and a step of placing a concatenation point at a predetermined position within the synchronizing signal when adding, or writing in an overwriting manner, the data pieces in units of the one block, the concatenation point defining a position at which said adding or said writing starts.
    • 将数据作为存在/不存在标记记录在信息记录介质上的方法包括获得每个具有一个块的大小并通过将纠错用途数据添加到信息数据而得到的数据的步骤,步骤 附加到每个数据片上的包括具有标记的部分和不具有标记的部分的同步信号,以包含该同步信号的一个单元为单位在信息记录介质上记录数据的步骤,以及 或者以叠加方式添加以一个块为单位的数据片段,将该连接点设置在同步信号内的预定位置,该级联点定义所述添加或所述写入开始的位置。
    • 48. 发明授权
    • Device and method for detecting a period of an input signal
    • 用于检测输入信号的周期的装置和方法
    • US06965659B2
    • 2005-11-15
    • US09917234
    • 2001-07-30
    • Jae-wook LeeDae-yun Shim
    • Jae-wook LeeDae-yun Shim
    • G11B20/16G11B20/10G11B20/14H04L7/033H04L7/00
    • G11B20/10037G11B20/10527G11B20/1403H04L7/0334
    • A device and method for detecting a period of an input signal including a count value setting portion; an A/D converter; a zero cross point detecting portion to detect a symbol change of digital values received from the A/D converter; a arithmetic processing unit; a counter; and a period value calculating portion. The arithmetic processing unit divides two sampling sectors, having a zero cross point in their center, by a preset value which is set in the count value setting portion, predicts a zero cross point sector based on the digital values of two sampling points, and calculates a count value of the reference clock in accordance with the predicted zero cross point sector and the preset value which is set in the count value setting portion.
    • 一种用于检测包括计数值设置部分的输入信号的周期的装置和方法; A / D转换器; 零交叉点检测部分,用于检测从A / D转换器接收的数字值的符号变化; 算术处理单元; 柜台 以及周期值计算部。 算术处理单元将在其中心具有零交叉点的两个采样扇区除以设定在计数值设定部分中的预设值,基于两个采样点的数字值预测零交叉点扇区,并计算 根据预测的零交叉点扇区的参考时钟的计数值和在计数值设定部分中设定的预设值。
    • 49. 发明授权
    • Dada decoding
    • 达达解码
    • US06963625B2
    • 2005-11-08
    • US09918834
    • 2001-08-01
    • William Redman-WhiteSimon D. Bramwell
    • William Redman-WhiteSimon D. Bramwell
    • G11B20/14G06G7/14G11B20/10G11B20/18H03M13/41H04D1/00H03M13/03
    • H03M13/3961G06G7/14H03M13/4107
    • An arrangement for selecting the largest of a plurality of input currents (pma (k−1), pmb (k−1)) and adding a further current (Ibmk) to the selected current, the arrangement comprising: a plurality of inputs (901, 902) for receiving said input currents; a further input (905) for receiving said further current; an output (906, 907) for delivering an output current proportional to the sum of the largest of the input currents and the further current; means for feeding each of the received input currents to the main current conducting path of a respective transistor, (T900, T902) each of the transistors having its control electrode connected to a common point; a respective follower transistor (T901, T903) connected between the input and the common point; and a mirror transistor (T904) having its control electrode connected to the common point for producing a current whose value is related to that of the largest input current.The currents through transistors (T904, T907) are summed and sensed by a diode connected transistor (T905) whose gate voltage is stored on a capacitor (C900, C901) by means of respective switches (S900, S901). The voltages across the capacitors (C900, C901) are fed via respective switches (S902, S903) to the gate electrodes of transistors (T908, T909) whose drain electrodes feed an output current (pmc (k−1)) to outputs (906, 907) of the arrangement.A plurality of such arrangements are used for producing path metric currents for a Viterbi decoder.
    • 一种用于选择多个输入电流中最大的输入电流(pma(k-1),pmb(k-1))并将另外的电流(Ibmk)加到所选择的电流的装置,该装置包括:多个输入端 ,902),用于接收所述输入电流; 用于接收所述另外的电流的另外的输入(905); 输出(906,907),用于传送与最大输入电流和另外的电流的和成比例的输出电流; 用于将每个所接收的输入电流馈送到相应晶体管的主电流传导路径(T 900,T 902)的装置,每个晶体管的控制电极连接到公共点; 连接在输入和公共点之间的相应跟随器晶体管(T 901,T 903) 以及其控制电极连接到公共点的反射镜晶体管(T 904),用于产生其值与最大输入电流的电流相关的电流。 通过晶体管(T 904,T 907)的电流由其栅极电压通过相应的开关存储在电容器(C 900,C 901)上的二极管连接的晶体管(T 905)被相加和感测(S 900,S 901 )。 电容器(C 900,C 901)上的电压通过各自的开关(S 902,S 903)馈送到晶体管(T 908,T 909)的栅电极,其漏电极馈送输出电流(pmc(k-1 ))到该装置的输出(906,907)。 多个这样的布置用于产生用于维特比解码器的路径度量电流。
    • 50. 发明授权
    • Digital data reproduction apparatus
    • 数字数据再现装置
    • US06963528B2
    • 2005-11-08
    • US10201939
    • 2002-07-25
    • Youichi Ogura
    • Youichi Ogura
    • G11B20/14G11B20/10H04B3/06G11B5/09
    • G11B20/10203G11B20/10009G11B20/10055G11B20/10111
    • In a digital data reproduction apparatus for demodulating digital data from an optical recording medium, PRML (Partial Response Maximum Likelihood) signal processing effective to high-density recording/reproduction is carried out by using a half rate processing offset control means which performs data demodulation using half of the channel bit frequency, a half rate processing phase sync control means, a half rate processing adaptive equalization means, and a half rate processing maximum likelihood decoder, and the digital data recorded on the optical recording medium are reproduced while restoring signal components which are missing in the time direction, by linear interpolation or Nyquist interpolation. Therefore, digital data reproduction performance is improved, and power consumption is reduced.
    • 在用于从光学记录介质解调数字数据的数字数据再现装置中,通过使用半速率处理偏移控制装置执行对高密度记录/再现有效的PRML(部分响应最大似然)信号处理,该半速率处理偏移控制装置使用 信道位频率的一半,半速率处理相位同步控制装置,半速率处理自适应均衡装置和半速率处理最大似然解码器,并且记录在光记录介质上的数字数据被再现,同时恢复信号分量, 在时间方向上丢失,通过线性插值或奈奎斯特插值。 因此,数字数据再现性能得以提高,功耗降低。