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51. 发明授权

US09094181B2 Communication system, data transmitter, and data receiver capable of detecting incorrect receipt of data 有权
标题翻译：通信系统，数据发送器和能够检测数据不正确接收的数据接收器
公开(公告)号：US09094181B2
公开(公告)日：2015-07-28
申请号：US13873941
申请日：2013-04-30
申请人： MEGACHIPS CORPORATION
发明人： Ryuichi Moriizumi
IPC分类号： H04L27/28 , H04L7/00 , H04L1/00 , H04L7/04 , G01R31/317 , G01R31/3187
CPC分类号： H04L7/0091 , G01R31/31715 , G01R31/3187 , H04L1/0061 , H04L2007/045
摘要： A transmitter cyclic pattern having a pattern length of N bits is generated and converted into an M-bit transmitter parallel data stream, where N≠M. A bit-sequence altered transmitter parallel data stream is generated by performing a transmitter altering process, converted into a serial data and transmitted together with a clock signal. The serial data is received and converted into an M-bit receiver parallel data stream, and a bit-sequence restored parallel data stream is generated by performing a process opposite to the transmitter altering process. A receiver cyclic pattern is generated by using bits in the bit-sequence restored parallel data stream and converted into an M-bit reference parallel data stream, and a bit-sequence altered reference parallel data stream is generated by performing a process same as the transmitter altering process and compared with the received parallel data to test if the data is correctly received.
摘要翻译：产生具有N位模式长度的发射机循环模式，并将其转换为M≠M的M位发射机并行数据流。通过执行发射机改变处理，转换成串行数据并与时钟信号一起传输，产生位序列改变的发射机并行数据流。串行数据被接收并转换成M位接收器并行数据流，并且通过执行与发送器改变处理相反的处理来生成比特序列恢复的并行数据流。通过使用比特序列恢复的并行数据流中的比特来生成接收机循环模式并将其转换成M比特参考并行数据流，并且通过执行与发射机相同的处理来生成比特序列改变的参考并行数据流更改流程并与收到的并行数据进行比较，以测试数据是否正确接收。

52. 发明申请

US20150200654A1 POWER SUPPLY IMPEDANCE OPTIMIZING APPARATUS 有权
标题翻译：电源阻抗优化设备
公开(公告)号：US20150200654A1
公开(公告)日：2015-07-16
申请号：US14599040
申请日：2015-01-16
申请人： MegaChips Corporation
发明人： Takashi Kawahara
IPC分类号： H03K3/013
CPC分类号： G06F1/263
摘要： In a power supply impedance optimizing apparatus, first and second noise detecting circuits detect noises of first and second power supplies by magnetic field coupling between bonding wires of the first and second power supplies and bonding wires for first and second noise detection. A noise determining circuit determines a noise level using a frequency component in each of one or more frequency ranges as extracted from each of the noises of the first and second power supplies. The noise determining circuit controls ON/OFF state of the first switch connected between pads of the first and second power supplies and the second switch connected between pins of the first and second power supplies based on a determination result of the noise level.
摘要翻译：在电源阻抗优化装置中，第一和第二噪声检测电路通过第一和第二电源的接合线和用于第一和第二噪声检测的接合线之间的磁场耦合来检测第一和第二电源的噪声。噪声确定电路使用从第一和第二电源的每个噪声提取的一个或多个频率范围中的每一个中的频率分量来确定噪声电平。噪声确定电路基于噪声电平的确定结果，控制连接在第一和第二电源的焊盘和连接在第一和第二电源的引脚之间的第二开关的第一开关的接通/断开状态。

53. 发明授权

US09082206B2 Image processing apparatus having a buffer memory for image data storage 有权
标题翻译：具有用于图像数据存储的缓冲存储器的图像处理装置
公开(公告)号：US09082206B2
公开(公告)日：2015-07-14
申请号：US13944238
申请日：2013-07-17
申请人： MEGACHIPS CORPORATION
发明人： Gen Sasaki
IPC分类号： G06T1/60 , H04N1/21 , H04N1/32 , H04N5/77 , H04N101/00
CPC分类号： G06T1/60 , H04N1/2112 , H04N1/2137 , H04N1/32491 , H04N5/772 , H04N2101/00 , H04N2201/3292
摘要： Two local buffers are provided between an image processing unit and an image compression and expansion unit for compression into a predetermined format. Write and read control units serve to alternately use the two local buffers. As a result, process flow starting from the image processing unit to generate compressed image data by the image compression and expansion unit requires no main memory, whereby high-speed image processing is allowed with low power consumption.
摘要翻译：在图像处理单元和用于压缩成预定格式的图像压缩和扩展单元之间提供两个本地缓冲器。写和读控制单元用于交替使用两个本地缓冲区。结果，从图像处理单元开始，通过图像压缩和扩展单元生成压缩图像数据的处理流程不需要主存储器，由此以低功耗允许高速图像处理。

54. 发明授权

US09082205B2 Image processing apparatus for processing image data to produce compressed image data and display data 有权
标题翻译：用于处理图像数据以产生压缩图像数据和显示数据的图像处理装置
公开(公告)号：US09082205B2
公开(公告)日：2015-07-14
申请号：US13944173
申请日：2013-07-17
申请人： MEGACHIPS CORPORATION
发明人： Gen Sasaki
IPC分类号： G06T1/60 , H04N1/21 , H04N1/32 , H04N5/77 , H04N101/00
CPC分类号： G06T1/60 , H04N1/2112 , H04N1/2137 , H04N1/32491 , H04N5/772 , H04N2101/00 , H04N2201/3292
摘要： Two local buffers are provided between an image processing unit and an image compression and expansion unit for compression into a predetermined format. Write and read control units serve to alternately use the two local buffers. As a result, process flow starting from the image processing unit to generate compressed image data by the image compression and expansion unit requires no main memory, whereby high-speed image processing is allowed with low power consumption.
摘要翻译：在图像处理单元和用于压缩成预定格式的图像压缩和扩展单元之间提供两个本地缓冲器。写和读控制单元用于交替使用两个本地缓冲区。结果，从图像处理单元开始，通过图像压缩和扩展单元生成压缩图像数据的处理流程不需要主存储器，由此以低功耗允许高速图像处理。

55. 发明申请

US20150086136A1 IMAGE SCALING PROCESSOR AND IMAGE SCALING PROCESSING METHOD 有权
标题翻译：图像缩放处理器和图像缩放处理方法
公开(公告)号：US20150086136A1
公开(公告)日：2015-03-26
申请号：US14487535
申请日：2014-09-16
申请人： MegaChips Corporation
发明人： Yusuke MIZUNO
IPC分类号： G06T3/40
CPC分类号： G06T3/4007
摘要： An image scaling processor includes: a coefficient computing circuit that calculates interpolation coefficients to be used in an image scaling process; a multiplier that multiplies input image data by the interpolation coefficients provided from the coefficient computing circuit such that the interpolation coefficients respectively correspond to input pixels constituting the input image data; an adder that iteratively adds pieces of multiplied data output from the multiplier and obtains a total sum of the pieces of multiplied data for a predetermined number of the input pixels; a selector that outputs a total sum of the multiplied data at a timing at which the total sum of the pieces of multiplied data is obtained for the predetermined number of the input pixels; and a shift circuit that shifts an output of the selector to adjust a bit count of the output image data to a bit count of the input image data.
摘要翻译：图像缩放处理器包括：系数计算电路，用于计算要在图像缩放处理中使用的内插系数; 乘法器，其将输入图像数据乘以从系数计算电路提供的内插系数，使得插值系数分别对应于构成输入图像数据的输入像素; 加法器，迭代地添加从乘法器输出的相乘数据，并获得预定数量的输入像素的相乘数据的总和; 选择器，在对于预定数量的输入像素获得相乘数据的总和的定时，输出相乘数据的总和; 以及移位电路，用于移位选择器的输出以将输出图像数据的位计数调整为输入图像数据的位数。

56. 发明申请

US20150061505A1 LUMINAIRE RECOGNITION DEVICE, LIGHTING SYSTEM, AND LUMINAIRE RECOGNITION METHOD 有权
标题翻译：灯光识别装置，照明系统和灯光识别方法
公开(公告)号：US20150061505A1
公开(公告)日：2015-03-05
申请号：US14388507
申请日：2013-03-22
申请人： MegaChips Corporation
发明人： Tomonobu Asami
IPC分类号： H05B37/02
CPC分类号： H05B37/0218 , G01J1/0228 , G01J1/0242 , G01J1/0437 , G01J1/32 , G01J1/4228 , G01J2001/4247 , H05B37/0245
摘要： A luminaire recognition device in a lighting system having multiple luminaires with a dimming function installed in a predetermined area is configured to be arranged at a predetermined location in an area for associating identification information and installation site of each luminaire. The luminaire recognition device includes a controller configured to control an illuminance of each luminaire through communication, a detector configured to detect a brightness at the predetermined location, a memory configured to store correlation information between a brightness and distance from the predetermined location to each luminaire, and a processor configured to change an illuminance of a luminaire to be searched by a defined amount with the controller, calculate a change in brightness detected by the detector, and recognize the luminaire to be searched among the multiple luminaires, based on the change and the correlation information.
摘要翻译：在具有安装在预定区域中的具有调光功能的多个灯具的照明系统中的灯具识别装置被配置为布置在用于关联每个照明器的识别信息和安装位置的区域中的预定位置处。照明器识别装置包括控制器，被配置为通过通信来控制每个灯具的照度;被配置为检测预定位置处的亮度的检测器;被配置为存储亮度和从预定位置到每个照明器的距离之间的相关信息的存储器，以及处理器，被配置为通过所述控制器改变要被搜索的照明器的照度，所述照度计算由所述检测器检测到的亮度变化，并基于所述改变识别所述多个灯具中要搜索的照明器，相关信息。

57. 发明申请

US20150012968A1 INFORMATION PROCESSING SYSTEM 有权
标题翻译：信息处理系统
公开(公告)号：US20150012968A1
公开(公告)日：2015-01-08
申请号：US14321041
申请日：2014-07-01
申请人： MegaChips Corporation
发明人： Takahiko SUGAHARA
IPC分类号： G06F21/44
CPC分类号： G06F21/445 , G06F12/14 , G06F12/1408 , G06F21/10 , G06F21/44 , H04L9/3271 , H04L9/3273 , H04L2209/60
摘要： The communication device sends an authentication code (N) to a semiconductor memory to instruct the semiconductor memory to authenticate the communication device. The semiconductor memory authenticates the communication device based on the authentication code (N), and if the communication device is determined to be valid, sends an authentication code (N+1) to the communication device to instruct the communication device to authenticate the semiconductor memory in response to the authentication code (N). The communication device authenticates the semiconductor memory based on the authentication code (N+1).
摘要翻译：通信设备向半导体存储器发送认证码（N），以指示半导体存储器认证通信设备。半导体存储器基于认证码（N）认证通信装置，并且如果确定通信装置有效，则向通信装置发送认证码（N + 1），以指示通信装置认证半导体存储器响应于认证码（N）。通信装置基于认证码（N + 1）认证半导体存储器。

58. 发明申请

US20140320522A1 IMAGE PROCESSING APPARATUS HAVING A PLURALITY OF IMAGE PROCESSING BLOCKS THAT ARE CAPABLE OF REAL-TIME PROCESSING OF AN IMAGE SIGNAL 审中-公开
标题翻译：具有能够实时图像信号处理的图像处理块的图像处理装置
公开(公告)号：US20140320522A1
公开(公告)日：2014-10-30
申请号：US14328234
申请日：2014-07-10
申请人： MegaChips Corporation
发明人： Gen SASAKI
IPC分类号： G06T11/00 , G06T5/00
CPC分类号： G06T11/001 , G06T3/40 , G06T5/00 , G06T5/002 , G06T5/009 , H04N1/409 , H04N1/56 , H04N5/23229 , H04N5/772 , H04N5/907 , H04N9/045 , H04N9/68 , H04N9/735 , H04N9/77 , H04N2101/00
摘要： An image processing apparatus is provided which offers higher versatility than conventional image processing apparatuses. When an input signal to a spatial filtering block is a monochrome signal that contains Y component only, a selector selects its input terminal and a selector selects its input terminal. Then, a low-pass filter output signal of a programmable spatial filter is inputted to a spatial filter, and a low-pass filter output signal of the spatial filer is inputted to a spatial filter. That is, the programmable spatial filter and the spatial filters are connected in series (in cascade), and the cascade-connected three spatial filters perform filtering operation. In this example, low-pass filters with 5H5 taps are connected in cascade in three stages, which enables low-pass filtering with 13H13 taps.
摘要翻译：提供了一种图像处理装置，其提供比常规图像处理装置更高的通用性。当空间滤波块的输入信号是仅包含Y分量的单色信号时，选择器选择其输入端，选择器选择其输入端。然后，将可编程空间滤波器的低通滤波器输出信号输入到空间滤波器，并将空间滤波器的低通滤波器输出信号输入到空间滤波器。也就是说，可编程空间滤波器和空间滤波器串联（级联），级联连接的三个空间滤波器执行滤波操作。在这个例子中，具有5H5抽头的低通滤波器分三级连接，这使得能够利用13H13抽头进行低通滤波。

59. 发明申请

US20140286532A1 HUMAN DETECTION DEVICE 有权
标题翻译：人体检测装置
公开(公告)号：US20140286532A1
公开(公告)日：2014-09-25
申请号：US14222952
申请日：2014-03-24
申请人： MegaChips Corporation
发明人： Yusuke MIZUNO , Shohei NOMOTO , Yujiro TANI , Yuki HARAGUCHI
IPC分类号： G06K9/00
CPC分类号： G06K9/00369
摘要： In a human detection device 1, an edge extractor 11 carries out edge extraction processing to an input image 21 and produces a horizontal edge image 22. A shoulder detector 12 detects a shoulder center and a shoulder width of a person included in the input image 21. A foot detector 13 detects a foot position of the person based on the detected shoulder center and shoulder width. A top detector 14 detects a top position of the person based on the detected shoulder center and shoulder width. A size determiner 15 determines a horizontal size of the person based on the detected shoulder width and determines a vertical size of the person based on the detected foot position and top position. The size determiner 15 produces human range data 28 including the determined sizes, the shoulder center position, the foot position, and the top position.
摘要翻译：在人体检测装置1中，边缘提取器11对输入图像21进行边缘提取处理，并生成水平边缘图像22.肩部检测器12检测包括在输入图像21中的人的肩部中心和肩部宽度足部检测器13基于检测到的肩部中心和肩部宽度来检测人的脚位置。顶部检测器14基于检测到的肩部中心和肩部宽度来检测人的顶部位置。尺寸确定器15基于检测到的肩宽来确定人的水平尺寸，并且基于检测到的脚位置和顶部位置来确定人的垂直尺寸。尺寸确定器15产生包括确定的尺寸，肩中心位置，脚位置和顶部位置的人类范围数据28。

60. 发明申请

US20130235235A1 DATA TRANSFER APPARATUS AND DATA TRANSFER METHOD 有权
标题翻译：数据传输设备和数据传输方法
公开(公告)号：US20130235235A1
公开(公告)日：2013-09-12
申请号：US13785234
申请日：2013-03-05
申请人： MEGACHIPS CORPORATION
发明人： Kazuma TAKAHASHI
IPC分类号： H04N5/217
CPC分类号： H04N5/2173 , H04N5/3572
摘要： A data transfer apparatus includes a cache memory having a storing portion for writing and reading data at a higher speed than an image data storing portion which stores image data GD of an input image, and data transfer request means for outputting, to the cache memory, a transfer request for image data in a certain region of the input image. The cache memory reads unstored image data from the image data storing portion beyond a reading region corresponding to a transfer request every pixel row if image data in a pixel row included in the reading region is not stored in the storing portion of the cache memory. Moreover, the data transfer request means sequentially gives, in arrangement order in a horizontal direction of an input image, a transfer request for image data in each of reading regions arranged in the horizontal direction.
摘要翻译：数据传送装置包括：高速缓存存储器，具有用于以比存储输入图像的图像数据GD的图像数据存储部分更高的速度写入和读取数据的存储部分;以及数据传送请求装置，对输入图像的特定区域中的图像数据的传送请求。如果读取区域中包括的像素行中的图像数据未被存储在高速缓冲存储器的存储部分中，则高速缓冲存储器从每个像素行读取与图像数据存储部分相对应的读取区域的未分配图像数据。此外，数据传送请求装置按照排列顺序在输入图像的水平方向上顺序地给出沿水平方向布置的每个读取区域中的图像数据的传送请求。

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