会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 52. 发明授权
    • Power conversion device
    • 电源转换装置
    • US08436573B2
    • 2013-05-07
    • US13357843
    • 2012-01-25
    • Nobuhiko UryuTakashi Suzuki
    • Nobuhiko UryuTakashi Suzuki
    • H02P27/04H02P6/00H02P6/12H02P27/00H02P7/00H02H7/08H02M1/14H02M7/44
    • B62D5/046B62D5/0403
    • A power conversion device includes a first inverter circuit and a second inverter circuit, a capacitor, and a microcomputer. The microcomputer switches a control operation, according to the steering state of a steering wheel, between a first state where a first duty center value is shifted to be lower than an output center value and a second duty center value is shifted to be higher than the output center value, and a second state where the first duty center value is shifted to be higher than the output center value and the second duty center value is shifted to be lower than the output center value. This can reduce a difference in heat loss between FETs while reducing the ripple current of the capacitor.
    • 电力转换装置包括第一逆变器电路和第二逆变器电路,电容器和微型计算机。 微型计算机根据方向盘的转向状态在第一占空中心值偏移到低于输出中心值的第一状态和第二占空中心值之间切换控制操作,使其高于 输出中心值以及第一占空中心值偏移到高于输出中心值,第二占空中心值偏移到低于输出中心值的第二状态。 这可以减少FET之间的热损失差异,同时减小电容器的纹波电流。
    • 58. 发明申请
    • PROCESSOR AND CONTROL METHOD OF PROCESSOR
    • 处理器的处理器和控制方法
    • US20130080749A1
    • 2013-03-28
    • US13591383
    • 2012-08-22
    • Toshiro ItoTakashi Suzuki
    • Toshiro ItoTakashi Suzuki
    • G06F9/38
    • G06F9/3851G06F9/3806G06F9/3844G06F9/3848
    • A processor includes: first selectors that select instruction addresses of instructions of a plurality of threads or a branch target address of a branch instruction to be predicted and that output addresses of the plurality of threads; a second selector that selects one of the addresses of the plurality of threads output by the first selectors; a branch prediction circuit that predicts and outputs a branch direction, which indicates whether the branch instruction of the address selected by the second selector is branched, based on the selected address in a first cycle stage and that predicts and outputs the branch target address of the branch instruction to be predicted based on the selected address in a second cycle stage later than the first cycle stage; and a thread arbitration circuit that controls selection of the addresses of the threads by the first selectors and the second selector.
    • 处理器包括:第一选择器,其选择多个线程的指令的指令地址或要预测的分支指令的分支目标地址以及所述多个线程的输出地址; 第二选择器,其选择由所述第一选择器输出的所述多个线程的地址之一; 分支预测电路,其基于所述第一周期阶段中选择的地址来预测并输出分支方向,所述分支方向指示由所述第二选择器选择的所述地址的分支指令是否分支,并且预测并输出所述分支目标地址 在比第一循环阶段晚的第二循环阶段中基于所选择的地址预测的分支指令; 以及线程仲裁电路,其控制由第一选择器和第二选择器选择线程的地址。