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    • 51. 发明申请
    • Communication method
    • 沟通方式
    • US20060256803A1
    • 2006-11-16
    • US10526959
    • 2005-01-07
    • Tsuneo NakataMasahiro Ono
    • Tsuneo NakataMasahiro Ono
    • H04L12/56
    • H04L1/1642H04L1/1887
    • A first identifier for identifying each flow belonging to a first group relating to a sequencing, a first sequential number, said first sequential number being unique within each flow of the first group flow, a second identifier for identifying a flow relating to a retransmitting control, and a second sequential number, said second sequential number being unique within each flow belonging to the second group flow, are affixed to a transmission packet to transmit it. A receiving node makes a request for retransmission based upon the second identifier and the second sequential number, and a transmitting node retransmits its packet. Also, in the sequencing of the packets, the receiving node takes a sequencing of the packet based upon the first identifier and the first sequential number.
    • 用于识别属于与排序相关的第一组的每个流的第一标识符,第一序列号,所述第一序列号在第一组流的每个流中是唯一的,用于标识与重传控制有关的流的第二标识符, 以及第二序列号,所述第二序列号在属于第二组流的每个流中是唯一的,被附加到传输分组以进行传输。 接收节点基于第二标识符和第二序列号进行重传请求,并且发送节点重新发送其分组。 此外,在分组的排序中,接收节点基于第一标识符和第一序列号对分组进行排序。
    • 52. 发明授权
    • Method for generating test patterns for use with a scan circuit
    • 用于产生用于扫描电路的测试图案的方法
    • US5588008A
    • 1996-12-24
    • US966338
    • 1992-10-26
    • Tsuneo Nakata
    • Tsuneo Nakata
    • G01R31/3183G06F11/22H04B1/52
    • G01R31/318371G01R31/318307
    • A method for generating a test pattern for use with a scan circuit utilized in detecting a degenerative failure in a synchronous sequential circuit including a memory element unit, having a scan register, and a combination circuit unit for receiving an external input and inputting a value from the memory element unit, and for supplying an external output and outputting a value to the memory element unit. The method includes generating, for an undetected failure, a test pattern for use in a combinational circuit. The method also includes generating a test pattern series for detecting a different failure by observing its external output value and by changing the external input value with the value set in a scan register of the memory element unit.
    • 一种用于产生用于检测包括具有扫描寄存器的存储元件单元的同步顺序电路中的退化故障的扫描电路的测试图案的方法,以及用于接收外部输入并输入值的组合电路单元 存储元件单元,并且用于提供外部输出并将值输出到存储元件单元。 该方法包括为未检测到的故障产生用于组合电路中的测试图案。 该方法还包括通过观察其外部输出值来产生用于检测不同故障的测试图案系列,并且通过在存储元件单元的扫描寄存器中设置的值来改变外部输入值。
    • 54. 发明申请
    • SPEED ESTIMATION METHOD, SPEED ESTIMATION APPARATUS, SPEED ESTIMATION SYSTEM AND RECORDING MEDIUM OF CONTROL PROGRAM OF SPEED ESTIMATION APPARATUS
    • 速度估计方法,速度估计装置,速度估计系统和速度估计装置控制程序的记录介质
    • US20120320780A1
    • 2012-12-20
    • US13580420
    • 2011-04-15
    • Tsuneo Nakata
    • Tsuneo Nakata
    • H04L12/26
    • H04L43/0894H04L43/10
    • In order to enable to judge validity of a measurement result of a transmission rate, a speed estimation method transmits a data packet and probe packets before and after the data packet to a measured section which is a target for measurement of a transmission rate, estimates a transmission rate of a measured section based on a first receiving interval which is a receiving interval between the probe packets transmitted through the measured section just before and immediately after the data packet and a data volume of the data packet, and determines validity of a transmission rate by comparing a second receiving interval which is a receiving interval between the probe packets which have passed the measured section continuously in a state that a data packet does not exist in between them in a measured section and a first receiving interval.
    • 为了能够判断传输速率的测量结果的有效性,速度估计方法将数据分组之前和之后的数据分组和探测分组发送到作为传输速率测量目标的测量部分,估计 基于作为在数据包之前和之后经过测量部分发送的探测包之间的接收间隔的第一接收间隔和数据包的数据卷的测量部分的传输速率,并且确定传输速率的有效性 通过比较在测量部分中的数据分组在它们之间不存在的状态下连续通过测量部分的探测分组之间的接收间隔的第二接收间隔和第一接收间隔。
    • 55. 发明授权
    • Verification supporting apparatus, verification supporting method, and computer product
    • 验证支持设备,验证支持方式和计算机产品
    • US08015519B2
    • 2011-09-06
    • US12335105
    • 2008-12-15
    • Akio MatsudaRyosuke OishiKoichiro TakayamaTsuneo NakataRafael Kazumiti Morizawa
    • Akio MatsudaRyosuke OishiKoichiro TakayamaTsuneo NakataRafael Kazumiti Morizawa
    • G06F17/50
    • G06F17/504
    • In a verification supporting apparatus, a recording unit records a DIRW matrix in which a state transition possibly occurring in a register of a circuit to be verified and information concerning validity of a path corresponding to the state transition are set and an acquiring unit acquires a control data flow graph that includes a control flow graph having a data flow graph written therein. When a register is designated for verification, a data flow graph having described therein the designated register is extracted from the control data flow graph. From the data flow graph extracted, a path indicating the flow of data concerning the register is extracted. The state transition of the path extracted is identified and if the state transition is determined to be is set in the DIRW matrix, information concerning the validity set in the DIRW matrix and the path are correlated, and output.
    • 在验证支持装置中,记录单元记录其中可能发生在待验证电路的寄存器中可能发生的状态转换的DIRW矩阵和关于与状态转换相对应的路径的有效性的信息,并且获取单元获取控制 数据流图包括其中写入数据流图的控制流图。 当指定用于验证的寄存器时,从控制数据流程图中提取其中描述的指定寄存器的数据流图。 从提取的数据流图中,提取指示关于寄存器的数据流的路径。 识别提取的路径的状态转换,并且如果在DIRW矩阵中设置状态转换,则将与DIRW矩阵和路径中设置的有效性有关的信息相关并输出。
    • 56. 发明授权
    • Method and apparatus for verifying specification, and computer product
    • 用于验证规格的方法和装置以及计算机产品
    • US07937680B2
    • 2011-05-03
    • US11214848
    • 2005-08-31
    • Qiang ZhuRyosuke OishiTsuneo NakataTakashi Hasegawa
    • Qiang ZhuRyosuke OishiTsuneo NakataTakashi Hasegawa
    • G06F17/50G06F21/00G06Q20/00
    • G06F8/10G06Q20/4012
    • An apparatus for verifying a specification includes a use-case extracting unit, a first setting unit, an operation extracting unit, a second setting unit, and a determining unit. The use-case extracting unit extracts an unprocessed use case from specification data. The first setting unit sets a condition based on a precondition, a postcondition, and an invariant condition for the use case. The operation extracting unit selects an event flow of an unprocessed path from the specification data and extracts an unprocessed operation (description) from the event flow selected. The second setting unit sets a precondition and a postcondition for the operation based on the extracted operation (description). The determining unit determines whether the invariant condition is valid.
    • 用于验证规范的装置包括用例提取单元,第一设置单元,操作提取单元,第二设置单元和确定单元。 用例提取单元从规范数据中提取未处理的用例。 第一设置单元基于用例的前提条件,后置条件和不变条件设置条件。 操作提取单元从指定数据中选择未处理路径的事件流,并从所选择的事件流中提取未处理的操作(描述)。 第二设定单元基于提取的操作(描述)设置操作的前提条件和后置条件。 确定单元确定不变条件是否有效。
    • 59. 发明申请
    • DESIGN SUPPORT APPARATUS
    • 设计支持设备
    • US20100153074A1
    • 2010-06-17
    • US12628349
    • 2009-12-01
    • Hitoshi YANAMIHirokazu AnaiTsuneo NakataHidenao Iwane
    • Hitoshi YANAMIHirokazu AnaiTsuneo NakataHidenao Iwane
    • G06F17/50
    • G06F17/11G06F2217/08
    • A design support apparatus for determining a plurality of objective functions for modeling an object having a plurality of elements, each of the elements providing variable geometrical parameters, the design support apparatus includes a memory for storing the variable geometrical parameters and a processor for executing a process including: determining boundary information associated with specified geometrical parameters of the elements which indicate a state of contact between the elements, dividing the variable geometrical parameters into a plurality of groups on the basis of the boundary information, and determining the plurality of objective functions for each of the groups by using the variable geometrical parameters.
    • 一种用于确定多个目标函数的设计支持装置,用于对具有多个元素的对象进行建模,所述对象具有提供可变几何参数的每个元素,所述设计支持设备包括用于存储可变几何参数的存储器和用于执行过程 包括:确定与所述元件的指定几何参数相关联的边界信息,所述边界信息指示所述元件之间的接触状态,基于所述边界信息将所述可变几何参数划分为多个组,以及确定所述多个目标函数 的组合通过使用可变几何参数。
    • 60. 发明申请
    • PACKET RECOVERY METHOD, COMMUNICATION SYSTEM, INFORMATION PROCESSING DEVICE, AND PROGRAM
    • 分组恢复方法,通信系统,信息处理设备和程序
    • US20100046520A1
    • 2010-02-25
    • US12439901
    • 2007-09-04
    • Tsuneo Nakata
    • Tsuneo Nakata
    • H04L12/56
    • H04L1/1867H04L1/1809H04L1/1896H04L2001/0096
    • A packet recovery method of the present invention is a packet recovery method upon loss of a plurality of packets transmitted from a first node 111 to second node 112 through a network in the order of sequence numbers assigned to each of said packets, wherein second node 112, upon detection of a loss of a packet transmitted from first node 111, transmits an acknowledgement message, including a sequence number of a packet whose receipt has been confirmed or whose loss has been detected and including information on the lost packet, to first node 111 through the network. Then, first node 111, upon receipt of the acknowledgement message from second node 112, assigns a sequence number that is different from that of any of the plurality of packets to a retransmission packet which is a packet to be retransmitted, and subsequently, transmits an acknowledgement-to-acknowledgement message attached to the retransmission packet through the network for notifying that the acknowledgement message has been received to second node 112.
    • 本发明的分组恢复方法是在按照分配给每个所述分组的序列号的顺序通过网络丢失从第一节点111发送到第二节点112的多个分组时的分组恢复方法,其中第二节点112 在检测到从第一节点111发送的分组的丢失时,向第一节点111发送包括其接收已被确认的分组的序列号或其丢失已经被检测并且包括丢失分组的信息的确认消息 通过网络。 然后,第一节点111在从第二节点112接收到确认消息后,将与多个分组中的任一个不同的序列号分配给作为要重发的分组的重发分组,并且随后发送 通过网络附加到重传分组的确认确认消息,用于通知确认消息已被接收到第二节点112。