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    • 53. 发明申请
    • BUFFER CIRCUIT, RECEIVER, BASE STATION AND MOBILE DEVICE
    • US20220200554A1
    • 2022-06-23
    • US17131824
    • 2020-12-23
    • Intel Corporation
    • Martin CLARAGiacomo CASCIO
    • H03F3/45H03F1/30
    • A buffer circuit is provided. The buffer circuit includes a Current Differencing Transconductance Amplifier (CDTA) comprising a first input node and a second input node each configured to receive a respective one of a first signal and a second signal. The buffer circuit further includes a first source follower circuit coupled to a first output node of the CDTA and configured to generate a first buffer output signal based on a first output signal of the CDTA. Additionally, the buffer circuit includes a second source follower circuit coupled to a second output node of the CDTA and configured to generate a second buffer output signal based on a second output signal of the CDTA. The buffer circuit further includes a first feedback path comprising at least one of a first resistive element and a first capacitive element. The first feedback path couples an output node of the first source follower circuit to the first input node of the CDTA. In addition, the buffer circuit includes a second feedback path comprising at least one of a second resistive element and a second capacitive element. The second feedback path couples an output node of the second source follower circuit to the second input node of the CDTA.