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51. 发明申请

US20220164252A1 ERROR CORRECTING CODES FOR MULTI-MASTER MEMORY CONTROLLER 有权
公开(公告)号：US20220164252A1
公开(公告)日：2022-05-26
申请号：US17670582
申请日：2022-02-14
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Abhijeet Ashok CHACHAD , David Matthew THOMPSON , Son Hung TRAN
IPC分类号： G06F11/10 , H03M13/15 , G06F9/38 , G06F12/0879 , G06F9/30 , G06F9/46 , G06F9/448 , G06F9/48 , G06F9/52 , G06F12/0811 , G06F13/16
摘要： An apparatus includes a central processing unit (CPU) core and a cache subsystem coupled to the CPU core. The cache subsystem includes a memory configured to store a line of data and an error correcting code (ECC) syndrome associated with the line of data, where the ECC syndrome is calculated based on the line of data and the ECC syndrome is a first type ECC. The cache subsystem also includes a controller configured to, in response to a request from a master configured to implement a second type ECC, the request being directed to the line of data, transform the first type ECC syndrome for the line of data to a second type ECC syndrome send a response to the master. The response includes the line of data and the second type ECC syndrome associated with the line of data.

52. 发明授权

US11341052B2 Multi-processor, multi-domain, multi-protocol, cache coherent, speculation aware shared memory and interconnect 有权
公开(公告)号：US11341052B2
公开(公告)日：2022-05-24
申请号：US16653179
申请日：2019-10-15
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Kai Chirca , Matthew David Pierson , Timothy David Anderson , Joseph Zbiciak
IPC分类号： G06F3/00 , G06F12/084 , G06F12/0811 , G06F12/1009 , G06F12/0875 , G06F12/10 , G06F13/16 , G06F13/40 , G06F12/0855 , G06F12/06 , G06F12/0817 , G06F12/0831 , G06F13/12 , G06F3/06 , G06F12/0815 , H03M13/01 , H03M13/09 , H03M13/15 , H03M13/27 , G06F9/30 , G06F9/38 , G06F9/48 , G06F9/50 , G06F12/0891 , G06F12/0846 , G06F12/0862
摘要： A device includes an interconnect and a plurality of devices connected to the interconnect. The plurality of devices includes a first interface connected to the interconnect and a second interface connected to the interconnect. The plurality of devices further includes a first memory bank connected to the interconnect and a second memory bank connected to the interconnect. The plurality of devices further includes an external memory interface connected to the interconnect and a controller configured to establish virtual channels among the plurality of devices connected to the interconnect.

53. 发明申请

US20220158762A1 WIRELESS COMMUNICATION BASE STATION APPARATUS, WIRELESS COMMUNICATION TERMINAL, COMMUNICATION METHOD OF A WIRELESS COMMUNICATION BASE STATION APPARATUS AND COMMUNICATION METHOD OF A WIRELESS COMMUNICATION TERMINAL 有权
公开(公告)号：US20220158762A1
公开(公告)日：2022-05-19
申请号：US17590761
申请日：2022-02-01
申请人： Panasonic Intellectual Property Corporation of America
发明人： Yutaka MURAKAMI , Shutai OKAMURA , Kiyotaka KOBAYASHI , Masayuki ORIHASHI , Kazuaki TAKAHASHI
IPC分类号： H04L1/00 , H04L1/22 , H04L5/00 , H04L27/00 , H03M13/15 , H04L27/36 , H04L27/38
摘要： A transmitter apparatus wherein a simple structure is used to successfully suppress the degradation of error rate performance that otherwise would be caused by fading or the like. There are included encoding parts that encode transport data; a mapping part that performs such a mapping that encoded data sequentially formed by the encoding parts are not successively included in the same symbol, thereby forming data symbols; and a symbol interleaver that interleaves the data symbols. In this way, a low computational complexity can be used to perform an interleaving process equivalent to a bit interleaving process to effectively improve the reception quality at a receiving end.

54. 发明申请

US20220158657A1 Forward Error Correction Coding Using a Tree Structure 有权
公开(公告)号：US20220158657A1
公开(公告)日：2022-05-19
申请号：US17425396
申请日：2020-06-30
申请人： Ciena Corporation
发明人： Shahab OVEIS GHARAN , Mohammad Ehsan SEIFI , Kim ROBERTS
IPC分类号： H03M13/11 , H03M13/15 , H03M13/13 , H03M13/09 , H03M13/00
摘要： A transmitter (200) generates (602) an encoded vector (404) by encoding (406) a data vector (402), the encoded vector representing payload information and parity information. The encoding is mathematically equivalent to calculating three or more forward error correction (FEC) codewords from the data vector and then calculating the encoded vector from the codewords, at least one codeword being calculated from at least one recursion of a mathematical operation, and at least one codeword comprising more than 6 terms. The transmitter transmits (604) a signal representing the encoded vector over a communication channel. A receiver (300) determines (702) a vector estimate (502) from the signal and recovers (716) the data vector from the vector estimate by sequentially decoding (706, 710, 714) the codewords, wherein at least one codeword that is decoded earlier in the decoding enhances an estimate of at least one codeword that is decoded later in the decoding.

55. 发明授权

US11336862B2 Apparatus and method for transceiving broadcast signal 有权
公开(公告)号：US11336862B2
公开(公告)日：2022-05-17
申请号：US17387675
申请日：2021-07-28
申请人： LG ELECTRONICS INC.
发明人： Minsung Kwak , Sungryong Hong , Woosuk Ko , Woosuk Kwon , Jangwon Lee , Kyoungsoo Moon
IPC分类号： H04N7/088 , H04N21/235 , H04N21/236 , H04L1/00 , H04L29/08 , H04N21/434 , H03M13/00 , H03M13/25 , H03M13/29 , H03M13/27 , H03M13/11 , H04L29/06 , H04N21/2362 , H04N21/2665 , H04N21/858 , H04W4/06 , H04L1/04 , H03M13/15 , H04L67/02 , H04L65/611 , H04L65/60 , H04L65/65 , H04L65/80 , H04L67/146
摘要： A method for transmitting a broadcast signal according to an embodiment of the present invention comprises generating service layer signaling information for discovery and acquisition of a broadcast service and a content component of the broadcast service; generating service list information including for service list building and discovery of the service layer signaling information; and physical layer processing of the service list information, service layer signaling information, and content component.

56. 发明授权

US11334431B2 System and method for data protection in solid-state drives 有权
公开(公告)号：US11334431B2
公开(公告)日：2022-05-17
申请号：US17026761
申请日：2020-09-21
申请人： ALIBABA GROUP HOLDING LIMITED
发明人： Shu Li
IPC分类号： G06F11/00 , G06F11/10 , H03M13/15
摘要： The present disclosure relates to a system and a method for data protection. In some embodiments, an exemplary method for data encoding includes: receiving a data bulk; performing an erasure coding (EC) encoding on the data bulk to generate one or more EC codewords; distributing a plurality of portions of each EC codeword of the one or more EC codewords across a plurality of solid-state drives (SSDs); performing, at each SSD of the plurality of SSDs, an error correction coding (ECC) encoding on portions of the one or more EC codewords distributed to the SSD to generate an ECC codeword; and storing, in each SSD of the plurality of SSDs, the ECC codeword.

57. 发明授权

US11327689B1 Storage unit including memories of different operational speeds for optimizing data storage functions 有权
公开(公告)号：US11327689B1
公开(公告)日：2022-05-10
申请号：US17099916
申请日：2020-11-17
申请人： Pure Storage, Inc.
发明人： Bruno Hennig Cabral , Joseph M. Kaczmarek , Ravi V. Khadiwala , Ilya Volvovski
IPC分类号： G06F11/00 , G06F3/06 , G06F11/10 , G06F11/14 , H04L101/604 , H04L67/1097 , H03M13/11 , H03M13/37 , H03M13/15 , G06F9/48 , G06F9/50 , G06F12/0866 , G06F12/0891 , G06F15/173 , H03M13/00 , H04L29/06 , H04L61/45
摘要： A computing device includes an interface configured to interface and communicate with a dispersed storage network (DSN), a memory that stores operational instructions, and a processing module operably coupled to the interface and memory such that the processing module, when operable within the computing device based on the operational instructions, is configured to perform various operations. A computing device receives a data access request for an encoded data slice (EDS) associated with a data object. The computing device compares a slice name of the data access request with slice names stored within RAM. When the data access request slice name compares unfavorably with those stored slice names, the computing device transmits an empty data access response that includes no EDS to the other computing device without needing to access a hard disk drive (HDD) that stores EDSs. Alternatively, the computing device transmits a data access response that includes the EDS.

58. 发明授权

US11323133B2 Flash memory apparatus and storage management method for flash memory 有权
公开(公告)号：US11323133B2
公开(公告)日：2022-05-03
申请号：US16896210
申请日：2020-06-09
申请人： Silicon Motion, Inc.
发明人： Tsung-Chieh Yang , Hong-Jung Hsu
IPC分类号： H03M13/09 , H03M13/00 , G11C16/10 , G06F11/10 , G11C11/56 , H03M13/15 , G11C16/26
摘要： A flash memory storage management method includes: providing a flash memory module including single-level-cell (SLC) blocks and at least one multiple-level-cell block such as MLC block, TLC block, or QLC block; classifying data to be programmed into groups of data; respectively executing SLC programming and RAID-like error code encoding to generate corresponding parity check codes, to program the groups of data and corresponding parity check codes to the SLC blocks; when completing program of the SLC blocks, performing an internal copy to program the at least one multiple-level-cell block by sequentially reading and writing the groups of data and corresponding parity check codes from the SLC blocks to the multiple-level-cell block according to a storage order of the SLC blocks.

59. 发明申请

US20220131558A1 Method for constructing an n-qubit fault tolerant encode for any k-qubit quantum gate, M, in any given quantum code [n, k, C] 有权
公开(公告)号：US20220131558A1
公开(公告)日：2022-04-28
申请号：US17511626
申请日：2021-10-27
申请人： National Applied Research Laboratories
发明人： Zheng-Yao Su , Ming-Chung Tsai
IPC分类号： H03M13/15 , G06N10/00
摘要： A method for constructing an n-qubit fault tolerant encode for any k-qubit quantum gate M, in any given quantum code [n, k, C], comprising: choosing a number n−k of independent spinors Sr from the first stabilizer C and a first ordered set SC consists of the independent spinors Sr; choosing a number n−k of independent spinors Ŝr from a second stabilizer Ĉ in the intrinsic coordinate and a second ordered set Ŝr consists of the independent spinors Ŝr consist; implementing an encoding Qen, wherein the encoding Qen converts the first ordered set SC to the second ordered set SĈ, wherein the encoding Qen is a sequential product provided by sequential operations of a number n−k of unitary operators Qr; wherein each of the unitary operator Qr is composed of a single s-rotation or a product of two s-rotations; and wherein the encoding Qen converts and maps the rth independent spinor Sr in the first ordered set SC to the rth independent spinor Ŝr in the second ordered set SĈ correspondingly; a fault tolerant action Û in the quantum code [n, k, C] generated by the second stabilizer Ĉ in the intrinsic coordinate, wherein the fault tolerant action Û is a direct sum of a basis state operator Λ and a correction operator Ω; and acquiring a fault tolerant encode in the quantum code [n, k, C] generated by the first stabilizer C, wherein the fault tolerant encode is a sequential product of the encoding Qen, the fault tolerant action Û and a complex conjugate Qen† of the encoding Qen.

60. 发明授权

US11316533B2 Data processing device and data processing method 有权
公开(公告)号：US11316533B2
公开(公告)日：2022-04-26
申请号：US16854501
申请日：2020-04-21
申请人： Saturn Licensing LLC
发明人： Ryoji Ikegaya , Makiko Yamamoto , Yuji Shinohara
IPC分类号： H03M13/11 , H03M13/03 , H03M13/25 , H03M13/27 , H03M13/29 , H03M13/35 , H04L1/00 , G06F11/10 , H03M13/00 , H03M13/15
摘要： The present technology relates to a data processing device and a data processing method, which are capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code in which a code length N is 16200 bits and an encoding rate r is 6/15, 8/15, or 10/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of the LDPC code that has undergone the group-wise interleave is restored to an original sequence. For example, the present technology can be applied to a technique of performing data transmission using an LDPC code.

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