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61. 发明授权

US09338452B2 Motion vector difference coding extension for enhancement layer 有权
标题翻译：增强层的运动矢量差分编码扩展
公开(公告)号：US09338452B2
公开(公告)日：2016-05-10
申请号：US13934542
申请日：2013-07-03
申请人： QUALCOMM Incorporated
发明人： Krishnakanth Rapaka , Jianle Chen , Marta Karczewicz
IPC分类号： H04N19/523 , H04N19/52 , H04N19/51 , H04N19/30 , H04N19/59
CPC分类号： H04N19/51 , H04N19/30 , H04N19/52 , H04N19/523 , H04N19/59
摘要： An apparatus for coding video information according to certain aspects includes a memory unit and a processor in communication with the memory unit. The memory unit stores difference video information associated with a difference video layer of pixel information derived from a difference between an enhancement layer and a corresponding base layer of the video information. The processor determines pixel accuracy of motion predictor information, determines a motion vector based on the pixel accuracy of the motion predictor information, and determines a value of a video unit based at least in part on the motion vector.
摘要翻译：根据某些方面的用于编码视频信息的装置包括存储器单元和与存储器单元通信的处理器。存储单元存储与视频信息的增强层和对应的基本层之间的差异导出的像素信息的差异视频层相关联的差分视频信息。处理器确定运动预测器信息的像素精度，基于运动预测器信息的像素精度确定运动矢量，并且至少部分地基于运动矢量确定视频单元的值。

62. 发明申请

US20160100189A1 INTRA BC AND INTER UNIFICATION 有权
标题翻译： INTRA BC和INTER UNI
公开(公告)号：US20160100189A1
公开(公告)日：2016-04-07
申请号：US14876699
申请日：2015-10-06
申请人： QUALCOMM Incorporated
发明人： Chao Pang , Ye-Kui Wang , Krishnakanth Rapaka , Vadim Seregin , Marta Karczewicz
IPC分类号： H04N19/593 , H04N19/176 , H04N19/44 , H04N19/186 , H04N19/513 , H04N19/70
CPC分类号： H04N19/593 , H04N19/176 , H04N19/186 , H04N19/44 , H04N19/513 , H04N19/52 , H04N19/70
摘要： In general, the disclosure describes techniques related to block vector coding for Intra Block Copy and Inter modes. In one example, the disclosure is directed to a video coding device comprising a memory configured to store video data and one or more processors. The video coding device is configured to determine a reference picture used for coding the current video block and determine a picture order count (POC) value for the reference picture. In response to the POC value for the reference picture being equal to a POC value for a current picture that includes the current video block, the video coding device sets a value of a syntax element to indicate that a reference picture list includes the current picture. Otherwise, the video coding device sets the value of the syntax element to indicate that the reference picture list does not include the current picture.
摘要翻译：通常，本公开描述了与块内复制和帧间模式的块向量编码有关的技术。在一个示例中，本公开涉及一种视频编码设备，包括被配置为存储视频数据的存储器和一个或多个处理器。视频编码装置被配置为确定用于对当前视频块进行编码的参考图像，并且确定参考图像的图像顺序计数（POC）值。响应于参考图像的POC值等于包括当前视频块的当前图像的POC值，视频编码装置设置语法元素的值以指示参考图片列表包括当前图片。否则，视频编码装置设置语法元素的值，以指示参考图片列表不包括当前图片。

63. 发明授权

US09294776B2 Parallel processing for video coding 有权
标题翻译：并行处理视频编码
公开(公告)号：US09294776B2
公开(公告)日：2016-03-22
申请号：US14196538
申请日：2014-03-04
申请人： QUALCOMM Incorporated
发明人： Krishnakanth Rapaka , Xiang Li , Jianle Chen , Ye-Kui Wang , Wei Pu
IPC分类号： H04N7/12 , H04N19/17 , H04N19/50 , H04N19/503 , H04N19/70 , H04N19/80 , H04N19/82 , H04N19/33 , H04N19/436
CPC分类号： H04N19/17 , H04N19/33 , H04N19/436 , H04N19/50 , H04N19/503 , H04N19/70 , H04N19/80 , H04N19/82
摘要： In one example, a device for coding video data includes a video coder configured to code, for a tile of an enhancement layer picture, data indicating a number of tiles in a base layer picture that need to be coded before the tile of the enhancement layer picture can be coded, code tiles of the base layer picture corresponding to the number of tiles, and, after coding the tiles of the base layer picture, code the tile of the enhancement layer picture substantially in parallel with at least one other tile in the base layer picture.
摘要翻译：在一个示例中，用于编码视频数据的设备包括：视频编码器，被配置为针对增强层图像的块编码指示在增强层的平铺之前需要被编码的基本层图像中的瓦片的数量的数据可以对图像进行编码，对应于瓦片数量的基本图层图像的代码图块，并且在对基本图层图像的图块进行编码之后，将增强层图像的图块基本上与至少一个其它图块并行地编码基层图片。

64. 发明授权

US09277212B2 Intra mode extensions for difference domain intra prediction 有权
标题翻译：用于差分域内预测的内部模式扩展
公开(公告)号：US09277212B2
公开(公告)日：2016-03-01
申请号：US13935402
申请日：2013-07-03
申请人： QUALCOMM Incorporated
发明人： Krishnakanth Rapaka , Jianle Chen , Marta Karczewicz
IPC分类号： H04N7/12 , H04N7/16 , H04N19/103 , H04N19/176 , H04N19/70 , H04N19/147 , H04N19/46 , H04N19/30 , H04N19/196 , H04N19/593 , H04N19/11 , H04N19/187
CPC分类号： H04N19/103 , H04N19/11 , H04N19/147 , H04N19/176 , H04N19/187 , H04N19/196 , H04N19/30 , H04N19/46 , H04N19/593 , H04N19/70
摘要： An apparatus for coding video information according to certain aspects includes a memory unit and a processor in communication with the memory unit. The memory unit stores difference video information associated with a difference video layer of pixel information derived from a difference between an enhancement layer and a corresponding base layer of the video information. The processor determines a DC prediction value for a video unit associated with the difference video layer while refraining from using pixel information from a neighboring area of the video unit, wherein the DC prediction value is equal to zero or is offset by an offset value. The DC prediction value is a prediction value used in intra prediction based at least on an average of neighboring video units of the video unit. The processor further determines a value of the video unit based at least in part on the DC prediction value.
摘要翻译：根据某些方面的用于编码视频信息的装置包括存储器单元和与存储器单元通信的处理器。存储单元存储与视频信息的增强层和对应的基本层之间的差异导出的像素信息的差异视频层相关联的差分视频信息。处理器在禁止使用来自视频单元的相邻区域的像素信息的同时，确定与差分视频层相关联的视频单元的DC预测值，其中DC预测值等于零或被偏移值偏移。 DC预测值是至少基于视频单元的相邻视频单元的平均值在帧内预测中使用的预测值。处理器还至少部分地基于DC预测值来确定视频单元的值。

65. 发明授权

US09247242B2 Skip transform and residual coding mode extension for difference domain intra prediction 有权
标题翻译：用于差分域内预测的跳变换和残差编码模式扩展
公开(公告)号：US09247242B2
公开(公告)日：2016-01-26
申请号：US13935393
申请日：2013-07-03
申请人： QUALCOMM Incorporated
发明人： Krishnakanth Rapaka , Jianle Chen , Marta Karczewicz
IPC分类号： H04N19/103 , H04N19/176 , H04N19/70 , H04N19/147 , H04N19/46 , H04N19/30 , H04N19/196 , H04N19/593 , H04N19/11 , H04N19/187
CPC分类号： H04N19/103 , H04N19/11 , H04N19/147 , H04N19/176 , H04N19/187 , H04N19/196 , H04N19/30 , H04N19/46 , H04N19/593 , H04N19/70
摘要： An apparatus for coding video information according to certain aspects includes a memory unit and a processor in communication with the memory unit. The memory unit stores difference video information associated with a difference video layer of pixel information derived from a difference between an enhancement layer and a corresponding base layer of the video information. The processor determines a value of a video unit based on the difference video layer. The processor is further configured to refrain from performing a transform and residual coding of the determined value of the video unit.
摘要翻译：根据某些方面的用于编码视频信息的装置包括存储器单元和与存储器单元通信的处理器。存储单元存储与视频信息的增强层和对应的基本层之间的差异导出的像素信息的差异视频层相关联的差分视频信息。处理器基于差异视频层来确定视频单元的值。处理器还被配置为不执行对所确定的视频单元的值的变换和残差编码。

66. 发明申请

US20150319449A1 PARTITIONING SCHEMES IN MULTI-LAYER VIDEO CODING 有权
标题翻译：多层视频编码中的分区方案
公开(公告)号：US20150319449A1
公开(公告)日：2015-11-05
申请号：US14700982
申请日：2015-04-30
申请人： QUALCOMM Incorporated
发明人： Adarsh Krishnan Ramasubramonian , Ye-Kui Wang , Fnu Hendry , Krishnakanth Rapaka
IPC分类号： H04N19/44 , H04N19/48
CPC分类号： H04N21/4516 , H04N19/127 , H04N19/157 , H04N19/187 , H04N19/29 , H04N19/30 , H04N19/39 , H04N19/436 , H04N19/44 , H04N19/48 , H04N19/66 , H04N19/70 , H04N19/85 , H04N21/234327 , H04N21/816
摘要： A video decoder is configured to decode a bitstream that comprises an encoded representation of video data. As part of decoding the bitstream, the video decoder obtains, from the bitstream, one or more syntax elements indicating one or more partitioning schemes. For each respective partitioning scheme of the one or more partitioning schemes, the respective partitioning scheme specifies a respective set of disjoint partitions whose union forms an output layer set. Each respective partition of the respective set of disjoint partitions contains one or more of the layers. The video decoder is further configured to decode each of the partitions of a particular partitioning scheme using different processing cores in a plurality of hardware cores, the particular partitioning scheme being one of the one or more partitioning schemes.
摘要翻译：视频解码器被配置为对包括视频数据的编码表示的比特流进行解码。作为对比特流进行解码的一部分，视频解码器从比特流获得指示一个或多个分割方案的一个或多个语法元素。对于一个或多个分区方案的每个相应的分区方案，相应的分区方案指定相互组合的不相交分区，其组合形成输出层集合。相应组的不相交分区的每个相应分区包含一个或多个层。视频解码器还被配置为使用多个硬件核心中的不同处理核心对特定分区方案的每个分区进行解码，该特定分区方案是一个或多个分区方案之一。

67. 发明申请

US20150256857A1 FLICKER DETECTION AND MITIGATION IN VIDEO CODING 有权
标题翻译：在视频编码中的闪烁检测和缓解
公开(公告)号：US20150256857A1
公开(公告)日：2015-09-10
申请号：US14638965
申请日：2015-03-04
申请人： QUALCOMM Incorporated
发明人： Rajan Laxman Joshi , Xiang Li , Marta Karczewicz , Krishnakanth Rapaka
IPC分类号： H04N19/86 , H04N19/154 , H04N19/463 , H04N19/14 , H04N19/13 , H04N19/172
CPC分类号： H04N19/86 , H04N19/11 , H04N19/13 , H04N19/14 , H04N19/154 , H04N19/172 , H04N19/176 , H04N19/27 , H04N19/463
摘要： A device configured to code video data includes: a memory configured to store video data, and at least one processor. The at least one processor is configured to: code information indicating whether a block from a current picture will flicker. A determination of whether the block from the current picture will flicker is based on the block in the current picture in a display order and a collocated block from a next picture in the display order.
摘要翻译：被配置为对视频数据进行编码的设备包括：被配置为存储视频数据的存储器和至少一个处理器。所述至少一个处理器被配置为：编码指示来自当前图片的块是否闪烁的信息。确定来自当前图片的块是否闪烁是基于显示顺序中当前图片中的块和来自下一图像的并置块。

68. 发明申请

US20140355692A1 HYPOTHETICAL REFERENCE DECODER MODEL AND CONFORMANCE FOR CROSS-LAYER RANDOM ACCESS SKIPPED PICTURES 有权
标题翻译：横向参考解码器模型和符合跨层随机访问的图像
公开(公告)号：US20140355692A1
公开(公告)日：2014-12-04
申请号：US14293829
申请日：2014-06-02
申请人： QUALCOMM Incorporated
发明人： Adarsh Krishnan Ramasubramonian , Ye-Kui Wang , Ying Chen , Krishnakanth Rapaka
IPC分类号： H04N19/46 , H04N19/70
CPC分类号： H04N19/46 , H04N19/30 , H04N19/573 , H04N19/58 , H04N19/597 , H04N19/70
摘要： A device may determine, based on a value, whether all cross-layer random access skipped (CL-RAS) pictures of an intra random access point (IRAP) access unit are present in a video data bitstream. In addition, the device may reconstruct pictures of the video data based at least in part on syntax elements decoded from the video data bitstream.
摘要翻译：设备可以基于值来确定在视频数据比特流中是否存在内部随机接入点（IRAP）访问单元的所有跨层随机访问跳过（CL-RAS）图像。此外，设备可以至少部分地基于从视频数据比特流解码的语法元素来重构视频数据的图像。

69. 发明申请

US20140254669A1 PARALLEL PROCESSING FOR VIDEO CODING 有权
标题翻译：并行处理视频编码
公开(公告)号：US20140254669A1
公开(公告)日：2014-09-11
申请号：US14196538
申请日：2014-03-04
申请人： QUALCOMM Incorporated
发明人： Krishnakanth Rapaka , Xiang Li , Jianle Chen , Ye-Kui Wang , Wei Pu
IPC分类号： H04N19/503
CPC分类号： H04N19/17 , H04N19/33 , H04N19/436 , H04N19/50 , H04N19/503 , H04N19/70 , H04N19/80 , H04N19/82
摘要： In one example, a device for coding video data includes a video coder configured to code, for a tile of an enhancement layer picture, data indicating a number of tiles in a base layer picture that need to be coded before the tile of the enhancement layer picture can be coded, code tiles of the base layer picture corresponding to the number of tiles, and, after coding the tiles of the base layer picture, code the tile of the enhancement layer picture substantially in parallel with at least one other tile in the base layer picture.
摘要翻译：在一个示例中，用于编码视频数据的设备包括：视频编码器，被配置为针对增强层图像的块编码指示在增强层的平铺之前需要被编码的基本层图像中的瓦片的数量的数据可以对图像进行编码，对应于瓦片数量的基本图层图像的代码图块，并且在对基本图层图像的图块进行编码之后，将增强层图像的图块基本上与至少一个其它图块并行地编码基层图片。

70. 发明申请

US20140177704A1 MULTI-TYPE PARALLELIZED SAMPLE ADAPTIVE OFFSET IN VIDEO CODING 审中-公开
标题翻译：多种类型并行样本自适应偏移视频编码
公开(公告)号：US20140177704A1
公开(公告)日：2014-06-26
申请号：US14134765
申请日：2013-12-19
申请人： QUALCOMM Incorporated
发明人： Wei Pu , Jianle Chen , Krishnakanth Rapaka , In Suk Chong , Marta Karczewicz
IPC分类号： H04N19/132 , H04N19/117 , H04N19/186 , H04N19/44 , H04N19/17
摘要： In general, techniques are described for performing multiple passes of sample adaptive offset (SAO) filtering when coding video data. A video decoding device comprising one or more processors may perform the techniques. The processors may determine a first SAO pixel classification for a block of video data and determine a first offset value based on the first SAO pixel classification and one or more pixel values of the block. The one or more processors may also determine a second SAO pixel classification for the block and determine a second offset value based on the second SAO pixel classification and the one or more pixel values of block of video data. The processors may then apply the first offset value and the second offset value to the block of video data to generate a block of SAO filtered video data.
摘要翻译：通常，描述了在编码视频数据时执行采样自适应偏移（SAO）滤波的多次通过的技术。包括一个或多个处理器的视频解码装置可以执行这些技术。处理器可以确定视频数据块的第一SAO像素分类，并且基于第一SAO像素分类和块的一个或多个像素值来确定第一偏移值。一个或多个处理器还可以确定块的第二SAO像素分类，并且基于第二SAO像素分类和视频数据块的一个或多个像素值来确定第二偏移值。然后，处理器可以将第一偏移值和第二偏移值应用于视频数据块，以产生SAO滤波视频数据块。

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