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61. 发明申请

US20210406630A1 SMART CARD 有权
公开(公告)号：US20210406630A1
公开(公告)日：2021-12-30
申请号：US17317111
申请日：2021-05-11
申请人： Samsung Electronics Co., Ltd.
发明人： Ju Ri LEE , Kyeong Do KIM
IPC分类号： G06K19/07 , G05F1/46 , G06K19/073
摘要： A smart card with improved power stability is provided. The smart card comprises a rectification signal line through which a rectification signal extracted from a radio frequency (RF) signal is provided; a regulator configured to regulate a voltage of the rectification signal line to a first voltage; a power circuit configured to extract a power component from the rectification signal using an output of the regulator; a logic circuit configured to receive the power component and generate a reception enable signal on the basis of the power component; a demodulator which is enabled by the reception enable signal provided from the logic circuit and configured to extract a signal component from the rectification signal; a capacitor controller which is enabled by the reception enable signal provided from the logic circuit and configured to generate a capacitor enable signal; and a capacitor circuit which is connected to the rectification signal line and has capacitance changed according to the capacitor enable signal.

62. 发明授权

US11209846B2 Semiconductor device having plural power source voltage generators, and voltage supplying method 有权
公开(公告)号：US11209846B2
公开(公告)日：2021-12-28
申请号：US16941801
申请日：2020-07-29
申请人： Kioxia Corporation
发明人： Kazuhiko Satou , Tomonori Kurosawa , Dai Nakamura
IPC分类号： G05F1/46 , G05F1/648
摘要： In one embodiment, a semiconductor device includes a reference voltage supply circuit configured to supply a first reference voltage and a second reference voltage. The device further includes a power source voltage supply circuit including a first power source voltage generator supplied with the first reference voltage and configured to generate a first power source voltage, and a second power source voltage generator supplied with the second reference voltage and configured to generate a second power source voltage, the power source voltage supply circuit being configured to supply the first power source voltage and the second power source voltage to a power source voltage line. The device further includes a voltage control circuit connected to the power source voltage line, and configured to control a value of the first reference voltage and a value the second reference voltage.

63. 发明授权

US11188105B2 Electrical circuit for pre-regulation power management 有权
公开(公告)号：US11188105B2
公开(公告)日：2021-11-30
申请号：US16156781
申请日：2018-10-10
申请人： Smart Prong Technologies, Inc.
发明人： Hoa Nguyen
IPC分类号： G05F1/46 , G05F1/569 , H02M1/36 , H02M1/00 , G05F1/56
摘要： A system may include a switch, a multiple stage voltage converter, and a regulation circuit. The switch may generate a pre-regulation signal based on an input signal. The multiple stage voltage converter may generate an output signal based on the input signal using a clock. The regulation circuit may generate a regulation signal based on the output signal and may generate a clock reference based on at least one of the pre-regulation signal and the regulation signal. The regulation circuit may generate the clock based on at least one of the pre-regulation signal, the regulation signal, and the clock reference and determine whether a voltage level of the regulation signal is within a range. If the voltage level of the regulation signal is within the range, the regulation circuit may generate a switch signal. The switch may adjust a voltage level of the pre-regulation signal based on the switch signal.

64. 发明授权

US11175690B2 Low drop real-time-clock battery voltage control circuit for application specific integrated circuit in an engine control module 有权
公开(公告)号：US11175690B2
公开(公告)日：2021-11-16
申请号：US16844665
申请日：2020-04-09
申请人： Cummins Inc.
发明人： Abhik Giri , Mark Swain , Ashish Raj Jain , Ming Feng , Astha Ganjoo , Shreya Ghatge
IPC分类号： B60L1/00 , G06F1/14 , B60R16/033 , H03K17/567 , G05F1/46
摘要： Systems and apparatuses include a control circuit and a switching circuit. The control circuit is structured to communicate with a real-time-clock battery and to selectively communicate with a vehicle battery. The control circuit is structured in an OFF arrangement when a wake supply voltage is received from the vehicle battery and in an ON arrangement when no wake supply voltage is received. The switching circuit is structured to provide communication between the real-time-clock battery and a real-time-clock power pin of a controller with a voltage drop of about 0.1 volts or less when the control circuit is in the ON arrangement and to inhibit communication between the real-time-clock battery and the real-time-clock power pin when the control circuit is in the OFF arrangement.

65. 发明授权

US11171563B2 Phase regulation in a peak current mode power converter 有权
公开(公告)号：US11171563B2
公开(公告)日：2021-11-09
申请号：US16399290
申请日：2019-04-30
申请人： Apple Inc.
发明人： Michael Couleur , Yesim Inam , Dashun Xue
IPC分类号： H02M3/158 , H02M3/157 , G05F1/46 , H03K5/24 , H02M1/00
摘要： A power converter circuit that includes a switch node coupled to a regulated power supply node via an inductor may, during a discharge cycle, sink current from the regulated power supply node. A control circuit may generate the rising and falling ramp signals using voltage levels of an input power supply node and the regulated power supply node. The control circuit may also determine a duration of the discharge cycle using results of comparing respective voltage levels of the generated rising and falling ramp signals.

66. 发明申请

US20210344310A1 COMMON-MODE INSENSITIVE CURRENT-SENSING TOPOLOGY IN FULL-BRIDGE DRIVER 有权
公开(公告)号：US20210344310A1
公开(公告)日：2021-11-04
申请号：US17003564
申请日：2020-08-26
申请人： Cirrus Logic International Semiconductor Ltd.
发明人： Ramin ZANBAGHI , Cory J. PETERSON , Anand ILANGO , Eric KIMBALL
IPC分类号： H03F3/217 , H03F3/45 , G05F1/46 , H03F1/38 , G01R1/20 , G01R19/175 , G01R19/165 , H04R1/10
摘要： A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first high-side switch and the supply voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first high-side switch is activated. The current sensing circuitry may also include a second sense resistor coupled between the second high-side switch and the supply voltage, such that an output current through the load causes a second sense voltage proportional to the output current across the second sense resistor when the second high-side switch is activated. The system may also include measurement circuitry configured to measure the first sense voltage and the second sense voltage to determine the output current.

67. 发明申请

US20210313881A1 CHIP EMBEDDED POWER CONVERTERS 有权
公开(公告)号：US20210313881A1
公开(公告)日：2021-10-07
申请号：US17174275
申请日：2021-02-11
申请人： Faraday Semi, Inc.
发明人： Parviz Parto
IPC分类号： H02M3/156 , H02M3/335 , G06F1/26 , H01L29/772 , G05F1/46 , H02M7/00 , H02M3/00 , H02M3/158
摘要： A direct current to direct current (DC-DC) converter can include a chip embedded integrated circuit (IC), one or more switches, and an inductor. The IC can be embedded in a PCB. The IC can include driver, switches, and PWM controller. The IC and/or switches can include eGaN. The inductor can be stacked above the IC and/or switches, reducing an overall footprint. One or more capacitors can also be stacked above the IC and/or switches. Vias can couple the inductor and/or capacitors to the IC (e.g., to the switches). The DC-DC converter can offer better transient performance, have lower ripples, or use fewer capacitors. Parasitic effects that prevent efficient, higher switching speeds are reduced. The inductor size and overall footprint can be reduced. Multiple inductor arrangements can improve performance. Various feedback systems can be used, such as a ripple generator in a constant on or off time modulation circuit.

68. 发明授权

US11133663B2 Reverse current protection circuit 有权
公开(公告)号：US11133663B2
公开(公告)日：2021-09-28
申请号：US15849222
申请日：2017-12-20
申请人： Apple Inc.
发明人： Nathan F. Hanagami , Jay B. Fletcher
IPC分类号： H02H3/18 , H02H9/02 , H03K17/0812 , G05F1/575 , H03K17/082 , G05F1/46
摘要： A circuit and method for protecting from reverse current is disclosed. A reverse current protection circuit is coupled to a pass transistor of power circuitry (e.g., a power switch or voltage regulator), the pass transistor being coupled between first and second voltage nodes, the first voltage node being coupled to a power supply circuit. The reverse current protection circuit includes a sensing circuit that is configured to sense an amount of reverse current flowing through the pass transistor (from the second voltage node to the first voltage node). Responsive to the amount of reverse current exceeding a threshold value, the reverse current sensing circuit activates a shunt circuit, which redirects at least some of the reverse current to a reference node (e.g., ground).

69. 发明申请

US20210294363A1 SYSTEM AND METHOD FOR POWER SUPPLY VOLTAGE SCALING FOR SECURE EMBEDDED SYSTEMS 有权
公开(公告)号：US20210294363A1
公开(公告)日：2021-09-23
申请号：US17204257
申请日：2021-03-17
申请人： NXP USA, INC.
发明人： Jean-Philippe Meunier , Maxime Clairet , Alaa Eldin Y. El Sherif , Pierre Turpin
IPC分类号： G05F1/46 , B60R16/02 , H03K21/02
摘要： A system-on-a-chip (SoC) is designed to operate within optimal voltage and frequency ranges. If an SoC is provided power outside of the optimal voltage range, the SoC can be placed in a high-stress state, exposing the chip to a security attack. Embodiments of the present systems and method limit the minimum and maximum voltage supplied to an SoC from a power management integrated circuit (PMIC). Embodiments can also track a number of requests to provide power outside of the optimal range and can signal a warning of repeated attempts to take an SoC outside of the SoC's optimal range, which may be indicative of a malicious attack on the system.

70. 发明授权

US11126211B1 Chip package assembly and chip function execution method thereof 有权
公开(公告)号：US11126211B1
公开(公告)日：2021-09-21
申请号：US17138204
申请日：2020-12-30
申请人： REALTEK SEMICONDUCTOR CORP.
发明人： Tsung-Peng Chuang
IPC分类号： H03K5/153 , G05F1/46 , H03K5/24 , G06F3/16 , H04R3/00 , H03G3/30
摘要： A chip package assembly and a chip function execution method thereof are provided. The chip package assembly includes a plurality of pins, and one of the plurality of pins is configured to receive a voltage signal. A processing circuit is configured to receive the voltage signal, where the processing circuit determines whether a voltage level of the voltage signal is a first level or a second level, to generate a first control signal according to the first level, and generate a second control signal according to the second level. A first functional circuit of a plurality of functional circuits executes a first function according to the first control signal, and a second functional circuit of the plurality of functional circuits executes a second function according to the second control signal.

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