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71. 发明申请

US20190160805A1 FOIL PEELING APPARATUS 审中-公开
公开(公告)号：US20190160805A1
公开(公告)日：2019-05-30
申请号：US16199515
申请日：2018-11-26
申请人： KINSUS INTERCONNECT TECHNOLOGY CORP.
发明人： Shang-Chi WANG , Yun-Han YEH , Cyuan-Bang WU
IPC分类号： B32B43/00
摘要： A foil peeling apparatus adapted to a substrate having a foil thereon includes a foil peeling member, a connector and a controller. The foil peeling member has a foil peeling surface. The controller controls the connector to drive the peeling member to move along a path. The foil peeling surface of the peeling member in contact with, with an initial angle, the substrate, feeds toward the substrate for a first displacement, and then moves upwards and toward the substrate when the first feeding angle is decreased.

72. 发明授权

US09831167B1 Compound carrier board structure of flip-chip chip-scale package and manufacturing method thereof 有权
公开(公告)号：US09831167B1
公开(公告)日：2017-11-28
申请号：US15678130
申请日：2017-08-16
申请人： KINSUS INTERCONNECT TECHNOLOGY CORP.
发明人： Ting-Hao Lin , Yi-Fan Kao , Shuo-Hsun Chang , Yu-Te Lu , Kuo-Chun Huang
IPC分类号： H01L23/498 , H01L23/31 , H01L23/13 , H01L23/00 , H01L21/56 , H01L23/538 , H01L21/48 , H01L23/367
CPC分类号： H01L23/49833 , H01L21/4857 , H01L21/486 , H01L21/565 , H01L23/13 , H01L23/3114 , H01L23/3128 , H01L23/3142 , H01L23/367 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5389 , H01L23/562 , H01L24/16 , H01L24/81 , H01L25/105 , H01L2224/16227 , H01L2224/73204 , H01L2224/81191 , H01L2225/1023 , H01L2225/107 , H01L2924/12042 , H01L2924/15311 , H01L2924/1533 , H01L2924/15787 , H01L2924/18161 , H01L2924/3511 , H05K1/0206 , H05K1/0271 , H05K1/183 , H05K3/4697 , H05K2201/10378 , H05K2201/10734 , H05K2203/061 , H01L2924/00
摘要： A compound carrier board structure of Flip-Chip Chip-Scale Package and manufacturing method thereof provides a baseplate with an opening bonded to a carrier board in order to form a compound carrier board structure. A die is placed in the opening and bonded to the carrier board. A sealant is filled in a gap between surrounding walls of the opening and the die at a height lower than the die to fixedly place the die within the opening and to leave a non-active surface of the die exposed.

73. 发明授权

US09754870B2 Compound carrier board structure of flip-chip chip-scale package and manufacturing method thereof 有权
公开(公告)号：US09754870B2
公开(公告)日：2017-09-05
申请号：US15071368
申请日：2016-03-16
申请人： KINSUS INTERCONNECT TECHNOLOGY CORP.
发明人： Ting-Hao Lin , Yi-Fan Kao , Shuo-Hsun Chang , Yu-Te Lu , Kuo-Chun Huang
IPC分类号： H01L23/498 , H01L23/31 , H05K3/46 , H01L23/00 , H01L25/10 , H05K1/02 , H05K1/18
CPC分类号： H01L23/49833 , H01L21/4857 , H01L21/486 , H01L21/565 , H01L23/13 , H01L23/3114 , H01L23/3128 , H01L23/3142 , H01L23/367 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5389 , H01L23/562 , H01L24/16 , H01L24/81 , H01L25/105 , H01L2224/16227 , H01L2224/73204 , H01L2224/81191 , H01L2225/1023 , H01L2225/107 , H01L2924/12042 , H01L2924/15311 , H01L2924/1533 , H01L2924/15787 , H01L2924/18161 , H01L2924/3511 , H05K1/0206 , H05K1/0271 , H05K1/183 , H05K3/4697 , H05K2201/10378 , H05K2201/10734 , H05K2203/061 , H01L2924/00
摘要： A compound carrier board structure of Flip-Chip Chip-Scale Package and manufacturing method thereof provides a baseplate with a penetrating rectangular opening bonded to a non-conductive film then a carrier board in order to form a compound carrier board structure. The baseplate is constructed with a low Thermal Expansion Coefficient material.

74. 发明授权

US09351409B2 Method of manufacturing a thin support package structure 有权
标题翻译：制造薄支撑包装结构的方法
公开(公告)号：US09351409B2
公开(公告)日：2016-05-24
申请号：US13960123
申请日：2013-08-06
申请人： KINSUS INTERCONNECT TECHNOLOGY CORP.
发明人： Hsueh-Ping Chien , Jun-Chung Hsu
IPC分类号： H05K3/00 , H05K3/40 , H05K3/46 , H05K3/22
CPC分类号： H05K3/4682 , H05K3/007 , H05K3/22 , H05K2201/2009 , H05K2203/0165 , H05K2203/0169 , H05K2203/162
摘要： A method of manufacturing a thin support package structure includes the steps of: preparing a support plate formed with a plurality of grooves adjacent to an outer rim thereof, forming a releasing material layer on the support plate; forming a first circuit layer on the releasing material layer so as to form a thin circuit board; forming a dielectric layer on the releasing material layer; forming a plurality of openings in the dielectric layer; forming a second circuit layer on the dielectric layer; forming connection plugs by filling the openings; forming a solder mask on the dielectric layer; forming a plurality of notches on the lower surface of the support plate to communicate with the grooves, respectively; and removing the central part of the support plate between the notches and the central part of the releasing material layer on the support plate.
摘要翻译：制造薄支撑包装结构的方法包括以下步骤：制备形成有与其外缘相邻的多个槽的支撑板，在支撑板上形成释放材料层; 在所述释放材料层上形成第一电路层以形成薄电路板; 在释放材料层上形成介电层; 在介电层中形成多个开口; 在所述电介质层上形成第二电路层; 通过填充开口形成连接插头; 在电介质层上形成焊料掩模; 在所述支撑板的下表面上分别形成多个凹槽以与所述凹槽连通; 并且在支撑板上的切口和释放材料层的中心部分之间移除支撑板的中心部分。

75. 发明申请

US20150282306A1 MULTILAYER SUBSTRATE STRUCTURE FOR FINE LINE 审中-公开
标题翻译：精细线路的多层基板结构
公开(公告)号：US20150282306A1
公开(公告)日：2015-10-01
申请号：US14225671
申请日：2014-03-26
申请人： KINSUS INTERCONNECT TECHNOLOGY CORP.
发明人： Ting-Hao Lin , Yu-Te Lu
IPC分类号： H05K1/02 , H05K1/11 , H05K1/09
CPC分类号： H05K3/4679 , H05K1/116 , H05K2201/0376
摘要： A multilayer substrate structure includes a first plastic sheet, a second plastic sheet, a first circuit pattern layer, a second circuit pattern layer, and an interlayer connection pad. A first connection plug connected to the interlayer connection pad fills in a first opening of a first plastic sheet and is connected to a first connection pad of the first circuit pattern layer. A second connection plug fills a second opening of the second plastic sheet and is connected to a second connection pad of the second circuit pattern layer such that the second circuit pattern layer is electrically connected to the first circuit pattern layer via the interlayer connection pad. Therefore, even if there is little offset, it is possible to overcome the alignment tolerance and assure electrical connection between the circuit layers as desired.
摘要翻译：多层基板结构包括第一塑料片，第二塑料片，第一电路图案层，第二电路图案层和层间连接垫。连接到层间连接焊盘的第一连接插头填充第一塑料片的第一开口并连接到第一电路图案层的第一连接焊盘。第二连接插头填充第二塑料片的第二开口并且连接到第二电路图案层的第二连接焊盘，使得第二电路图案层经由层间连接焊盘电连接到第一电路图案层。因此，即使几乎没有偏移，也可以克服对准公差，并且根据需要确保电路层之间的电连接。

76. 发明申请

US20150140262A1 INSULATION LAYER STRUCTURE 审中-公开
标题翻译：绝缘层结构
公开(公告)号：US20150140262A1
公开(公告)日：2015-05-21
申请号：US14085033
申请日：2013-11-20
申请人： KINSUS INTERCONNECT TECHNOLOGY CORP.
发明人： Yu-Hsiang SUN , Jun-Chung HSU
IPC分类号： H01B3/47 , H01B3/40
CPC分类号： H01B3/47 , H01B3/40 , H01B3/448 , Y10T428/24273
摘要： An insulation layer structure includes an insulation layer, at least one glass fiber embedded in the insulation layer and at least one opening penetrating through the insulation layer and cutting off the glass fiber. The glass fiber projects from a sidewall of the opening such that the ratio of the length of the glass fiber projecting from the sidewall to the width of the opening is 0.2˜33%. With the glass fiber projecting from the sidewall of the opening, the sidewall of the opening has large surface roughness and the surface area to contact with the electrolyte. As a result, the crystal growth rate for the electrolyte onto the sidewall is accelerated. Therefore, the adhesion between the electroplating layer and the sidewall of the opening is increased, thereby improving the reliability and the yield rate of the product.
摘要翻译：绝缘层结构包括绝缘层，至少一个嵌入绝缘层中的玻璃纤维和穿过绝缘层并切断玻璃纤维的至少一个开口。玻璃纤维从开口的侧壁突出，使得从侧壁突出的玻璃纤维的长度与开口的宽度的比率为0.2〜33％。当玻璃纤维从开口的侧壁突出时，开口的侧壁具有较大的表面粗糙度和与电解液接触的表面积。结果，加速了电解质在侧壁上的晶体生长速度。因此，提高了电镀层与开口侧壁的粘合性，提高了产品的可靠性和成品率。

77. 发明申请

US20150027756A1 CIRCUIT BOARD STRUCTURE FOR HIGH FREQUENCY SIGNALS 审中-公开
标题翻译：电路板结构高频信号
公开(公告)号：US20150027756A1
公开(公告)日：2015-01-29
申请号：US13948274
申请日：2013-07-23
申请人： KINSUS INTERCONNECT TECHNOLOGY CORP.
发明人： Jun-Chung Hsu , Yu-Hui Wu
IPC分类号： H05K1/02
CPC分类号： H05K1/0237 , H05K1/0242 , H05K2201/098
摘要： A circuit board structure for high frequency signals includes a substrate and an electrical conductive circuit layer formed on the substrate. The conductive circuit layer includes circuit patterns and connection pads. The circuit pattern includes a base part with a shape of a rectangular block and a circular top part with a hemispherical shape provided on the base part. The circular top part can be modified by a circular bottom part embedded in the dielectric plastic film. Alternatively, a double layer structure with the circular top and bottom parts is formed such that the surface of the circuit pattern is provided with hemispheres to strengthen the reflection, thereby overcoming the problem of signal concentration due to the rectangular structure or the issue of signal attenuation due to surface roughness.
摘要翻译：用于高频信号的电路板结构包括基板和形成在基板上的导电电路层。导电电路层包括电路图案和连接焊盘。电路图案包括具有矩形块形状的基部和设置在基部上的具有半球形状的圆顶部。圆形顶部可以通过嵌入在介电塑料膜中的圆形底部部分进行修改。或者，形成具有圆形顶部和底部的双层结构，使得电路图案的表面设置有半球以加强反射，从而克服由于矩形结构引起的信号集中或信号衰减的问题由于表面粗糙度。

78. 发明授权

US08941224B2 Package structure of a chip and a substrate 有权
标题翻译：芯片和基板的封装结构
公开(公告)号：US08941224B2
公开(公告)日：2015-01-27
申请号：US13853281
申请日：2013-03-29
申请人： Kinsus Interconnect Technology Corp.
发明人： Ting-Hao Lin , Yu-Te Lu , De-Hao Lu
IPC分类号： H01L23/06 , H01L23/498
CPC分类号： H01L23/49827 , H01L21/563 , H01L23/49861 , H01L23/49894 , H01L23/562 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/0002 , H01L2924/00
摘要： A package structure includes a thin chip substrate, a stabilizing material layer, a chip and a filling material. A first circuit metal layer of the substrate is inlaid into a dielectric layer and a co-plane is defined by the first circuit metal layer and the dielectric layer and is exposed from the dielectric layer. The bonding pads of the substrate are on the co-plane, have a height higher than the co-plane and connected to the first circuit metal layer. The stabilizing material layer is provided on two sides of the co-plane to define a receiving space for accommodating the chip. The filling material is injected into the receiving space to fasten the pins of the chip securely with bonding pads. Since no plastic molding is required, a total thickness of the package structure and the cost is reduced. The stabilizing material layer prevents the substrate from warping and distortion.
摘要翻译：封装结构包括薄片基板，稳定材料层，芯片和填充材料。衬底的第一电路金属层嵌入电介质层中，并且由第一电路金属层和电介质层限定共面，并从电介质层露出。衬底的接合焊盘在共面上，具有高于共面的高度并连接到第一电路金属层。稳定材料层设置在共面的两侧，以限定用于容纳芯片的容纳空间。将填充材料注入到接收空间中，用粘合垫牢固地固定芯片的销。由于不需要塑料成型，所以包装结构的总厚度和成本降低。稳定材料层防止基材翘曲和变形。

79. 发明授权

US08858808B2 Method of thin printed circuit board wet process consistency on the same carrier 有权
标题翻译：薄印刷电路板湿法在同一载体上的一致性方法
公开(公告)号：US08858808B2
公开(公告)日：2014-10-14
申请号：US13448478
申请日：2012-04-17
申请人： Cheng-Hsiung Yang
发明人： Cheng-Hsiung Yang
IPC分类号： H01B13/00
CPC分类号： H05K3/0085 , H05K1/0393 , H05K3/0008 , H05K2201/10424 , H05K2203/167
摘要： A method of thin printed circuit board wet process consistency on the same carrier, and more particularly to a printed circuit board in the developing, copper plating, stripping, etching and other wet processes uses the same frame as a carrier from the beginning to the end of the wet process, such that the thin printed circuit board is conducted a continuous and automatic wet process to avoid disassembly, storage and transportation between each process. Moreover, when using the flame, the thin printed circuit board is smooth and flattening in the wet process for avoiding “water effect,” the effective area is not exposed to any mechanical members for preventing scratches, and there are point contacts between the thin printed circuit board and the frame for preventing chemical residue. Accordingly, the present invention can not only enhance the yield of the thin printed circuit board but also shorten the production time.
摘要翻译：一种薄印刷电路板在相同载体上湿法稠度的方法，更具体地说涉及在显影，镀铜，剥离，蚀刻和其它湿法工艺中的印刷电路板，从开始到结束使用与载体相同的框架使得薄的印刷电路板进行连续和自动的湿法，以避免在每个工艺之间的拆卸，储存和运输。此外，当使用火焰时，薄的印刷电路板在湿法中平滑且扁平化以避免“水分效应”，有效区域不暴露于任何机械构件以防止划伤，并且薄印刷电路板和防止化学残留物的框架。因此，本发明不仅可以提高薄印刷电路板的产量，而且缩短生产时间。

80. 发明申请

US20140291853A1 PACKAGE STRUCTURE OF A CHIP AND A SUBSTRATE 有权
标题翻译：芯片和基板的封装结构
公开(公告)号：US20140291853A1
公开(公告)日：2014-10-02
申请号：US13853281
申请日：2013-03-29
申请人： KINSUS INTERCONNECT TECHNOLOGY CORP.
发明人： Ting-Hao Lin , Yu-Te Lu , De-Hao Lu
IPC分类号： H01L23/498
CPC分类号： H01L23/49827 , H01L21/563 , H01L23/49861 , H01L23/49894 , H01L23/562 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/0002 , H01L2924/00
摘要： A package structure includes a thin chip substrate, a stabilizing material layer, a chip and a filling material. A first circuit metal layer of the substrate is inlaid into a dielectric layer and a co-plane is defined by the first circuit metal layer and the dielectric layer and is exposed from the dielectric layer. The bonding pads of the substrate are on the co-plane, have a height higher than the co-plane and connected to the first circuit metal layer. The stabilizing material layer is provided on two sides of the co-plane to define a receiving space for accommodating the chip. The filling material is injected into the receiving space to fasten the pins of the chip securely with bonding pads. Since no plastic molding is required, a total thickness of the package structure and the cost is reduced. The stabilizing material layer prevents the substrate from warping and distortion.
摘要翻译：封装结构包括薄片基板，稳定材料层，芯片和填充材料。衬底的第一电路金属层嵌入电介质层中，并且由第一电路金属层和电介质层限定共面，并从电介质层露出。衬底的接合焊盘在共面上，具有高于共面的高度并连接到第一电路金属层。稳定材料层设置在共面的两侧，以限定用于容纳芯片的容纳空间。将填充材料注入到接收空间中，用粘合垫牢固地固定芯片的销。由于不需要塑料成型，所以包装结构的总厚度和成本降低。稳定材料层防止基材翘曲和变形。

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