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71. 发明授权

US07732926B2 Semiconductor device having a through electrode with a low resistance and method of manufacturing the same 有权
标题翻译：具有低电阻的通孔的半导体器件及其制造方法
公开(公告)号：US07732926B2
公开(公告)日：2010-06-08
申请号：US11636612
申请日：2006-12-11
申请人： Shiro Uchiyama
发明人： Shiro Uchiyama
IPC分类号： H01L23/48 , H01L21/4763
CPC分类号： H01L21/76898 , H01L23/481 , H01L25/0657 , H01L25/50 , H01L2224/05001 , H01L2224/05009 , H01L2224/051 , H01L2224/056 , H01L2224/13025 , H01L2224/16145 , H01L2224/16225 , H01L2225/06513 , H01L2225/06541 , H01L2225/06582 , H01L2924/00014
摘要： A method of manufacturing a through electrode. While using at least a first conductive film for a gate electrode as a mask, an inner trench and a peripheral trench is formed. The Inner trench is provided for an inner through electrode having a columnar semiconductor. The peripheral trench is provided for a peripheral through electrode around an annular semiconductor surrounding the inner trench. The inner trench and the peripheral trench are filled with a through electrode insulation film and a through electrode conductive film, respectively, to form an inner through electrode and a peripheral through electrode.
摘要翻译：一种直通电极的制造方法。当至少使用用于栅电极的第一导电膜作为掩模时，形成内沟槽和外围沟槽。为具有柱状半导体的内部通孔提供内部沟槽。围绕围绕内部沟槽的环形半导体设置周边沟槽用于周边通孔电极。内部沟槽和外围沟槽分别填充有通孔绝缘膜和通孔电极导电膜，以形成内部通孔电极和外围通孔电极。

72. 发明授权

US07727865B2 Method for controlling conductivity of Ga2O3single crystal 有权
标题翻译：控制Ga2O3单晶导电性的方法
公开(公告)号：US07727865B2
公开(公告)日：2010-06-01
申请号：US10589852
申请日：2005-01-14
申请人： Noboru Ichinose , Kiyoshi Shimamura , Kazuo Aoki , Encarnacion Antonia Garcia Villora
发明人： Noboru Ichinose , Kiyoshi Shimamura , Kazuo Aoki , Encarnacion Antonia Garcia Villora
IPC分类号： H01L21/04
CPC分类号： C30B13/00 , C30B29/16 , H01L33/26 , Y10S438/937
摘要： To provide a method of controlling a conductivity of a Ga2O3 system single crystal with which a conductive property of a β-Ga2O3 system single crystal can be efficiently controlled.The light emitting element includes an n-type β-Ga2O3 substrate, and an n-type β-AlGaO3 cladding layer, an active layer, a p-type β-AlGaO3 cladding layer and a p-type β-Ga2O3 contact layer which are formed in order on the n-type β-Ga2O3 substrate. A resistivity is controlled to fall within the range of 2.0×10−3 to 8×102 Ωcm and a carrier concentration is controlled to fall within the range of 5.5×1015 to 2.0×1019/cm3 by changing a Si concentration within the range of 1×10−5 to 1 mol %.
摘要翻译：提供一种控制Ga 2 O 3系单晶的导电性的方法，可以有效地控制具有导电特性的Ga 2 O 3系单晶。发光元件包括n型和bgr--Ga 2 O 3衬底，n型和AlGaO 3包覆层，有源层，p型和AlGaO 3包覆层和p型＆amp; 接触层，其在n型＆amp; -Ga 2 O 3衬底上依次形成。电阻率控制在2.0×10 -3〜8×102＆OHgr·cm的范围内，通过改变载流子浓度，控制载流子浓度在5.5×10 15〜2.0×10 19 / cm 3的范围内范围为1×10-5〜1摩尔％。

73. 发明授权

US07687817B2 Group III nitride compound semiconductor light emitting element, light emitting device using the light emitting element: and method for manufacturing the light emitting element 有权
标题翻译： III族氮化物化合物半导体发光元件，使用发光元件的发光器件及其制造方法
公开(公告)号：US07687817B2
公开(公告)日：2010-03-30
申请号：US11730687
申请日：2007-04-03
申请人： Toshiya Uemura
发明人： Toshiya Uemura
IPC分类号： H01L29/22 , H01L29/227 , H01L33/00 , H01L29/24 , H01L27/15 , H01L29/26 , H01L31/12 , H01L29/167 , H01L29/18 , H01L29/06 , H01L31/0328 , H01L31/0336
CPC分类号： H01L33/22 , H01L33/20 , H01L33/52 , H01L2224/48091 , H01L2924/01004 , H01L2924/01012 , H01L2924/0102 , H01L2924/01025 , H01L2924/01078 , H01L2924/01079 , H01L2924/00014
摘要： To provide a light emitting element that can extract substantially all the light emitted from a luminous layer structure to the outside, a GaN substrate and a luminous layer structure are formed by growing III nitride compound semiconductor on a sapphire substrate that is a growth substrate. Thereafter, the sapphire substrate is lifted off and minute irregularities are formed on the exposed GaN substrate. The pitch of irregularities is shorter than the wavelength of light emitted from the luminous layer structure.
摘要翻译：为了提供可将基本上从发光层结构发出的所有光提取到外部的发光元件，通过在作为生长衬底的蓝宝石衬底上生长III族氮化物化合物半导体来形成GaN衬底和发光层结构。此后，蓝宝石衬底被剥离，并且在暴露的GaN衬底上形成微小的凹凸。不规则的间距比从发光层结构发出的光的波长短。

74. 发明授权

US07626126B2 Multilayer semiconductor device 失效
标题翻译：多层半导体器件
公开(公告)号：US07626126B2
公开(公告)日：2009-12-01
申请号：US11447975
申请日：2006-06-07
申请人： Akiji Shibata , Kimio Inaba , Masayuki Hosono
发明人： Akiji Shibata , Kimio Inaba , Masayuki Hosono
IPC分类号： H05K1/16
CPC分类号： H05K1/181 , H01L25/105 , H01L2224/32225 , H01L2225/1023 , H01L2225/1058 , H05K3/3436 , H05K2201/10515 , H05K2201/10734 , H05K2201/2036 , Y02P70/611
摘要： A multilayer semiconductor device has plural semiconductor devices, each having a circuit board for a ball grid array and a semiconductor chip provided on the board. The semiconductor boards are bonded together by a reflow mounting process to use a solder ball for interlayer connection so as to form a multilayer structure. The plural semiconductor devices each have a projection for restricting inclination of the circuit board, and the projection is provided between neighboring two of the circuit boards.
摘要翻译：多层半导体器件具有多个半导体器件，每个半导体器件具有用于球栅阵列的电路板和设置在板上的半导体芯片。通过回流安装工艺将半导体板结合在一起，以使用用于层间连接的焊球，以形成多层结构。多个半导体器件各自具有用于限制电路板的倾斜的突起，并且在相邻的两个电路板之间设置突起。

75. 发明授权

US07157322B2 Semiconductor device and method for manufacturing same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07157322B2
公开(公告)日：2007-01-02
申请号：US09828862
申请日：2001-04-10
申请人： Kiyotaka Imai
发明人： Kiyotaka Imai
IPC分类号： H01L21/336 , H01L21/8234 , H01L21/8238
CPC分类号： H01L21/26506 , H01L21/26513 , H01L21/823814 , H01L29/665
摘要： A semiconductor device including an NMOSFET which has an n-type source/drain main region containing arsenic and an n-type source/drain buffer region having arsenic and phosphorous of which a concentration is lower than that of the source/drain main region, and the concentration of the phosphorous in the source/drain buffer region is smaller than the concentration of the arsenic therein. The semiconductor device has a suppressed reverse short channel effect and reduced p-n junction leakage current. Further, the semiconductor device has a larger margin to a certain gate length and a specified threshold voltage to elevate a production yield.
摘要翻译：包括具有含有砷的n型源极/漏极主区域和具有浓度低于源极/漏极主区域的砷和磷的n型源极/漏极缓冲区域的NMOSFET的半导体器件，以及源/漏缓冲区中的磷的浓度小于其中的砷的浓度。半导体器件具有抑制的反向短沟道效应和降低的p-n结漏电流。此外，半导体器件具有较大的裕度以达到一定的栅极长度和特定的阈值电压以提高产量。

76. 发明授权

US07113678B1 Detector detecting transmission performance of optical composite cable 有权
标题翻译：检测器检测光复合电缆的传输性能
公开(公告)号：US07113678B1
公开(公告)日：2006-09-26
申请号：US11272782
申请日：2005-11-15
申请人： Satoru Onishi
发明人： Satoru Onishi
IPC分类号： G02B6/44
CPC分类号： G02B6/3817 , G01M11/33 , G02B6/381 , G02B6/3827 , G02B6/3895
摘要： The detector comprises a loopback unit 10 which is connected to a connector formed at one end of an optical camera cable, an optical loop fiber 11 connecting a first optical fiber 31 and a second optical fiber 32, and a short-circuit wiring 12 which short-circuits plural electric lines of the optical camera cable. The detector also comprises a measuring unit 40 comprising a transmission loss measuring part which is connected to a connector formed at the other end of the optical camera cable and measures transmission loss between the first optical fiber and the second optical fiber, a resistivity measuring part which measures resistivity between electric lines, a disconnection detecting part which detects connection or disconnection of electric lines by using measured resistivity, and a display part, which displays the result of transmission loss measured by the transmission loss measuring part and connection or disconnection detected by the disconnection detecting part.
摘要翻译：检测器包括环回单元10，该环回单元10连接到形成在光学相机电缆的一端的连接器，连接第一光纤31和第二光纤32的光环路光纤11和短路布线12 - 光电相机电缆的多条电线。检测器还包括测量单元40，其包括传输损耗测量部分，其连接到形成在光学相机电缆的另一端处的连接器并且测量第一光纤和第二光纤之间的传输损耗;电阻率测量部件，测量电线之间的电阻率，通过测量的电阻率检测电线的连接或断开的断路检测部分和显示由传输损耗测量部测量的传输损耗的结果和由断开检测到的连接或断开的显示部分检测部分。

77. 发明授权

US08690636B2 Compound semiconductor substrate production method 有权
标题翻译：复合半导体衬底生产方法
公开(公告)号：US08690636B2
公开(公告)日：2014-04-08
申请号：US12659765
申请日：2010-03-19
申请人： Yuichi Oshima
发明人： Yuichi Oshima
IPC分类号： B24B1/00
CPC分类号： B28D5/0076 , Y10T83/283
摘要： A method of making a compound semiconductor substrate includes providing a GaN compound semiconductor single crystal ingot, and cutting the ingot with a cutter to form a GaN single crystal substrate. The cutting is performed while controlling a temperature in a contact portion between the ingot and the cutter to be not more than 160° C. such that a cut surface of the GaN single crystal substrate has an arithmetical mean waviness (Wa) not more than 9 μm.
摘要翻译：制备化合物半导体衬底的方法包括提供GaN化合物半导体单晶锭，并用切割器切割锭以形成GaN单晶衬底。在将锭和切割器之间的接触部分的温度控制在160℃以下进行切割，使得GaN单晶基板的切割面的算术平均波纹度（Wa）不大于9 μm。

78. 发明授权

US08686540B2 Semiconductor device having high frequency wiring and dummy metal layer at multilayer wiring structure 有权
标题翻译：具有多层布线结构的高频布线和虚设金属层的半导体装置
公开(公告)号：US08686540B2
公开(公告)日：2014-04-01
申请号：US13891260
申请日：2013-05-10
申请人： Renesas Electronics Corporation
发明人： Shinichi Uchida
IPC分类号： H01L29/00 , H01L21/8238
CPC分类号： H01L23/5283 , H01L23/5227 , H01L23/528 , H01L23/585 , H01L2223/6611 , H01L2924/0002 , H01L2924/19042 , H01L2924/30105 , H01L2924/30107 , H01L2924/00
摘要： A semiconductor device includes a semiconductor substrate, a wiring layer provided over the semiconductor substrate, a high frequency wiring provided in the wiring layer, and plural dummy metals provided in the wiring layer apart from the high frequency wiring. In a plan view, the wiring layer includes a high frequency wiring vicinity region and an external region surrounding the high frequency wiring vicinity region. The high frequency wiring vicinity region includes a first region enclosed by an outer edge of the high frequency wiring, and a second region surrounding the first region. The plural dummy metals are disposed dispersedly in the high frequency wiring vicinity region and in the external region respectively. An average interval between the dummy metals in the high frequency wiring vicinity region is wider than that in the external region.
摘要翻译：半导体器件包括半导体衬底，设置在半导体衬底上的布线层，设置在布线层中的高频布线，以及设置在布线层中的与高频布线分开的多个虚设金属。在平面图中，布线层包括高频布线附近区域和围绕高频布线附近区域的外部区域。高频配线附近区域包括由高频配线的外缘包围的第一区域和围绕第一区域的第二区域。多个虚设金属分散配置在高频配线附近区域和外部区域。高频配线附近区域的虚拟金属间的平均间隔比外部区域宽。

79. 发明授权

US08682064B2 Building change detection apparatus, building change detection method and program 有权
标题翻译：建筑变更检测装置，建筑物变更检测方法和程序
公开(公告)号：US08682064B2
公开(公告)日：2014-03-25
申请号：US12292763
申请日：2008-11-25
申请人： Hiroyuki Yagyuu
发明人： Hiroyuki Yagyuu
IPC分类号： G06K9/00 , G06K9/52 , G06K9/68 , G06K9/62 , G06K9/32 , G06K9/46
CPC分类号： G06T7/254 , G06T2207/10032 , G06T2207/30184
摘要： A building change detection apparatus detects a change in a building in a predetermined area on a map between a first time point and a second time point later than the first time point. A first image data acquiring unit acquires first image data of the predetermined area photographed at the first time point. A second image data acquiring unit acquires second image data of the predetermined area photographed at the second time point. A feature change detecting unit compares the first image data with the second image data to detect changes in features including a building in the predetermined area. A building absent area specifying unit specifies a building absent area in the predetermined area where a building is not present. A building change detecting unit detects a change in a building in the predetermined area by setting a feature whose change is detected by the feature change detecting unit in the predetermined area from which the building absent area is excluded, as a changed building in the predetermined area.
摘要翻译：建筑物变更检测装置在比第一时间点晚的第一时间点和第二时间点之间的地图上的预定区域中检测建筑物的变化。第一图像数据获取单元获取在第一时间点拍摄的预定区域的第一图像数据。第二图像数据获取单元获取在第二时间点拍摄的预定区域的第二图像数据。特征改变检测单元将第一图像数据与第二图像数据进行比较，以检测包括预定区域中的建筑物的特征的变化。建筑物缺勤区域指定单元指定在不存在建筑物的预定区域中的建筑物缺失区域。建筑物变化检测单元通过将特征变化检测单元检测到的变化的特征设置在不包括建筑物缺失区域的预定区域中来检测预定区域中的建筑物的变化，作为预定区域中的改变的建筑物。

80. 发明授权

US08664663B2 Nitride semiconductor template and light-emitting diode including oxygen-doped layer and silicon-doped layer formed on the oxygen-doped layer 有权
标题翻译：氮氧化物半导体模板和包含在氧掺杂层上形成的氧掺杂层和掺硅层的发光二极管
公开(公告)号：US08664663B2
公开(公告)日：2014-03-04
申请号：US13571535
申请日：2012-08-10
申请人： Taichiroo Konno , Hajime Fujikura
发明人： Taichiroo Konno , Hajime Fujikura
IPC分类号： H01L29/15
CPC分类号： H01L21/0242 , H01L21/0243 , H01L21/02458 , H01L21/02502 , H01L21/0254 , H01L21/02576 , H01L33/007 , H01L33/12 , H01L33/20
摘要： A nitride semiconductor template includes a substrate, and a group III nitride semiconductor layer having an oxygen-doped layer formed on the substrate, and a silicon-doped layer formed on the oxygen-doped layer. A total thickness of the group III nitride semiconductor layer is not smaller than 4 μm and not greater than 10 μm, and an average silicon carrier concentration in the silicon-doped layer is not lower than 1×1018 cm−3 and not higher than 5×1018 cm−3.
摘要翻译：氮化物半导体模板包括衬底和在衬底上形成有氧掺杂层的III族氮化物半导体层和形成在氧掺杂层上的硅掺杂层。 III族氮化物半导体层的总厚度不小于4μm并且不大于10μm，并且掺硅层中的平均硅载流子浓度不低于1×1018cm-3且不高于5 ×1018厘米-3。

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