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    • 73. 发明授权
    • Illuminating device and projection display device using the same
    • 照明装置及使用其的投影显示装置
    • US08998419B2
    • 2015-04-07
    • US13390917
    • 2009-08-21
    • Atsushi Katou
    • Atsushi Katou
    • G03B21/14G03B21/20
    • G03B21/14G03B21/2073
    • Provided is an illuminating device that includes: first light guiding means (3) where light incident from one end surface is propagated inside to exit from the other end surface; illuminating optical system (1) that spatially separates a luminous flux from the other end surface of first light guiding means (3) into a plurality of luminous fluxes, and forms an optical image formed on the other end surface of first light guiding means (3) on display element (12); reflective polarizing plate (11) that is located between illuminating optical system (1) and display element (12), and transmits first polarized light while reflecting second polarized light different that is in polarized state from the first polarized light toward illuminating optical system (1); reflecting element (7) that is disposed at a position where the plurality of luminous fluxes are spatially separated, and that includes transmission regions through which the plurality of luminous fluxes are transmitted, and a reflecting film formed in a region other than the transmission regions to reflect light reflected by reflective polarizing plate (11) toward reflective polarizing plate (11); and phase plate (10) located between reflecting element (7) and reflective polarizing plate (11).
    • 本发明提供一种照明装置,其特征在于,包括:从一个端面入射的光从内部传播到另一端面的第一导光装置(3) 照明光学系统(1),其将来自第一导光装置(3)的另一端面的光通量空间分离成多个光束,并且形成在第一导光装置(3)的另一端面上形成的光学图像 )在显示元件(12)上; 位于照明光学系统(1)和显示元件(12)之间的反射偏光板(11),并且将第一偏振光透射,同时将与偏振状态不同的第二偏振光从第一偏振光朝向照明光学系统(1 ); 反射元件(7),其设置在多个光束在空间上分离的位置,并且包括透射多个光束的透射区域和形成在除了透射区域以外的区域的反射膜, 将反射偏光板(11)反射的光反射到反射偏光板(11)上; 以及位于反射元件(7)和反射偏振板(11)之间的相位板(10)。
    • 75. 发明授权
    • Video processing device and video processing method including deserializer
    • 视频处理设备和视频处理方法,包括解串器
    • US08913196B2
    • 2014-12-16
    • US14345920
    • 2011-09-22
    • Shigeo Hamamura
    • Shigeo Hamamura
    • H04N9/74H04N7/08H04N5/06
    • H04N7/08H04N5/06H04N7/12H04N21/4342
    • A video processing device includes: a deserializer that both converts a serial digital interface signal received as input to parallel data and extracts a clock; format detection means that both detects a video data format that is included in the parallel data that were converted by the deserializer and supplies clock ratio information that indicates the ratio of the clock frequency and the pixel clock frequency stipulated by the format; pixel clock generation means that generates a pixel clock based on the clock that was extracted by the deserializer; saving means that saves video data and supplies the saved video data in synchronization with the pixel clock; write control means that, based on the clock ratio information, divides the video data that are contained in the parallel data that were converted by the deserializer into two or four portions and saves the divided data in the saving means; and an unpack processor that, synchronized with the pixel clock, subjects the data that are supplied from the saving means to processing that accords with the video format.
    • 视频处理设备包括:解串器,其将接收到的作为输入的串行数字接口信号转换为并行数据并提取时钟; 格式检测装置既检测包括在并行数据中的由解串器转换的视频数据格式,并提供指示由该格式规定的时钟频率和像素时钟频率的比率的时钟比率信息; 像素时钟产生装置,基于由解串器提取的时钟产生像素时钟; 保存意味着保存视频数据并且与像素时钟同步地提供保存的视频数据; 写控制意味着,基于时钟比信息,将由解串器转换的并行数据中包含的视频数据分成两部分或四部分,并将分割的数据保存在保存装置中; 以及与像素时钟同步的解包处理器使从保存装置提供的数据对应于视频格式的处理。
    • 78. 发明授权
    • Electronic device
    • 电子设备
    • US08876299B2
    • 2014-11-04
    • US13386261
    • 2009-07-21
    • Qing Song
    • Qing Song
    • G03B21/14H05K5/02F16M11/10
    • G03B21/14F16M11/10G03B21/145H05K5/0234
    • An electronic device of the present application includes a case (1), a stem-shaped leg (3), and a leg fixing part (4). The leg fixing part (4) is provided on one face of the case (1) and includes a case thread ridge portion (4a) that is formed on an inside face of a hole, into which the leg (3) is inserted, and that is divided into isolated thread ridge portions. A peripheral face of a stem portion of the leg (3) has a first screw structure portion (3a), which is engaged with the case thread ridge portion (4a), and a second screw structure portion (3b) which is engaged with the case thread ridge portion (4a) before being engaged with the first screw structure portion (3a). The second screw structure portion (3b) has a guide portion (5a) and an idle turn inducing portion (5b). The guide portion (5a) guides the case thread ridge portion (4a) to the second screw structure portion (3b) when the leg (3) is inserted into the hole while being turned in a direction in which the leg (3) enters the case (1). The idle turn inducing portion (5b) causes the second screw structure portion (3b) to turn idly with respect to the case thread ridge portion (4a) when the leg (3) is turned in a direction in which the leg (3) is taken out of the case (1).
    • 本申请的电子设备包括壳体(1),杆状腿部(3)和腿部固定部件(4)。 腿部固定部分(4)设置在壳体(1)的一个面上,并且包括形成在其中插入腿部(3)的孔的内表面上的壳体螺纹脊部分(4a),以及 分为孤立螺纹脊部分。 腿部(3)的杆部的周面具有与壳线螺纹部(4a)接合的第一螺纹结构部(3a)和与第一螺纹结构部(3b)接合的第二螺钉结构部(3b) 在与第一螺杆结构部分(3a)接合之前的壳体螺纹脊部分(4a)。 第二螺杆结构部分(3b)具有引导部分(5a)和怠速转弯诱导部分(5b)。 当腿(3)插入孔中时,引导部(5a)将壳线螺纹部分(4a)引导到第二螺钉结构部分(3b),同时沿腿部(3)进入方向转动 情况1)。 怠速转向诱导部分(5b)使得当腿部(3)沿腿部(3)的方向转动时,第二螺钉结构部分(3b)相对于壳体螺纹脊部分(4a)空转, 取出案件(1)。
    • 80. 发明申请
    • Video Processing Device and Video Processing Method
    • 视频处理设备和视频处理方法
    • US20140226064A1
    • 2014-08-14
    • US14345920
    • 2012-09-22
    • Shigeo Hamamura
    • Shigeo Hamamura
    • H04N7/08H04N5/06
    • H04N7/08H04N5/06H04N7/12H04N21/4342
    • A video processing device includes: a deserializer that both converts a serial digital interface signal received as input to parallel data and extracts a clock; format detection means that both detects a video data format that is included in the parallel data that were converted by the deserializer and supplies clock ratio information that indicates the ratio of the clock frequency and the pixel clock frequency stipulated by the format; pixel clock generation means that generates a pixel clock based on the clock that was extracted by the deserializer; saving means that saves video data and supplies the saved video data in synchronization with the pixel clock; write control means that, based on the clock ratio information, divides the video data that are contained in the parallel data that were converted by the deserializer into two or four portions and saves the divided data in the saving means; and an unpack processor that, synchronized with the pixel clock, subjects the data that are supplied from the saving means to processing that accords with the video format.
    • 视频处理设备包括:解串器,其将接收到的作为输入的串行数字接口信号转换为并行数据并提取时钟; 格式检测装置既检测包括在并行数据中的由解串器转换的视频数据格式,并提供指示由该格式规定的时钟频率和像素时钟频率的比率的时钟比率信息; 像素时钟生成装置,其基于由解串器提取的时钟生成像素时钟; 保存意味着保存视频数据并且与像素时钟同步地提供保存的视频数据; 写控制意味着,基于时钟比信息,将由解串器转换的并行数据中包含的视频数据分成两部分或四部分,并将分割的数据保存在保存装置中; 以及与像素时钟同步的解包处理器使从保存装置提供的数据对应于视频格式的处理。