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81. 发明授权

US09312339B2 Strain relaxation using metal materials and related structures 有权
标题翻译：应变松弛使用金属材料和相关结构
公开(公告)号：US09312339B2
公开(公告)日：2016-04-12
申请号：US14165471
申请日：2014-01-27
申请人： Soitec
发明人： Christiaan J. Werkhoven
IPC分类号： H01L29/20 , H01L21/18 , H01L21/762 , H01L21/24 , H01L21/02 , H01L29/06
CPC分类号： H01L29/2003 , H01L21/02002 , H01L21/02458 , H01L21/02488 , H01L21/185 , H01L21/242 , H01L21/76254 , H01L29/0684
摘要： Methods of fabricating semiconductor structures include forming a plurality of openings extending through a semiconductor material and at least partially through a metal material and deforming the metal material to relax a remaining portion of the semiconductor material. The metal material may be deformed by exposing the metal material to a temperature sufficient to alter (i.e., increase) its ductility. The metal material may be formed from one or more of hafnium, zirconium, yttrium, and a metallic glass. Another semiconductor material may be deposited over the remaining portions of the semiconductor material, and a portion of the metal material may be removed from between each of the remaining portions of the semiconductor material. Semiconductor structures may be formed using such methods.
摘要翻译：制造半导体结构的方法包括形成延伸穿过半导体材料并且至少部分地穿过金属材料的多个开口并使金属材料变形以使半导体材料的剩余部分松弛。金属材料可能通过将金属材料暴露于足以改变（即增加）其延展性的温度而变形。金属材料可以由铪，锆，钇和金属玻璃中的一种或多种形成。另外的半导体材料可以沉积在半导体材料的剩余部分上，并且金属材料的一部分可以从半导体材料的每个剩余部分之间移除。可以使用这种方法形成半导体结构。

82. 发明授权

US09312133B2 Wafer structure for electronic integrated circuit manufacturing 有权
公开(公告)号：US09312133B2
公开(公告)日：2016-04-12
申请号：US13218335
申请日：2011-08-25
申请人： David B. Kerwin , Joseph Benedetto
发明人： David B. Kerwin , Joseph Benedetto
IPC分类号： H01L21/18 , H01L27/092 , H01L29/10
CPC分类号： H01L21/187 , H01L21/02013 , H01L21/18 , H01L21/182 , H01L21/185 , H01L21/304 , H01L21/6835 , H01L27/092 , H01L27/0921 , H01L29/1087
摘要： A bonded wafer structure having a handle wafer, a device wafer, and an interface region with an abrupt transition between the conductivity profile of the device wafer and the handle wafer is used for making semiconductor devices. The improved doping profile of the bonded wafer structure is well suited for use in the manufacture of integrated circuits. The bonded wafer structure is especially suited for making radiation-hardened integrated circuits.

83. 发明授权

US09306116B2 Semiconductor wafer bonding incorporating electrical and optical interconnects 有权
标题翻译：包含电和光互连的半导体晶片接合
公开(公告)号：US09306116B2
公开(公告)日：2016-04-05
申请号：US14537627
申请日：2014-11-10
申请人： Ostendo Technologies, Inc.
发明人： Hussein S. El-Ghoroury , Chih-Li Chuang , Kameshwar Yadavalli , Qian Fan
IPC分类号： H01L21/00 , H01L33/00 , H01L27/146 , H01L21/18
CPC分类号： H01L33/0079 , H01L21/187 , H01L27/14618 , H01L27/14683 , H01L33/0066 , H01L33/0095 , H01L2924/0002 , H01L2924/351 , H01L2933/0066 , H01L2924/00
摘要： Methods for bonding semiconductor wafers requiring the transfer of electrical and optical signals between the bonded wafers and across the bonding interface by interfusing optical interconnects on one wafer with optical interconnects on a second wafer, interfusing electrical interconnects on one wafer with electrical interconnects on the second wafer, and interfusing a dielectric intermediary bonding layer on one wafer with the dielectric intermediary bonding layer on the second wafer to bond the wafers together with electrical interconnections and optical interconnections between the wafers. The methods are also applicable to the bonding of semiconductor wafers to provide a high density of electrical interconnects between wafers.
摘要翻译：通过将一个晶片上的光学互连件与第二晶片上的光学互连件连接在一起，将在一个晶片上的电互连与第二晶片上的电互连相连接的半导体晶片的接合需要在接合的晶片之间和结合界面之间传送电和光信号的方法并且将一个晶片上的电介质中间键合层与第二晶片上的电介质中间键合层进行接合，以将晶片与晶片之间的电互连和光学互连结合在一起。这些方法也适用于半导体晶片的结合，以在晶片之间提供高密度的电互连。

84. 发明授权

US09293523B2 Method of forming III-V channel 有权
标题翻译：形成III-V通道的方法
公开(公告)号：US09293523B2
公开(公告)日：2016-03-22
申请号：US14313086
申请日：2014-06-24
申请人： Applied Materials, Inc.
发明人： Xinyu Bao , Errol Antonio C. Sanchez
IPC分类号： H01L29/06 , H01L29/12 , H01L29/78 , H01L21/18 , H01L21/20 , H01L21/336 , H01L21/36 , H01L29/205 , H01L21/02 , H01L29/10
CPC分类号： H01L29/0607 , B82Y10/00 , H01L21/02546 , H01L29/0649 , H01L29/0653 , H01L29/0661 , H01L29/0673 , H01L29/0688 , H01L29/1033 , H01L29/12 , H01L29/205 , H01L29/42392 , H01L29/66439 , H01L29/775 , H01L29/785 , H01L29/78696
摘要： Embodiments of the present disclosure relate to semiconductor devices such as transistors used for amplifying or switching electronic signals. In one embodiment, a first trench is formed in a dielectric layer formed on a substrate to expose a surface of the substrate, a multi-stack layer structure is formed within the first trench, and a third semiconductor compound layer is formed on the second semiconductor compound layer, wherein the second semiconductor compound layer has an etching resistance against an etchant lower than that of the first and third semiconductor compound layers, a second trench is formed in the dielectric layer to partially expose at least the second semiconductor compound layer and the third semiconductor compound layer, and the second semiconductor compound layer is selectively removed so that the first semiconductor compound layer is isolated from the third semiconductor compound layer by an air gap.
摘要翻译：本公开的实施例涉及半导体器件，例如用于放大或切换电子信号的晶体管。在一个实施例中，在形成在基板上的电介质层中形成第一沟槽以暴露衬底的表面，在第一沟槽内形成多层叠层结构，在第二半导体上形成第三半导体化合物层化合物层，其中所述第二半导体化合物层对于蚀刻剂具有比所述第一和第三半导体化合物层低的蚀刻剂的耐蚀刻性，在所述电介质层中形成第二沟槽，以至少部分地暴露所述第二半导体化合物层和所述第三半导体化合物层半导体化合物层，并且第二半导体化合物层被选择性地去除，使得第一半导体化合物层通过气隙与第三半导体化合物层隔离。

85. 发明授权

US09147599B2 Wafer support system and method for separating support substrate from solid-phase bonded wafer and method for manufacturing semiconductor device 有权
标题翻译：用于将支撑基板与固相接合晶片分离的晶片支撑系统和方法及其制造方法
公开(公告)号：US09147599B2
公开(公告)日：2015-09-29
申请号：US14249480
申请日：2014-04-10
申请人： FUJI ELECTRIC CO., LTD.
发明人： Tsunehiro Nakajima
IPC分类号： H01L21/30 , H01L21/762 , H01L21/18 , H01L21/78 , H01L29/66 , H01L21/84 , H01L21/683
CPC分类号： H01L21/76254 , H01L21/187 , H01L21/6836 , H01L21/78 , H01L21/7806 , H01L21/84 , H01L29/66333
摘要： A method is disclosed for separating a support substrate from a solid-phase bonded wafer which includes a Si wafer and support substrate solid-phase bonded to back surface of the Si wafer. The method includes a step of irradiating the Si wafer with laser light with a wavelength which passes through the Si wafer and is focused on a solid-phase bonding interface between the Si wafer and support substrate to form a breaking layer in at least part of an outer circumferential portion of the solid-phase bonding interface, a step of separating the breaking layer; and a step of separating the solid-phase bonding interface. The method is capable of using a Si thin wafer without substantial wafer cracking at an initial stage where the wafer is inputted to a wafer process, capable of separating a support substrate from the Si thin wafer easily, and capable of reducing the wafer cost.
摘要翻译：公开了一种用于将支撑衬底与固相接合晶片分离的方法，该固态晶片包括固定于Si晶片后表面的Si晶片和支撑衬底。该方法包括用穿过Si晶片的波长的激光照射Si晶片并聚焦在Si晶片和支撑衬底之间的固相接合界面上以在至少部分固相接合界面的外周部分，分离断裂层的步骤; 以及分离固相接合界面的步骤。该方法能够在将晶片输入到晶片工艺的初始阶段使用Si薄晶片而不会发生实质的晶片破裂，能够容易地将支撑衬底与Si薄晶片分离，并且能够降低晶片成本。

86. 发明授权

US09123716B2 Method for bonding two silicon substrates, and a correspondeing system of two silicon substrates 有权
标题翻译：用于接合两个硅衬底的方法，以及两个硅衬底的对应系统
公开(公告)号：US09123716B2
公开(公告)日：2015-09-01
申请号：US13719799
申请日：2012-12-19
申请人： Julian Gonska , Heribert Weber , Jens Frey , Timo Schary , Thomas Mayer
发明人： Julian Gonska , Heribert Weber , Jens Frey , Timo Schary , Thomas Mayer
IPC分类号： H01L21/00 , H01L23/48 , H01L21/50 , H01L23/488 , H01L21/18 , B81C1/00 , H01L23/00
CPC分类号： H01L21/50 , B81B2201/0235 , B81B2201/0264 , B81C1/00269 , B81C2203/0118 , B81C2203/035 , H01L21/185 , H01L21/187 , H01L23/488 , H01L24/94 , H01L2224/83805 , H01L2924/0132 , H01L2924/01322 , H01L2924/10253 , H01L2924/16251 , H01L2924/01013 , H01L2924/01032 , H01L2924/00
摘要： A method for bonding two silicon substrates and a corresponding system of two silicon substrates. The method includes: providing first and second silicon substrates; depositing a first bonding layer of pure aluminum or of aluminum-copper having a copper component between 0.1 and 5% on a first bonding surface of the first silicon substrate; depositing a second bonding layer of germanium above the first bonding surface or above a second bonding surface of the second silicon substrate; subsequently joining the first and second silicon substrates, so that the first and the second bonding surfaces lie opposite each other; and implementing a thermal treatment step to form an eutectic bonding layer of aluminum-germanium or containing aluminum-germanium as the main component, between the first silicon substrate and the second silicon substrate, spikes which contain aluminum as a minimum and extend into the first silicon substrate, forming at least on the first bonding surface.
摘要翻译：一种用于接合两个硅衬底和两个硅衬底的对应系统的方法。该方法包括：提供第一和第二硅衬底; 在第一硅衬底的第一接合表面上沉积具有0.1至5％铜含量的纯铝或铝 - 铜的第一接合层; 在所述第一接合表面上方或第二硅衬底的第二接合表面上方沉积锗的第二接合层; 随后接合第一和第二硅衬底，使得第一和第二接合表面彼此相对; 并且在第一硅衬底和第二硅衬底之间实现热处理步骤以形成铝锗或含有铝 - 锗的共晶结合层作为主要组分，最小含有铝并延伸到第一硅中的尖峰衬底，至少形成在第一结合表面上。

87. 发明授权

US09105827B2 Method for bonding semiconductor substrates 有权
标题翻译：半导体衬底接合方法
公开(公告)号：US09105827B2
公开(公告)日：2015-08-11
申请号：US14322787
申请日：2014-07-02
申请人： IMEC
发明人： Nga Phuong Pham , Maarten Rosmeulen , Bart Vandevelde
IPC分类号： H01L33/62 , H01L33/32 , H01L23/00 , H01L33/00 , H01L21/18 , H01L33/12
CPC分类号： H01L33/62 , H01L21/187 , H01L24/02 , H01L33/005 , H01L33/007 , H01L33/0079 , H01L33/12 , H01L33/32 , H01L2924/12041 , H01L2924/00
摘要： A method is provided for bonding a first substrate carrying a semiconductor device layer on its front surface to a second substrate. The method comprises producing the semiconductor device layer on the front surface of the first substrate, depositing a first metal bonding layer or a stack of metal layers on the first substrate, on top of the semiconductor device layer, depositing a second metal bonding layer or a stack of metal layers on the front surface of the second substrate, depositing a metal stress-compensation layer on the back side of the second substrate, thereafter establishing a metal bond between the first and second substrate, by bringing the first and second metal bonding layers or stacks of layers into mutual contact under conditions of mechanical pressure and temperature suitable for obtaining the metal bond, and removing the first substrate.
摘要翻译：提供了一种将在其表面上承载半导体器件层的第一衬底接合到第二衬底的方法。该方法包括在第一衬底的前表面上制造半导体器件层，在第一衬底上沉积第一金属结合层或金属层堆叠，在半导体器件层的顶部上，沉积第二金属结合层或在所述第二基板的前表面上堆叠金属层，在所述第二基板的背面上沉积金属应力补偿层，然后通过使所述第一和第二金属粘结层或堆叠层在适于获得金属粘结的机械压力和温度的条件下相互接触，以及去除第一基底。

88. 发明申请

US20150214082A1 Wafer Processing Method and Apparatus 有权
标题翻译：晶圆加工方法及装置
公开(公告)号：US20150214082A1
公开(公告)日：2015-07-30
申请号：US14163460
申请日：2014-01-24
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Chih-Hui Huang , Chun-Han Tsao , Sheng-Chau Chen , Yeur-Luen Tu , Chia-Shiung Tsai , Xiaomeng Chen
IPC分类号： H01L21/67 , H01L21/683 , H01L21/762 , H01L21/18 , H01L21/66
CPC分类号： H01L21/67092 , H01L21/187 , H01L21/6838 , H01L21/68735 , H01L21/76251 , H01L22/12 , Y10T156/1744
摘要： An apparatus for and a method of bonding a first substrate and a second substrate are provided. In an embodiment a first wafer chuck has a first curved surface and a second wafer chuck has a second curved surface. A first wafer is placed on the first wafer chuck and a second wafer is placed on a second wafer chuck, such that both the first wafer and the second wafer are pre-warped prior to bonding. Once the first wafer and the second wafer have been pre-warped, the first wafer and the second wafer are bonded together.
摘要翻译：提供了一种用于接合第一基板和第二基板的装置和方法。在一个实施例中，第一晶片卡盘具有第一弯曲表面，而第二晶片卡盘具有第二弯曲表面。将第一晶片放置在第一晶片卡盘上，并且将第二晶片放置在第二晶片卡盘上，使得第一晶片和第二晶片在结合之前都被预翘曲。一旦第一晶片和第二晶片已经被预翘曲，则第一晶片和第二晶片被结合在一起。

89. 发明授权

US09064783B2 Method for the direct bonding of a silicon oxide layer 有权
标题翻译：氧化硅层的直接接合方法
公开(公告)号：US09064783B2
公开(公告)日：2015-06-23
申请号：US14354402
申请日：2012-10-24
申请人： COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
发明人： Chiara Sabbione , Lea Di Cioccio , Jean-Pierre Nieto , Laurent Vandroux
IPC分类号： H01L21/30 , H01L21/46 , H01L21/18 , H01L21/20 , H01L21/762 , H01L21/02 , H01L21/3105
CPC分类号： H01L21/187 , H01L21/02126 , H01L21/02164 , H01L21/02274 , H01L21/02304 , H01L21/02359 , H01L21/2007 , H01L21/3105 , H01L21/31051 , H01L21/76251
摘要： A direct bonding method between at least a first layer (104) comprising silicon oxide having a thickness equal to or higher than about 10 nm and a second layer (108) of material having hydrophilicity, comprising at least the steps of: making the first layer (104) on a first substrate (102) such that the absorbance value of this first layer (104), at a vibration frequency of silanol bonds present in the first layer (104) equal to about 3660 cm−1, is equal to or higher than about 1.5×10−5 nm−1, the silanol bonds being formed in at least part of the thickness of the first layer (104) which is equal to or higher than about 10 nm; direct bonding between the first layer (104) and the second layer (108).
摘要翻译：至少包括厚度等于或高于约10nm的氧化硅的第一层（104）和具有亲水性的材料的第二层（108）之间的直接接合方法，至少包括以下步骤：使第一层（104）上的第一层（104）的吸光度值使得第一层（104）中存在的硅烷醇键的振动频率等于约3660cm -1的第一层（104）的吸光度值等于或等于高于约1.5×10-5nm-1，所述硅烷醇键形成在所述第一层（104）的厚度的至少一部分中等于或高于约10nm; 在第一层（104）和第二层（108）之间的直接结合。

90. 发明授权

US09040385B2 Mechanisms for cleaning substrate surface for hybrid bonding 有权
标题翻译：用于清洗基片表面以进行混合键合的机理
公开(公告)号：US09040385B2
公开(公告)日：2015-05-26
申请号：US13949756
申请日：2013-07-24
申请人： Taiwan Semiconductor Manufacturing Co., Ltd.
发明人： Sheng-Chau Chen , Chih-Hui Huang , Yeur-Luen Tu , Cheng-Ta Wu , Chia-Shiung Tsai , Xiao-Meng Chen
IPC分类号： H01L21/30 , H01L21/02 , H01L21/768 , H01L21/18 , H01L21/67 , H01L33/00
CPC分类号： H01L21/67207 , H01L21/02041 , H01L21/02068 , H01L21/02074 , H01L21/02334 , H01L21/187 , H01L21/67017 , H01L21/67196 , H01L21/68707 , H01L33/0079 , Y10S438/906
摘要： Embodiments of mechanisms for cleaning a surface of a semiconductor wafer for a hybrid bonding are provided. The method for cleaning a surface of a semiconductor wafer for a hybrid bonding includes providing a semiconductor wafer, and the semiconductor wafer has a conductive pad embedded in an insulating layer. The method also includes performing a plasma process to a surface of the semiconductor wafer, and metal oxide is formed on a surface of the conductive structure. The method further includes performing a cleaning process using a cleaning solution to perform a reduction reaction with the metal oxide, such that metal-hydrogen bonds are formed on the surface of the conductive structure. The method further includes transferring the semiconductor wafer to a bonding chamber under vacuum for hybrid bonding. Embodiments of mechanisms for a hybrid bonding and a integrated system are also provided.
摘要翻译：提供了用于清洁用于混合键合的半导体晶片的表面的机构的实施例。用于清洁用于混合键合的半导体晶片的表面的方法包括提供半导体晶片，并且半导体晶片具有嵌入绝缘层中的导电焊盘。该方法还包括对半导体晶片的表面进行等离子体处理，并且在导电结构的表面上形成金属氧化物。该方法还包括使用清洁溶液进行清洁处理以与金属氧化物进行还原反应，使得在导电结构的表面上形成金属 - 氢键。该方法还包括将半导体晶片在真空下转移到接合室用于混合键合。还提供了用于混合键合和集成系统的机构的实施例。

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